hi,
The patches in the series are just in work in progress and intended to clear some doubts as pointed below. Any comment/direction is helpful from the linaro acpi group.
1) Basic controllers like GIC and timer need to be initialised before platform drivers are ready so question is how to invoke the __init of these devices. Is there any function to raw parse the ACPI tables similar to existing DT API's?
2) Some important elements like clock frequency is missing from the GTDT table. how to get them?
Thanks in advance.
Amit Daniel Kachhap (3): irqdomain: Add a new API irq_create_default_mapping ACPI: ARM: Update acpi_register_gsi to register with the core IRQ subsystem ACPI: clocksource: arch_timer: Use GTDT table to gather data
drivers/acpi/plat/arm/boot.c | 27 ++++++++++++++-- drivers/clocksource/arm_arch_timer.c | 58 ++++++++++++++++++++++++++++++++++ include/linux/irqdomain.h | 2 + kernel/irq/irqdomain.c | 35 ++++++++++++++++++++ 4 files changed, 119 insertions(+), 3 deletions(-)
This new API is similar to irq_create_of_mapping but uses the default attached irqdomain.
Signed-off-by: Amit Daniel Kachhap amit.daniel@samsung.com --- include/linux/irqdomain.h | 2 ++ kernel/irq/irqdomain.c | 35 +++++++++++++++++++++++++++++++++++ 2 files changed, 37 insertions(+), 0 deletions(-)
diff --git a/include/linux/irqdomain.h b/include/linux/irqdomain.h index c983ed1..356e869 100644 --- a/include/linux/irqdomain.h +++ b/include/linux/irqdomain.h @@ -175,6 +175,8 @@ extern void irq_domain_associate_many(struct irq_domain *domain,
extern unsigned int irq_create_mapping(struct irq_domain *host, irq_hw_number_t hwirq); +extern unsigned int irq_create_default_mapping(const u32 *intspec, + unsigned int intsize); extern void irq_dispose_mapping(unsigned int virq);
/** diff --git a/kernel/irq/irqdomain.c b/kernel/irq/irqdomain.c index 706724e..1d88d7f 100644 --- a/kernel/irq/irqdomain.c +++ b/kernel/irq/irqdomain.c @@ -502,6 +502,41 @@ unsigned int irq_create_of_mapping(struct device_node *controller, } EXPORT_SYMBOL_GPL(irq_create_of_mapping);
+unsigned int irq_create_default_mapping(const u32 *intspec, + unsigned int intsize) +{ + struct irq_domain *domain; + irq_hw_number_t hwirq; + unsigned int type = IRQ_TYPE_NONE; + unsigned int virq; + + domain = irq_default_domain; + if (!domain) { + pr_warn("no irq domain found !\n"); + return 0; + } + + /* If domain has no translation, then we assume interrupt line */ + if (domain->ops->xlate == NULL) + hwirq = intspec[0]; + else { + if (domain->ops->xlate(domain, NULL, intspec, intsize, + &hwirq, &type)) + return 0; + } + + /* Create mapping */ + virq = irq_create_mapping(domain, hwirq); + if (!virq) + return virq; + + /* Set type if specified and different than the current one */ + if (type != IRQ_TYPE_NONE && + type != irq_get_trigger_type(virq)) + irq_set_irq_type(virq, type); + return virq; +} +EXPORT_SYMBOL_GPL(irq_create_default_mapping); /** * irq_dispose_mapping() - Unmap an interrupt * @virq: linux irq number of the interrupt to unmap
This API is similar to DT based irq_of_parse_and_map but does link parent/child IRQ controllers. This is tested for primary GIC PPI and GIC SPI interrupts and not for secondary child irq controllers.
Signed-off-by: Amit Daniel Kachhap amit.daniel@samsung.com --- drivers/acpi/plat/arm/boot.c | 27 ++++++++++++++++++++++++--- 1 files changed, 24 insertions(+), 3 deletions(-)
diff --git a/drivers/acpi/plat/arm/boot.c b/drivers/acpi/plat/arm/boot.c index 7aa98d4..5521695 100644 --- a/drivers/acpi/plat/arm/boot.c +++ b/drivers/acpi/plat/arm/boot.c @@ -255,6 +255,7 @@ static int acpi_register_gsi_ioapic(struct device *dev, u32 gsi, int (*__acpi_register_gsi)(struct device *dev, u32 gsi, int trigger, int polarity) = acpi_register_gsi_pic;
+#define MAX_SPECIFIER_SIZE 4 /* * success: return IRQ number (>=0) * failure: return < 0 @@ -263,11 +264,31 @@ int acpi_register_gsi(struct device *dev, u32 gsi, int trigger, int polarity) { unsigned int irq; unsigned int plat_gsi = gsi; + u32 specifier[MAX_SPECIFIER_SIZE];
- plat_gsi = (*__acpi_register_gsi)(dev, gsi, trigger, polarity); - - irq = gsi_to_irq(plat_gsi); + memset(specifier, 0, sizeof(specifier)); + if (gsi <= 32) { + /* PPI interrupt */ + specifier[0] = 1; + }
+ specifier[1] = gsi; + if (trigger == ACPI_EDGE_SENSITIVE && + polarity == ACPI_ACTIVE_LOW) + specifier[2] = IRQ_TYPE_EDGE_FALLING; + else if (trigger == ACPI_EDGE_SENSITIVE && + polarity == ACPI_ACTIVE_HIGH) + specifier[2] = IRQ_TYPE_EDGE_RISING; + else if (trigger == ACPI_LEVEL_SENSITIVE && + polarity == ACPI_ACTIVE_LOW) + specifier[2] = IRQ_TYPE_LEVEL_LOW; + else if (trigger == ACPI_LEVEL_SENSITIVE && + polarity == ACPI_ACTIVE_HIGH) + specifier[2] = IRQ_TYPE_LEVEL_HIGH; + else + specifier[2] = IRQ_TYPE_NONE; + + irq = irq_create_default_mapping(specifier, 3); return irq; } EXPORT_SYMBOL_GPL(acpi_register_gsi);
This code changes uses GTDT ACPI table to gather IRQ number. Clock frequency is not a member of GTDT table so it is harcoded.
Signed-off-by: Amit Daniel Kachhap amit.daniel@samsung.com --- drivers/clocksource/arm_arch_timer.c | 58 ++++++++++++++++++++++++++++++++++ 1 files changed, 58 insertions(+), 0 deletions(-)
diff --git a/drivers/clocksource/arm_arch_timer.c b/drivers/clocksource/arm_arch_timer.c index ffadd83..36cc6a5 100644 --- a/drivers/clocksource/arm_arch_timer.c +++ b/drivers/clocksource/arm_arch_timer.c @@ -23,6 +23,10 @@
#include <clocksource/arm_arch_timer.h>
+#ifdef CONFIG_ACPI +#include <linux/acpi.h> +#endif + static u32 arch_timer_rate;
enum ppi_nr { @@ -341,6 +345,59 @@ static void __init arch_timer_init(struct device_node *np) return; }
+#ifdef CONFIG_ACPI + struct acpi_table_gtdt *gtdt; + int trigger, polarity; + u32 irq; + if (ACPI_FAILURE(acpi_get_table(ACPI_SIG_GTDT, 0, + (struct acpi_table_header **)>dt))) { + pr_err("arch_timer: GTDT table not defined\n"); + return; + } + /* HACK: Hardcoding the timer clock rate as this is not provided in + * the GTDT table */ + arch_timer_rate = 50000000; + + if (gtdt->secure_pl1_interrupt) { + trigger = (gtdt->secure_pl1_flags & ACPI_GTDT_INTERRUPT_MODE) ? + ACPI_EDGE_SENSITIVE : ACPI_LEVEL_SENSITIVE; + polarity = + (gtdt->secure_pl1_flags & ACPI_GTDT_INTERRUPT_POLARITY) + ? ACPI_ACTIVE_LOW : ACPI_ACTIVE_HIGH; + arch_timer_ppi[0] = acpi_register_gsi(NULL, + gtdt->secure_pl1_interrupt, trigger, polarity); + } + if (gtdt->non_secure_pl1_interrupt) { + trigger = + (gtdt->non_secure_pl1_flags & ACPI_GTDT_INTERRUPT_MODE) + ? ACPI_EDGE_SENSITIVE : ACPI_LEVEL_SENSITIVE; + polarity = + (gtdt->non_secure_pl1_flags & ACPI_GTDT_INTERRUPT_POLARITY) + ? ACPI_ACTIVE_LOW : ACPI_ACTIVE_HIGH; + arch_timer_ppi[1] = acpi_register_gsi(NULL, + gtdt->non_secure_pl1_interrupt, trigger, polarity); + } + if (gtdt->virtual_timer_interrupt) { + trigger = (gtdt->virtual_timer_flags & ACPI_GTDT_INTERRUPT_MODE) + ? ACPI_EDGE_SENSITIVE : ACPI_LEVEL_SENSITIVE; + polarity = + (gtdt->virtual_timer_flags & ACPI_GTDT_INTERRUPT_POLARITY) + ? ACPI_ACTIVE_LOW : ACPI_ACTIVE_HIGH; + arch_timer_ppi[2] = acpi_register_gsi(NULL, + gtdt->virtual_timer_interrupt, trigger, polarity); + } + if (gtdt->non_secure_pl2_interrupt) { + trigger = + (gtdt->non_secure_pl2_flags & ACPI_GTDT_INTERRUPT_MODE) + ? ACPI_EDGE_SENSITIVE : ACPI_LEVEL_SENSITIVE; + polarity = + (gtdt->non_secure_pl2_flags & ACPI_GTDT_INTERRUPT_POLARITY) + ? ACPI_ACTIVE_LOW : ACPI_ACTIVE_HIGH; + arch_timer_ppi[3] = acpi_register_gsi(NULL, + gtdt->non_secure_pl2_interrupt, trigger, polarity); + } + +#else /* Try to determine the frequency from the device tree or CNTFRQ */ if (!of_property_read_u32(np, "clock-frequency", &freq)) arch_timer_rate = freq; @@ -349,6 +406,7 @@ static void __init arch_timer_init(struct device_node *np) arch_timer_ppi[i] = irq_of_parse_and_map(np, i);
of_node_put(np); +#endif
/* * If HYP mode is available, we know that the physical timer
On 2013-9-17 14:05, Amit Daniel Kachhap wrote:
This code changes uses GTDT ACPI table to gather IRQ number. Clock frequency is not a member of GTDT table so it is harcoded.
Signed-off-by: Amit Daniel Kachhap amit.daniel@samsung.com
drivers/clocksource/arm_arch_timer.c | 58 ++++++++++++++++++++++++++++++++++ 1 files changed, 58 insertions(+), 0 deletions(-)
Do you have related ASL code? send them out please.
diff --git a/drivers/clocksource/arm_arch_timer.c b/drivers/clocksource/arm_arch_timer.c index ffadd83..36cc6a5 100644 --- a/drivers/clocksource/arm_arch_timer.c +++ b/drivers/clocksource/arm_arch_timer.c @@ -23,6 +23,10 @@ #include <clocksource/arm_arch_timer.h> +#ifdef CONFIG_ACPI +#include <linux/acpi.h> +#endif
static u32 arch_timer_rate; enum ppi_nr { @@ -341,6 +345,59 @@ static void __init arch_timer_init(struct device_node *np) return; } +#ifdef CONFIG_ACPI
- struct acpi_table_gtdt *gtdt;
- int trigger, polarity;
- u32 irq;
- if (ACPI_FAILURE(acpi_get_table(ACPI_SIG_GTDT, 0,
(struct acpi_table_header **)>dt))) {pr_err("arch_timer: GTDT table not defined\n");return;- }
- /* HACK: Hardcoding the timer clock rate as this is not provided in
* the GTDT table */- arch_timer_rate = 50000000;
- if (gtdt->secure_pl1_interrupt) {
trigger = (gtdt->secure_pl1_flags & ACPI_GTDT_INTERRUPT_MODE) ?ACPI_EDGE_SENSITIVE : ACPI_LEVEL_SENSITIVE;polarity =(gtdt->secure_pl1_flags & ACPI_GTDT_INTERRUPT_POLARITY)? ACPI_ACTIVE_LOW : ACPI_ACTIVE_HIGH;arch_timer_ppi[0] = acpi_register_gsi(NULL,gtdt->secure_pl1_interrupt, trigger, polarity);- }
- if (gtdt->non_secure_pl1_interrupt) {
trigger =(gtdt->non_secure_pl1_flags & ACPI_GTDT_INTERRUPT_MODE)? ACPI_EDGE_SENSITIVE : ACPI_LEVEL_SENSITIVE;polarity =(gtdt->non_secure_pl1_flags & ACPI_GTDT_INTERRUPT_POLARITY)? ACPI_ACTIVE_LOW : ACPI_ACTIVE_HIGH;arch_timer_ppi[1] = acpi_register_gsi(NULL,gtdt->non_secure_pl1_interrupt, trigger, polarity);- }
- if (gtdt->virtual_timer_interrupt) {
trigger = (gtdt->virtual_timer_flags & ACPI_GTDT_INTERRUPT_MODE)? ACPI_EDGE_SENSITIVE : ACPI_LEVEL_SENSITIVE;polarity =(gtdt->virtual_timer_flags & ACPI_GTDT_INTERRUPT_POLARITY)? ACPI_ACTIVE_LOW : ACPI_ACTIVE_HIGH;arch_timer_ppi[2] = acpi_register_gsi(NULL,gtdt->virtual_timer_interrupt, trigger, polarity);- }
- if (gtdt->non_secure_pl2_interrupt) {
trigger =(gtdt->non_secure_pl2_flags & ACPI_GTDT_INTERRUPT_MODE)? ACPI_EDGE_SENSITIVE : ACPI_LEVEL_SENSITIVE;polarity =(gtdt->non_secure_pl2_flags & ACPI_GTDT_INTERRUPT_POLARITY)? ACPI_ACTIVE_LOW : ACPI_ACTIVE_HIGH;arch_timer_ppi[3] = acpi_register_gsi(NULL,gtdt->non_secure_pl2_interrupt, trigger, polarity);- }
+#else /* Try to determine the frequency from the device tree or CNTFRQ */ if (!of_property_read_u32(np, "clock-frequency", &freq)) arch_timer_rate = freq; @@ -349,6 +406,7 @@ static void __init arch_timer_init(struct device_node *np) arch_timer_ppi[i] = irq_of_parse_and_map(np, i); of_node_put(np); +#endif /* * If HYP mode is available, we know that the physical timer
On 09/17/2013 05:50 AM, Hanjun Guo wrote:
On 2013-9-17 14:05, Amit Daniel Kachhap wrote:
This code changes uses GTDT ACPI table to gather IRQ number. Clock frequency is not a member of GTDT table so it is harcoded.
Signed-off-by: Amit Daniel Kachhap amit.daniel@samsung.com
drivers/clocksource/arm_arch_timer.c | 58 ++++++++++++++++++++++++++++++++++ 1 files changed, 58 insertions(+), 0 deletions(-)
Do you have related ASL code? send them out please.
I agree with Hanjun; please send the ASL code that matches these changes. It's really hard to tell how well this code handles what will be in the tables without it.
The other recommendation would be to not use the #ifdef CONFIG_ACPI. What would allow for more flexibility is if the code could first check to see if the configuration info it needs is in the DT. If it is, use that info and do no ACPI configuration. If there is no info in the DT, however, then see if there is info in ACPI. This allows us to make the transition to ACPI go smoother.
diff --git a/drivers/clocksource/arm_arch_timer.c b/drivers/clocksource/arm_arch_timer.c index ffadd83..36cc6a5 100644 --- a/drivers/clocksource/arm_arch_timer.c +++ b/drivers/clocksource/arm_arch_timer.c @@ -23,6 +23,10 @@
#include <clocksource/arm_arch_timer.h>
+#ifdef CONFIG_ACPI +#include <linux/acpi.h> +#endif
static u32 arch_timer_rate;
enum ppi_nr {
@@ -341,6 +345,59 @@ static void __init arch_timer_init(struct device_node *np) return; }
+#ifdef CONFIG_ACPI
- struct acpi_table_gtdt *gtdt;
- int trigger, polarity;
- u32 irq;
- if (ACPI_FAILURE(acpi_get_table(ACPI_SIG_GTDT, 0,
(struct acpi_table_header **)>dt))) {pr_err("arch_timer: GTDT table not defined\n");return;- }
- /* HACK: Hardcoding the timer clock rate as this is not provided in
* the GTDT table */- arch_timer_rate = 50000000;
- if (gtdt->secure_pl1_interrupt) {
trigger = (gtdt->secure_pl1_flags & ACPI_GTDT_INTERRUPT_MODE) ?ACPI_EDGE_SENSITIVE : ACPI_LEVEL_SENSITIVE;polarity =(gtdt->secure_pl1_flags & ACPI_GTDT_INTERRUPT_POLARITY)? ACPI_ACTIVE_LOW : ACPI_ACTIVE_HIGH;arch_timer_ppi[0] = acpi_register_gsi(NULL,gtdt->secure_pl1_interrupt, trigger, polarity);- }
- if (gtdt->non_secure_pl1_interrupt) {
trigger =(gtdt->non_secure_pl1_flags & ACPI_GTDT_INTERRUPT_MODE)? ACPI_EDGE_SENSITIVE : ACPI_LEVEL_SENSITIVE;polarity =(gtdt->non_secure_pl1_flags & ACPI_GTDT_INTERRUPT_POLARITY)? ACPI_ACTIVE_LOW : ACPI_ACTIVE_HIGH;arch_timer_ppi[1] = acpi_register_gsi(NULL,gtdt->non_secure_pl1_interrupt, trigger, polarity);- }
- if (gtdt->virtual_timer_interrupt) {
trigger = (gtdt->virtual_timer_flags & ACPI_GTDT_INTERRUPT_MODE)? ACPI_EDGE_SENSITIVE : ACPI_LEVEL_SENSITIVE;polarity =(gtdt->virtual_timer_flags & ACPI_GTDT_INTERRUPT_POLARITY)? ACPI_ACTIVE_LOW : ACPI_ACTIVE_HIGH;arch_timer_ppi[2] = acpi_register_gsi(NULL,gtdt->virtual_timer_interrupt, trigger, polarity);- }
- if (gtdt->non_secure_pl2_interrupt) {
trigger =(gtdt->non_secure_pl2_flags & ACPI_GTDT_INTERRUPT_MODE)? ACPI_EDGE_SENSITIVE : ACPI_LEVEL_SENSITIVE;polarity =(gtdt->non_secure_pl2_flags & ACPI_GTDT_INTERRUPT_POLARITY)? ACPI_ACTIVE_LOW : ACPI_ACTIVE_HIGH;arch_timer_ppi[3] = acpi_register_gsi(NULL,gtdt->non_secure_pl2_interrupt, trigger, polarity);- }
+#else /* Try to determine the frequency from the device tree or CNTFRQ */ if (!of_property_read_u32(np, "clock-frequency", &freq)) arch_timer_rate = freq; @@ -349,6 +406,7 @@ static void __init arch_timer_init(struct device_node *np) arch_timer_ppi[i] = irq_of_parse_and_map(np, i);
of_node_put(np); +#endif
/* * If HYP mode is available, we know that the physical timer
Linaro-acpi mailing list Linaro-acpi@lists.linaro.org http://lists.linaro.org/mailman/listinfo/linaro-acpi
Hi Al Stone/Hanjun,
On Wed, Sep 18, 2013 at 3:12 AM, Al Stone al.stone@linaro.org wrote:
On 09/17/2013 05:50 AM, Hanjun Guo wrote:
On 2013-9-17 14:05, Amit Daniel Kachhap wrote:
This code changes uses GTDT ACPI table to gather IRQ number. Clock frequency is not a member of GTDT table so it is harcoded.
Signed-off-by: Amit Daniel Kachhap amit.daniel@samsung.com
drivers/clocksource/arm_arch_timer.c | 58 ++++++++++++++++++++++++++++++++++ 1 files changed, 58 insertions(+), 0 deletions(-)
Do you have related ASL code? send them out please.
I agree with Hanjun; please send the ASL code that matches these changes. It's really hard to tell how well this code handles what will be in the tables without it.
Yes my fault I missed sending the ASL files.
The other recommendation would be to not use the #ifdef CONFIG_ACPI. What would allow for more flexibility is if the code could first check to see if the configuration info it needs is in the DT. If it is, use that info and do no ACPI configuration. If there is no info in the DT, however, then see if there is info in ACPI. This allows us to make the transition to ACPI go smoother.
Yes will do that in next version.
Thanks, Amit
diff --git a/drivers/clocksource/arm_arch_timer.c b/drivers/clocksource/arm_arch_timer.c index ffadd83..36cc6a5 100644 --- a/drivers/clocksource/arm_arch_timer.c +++ b/drivers/clocksource/arm_arch_timer.c @@ -23,6 +23,10 @@
#include <clocksource/arm_arch_timer.h>
+#ifdef CONFIG_ACPI +#include <linux/acpi.h> +#endif
static u32 arch_timer_rate;
enum ppi_nr {
@@ -341,6 +345,59 @@ static void __init arch_timer_init(struct device_node *np) return; }
+#ifdef CONFIG_ACPI
struct acpi_table_gtdt *gtdt;int trigger, polarity;u32 irq;if (ACPI_FAILURE(acpi_get_table(ACPI_SIG_GTDT, 0,(struct acpi_table_header **)>dt))) {pr_err("arch_timer: GTDT table not defined\n");return;}/* HACK: Hardcoding the timer clock rate as this is not providedin
* the GTDT table */arch_timer_rate = 50000000;if (gtdt->secure_pl1_interrupt) {trigger = (gtdt->secure_pl1_flags &ACPI_GTDT_INTERRUPT_MODE) ?
ACPI_EDGE_SENSITIVE : ACPI_LEVEL_SENSITIVE;polarity =(gtdt->secure_pl1_flags &ACPI_GTDT_INTERRUPT_POLARITY)
? ACPI_ACTIVE_LOW : ACPI_ACTIVE_HIGH;arch_timer_ppi[0] = acpi_register_gsi(NULL,gtdt->secure_pl1_interrupt, trigger,polarity);
}if (gtdt->non_secure_pl1_interrupt) {trigger =(gtdt->non_secure_pl1_flags &ACPI_GTDT_INTERRUPT_MODE)
? ACPI_EDGE_SENSITIVE : ACPI_LEVEL_SENSITIVE;polarity =(gtdt->non_secure_pl1_flags &ACPI_GTDT_INTERRUPT_POLARITY)
? ACPI_ACTIVE_LOW : ACPI_ACTIVE_HIGH;arch_timer_ppi[1] = acpi_register_gsi(NULL,gtdt->non_secure_pl1_interrupt, trigger,polarity);
}if (gtdt->virtual_timer_interrupt) {trigger = (gtdt->virtual_timer_flags &ACPI_GTDT_INTERRUPT_MODE)
? ACPI_EDGE_SENSITIVE : ACPI_LEVEL_SENSITIVE;polarity =(gtdt->virtual_timer_flags &ACPI_GTDT_INTERRUPT_POLARITY)
? ACPI_ACTIVE_LOW : ACPI_ACTIVE_HIGH;arch_timer_ppi[2] = acpi_register_gsi(NULL,gtdt->virtual_timer_interrupt, trigger,polarity);
}if (gtdt->non_secure_pl2_interrupt) {trigger =(gtdt->non_secure_pl2_flags &ACPI_GTDT_INTERRUPT_MODE)
? ACPI_EDGE_SENSITIVE : ACPI_LEVEL_SENSITIVE;polarity =(gtdt->non_secure_pl2_flags &ACPI_GTDT_INTERRUPT_POLARITY)
? ACPI_ACTIVE_LOW : ACPI_ACTIVE_HIGH;arch_timer_ppi[3] = acpi_register_gsi(NULL,gtdt->non_secure_pl2_interrupt, trigger,polarity);
}+#else /* Try to determine the frequency from the device tree or CNTFRQ */ if (!of_property_read_u32(np, "clock-frequency", &freq)) arch_timer_rate = freq; @@ -349,6 +406,7 @@ static void __init arch_timer_init(struct device_node *np) arch_timer_ppi[i] = irq_of_parse_and_map(np, i);
of_node_put(np);+#endif
/* * If HYP mode is available, we know that the physical timer
Linaro-acpi mailing list Linaro-acpi@lists.linaro.org http://lists.linaro.org/mailman/listinfo/linaro-acpi
-- ciao, al
Al Stone Software Engineer Linaro Enterprise Group al.stone@linaro.org
Linaro-acpi mailing list Linaro-acpi@lists.linaro.org http://lists.linaro.org/mailman/listinfo/linaro-acpi
Hi Amit,
Thanks for your patch, I'm working on the converting GIC to ACPI too, please refer to the comment below.
On 2013-9-17 14:05, Amit Daniel Kachhap wrote:
hi,
The patches in the series are just in work in progress and intended to clear some doubts as pointed below. Any comment/direction is helpful from the linaro acpi group.
- Basic controllers like GIC and timer need to be initialised before platform drivers
are ready so question is how to invoke the __init of these devices. Is there any function to raw parse the ACPI tables similar to existing DT API's?
For interrupt controller, it is described in MADT and parsed in the early phase of boot, you can refer to acpi_parse_madt_ioapic_entries() in drivers/acpi/plat/arm/boot.c.
GIC description in MADT is not sufficient because GIC distributor/cpu interface memory size and percpu_offset is missing in MADT. this should be necessary for GIC initialization.
- Some important elements like clock frequency is missing from the GTDT table.
how to get them?
For timer, I had notice that the clock frequency is missing in GTDT too. I think we have two solutions:
a) modify the ACPI spec and add the clock frequency to GTDT.
b) we can do it in another way which describe the timer in DSDT, but as you said, timer needs to be initialized before platform drivers, if it is described in DSDT, the initialization time of timer may after platform drivers (I'm not sure of it).
Thanks Hanjun
Thanks in advance.
Amit Daniel Kachhap (3): irqdomain: Add a new API irq_create_default_mapping ACPI: ARM: Update acpi_register_gsi to register with the core IRQ subsystem ACPI: clocksource: arch_timer: Use GTDT table to gather data
drivers/acpi/plat/arm/boot.c | 27 ++++++++++++++-- drivers/clocksource/arm_arch_timer.c | 58 ++++++++++++++++++++++++++++++++++ include/linux/irqdomain.h | 2 + kernel/irq/irqdomain.c | 35 ++++++++++++++++++++ 4 files changed, 119 insertions(+), 3 deletions(-)
Linaro-acpi mailing list Linaro-acpi@lists.linaro.org http://lists.linaro.org/mailman/listinfo/linaro-acpi
Hi Hanjun,
Thanks for the comment. On Tue, Sep 17, 2013 at 5:17 PM, Hanjun Guo hanjun.guo@linaro.org wrote:
Hi Amit,
Thanks for your patch, I'm working on the converting GIC to ACPI too, please refer to the comment below.
Yes right I saw many of your patches in ACPI linaro tree and learned lot of ACPI stuffs.
On 2013-9-17 14:05, Amit Daniel Kachhap wrote:
hi,
The patches in the series are just in work in progress and intended to clear some doubts as pointed below. Any comment/direction is helpful from the linaro acpi group.
- Basic controllers like GIC and timer need to be initialised before platform drivers
are ready so question is how to invoke the __init of these devices. Is there any function to raw parse the ACPI tables similar to existing DT API's?
For interrupt controller, it is described in MADT and parsed in the early phase of boot, you can refer to acpi_parse_madt_ioapic_entries() in drivers/acpi/plat/arm/boot.c.
GIC description in MADT is not sufficient because GIC distributor/cpu interface memory size and percpu_offset is missing in MADT. this should be necessary for GIC initialization.
Yes correct. I guess memory size should be added in DIST structure and also in IO_APIC structure. For IO_APIC interrupt count should also be added as a member(may be optional) as exynos-combiner(for arndale) irq controller needs that information.
- Some important elements like clock frequency is missing from the GTDT table.
how to get them?
For timer, I had notice that the clock frequency is missing in GTDT too. I think we have two solutions:
a) modify the ACPI spec and add the clock frequency to GTDT.
Is it easy?
b) we can do it in another way which describe the timer in DSDT, but as you said, timer needs to be initialized before platform drivers, if it is described in DSDT, the initialization time of timer may after platform drivers (I'm not sure of it).
I think this should be good short term solution. But again this needs parsing the raw ACPI blob like text based binary search. I checked in kernel if any one uses such kind of thing that but could not find anything relevant.
Thanks, Amit
Thanks Hanjun
Thanks in advance.
Amit Daniel Kachhap (3): irqdomain: Add a new API irq_create_default_mapping ACPI: ARM: Update acpi_register_gsi to register with the core IRQ subsystem ACPI: clocksource: arch_timer: Use GTDT table to gather data
drivers/acpi/plat/arm/boot.c | 27 ++++++++++++++-- drivers/clocksource/arm_arch_timer.c | 58 ++++++++++++++++++++++++++++++++++ include/linux/irqdomain.h | 2 + kernel/irq/irqdomain.c | 35 ++++++++++++++++++++ 4 files changed, 119 insertions(+), 3 deletions(-)
Linaro-acpi mailing list Linaro-acpi@lists.linaro.org http://lists.linaro.org/mailman/listinfo/linaro-acpi
Linaro-acpi mailing list Linaro-acpi@lists.linaro.org http://lists.linaro.org/mailman/listinfo/linaro-acpi
On 2013-9-18 12:56, amit daniel kachhap wrote:
Hi Hanjun,
Thanks for the comment.
You are welcome :)
On Tue, Sep 17, 2013 at 5:17 PM, Hanjun Guo hanjun.guo@linaro.org wrote:
Hi Amit,
Thanks for your patch, I'm working on the converting GIC to ACPI too, please refer to the comment below.
Yes right I saw many of your patches in ACPI linaro tree and learned lot of ACPI stuffs.
On 2013-9-17 14:05, Amit Daniel Kachhap wrote:
hi,
The patches in the series are just in work in progress and intended to clear some doubts as pointed below. Any comment/direction is helpful from the linaro acpi group.
- Basic controllers like GIC and timer need to be initialised before platform drivers
are ready so question is how to invoke the __init of these devices. Is there any function to raw parse the ACPI tables similar to existing DT API's?
For interrupt controller, it is described in MADT and parsed in the early phase of boot, you can refer to acpi_parse_madt_ioapic_entries() in drivers/acpi/plat/arm/boot.c.
GIC description in MADT is not sufficient because GIC distributor/cpu interface memory size and percpu_offset is missing in MADT. this should be necessary for GIC initialization.
Yes correct. I guess memory size should be added in DIST structure and also in IO_APIC structure.
DIST, do you mean DSDT?
For IO_APIC interrupt count should also be added as a member(may be optional) as exynos-combiner(for arndale) irq controller needs that information.
What the specific mean of interrupt count mentioned here? do you mean interrupt input supported by this irq controller? if yes, why not read it from the registers in the irq controller?
- Some important elements like clock frequency is missing from the GTDT table.
how to get them?
For timer, I had notice that the clock frequency is missing in GTDT too. I think we have two solutions:
a) modify the ACPI spec and add the clock frequency to GTDT.
Is it easy?
I don't think so :)
b) we can do it in another way which describe the timer in DSDT, but as you said, timer needs to be initialized before platform drivers, if it is described in DSDT, the initialization time of timer may after platform drivers (I'm not sure of it).
I think this should be good short term solution. But again this needs parsing the raw ACPI blob like text based binary search. I checked in kernel if any one uses such kind of thing that but could not find anything relevant.
DSDT and its namespace will be initialized in acpi_early_init() and in the rest_init() (acpi_init()).
I'm not familiar with timers, so I have some questions (may be very basic):
1) what's the purpose of arch timer? which components of the kernel will use this timer?
2) Is this arch timer described in FDT? timer { compatible = "arm,armv8-timer"; interrupts = <1 13 0xff01>, <1 14 0xff01>, <1 11 0xff01>, <1 10 0xff01>; clock-frequency = <100000000>; };
Thanks Hanjun
Thanks, Amit
Hi,
On Wed, Sep 18, 2013 at 3:20 PM, Hanjun Guo hanjun.guo@linaro.org wrote:
On 2013-9-18 12:56, amit daniel kachhap wrote:
Hi Hanjun,
Thanks for the comment.
You are welcome :)
:)
On Tue, Sep 17, 2013 at 5:17 PM, Hanjun Guo hanjun.guo@linaro.org wrote:
Hi Amit,
Thanks for your patch, I'm working on the converting GIC to ACPI too, please refer to the comment below.
Yes right I saw many of your patches in ACPI linaro tree and learned lot of ACPI stuffs.
On 2013-9-17 14:05, Amit Daniel Kachhap wrote:
hi,
The patches in the series are just in work in progress and intended to clear some doubts as pointed below. Any comment/direction is helpful from the linaro acpi group.
- Basic controllers like GIC and timer need to be initialised before platform drivers
are ready so question is how to invoke the __init of these devices. Is there any function to raw parse the ACPI tables similar to existing DT API's?
For interrupt controller, it is described in MADT and parsed in the early phase of boot, you can refer to acpi_parse_madt_ioapic_entries() in drivers/acpi/plat/arm/boot.c.
GIC description in MADT is not sufficient because GIC distributor/cpu interface memory size and percpu_offset is missing in MADT. this should be necessary for GIC initialization.
Yes correct. I guess memory size should be added in DIST structure and also in IO_APIC structure.
DIST, do you mean DSDT?
Sorry my acpi nomenclature is not good. I meant to add the entry MADT and then fill the dist or IO_apic data structures with this values.
For IO_APIC interrupt count should also be added as a member(may be optional) as exynos-combiner(for arndale) irq controller needs that information.
What the specific mean of interrupt count mentioned here?
In MADT, irq start is provided but irq count is not present and is supposed to be read from the controller.
do you mean interrupt input supported by this irq controller? if yes, why not read it from the registers in the irq controller?
Actually some interrupt controller cannot provide the supported the interrupt count like exynos-combiner so it is better to pass them from MADT/DSDT.
- Some important elements like clock frequency is missing from the GTDT table.
how to get them?
For timer, I had notice that the clock frequency is missing in GTDT too. I think we have two solutions:
a) modify the ACPI spec and add the clock frequency to GTDT.
Is it easy?
I don't think so :)
right i also thought so :)
b) we can do it in another way which describe the timer in DSDT, but as you said, timer needs to be initialized before platform drivers, if it is described in DSDT, the initialization time of timer may after platform drivers (I'm not sure of it).
I think this should be good short term solution. But again this needs parsing the raw ACPI blob like text based binary search. I checked in kernel if any one uses such kind of thing that but could not find anything relevant.
DSDT and its namespace will be initialized in acpi_early_init() and in the rest_init() (acpi_init()).
These API looks interesting. I will look into them. Thanks
I'm not familiar with timers, so I have some questions (may be very basic):
- what's the purpose of arch timer? which components of the kernel will
use this timer?
This timers are per cpu timers and are responsible for per cpu ticks, scheduling, timekeeping etc
- Is this arch timer described in FDT?
timer { compatible = "arm,armv8-timer"; interrupts = <1 13 0xff01>, <1 14 0xff01>, <1 11 0xff01>, <1 10 0xff01>; clock-frequency = <100000000>; };
Yes these FDT nodes are for timers.
Thanks, Amit Daniel
Thanks Hanjun
Thanks, Amit
Linaro-acpi mailing list Linaro-acpi@lists.linaro.org http://lists.linaro.org/mailman/listinfo/linaro-acpi
Hi Amit,
Sorry for the late reply, I had being on holidays -- Mid-Autumn festival :)
On 2013-9-18 18:16, amit daniel kachhap wrote:
Hi,
On Wed, Sep 18, 2013 at 3:20 PM, Hanjun Guo hanjun.guo@linaro.org wrote:
On 2013-9-18 12:56, amit daniel kachhap wrote:
Hi Hanjun,
Thanks for the comment.
You are welcome :)
:)
On Tue, Sep 17, 2013 at 5:17 PM, Hanjun Guo hanjun.guo@linaro.org wrote:
Hi Amit,
Thanks for your patch, I'm working on the converting GIC to ACPI too, please refer to the comment below.
Yes right I saw many of your patches in ACPI linaro tree and learned lot of ACPI stuffs.
On 2013-9-17 14:05, Amit Daniel Kachhap wrote:
hi,
The patches in the series are just in work in progress and intended to clear some doubts as pointed below. Any comment/direction is helpful from the linaro acpi group.
- Basic controllers like GIC and timer need to be initialised before platform drivers
are ready so question is how to invoke the __init of these devices. Is there any function to raw parse the ACPI tables similar to existing DT API's?
For interrupt controller, it is described in MADT and parsed in the early phase of boot, you can refer to acpi_parse_madt_ioapic_entries() in drivers/acpi/plat/arm/boot.c.
GIC description in MADT is not sufficient because GIC distributor/cpu interface memory size and percpu_offset is missing in MADT. this should be necessary for GIC initialization.
Yes correct. I guess memory size should be added in DIST structure and also in IO_APIC structure.
DIST, do you mean DSDT?
Sorry my acpi nomenclature is not good. I meant to add the entry MADT and then fill the dist or IO_apic data structures with this values.
Ok, I got it. yes, should add such information into GIC Distributor Structure.
For IO_APIC interrupt count should also be added as a member(may be optional) as exynos-combiner(for arndale) irq controller needs that information.
What the specific mean of interrupt count mentioned here?
In MADT, irq start is provided but irq count is not present and is supposed to be read from the controller.
do you mean interrupt input supported by this irq controller? if yes, why not read it from the registers in the irq controller?
Actually some interrupt controller cannot provide the supported the interrupt count like exynos-combiner so it is better to pass them from MADT/DSDT.
This will be ARM only. x86 and IA64 only provide the GSI (Global System Interrupt) base, and irq count is read from registers.
- Some important elements like clock frequency is missing from the GTDT table.
how to get them?
For timer, I had notice that the clock frequency is missing in GTDT too. I think we have two solutions:
a) modify the ACPI spec and add the clock frequency to GTDT.
Is it easy?
I don't think so :)
right i also thought so :)
b) we can do it in another way which describe the timer in DSDT, but as you said, timer needs to be initialized before platform drivers, if it is described in DSDT, the initialization time of timer may after platform drivers (I'm not sure of it).
I think this should be good short term solution. But again this needs parsing the raw ACPI blob like text based binary search. I checked in kernel if any one uses such kind of thing that but could not find anything relevant.
DSDT and its namespace will be initialized in acpi_early_init() and in the rest_init() (acpi_init()).
These API looks interesting. I will look into them. Thanks
I'm not familiar with timers, so I have some questions (may be very basic):
- what's the purpose of arch timer? which components of the kernel will
use this timer?
This timers are per cpu timers and are responsible for per cpu ticks, scheduling, timekeeping etc
Ok, that will be the problem. I review the code for start_kernel(), the boot sequence is something like this: ... early_irq_init(); init_IRQ(); tick_init(); *init_timers();* hrtimers_init(); softirq_init(); timekeeping_init(); *time_init();* // I think arch timer is initialized here, right? sched_clock_postinit(); .... .... acpi_early_init(); .... rest_init(); acpi_init(); // DSDT is available here.
if we use DSDT to convert arch timer, other components of the kernel will not able to use the timer when they are initialized.
Thanks Hanjun
- Is this arch timer described in FDT?
timer { compatible = "arm,armv8-timer"; interrupts = <1 13 0xff01>, <1 14 0xff01>, <1 11 0xff01>, <1 10 0xff01>; clock-frequency = <100000000>; };
Yes these FDT nodes are for timers.
Thanks, Amit Daniel
Thanks Hanjun
Thanks, Amit
Linaro-acpi mailing list Linaro-acpi@lists.linaro.org http://lists.linaro.org/mailman/listinfo/linaro-acpi
Hi Amit,
Any updates to this patch set?
if not, I will modify your patch to convert arch_timer :)
Thanks Hanjun
On 2013-9-17 14:05, Amit Daniel Kachhap wrote:
hi,
The patches in the series are just in work in progress and intended to clear some doubts as pointed below. Any comment/direction is helpful from the linaro acpi group.
- Basic controllers like GIC and timer need to be initialised before platform drivers
are ready so question is how to invoke the __init of these devices. Is there any function to raw parse the ACPI tables similar to existing DT API's?
- Some important elements like clock frequency is missing from the GTDT table.
how to get them?
Thanks in advance.
Amit Daniel Kachhap (3): irqdomain: Add a new API irq_create_default_mapping ACPI: ARM: Update acpi_register_gsi to register with the core IRQ subsystem ACPI: clocksource: arch_timer: Use GTDT table to gather data
drivers/acpi/plat/arm/boot.c | 27 ++++++++++++++-- drivers/clocksource/arm_arch_timer.c | 58 ++++++++++++++++++++++++++++++++++ include/linux/irqdomain.h | 2 + kernel/irq/irqdomain.c | 35 ++++++++++++++++++++ 4 files changed, 119 insertions(+), 3 deletions(-)
Linaro-acpi mailing list Linaro-acpi@lists.linaro.org http://lists.linaro.org/mailman/listinfo/linaro-acpi
Hi Hanjun,
I was on leave last week so not much progress happened. However I am still working on modifying the timer and updating the GTDT table to add new fields like frequency. Also I checked some of your work in converting to platform driver. I guess it is not possible to convert timer driver to platform driver as it is called much before ACPI namespaces are initialised. So I am thinking of converting GTDT(generic timer description) table to TDT(timer description) table. Arm internal timer(as generic timer) will be one of the entry in TDT table. My idea is similar to MADT table where different types of IOAPIC entry exists in the same table.
The new TDT table may look something like,
struct acpi_table_tdt { u64 address; u32 size; u32 flags;// MEMORY_MAPPED, TDT_GENERIC, TDT_OTHERS u8 id[10]; // like "ARMv8", "MCT"(for andale), etc.. u32 interrupt_count; // between 1-8 u32 interrupt_num[8] ;// each timer assumed to have max 8 interrupt lines u32 interrupt_flags[8]; // INTERRUPT MODE, POLARITY u32 freq;
};
Any comment about this?
On Thu, Sep 26, 2013 at 2:57 PM, Hanjun Guo hanjun.guo@linaro.org wrote:
Hi Amit,
Any updates to this patch set?
if not, I will modify your patch to convert arch_timer :)
Certainly if you have any ideas please go ahead and modify this patch. No issue :)
Thanks, Amit Daniel
Thanks Hanjun
On 2013-9-17 14:05, Amit Daniel Kachhap wrote:
hi,
The patches in the series are just in work in progress and intended to clear some doubts as pointed below. Any comment/direction is helpful from the linaro acpi group.
- Basic controllers like GIC and timer need to be initialised before platform drivers
are ready so question is how to invoke the __init of these devices. Is there any function to raw parse the ACPI tables similar to existing DT API's?
- Some important elements like clock frequency is missing from the GTDT table.
how to get them?
Thanks in advance.
Amit Daniel Kachhap (3): irqdomain: Add a new API irq_create_default_mapping ACPI: ARM: Update acpi_register_gsi to register with the core IRQ subsystem ACPI: clocksource: arch_timer: Use GTDT table to gather data
drivers/acpi/plat/arm/boot.c | 27 ++++++++++++++-- drivers/clocksource/arm_arch_timer.c | 58 ++++++++++++++++++++++++++++++++++ include/linux/irqdomain.h | 2 + kernel/irq/irqdomain.c | 35 ++++++++++++++++++++ 4 files changed, 119 insertions(+), 3 deletions(-)
Linaro-acpi mailing list Linaro-acpi@lists.linaro.org http://lists.linaro.org/mailman/listinfo/linaro-acpi
Linaro-acpi mailing list Linaro-acpi@lists.linaro.org http://lists.linaro.org/mailman/listinfo/linaro-acpi
On Thu, Sep 26, 2013 at 2:57 PM, Hanjun Guo hanjun.guo@linaro.org wrote:
Hi Amit,
Any updates to this patch set?
if not, I will modify your patch to convert arch_timer :)
Thanks Hanjun
On 2013-9-17 14:05, Amit Daniel Kachhap wrote:
hi,
The patches in the series are just in work in progress and intended to clear some doubts as pointed below. Any comment/direction is helpful from the linaro acpi group.
- Basic controllers like GIC and timer need to be initialised before platform drivers
are ready so question is how to invoke the __init of these devices. Is there any function to raw parse the ACPI tables similar to existing DT API's?
- Some important elements like clock frequency is missing from the GTDT table.
how to get them?
Thanks in advance.
Amit Daniel Kachhap (3): irqdomain: Add a new API irq_create_default_mapping ACPI: ARM: Update acpi_register_gsi to register with the core IRQ subsystem ACPI: clocksource: arch_timer: Use GTDT table to gather data
drivers/acpi/plat/arm/boot.c | 27 ++++++++++++++-- drivers/clocksource/arm_arch_timer.c | 58 ++++++++++++++++++++++++++++++++++ include/linux/irqdomain.h | 2 + kernel/irq/irqdomain.c | 35 ++++++++++++++++++++ 4 files changed, 119 insertions(+), 3 deletions(-)
Linaro-acpi mailing list Linaro-acpi@lists.linaro.org http://lists.linaro.org/mailman/listinfo/linaro-acpi
Linaro-acpi mailing list Linaro-acpi@lists.linaro.org http://lists.linaro.org/mailman/listinfo/linaro-acpi
On 2013年09月30日 17:25, amit daniel kachhap wrote:
Hi Hanjun,
I was on leave last week so not much progress happened. However I am still working on modifying the timer and updating the GTDT table to add new fields like frequency. Also I checked some of your work in converting to platform driver. I guess it is not possible to convert timer driver to platform driver as it is called much before ACPI namespaces are initialised.
Yes, for arch timer, it is impossible to convert to platform driver. actually, I was working on the fixed clock converting to ACPI and I found out that fixed clock can be converted to platform driver, that's why I was sending some clean up patches for platform driver.
So I am thinking of converting GTDT(generic timer description) table to TDT(timer description) table. Arm internal timer(as generic timer) will be one of the entry in TDT table. My idea is similar to MADT table where different types of IOAPIC entry exists in the same table.
Good idea.
The new TDT table may look something like,
struct acpi_table_tdt { u64 address; u32 size; u32 flags;// MEMORY_MAPPED, TDT_GENERIC, TDT_OTHERS u8 id[10]; // like "ARMv8", "MCT"(for andale), etc.. u32 interrupt_count; // between 1-8 u32 interrupt_num[8] ;// each timer assumed to have max 8 interrupt lines u32 interrupt_flags[8]; // INTERRUPT MODE, POLARITY u32 freq;
};
Any comment about this?
This idea looks good to me, and we should work out some thing more specific and detail. and a question, can we add the fixed clock to the table? this clock is also initialized early, but with no interrupts.
On Thu, Sep 26, 2013 at 2:57 PM, Hanjun Guo hanjun.guo@linaro.org wrote:
Hi Amit,
Any updates to this patch set?
if not, I will modify your patch to convert arch_timer :)
Certainly if you have any ideas please go ahead and modify this patch. No issue :)
I will still work on the fixed clock before I can back to arch timer, so if any updates from you, send them out :)
Thanks Hanjun
-
Al Stone -
Amit Daniel Kachhap -
amit daniel kachhap
-
Hanjun Guo