From: Naresh Bhat naresh.bhat@linaro.org
The patches try to fix the DBG2 table compilation issue and also tries to add a template support for DBG2 tables.
Naresh Bhat (2): iASL: Fix Table Info handler for DBG2 iASL: Add template support for dbg2
source/common/dmtable.c | 2 +- source/compiler/dtcompiler.h | 1 + source/compiler/dttemplate.h | 10 ++++++++++ 3 files changed, 12 insertions(+), 1 deletion(-)
From: Naresh Bhat naresh.bhat@linaro.org
Fix dbg2.asl compilation issue. The DBG2 table is not able to compile because of "Table Info" handler call is missing. The DBG2 compilation logs are as below
$ iasl dbg2.asl
Intel ACPI Component Architecture ASL Optimizing Compiler version 20130927-64 [Oct 10 2013] Copyright (c) 2000 - 2013 Intel Corporation
Error 6126 - Could not compile input file
dbg2.asl 12: [0004] Info Offset : 00000044 [First DDIS entry] Error 6010 - Internal compiler error ^ (Missing table dispatch info)
Table Input: dbg2.asl - 38 lines, 2383 bytes, 9 fields
Compilation complete. 2 Errors, 0 Warnings, 0 Remarks
Signed-off-by: Naresh Bhat naresh.bhat@linaro.org --- source/common/dmtable.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/source/common/dmtable.c b/source/common/dmtable.c index fa7b300..12b8905 100644 --- a/source/common/dmtable.c +++ b/source/common/dmtable.c @@ -358,7 +358,7 @@ ACPI_DMTABLE_DATA AcpiDmTableData[] = {ACPI_SIG_BOOT, AcpiDmTableInfoBoot, NULL, NULL, TemplateBoot, "Simple Boot Flag Table"}, {ACPI_SIG_CPEP, NULL, AcpiDmDumpCpep, DtCompileCpep, TemplateCpep, "Corrected Platform Error Polling table"}, {ACPI_SIG_CSRT, NULL, AcpiDmDumpCsrt, DtCompileCsrt, TemplateCsrt, "Core System Resource Table"}, - {ACPI_SIG_DBG2, NULL, AcpiDmDumpDbg2, NULL, NULL, "Debug Port table type 2"}, + {ACPI_SIG_DBG2, AcpiDmTableInfoDbg2, AcpiDmDumpDbg2, NULL, NULL, "Debug Port table type 2"}, {ACPI_SIG_DBGP, AcpiDmTableInfoDbgp, NULL, NULL, TemplateDbgp, "Debug Port table"}, {ACPI_SIG_DMAR, NULL, AcpiDmDumpDmar, DtCompileDmar, TemplateDmar, "DMA Remapping table"}, {ACPI_SIG_ECDT, AcpiDmTableInfoEcdt, NULL, NULL, TemplateEcdt, "Embedded Controller Boot Resources Table"},
From: Naresh Bhat naresh.bhat@linaro.org
This patch will add the template support for dbg2. $ iasl -T DBG2 DBG2: No template available
Signed-off-by: Naresh Bhat naresh.bhat@linaro.org --- source/common/dmtable.c | 2 +- source/compiler/dtcompiler.h | 1 + source/compiler/dttemplate.h | 10 ++++++++++ 3 files changed, 12 insertions(+), 1 deletion(-)
diff --git a/source/common/dmtable.c b/source/common/dmtable.c index 12b8905..5552553 100644 --- a/source/common/dmtable.c +++ b/source/common/dmtable.c @@ -358,7 +358,7 @@ ACPI_DMTABLE_DATA AcpiDmTableData[] = {ACPI_SIG_BOOT, AcpiDmTableInfoBoot, NULL, NULL, TemplateBoot, "Simple Boot Flag Table"}, {ACPI_SIG_CPEP, NULL, AcpiDmDumpCpep, DtCompileCpep, TemplateCpep, "Corrected Platform Error Polling table"}, {ACPI_SIG_CSRT, NULL, AcpiDmDumpCsrt, DtCompileCsrt, TemplateCsrt, "Core System Resource Table"}, - {ACPI_SIG_DBG2, AcpiDmTableInfoDbg2, AcpiDmDumpDbg2, NULL, NULL, "Debug Port table type 2"}, + {ACPI_SIG_DBG2, AcpiDmTableInfoDbg2, AcpiDmDumpDbg2, NULL, TemplateDbg2, "Debug Port table type 2"}, {ACPI_SIG_DBGP, AcpiDmTableInfoDbgp, NULL, NULL, TemplateDbgp, "Debug Port table"}, {ACPI_SIG_DMAR, NULL, AcpiDmDumpDmar, DtCompileDmar, TemplateDmar, "DMA Remapping table"}, {ACPI_SIG_ECDT, AcpiDmTableInfoEcdt, NULL, NULL, TemplateEcdt, "Embedded Controller Boot Resources Table"}, diff --git a/source/compiler/dtcompiler.h b/source/compiler/dtcompiler.h index 9868662..96ece50 100644 --- a/source/compiler/dtcompiler.h +++ b/source/compiler/dtcompiler.h @@ -575,6 +575,7 @@ extern const unsigned char TemplateBert[]; extern const unsigned char TemplateBgrt[]; extern const unsigned char TemplateCpep[]; extern const unsigned char TemplateCsrt[]; +extern const unsigned char TemplateDbg2[]; extern const unsigned char TemplateDbgp[]; extern const unsigned char TemplateDmar[]; extern const unsigned char TemplateEcdt[]; diff --git a/source/compiler/dttemplate.h b/source/compiler/dttemplate.h index f131b62..816c87e 100644 --- a/source/compiler/dttemplate.h +++ b/source/compiler/dttemplate.h @@ -246,6 +246,16 @@ const unsigned char TemplateCsrt[] = 0x43,0x48,0x41,0x37 /* 00000148 "CHA7" */ };
+const unsigned char TemplateDbg2[] = +{ + 0x44,0x42,0x47,0x32,0x2C,0x00,0x00,0x00, /* 00000000 "DBG2,..." */ + 0x01,0xD3,0x4C,0x49,0x4E,0x41,0x52,0x4F, /* 00000008 "..LINARO" */ + 0x54,0x45,0x4D,0x50,0x4C,0x41,0x54,0x45, /* 00000010 "TEMPLATE" */ + 0x01,0x00,0x00,0x00,0x49,0x4E,0x54,0x4C, /* 00000018 "....INTL" */ + 0x27,0x09,0x13,0x20,0x44,0x00,0x00,0x00, /* 00000020 "'.. D..." */ + 0x01,0x00,0x00,0x00 /* 00000028 "...." */ +}; + const unsigned char TemplateDbgp[] = { 0x44,0x42,0x47,0x50,0x34,0x00,0x00,0x00, /* 00000000 "DBGP4..." */
On 10/16/2013 01:48 AM, naresh.bhat@linaro.org wrote:
From: Naresh Bhat naresh.bhat@linaro.org
The patches try to fix the DBG2 table compilation issue and also tries to add a template support for DBG2 tables.
Naresh Bhat (2): iASL: Fix Table Info handler for DBG2 iASL: Add template support for dbg2
source/common/dmtable.c | 2 +- source/compiler/dtcompiler.h | 1 + source/compiler/dttemplate.h | 10 ++++++++++ 3 files changed, 12 insertions(+), 1 deletion(-)
Nice. I see these have been submitted upstream to ACPICA, too. Even better :).
I'll see about adding these to the acpica-tools package.
The real issue is that the code to actually compile a DBG2 (including all subtables) has not been written yet.
Here's an example of a large DBG2 with subtables.
/* * Intel ACPI Component Architecture * AML Disassembler version 20120711-32 [Aug 14 2012] * Copyright (c) 2000 - 2012 Intel Corporation * * Disassembly of dbg2.aml, Tue Aug 14 09:34:28 2012 * * ACPI Data Table [DBG2] * * Format: [HexOffset DecimalOffset ByteLength] FieldName : FieldValue */
[000h 0000 4] Signature : "DBG2" [Debug Port table type 2] [004h 0004 4] Table Length : 000000CE [008h 0008 1] Revision : 01 [009h 0009 1] Checksum : B1 [00Ah 0010 6] Oem ID : "INTEL " [010h 0016 8] Oem Table ID : "TEMPLATE" [018h 0024 4] Oem Revision : 00000000 [01Ch 0028 4] Asl Compiler ID : "INTL" [020h 0032 4] Asl Compiler Revision : 20120711
[024h 0036 4] Info Offset : 0000002C [028h 0040 4] Info Count : 00000002
[02Ch 0044 1] Revision : 00 [02Dh 0045 2] Length : 004C [02Fh 0047 1] Register Count : 02 [030h 0048 2] Namepath Length : 0009 [032h 0050 2] Namepath Offset : 0036 [034h 0052 2] OEM Data Length : 000D [036h 0054 2] OEM Data Offset : 003F [038h 0056 2] Port Type : 8000 [03Ah 0058 2] Port Subtype : 0000 [03Ch 0060 2] Reserved : 0000 [03Eh 0062 2] Base Address Offset : 0016 [040h 0064 2] Address Size Offset : 002E
[042h 0066 12] Base Address Register : [Generic Address Structure] [042h 0066 1] Space ID : 01 [SystemIO] [043h 0067 1] Bit Width : 32 [044h 0068 1] Bit Offset : 00 [045h 0069 1] Encoded Access Width : 03 [DWord Access:32] [046h 0070 8] Address : 1122334455667788
[04Eh 0078 12] Base Address Register : [Generic Address Structure] [04Eh 0078 1] Space ID : 01 [SystemIO] [04Fh 0079 1] Bit Width : 64 [050h 0080 1] Bit Offset : 00 [051h 0081 1] Encoded Access Width : 04 [QWord Access:64] [052h 0082 8] Address : AABBCCDDEEFF0011
[05Ah 0090 4] Address Size : 76543210 [05Eh 0094 4] Address Size : FEDCBA98
[062h 0098 9] Namepath : "MyDevice"
[06Bh 0107 13] OEM Data : 01 02 03 04 05 06 07 08 09 0A 0B 0C 0D
[078h 0120 1] Revision : 00 [079h 0121 2] Length : 0056 [07Bh 0123 1] Register Count : 01 [07Ch 0124 2] Namepath Length : 0010 [07Eh 0126 2] Namepath Offset : 0026 [080h 0128 2] OEM Data Length : 0020 [082h 0130 2] OEM Data Offset : 0036 [084h 0132 2] Port Type : 8000 [086h 0134 2] Port Subtype : 0000 [088h 0136 2] Reserved : 0000 [08Ah 0138 2] Base Address Offset : 0016 [08Ch 0140 2] Address Size Offset : 0022
[08Eh 0142 12] Base Address Register : [Generic Address Structure] [08Eh 0142 1] Space ID : 01 [SystemIO] [08Fh 0143 1] Bit Width : 64 [090h 0144 1] Bit Offset : 00 [091h 0145 1] Encoded Access Width : 04 [QWord Access:64] [092h 0146 8] Address : AABBCCDDEEFF0011
[09Ah 0154 4] Address Size : FEDCBA98
[09Eh 0158 16] Namepath : "\_SB_.PCI0.DBGP"
[0AEh 0174 16] OEM Data : 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 [0BEh 0190 16] : 57 58 59 01 02 03 04 05 06 07 08 09 0A 0B 0C 0D
-----Original Message----- From: devel-bounces@acpica.org [mailto:devel-bounces@acpica.org] On Behalf Of naresh.bhat@linaro.org Sent: Wednesday, October 16, 2013 12:49 AM To: devel@acpica.org Cc: linaro-acpi@lists.linaro.org Subject: [Devel] [PATCH 0/2] Fix DBG2 compilation template issue
From: Naresh Bhat naresh.bhat@linaro.org
The patches try to fix the DBG2 table compilation issue and also tries to add a template support for DBG2 tables.
Naresh Bhat (2): iASL: Fix Table Info handler for DBG2 iASL: Add template support for dbg2
source/common/dmtable.c | 2 +- source/compiler/dtcompiler.h | 1 + source/compiler/dttemplate.h | 10 ++++++++++ 3 files changed, 12 insertions(+), 1 deletion(-)
-- 1.7.9.5
Devel mailing list Devel@acpica.org https://lists.acpica.org/mailman/listinfo/devel
Hi Robert,
Thank you very much. I will implement sub-table compilation method and post the patches.
Regards -Naresh Bhat
On 23 October 2013 02:28, Moore, Robert robert.moore@intel.com wrote:
The real issue is that the code to actually compile a DBG2 (including all subtables) has not been written yet.
Here's an example of a large DBG2 with subtables.
/*
- Intel ACPI Component Architecture
- AML Disassembler version 20120711-32 [Aug 14 2012]
- Copyright (c) 2000 - 2012 Intel Corporation
- Disassembly of dbg2.aml, Tue Aug 14 09:34:28 2012
- ACPI Data Table [DBG2]
- Format: [HexOffset DecimalOffset ByteLength] FieldName : FieldValue
*/
[000h 0000 4] Signature : "DBG2" [Debug Port table type 2] [004h 0004 4] Table Length : 000000CE [008h 0008 1] Revision : 01 [009h 0009 1] Checksum : B1 [00Ah 0010 6] Oem ID : "INTEL " [010h 0016 8] Oem Table ID : "TEMPLATE" [018h 0024 4] Oem Revision : 00000000 [01Ch 0028 4] Asl Compiler ID : "INTL" [020h 0032 4] Asl Compiler Revision : 20120711
[024h 0036 4] Info Offset : 0000002C [028h 0040 4] Info Count : 00000002
[02Ch 0044 1] Revision : 00 [02Dh 0045 2] Length : 004C [02Fh 0047 1] Register Count : 02 [030h 0048 2] Namepath Length : 0009 [032h 0050 2] Namepath Offset : 0036 [034h 0052 2] OEM Data Length : 000D [036h 0054 2] OEM Data Offset : 003F [038h 0056 2] Port Type : 8000 [03Ah 0058 2] Port Subtype : 0000 [03Ch 0060 2] Reserved : 0000 [03Eh 0062 2] Base Address Offset : 0016 [040h 0064 2] Address Size Offset : 002E
[042h 0066 12] Base Address Register : [Generic Address Structure] [042h 0066 1] Space ID : 01 [SystemIO] [043h 0067 1] Bit Width : 32 [044h 0068 1] Bit Offset : 00 [045h 0069 1] Encoded Access Width : 03 [DWord Access:32] [046h 0070 8] Address : 1122334455667788
[04Eh 0078 12] Base Address Register : [Generic Address Structure] [04Eh 0078 1] Space ID : 01 [SystemIO] [04Fh 0079 1] Bit Width : 64 [050h 0080 1] Bit Offset : 00 [051h 0081 1] Encoded Access Width : 04 [QWord Access:64] [052h 0082 8] Address : AABBCCDDEEFF0011
[05Ah 0090 4] Address Size : 76543210 [05Eh 0094 4] Address Size : FEDCBA98
[062h 0098 9] Namepath : "MyDevice"
[06Bh 0107 13] OEM Data : 01 02 03 04 05 06 07 08 09 0A 0B 0C 0D
[078h 0120 1] Revision : 00 [079h 0121 2] Length : 0056 [07Bh 0123 1] Register Count : 01 [07Ch 0124 2] Namepath Length : 0010 [07Eh 0126 2] Namepath Offset : 0026 [080h 0128 2] OEM Data Length : 0020 [082h 0130 2] OEM Data Offset : 0036 [084h 0132 2] Port Type : 8000 [086h 0134 2] Port Subtype : 0000 [088h 0136 2] Reserved : 0000 [08Ah 0138 2] Base Address Offset : 0016 [08Ch 0140 2] Address Size Offset : 0022
[08Eh 0142 12] Base Address Register : [Generic Address Structure] [08Eh 0142 1] Space ID : 01 [SystemIO] [08Fh 0143 1] Bit Width : 64 [090h 0144 1] Bit Offset : 00 [091h 0145 1] Encoded Access Width : 04 [QWord Access:64] [092h 0146 8] Address : AABBCCDDEEFF0011
[09Ah 0154 4] Address Size : FEDCBA98
[09Eh 0158 16] Namepath : "\_SB_.PCI0.DBGP"
[0AEh 0174 16] OEM Data : 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 [0BEh 0190 16] : 57 58 59 01 02 03 04 05 06 07 08 09 0A 0B 0C 0D
-----Original Message----- From: devel-bounces@acpica.org [mailto:devel-bounces@acpica.org] On Behalf Of naresh.bhat@linaro.org Sent: Wednesday, October 16, 2013 12:49 AM To: devel@acpica.org Cc: linaro-acpi@lists.linaro.org Subject: [Devel] [PATCH 0/2] Fix DBG2 compilation template issue
From: Naresh Bhat naresh.bhat@linaro.org
The patches try to fix the DBG2 table compilation issue and also tries to add a template support for DBG2 tables.
Naresh Bhat (2): iASL: Fix Table Info handler for DBG2 iASL: Add template support for dbg2
source/common/dmtable.c | 2 +- source/compiler/dtcompiler.h | 1 + source/compiler/dttemplate.h | 10 ++++++++++ 3 files changed, 12 insertions(+), 1 deletion(-)
-- 1.7.9.5
Devel mailing list Devel@acpica.org https://lists.acpica.org/mailman/listinfo/devel
I have started on it, but if I don't have the time, perhaps you can help. I'll let you know of my progress later today. Bob
-----Original Message----- From: Naresh Bhat [mailto:naresh.bhat@linaro.org] Sent: Wednesday, October 23, 2013 2:07 AM To: Moore, Robert Cc: devel@acpica.org; linaro-acpi@lists.linaro.org Subject: Re: [Devel] [PATCH 0/2] Fix DBG2 compilation template issue
Hi Robert,
Thank you very much. I will implement sub-table compilation method and post the patches.
Regards -Naresh Bhat
On 23 October 2013 02:28, Moore, Robert robert.moore@intel.com wrote:
The real issue is that the code to actually compile a DBG2 (including
all subtables) has not been written yet.
Here's an example of a large DBG2 with subtables.
/*
- Intel ACPI Component Architecture
- AML Disassembler version 20120711-32 [Aug 14 2012]
- Copyright (c) 2000 - 2012 Intel Corporation
- Disassembly of dbg2.aml, Tue Aug 14 09:34:28 2012
- ACPI Data Table [DBG2]
- Format: [HexOffset DecimalOffset ByteLength] FieldName :
FieldValue */
[000h 0000 4] Signature : "DBG2" [Debug Port
table type 2]
[004h 0004 4] Table Length : 000000CE [008h 0008 1] Revision : 01 [009h 0009 1] Checksum : B1 [00Ah 0010 6] Oem ID : "INTEL " [010h 0016 8] Oem Table ID : "TEMPLATE" [018h 0024 4] Oem Revision : 00000000 [01Ch 0028 4] Asl Compiler ID : "INTL" [020h 0032 4] Asl Compiler Revision : 20120711
[024h 0036 4] Info Offset : 0000002C [028h 0040 4] Info Count : 00000002
[02Ch 0044 1] Revision : 00 [02Dh 0045 2] Length : 004C [02Fh 0047 1] Register Count : 02 [030h 0048 2] Namepath Length : 0009 [032h 0050 2] Namepath Offset : 0036 [034h 0052 2] OEM Data Length : 000D [036h 0054 2] OEM Data Offset : 003F [038h 0056 2] Port Type : 8000 [03Ah 0058 2] Port Subtype : 0000 [03Ch 0060 2] Reserved : 0000 [03Eh 0062 2] Base Address Offset : 0016 [040h 0064 2] Address Size Offset : 002E
[042h 0066 12] Base Address Register : [Generic Address
Structure]
[042h 0066 1] Space ID : 01 [SystemIO] [043h 0067 1] Bit Width : 32 [044h 0068 1] Bit Offset : 00 [045h 0069 1] Encoded Access Width : 03 [DWord Access:32] [046h 0070 8] Address : 1122334455667788
[04Eh 0078 12] Base Address Register : [Generic Address
Structure]
[04Eh 0078 1] Space ID : 01 [SystemIO] [04Fh 0079 1] Bit Width : 64 [050h 0080 1] Bit Offset : 00 [051h 0081 1] Encoded Access Width : 04 [QWord Access:64] [052h 0082 8] Address : AABBCCDDEEFF0011
[05Ah 0090 4] Address Size : 76543210 [05Eh 0094 4] Address Size : FEDCBA98
[062h 0098 9] Namepath : "MyDevice"
[06Bh 0107 13] OEM Data : 01 02 03 04 05 06 07 08
09 0A 0B 0C 0D
[078h 0120 1] Revision : 00 [079h 0121 2] Length : 0056 [07Bh 0123 1] Register Count : 01 [07Ch 0124 2] Namepath Length : 0010 [07Eh 0126 2] Namepath Offset : 0026 [080h 0128 2] OEM Data Length : 0020 [082h 0130 2] OEM Data Offset : 0036 [084h 0132 2] Port Type : 8000 [086h 0134 2] Port Subtype : 0000 [088h 0136 2] Reserved : 0000 [08Ah 0138 2] Base Address Offset : 0016 [08Ch 0140 2] Address Size Offset : 0022
[08Eh 0142 12] Base Address Register : [Generic Address
Structure]
[08Eh 0142 1] Space ID : 01 [SystemIO] [08Fh 0143 1] Bit Width : 64 [090h 0144 1] Bit Offset : 00 [091h 0145 1] Encoded Access Width : 04 [QWord Access:64] [092h 0146 8] Address : AABBCCDDEEFF0011
[09Ah 0154 4] Address Size : FEDCBA98
[09Eh 0158 16] Namepath : "\_SB_.PCI0.DBGP"
[0AEh 0174 16] OEM Data : 41 42 43 44 45 46 47 48
49 50 51 52 53 54 55 56
[0BEh 0190 16] : 57 58 59 01 02 03 04 05
06 07 08 09 0A 0B 0C 0D
-----Original Message----- From: devel-bounces@acpica.org [mailto:devel-bounces@acpica.org] On Behalf Of naresh.bhat@linaro.org Sent: Wednesday, October 16, 2013 12:49 AM To: devel@acpica.org Cc: linaro-acpi@lists.linaro.org Subject: [Devel] [PATCH 0/2] Fix DBG2 compilation template issue
From: Naresh Bhat naresh.bhat@linaro.org
The patches try to fix the DBG2 table compilation issue and also tries to add a template support for DBG2 tables.
Naresh Bhat (2): iASL: Fix Table Info handler for DBG2 iASL: Add template support for dbg2
source/common/dmtable.c | 2 +- source/compiler/dtcompiler.h | 1 + source/compiler/dttemplate.h | 10 ++++++++++ 3 files changed, 12 insertions(+), 1 deletion(-)
-- 1.7.9.5
Devel mailing list Devel@acpica.org https://lists.acpica.org/mailman/listinfo/devel
Hi Robert Moore,
OK sure. My apologies I could not able to spend time on it today. Since I was focusing on other items.
Regards -Naresh Bhat
On 23 October 2013 20:55, Moore, Robert robert.moore@intel.com wrote:
I have started on it, but if I don't have the time, perhaps you can help. I'll let you know of my progress later today. Bob
-----Original Message----- From: Naresh Bhat [mailto:naresh.bhat@linaro.org] Sent: Wednesday, October 23, 2013 2:07 AM To: Moore, Robert Cc: devel@acpica.org; linaro-acpi@lists.linaro.org Subject: Re: [Devel] [PATCH 0/2] Fix DBG2 compilation template issue
Hi Robert,
Thank you very much. I will implement sub-table compilation method and post the patches.
Regards -Naresh Bhat
On 23 October 2013 02:28, Moore, Robert robert.moore@intel.com wrote:
The real issue is that the code to actually compile a DBG2 (including
all subtables) has not been written yet.
Here's an example of a large DBG2 with subtables.
/*
- Intel ACPI Component Architecture
- AML Disassembler version 20120711-32 [Aug 14 2012]
- Copyright (c) 2000 - 2012 Intel Corporation
- Disassembly of dbg2.aml, Tue Aug 14 09:34:28 2012
- ACPI Data Table [DBG2]
- Format: [HexOffset DecimalOffset ByteLength] FieldName :
FieldValue */
[000h 0000 4] Signature : "DBG2" [Debug Port
table type 2]
[004h 0004 4] Table Length : 000000CE [008h 0008 1] Revision : 01 [009h 0009 1] Checksum : B1 [00Ah 0010 6] Oem ID : "INTEL " [010h 0016 8] Oem Table ID : "TEMPLATE" [018h 0024 4] Oem Revision : 00000000 [01Ch 0028 4] Asl Compiler ID : "INTL" [020h 0032 4] Asl Compiler Revision : 20120711
[024h 0036 4] Info Offset : 0000002C [028h 0040 4] Info Count : 00000002
[02Ch 0044 1] Revision : 00 [02Dh 0045 2] Length : 004C [02Fh 0047 1] Register Count : 02 [030h 0048 2] Namepath Length : 0009 [032h 0050 2] Namepath Offset : 0036 [034h 0052 2] OEM Data Length : 000D [036h 0054 2] OEM Data Offset : 003F [038h 0056 2] Port Type : 8000 [03Ah 0058 2] Port Subtype : 0000 [03Ch 0060 2] Reserved : 0000 [03Eh 0062 2] Base Address Offset : 0016 [040h 0064 2] Address Size Offset : 002E
[042h 0066 12] Base Address Register : [Generic Address
Structure]
[042h 0066 1] Space ID : 01 [SystemIO] [043h 0067 1] Bit Width : 32 [044h 0068 1] Bit Offset : 00 [045h 0069 1] Encoded Access Width : 03 [DWord Access:32] [046h 0070 8] Address : 1122334455667788
[04Eh 0078 12] Base Address Register : [Generic Address
Structure]
[04Eh 0078 1] Space ID : 01 [SystemIO] [04Fh 0079 1] Bit Width : 64 [050h 0080 1] Bit Offset : 00 [051h 0081 1] Encoded Access Width : 04 [QWord Access:64] [052h 0082 8] Address : AABBCCDDEEFF0011
[05Ah 0090 4] Address Size : 76543210 [05Eh 0094 4] Address Size : FEDCBA98
[062h 0098 9] Namepath : "MyDevice"
[06Bh 0107 13] OEM Data : 01 02 03 04 05 06 07 08
09 0A 0B 0C 0D
[078h 0120 1] Revision : 00 [079h 0121 2] Length : 0056 [07Bh 0123 1] Register Count : 01 [07Ch 0124 2] Namepath Length : 0010 [07Eh 0126 2] Namepath Offset : 0026 [080h 0128 2] OEM Data Length : 0020 [082h 0130 2] OEM Data Offset : 0036 [084h 0132 2] Port Type : 8000 [086h 0134 2] Port Subtype : 0000 [088h 0136 2] Reserved : 0000 [08Ah 0138 2] Base Address Offset : 0016 [08Ch 0140 2] Address Size Offset : 0022
[08Eh 0142 12] Base Address Register : [Generic Address
Structure]
[08Eh 0142 1] Space ID : 01 [SystemIO] [08Fh 0143 1] Bit Width : 64 [090h 0144 1] Bit Offset : 00 [091h 0145 1] Encoded Access Width : 04 [QWord Access:64] [092h 0146 8] Address : AABBCCDDEEFF0011
[09Ah 0154 4] Address Size : FEDCBA98
[09Eh 0158 16] Namepath : "\_SB_.PCI0.DBGP"
[0AEh 0174 16] OEM Data : 41 42 43 44 45 46 47 48
49 50 51 52 53 54 55 56
[0BEh 0190 16] : 57 58 59 01 02 03 04 05
06 07 08 09 0A 0B 0C 0D
-----Original Message----- From: devel-bounces@acpica.org [mailto:devel-bounces@acpica.org] On Behalf Of naresh.bhat@linaro.org Sent: Wednesday, October 16, 2013 12:49 AM To: devel@acpica.org Cc: linaro-acpi@lists.linaro.org Subject: [Devel] [PATCH 0/2] Fix DBG2 compilation template issue
From: Naresh Bhat naresh.bhat@linaro.org
The patches try to fix the DBG2 table compilation issue and also tries to add a template support for DBG2 tables.
Naresh Bhat (2): iASL: Fix Table Info handler for DBG2 iASL: Add template support for dbg2
source/common/dmtable.c | 2 +- source/compiler/dtcompiler.h | 1 + source/compiler/dttemplate.h | 10 ++++++++++ 3 files changed, 12 insertions(+), 1 deletion(-)
-- 1.7.9.5
Devel mailing list Devel@acpica.org https://lists.acpica.org/mailman/listinfo/devel
I've got most of it working today.
-----Original Message----- From: Naresh Bhat [mailto:naresh.bhat@linaro.org] Sent: Wednesday, October 23, 2013 8:30 AM To: Moore, Robert Cc: devel@acpica.org; linaro-acpi@lists.linaro.org Subject: Re: [Devel] [PATCH 0/2] Fix DBG2 compilation template issue
Hi Robert Moore,
OK sure. My apologies I could not able to spend time on it today. Since I was focusing on other items.
Regards -Naresh Bhat
On 23 October 2013 20:55, Moore, Robert robert.moore@intel.com wrote:
I have started on it, but if I don't have the time, perhaps you can
help. I'll let you know of my progress later today.
Bob
-----Original Message----- From: Naresh Bhat [mailto:naresh.bhat@linaro.org] Sent: Wednesday, October 23, 2013 2:07 AM To: Moore, Robert Cc: devel@acpica.org; linaro-acpi@lists.linaro.org Subject: Re: [Devel] [PATCH 0/2] Fix DBG2 compilation template issue
Hi Robert,
Thank you very much. I will implement sub-table compilation method and post the patches.
Regards -Naresh Bhat
On 23 October 2013 02:28, Moore, Robert robert.moore@intel.com wrote:
The real issue is that the code to actually compile a DBG2 (including
all subtables) has not been written yet.
Here's an example of a large DBG2 with subtables.
/*
- Intel ACPI Component Architecture
- AML Disassembler version 20120711-32 [Aug 14 2012]
- Copyright (c) 2000 - 2012 Intel Corporation
- Disassembly of dbg2.aml, Tue Aug 14 09:34:28 2012
- ACPI Data Table [DBG2]
- Format: [HexOffset DecimalOffset ByteLength] FieldName :
FieldValue */
[000h 0000 4] Signature : "DBG2" [Debug Port
table type 2]
[004h 0004 4] Table Length : 000000CE [008h 0008 1] Revision : 01 [009h 0009 1] Checksum : B1 [00Ah 0010 6] Oem ID : "INTEL " [010h 0016 8] Oem Table ID : "TEMPLATE" [018h 0024 4] Oem Revision : 00000000 [01Ch 0028 4] Asl Compiler ID : "INTL" [020h 0032 4] Asl Compiler Revision : 20120711
[024h 0036 4] Info Offset : 0000002C [028h 0040 4] Info Count : 00000002
[02Ch 0044 1] Revision : 00 [02Dh 0045 2] Length : 004C [02Fh 0047 1] Register Count : 02 [030h 0048 2] Namepath Length : 0009 [032h 0050 2] Namepath Offset : 0036 [034h 0052 2] OEM Data Length : 000D [036h 0054 2] OEM Data Offset : 003F [038h 0056 2] Port Type : 8000 [03Ah 0058 2] Port Subtype : 0000 [03Ch 0060 2] Reserved : 0000 [03Eh 0062 2] Base Address Offset : 0016 [040h 0064 2] Address Size Offset : 002E
[042h 0066 12] Base Address Register : [Generic Address
Structure]
[042h 0066 1] Space ID : 01 [SystemIO] [043h 0067 1] Bit Width : 32 [044h 0068 1] Bit Offset : 00 [045h 0069 1] Encoded Access Width : 03 [DWord Access:32] [046h 0070 8] Address : 1122334455667788
[04Eh 0078 12] Base Address Register : [Generic Address
Structure]
[04Eh 0078 1] Space ID : 01 [SystemIO] [04Fh 0079 1] Bit Width : 64 [050h 0080 1] Bit Offset : 00 [051h 0081 1] Encoded Access Width : 04 [QWord Access:64] [052h 0082 8] Address : AABBCCDDEEFF0011
[05Ah 0090 4] Address Size : 76543210 [05Eh 0094 4] Address Size : FEDCBA98
[062h 0098 9] Namepath : "MyDevice"
[06Bh 0107 13] OEM Data : 01 02 03 04 05 06 07
08
09 0A 0B 0C 0D
[078h 0120 1] Revision : 00 [079h 0121 2] Length : 0056 [07Bh 0123 1] Register Count : 01 [07Ch 0124 2] Namepath Length : 0010 [07Eh 0126 2] Namepath Offset : 0026 [080h 0128 2] OEM Data Length : 0020 [082h 0130 2] OEM Data Offset : 0036 [084h 0132 2] Port Type : 8000 [086h 0134 2] Port Subtype : 0000 [088h 0136 2] Reserved : 0000 [08Ah 0138 2] Base Address Offset : 0016 [08Ch 0140 2] Address Size Offset : 0022
[08Eh 0142 12] Base Address Register : [Generic Address
Structure]
[08Eh 0142 1] Space ID : 01 [SystemIO] [08Fh 0143 1] Bit Width : 64 [090h 0144 1] Bit Offset : 00 [091h 0145 1] Encoded Access Width : 04 [QWord Access:64] [092h 0146 8] Address : AABBCCDDEEFF0011
[09Ah 0154 4] Address Size : FEDCBA98
[09Eh 0158 16] Namepath : "\_SB_.PCI0.DBGP"
[0AEh 0174 16] OEM Data : 41 42 43 44 45 46 47
48
49 50 51 52 53 54 55 56
[0BEh 0190 16] : 57 58 59 01 02 03 04
05
06 07 08 09 0A 0B 0C 0D
-----Original Message----- From: devel-bounces@acpica.org [mailto:devel-bounces@acpica.org] On Behalf Of naresh.bhat@linaro.org Sent: Wednesday, October 16, 2013 12:49 AM To: devel@acpica.org Cc: linaro-acpi@lists.linaro.org Subject: [Devel] [PATCH 0/2] Fix DBG2 compilation template issue
From: Naresh Bhat naresh.bhat@linaro.org
The patches try to fix the DBG2 table compilation issue and also tries to add a template support for DBG2 tables.
Naresh Bhat (2): iASL: Fix Table Info handler for DBG2 iASL: Add template support for dbg2
source/common/dmtable.c | 2 +- source/compiler/dtcompiler.h | 1 + source/compiler/dttemplate.h | 10 ++++++++++ 3 files changed, 12 insertions(+), 1 deletion(-)
-- 1.7.9.5
Devel mailing list Devel@acpica.org https://lists.acpica.org/mailman/listinfo/devel
That's great. Hopefully will be added in the next release. Let me know If I can do anything more on DBG2. Its too late night for me. Will get some sleep..-:)
Thanks. -Naresh
On 24 October 2013 00:47, Moore, Robert robert.moore@intel.com wrote:
I've got most of it working today.
-----Original Message----- From: Naresh Bhat [mailto:naresh.bhat@linaro.org] Sent: Wednesday, October 23, 2013 8:30 AM To: Moore, Robert Cc: devel@acpica.org; linaro-acpi@lists.linaro.org Subject: Re: [Devel] [PATCH 0/2] Fix DBG2 compilation template issue
Hi Robert Moore,
OK sure. My apologies I could not able to spend time on it today. Since I was focusing on other items.
Regards -Naresh Bhat
On 23 October 2013 20:55, Moore, Robert robert.moore@intel.com wrote:
I have started on it, but if I don't have the time, perhaps you can
help. I'll let you know of my progress later today.
Bob
-----Original Message----- From: Naresh Bhat [mailto:naresh.bhat@linaro.org] Sent: Wednesday, October 23, 2013 2:07 AM To: Moore, Robert Cc: devel@acpica.org; linaro-acpi@lists.linaro.org Subject: Re: [Devel] [PATCH 0/2] Fix DBG2 compilation template issue
Hi Robert,
Thank you very much. I will implement sub-table compilation method and post the patches.
Regards -Naresh Bhat
On 23 October 2013 02:28, Moore, Robert robert.moore@intel.com wrote:
The real issue is that the code to actually compile a DBG2 (including
all subtables) has not been written yet.
Here's an example of a large DBG2 with subtables.
/*
- Intel ACPI Component Architecture
- AML Disassembler version 20120711-32 [Aug 14 2012]
- Copyright (c) 2000 - 2012 Intel Corporation
- Disassembly of dbg2.aml, Tue Aug 14 09:34:28 2012
- ACPI Data Table [DBG2]
- Format: [HexOffset DecimalOffset ByteLength] FieldName :
FieldValue */
[000h 0000 4] Signature : "DBG2" [Debug Port
table type 2]
[004h 0004 4] Table Length : 000000CE [008h 0008 1] Revision : 01 [009h 0009 1] Checksum : B1 [00Ah 0010 6] Oem ID : "INTEL " [010h 0016 8] Oem Table ID : "TEMPLATE" [018h 0024 4] Oem Revision : 00000000 [01Ch 0028 4] Asl Compiler ID : "INTL" [020h 0032 4] Asl Compiler Revision : 20120711
[024h 0036 4] Info Offset : 0000002C [028h 0040 4] Info Count : 00000002
[02Ch 0044 1] Revision : 00 [02Dh 0045 2] Length : 004C [02Fh 0047 1] Register Count : 02 [030h 0048 2] Namepath Length : 0009 [032h 0050 2] Namepath Offset : 0036 [034h 0052 2] OEM Data Length : 000D [036h 0054 2] OEM Data Offset : 003F [038h 0056 2] Port Type : 8000 [03Ah 0058 2] Port Subtype : 0000 [03Ch 0060 2] Reserved : 0000 [03Eh 0062 2] Base Address Offset : 0016 [040h 0064 2] Address Size Offset : 002E
[042h 0066 12] Base Address Register : [Generic Address
Structure]
[042h 0066 1] Space ID : 01 [SystemIO] [043h 0067 1] Bit Width : 32 [044h 0068 1] Bit Offset : 00 [045h 0069 1] Encoded Access Width : 03 [DWord Access:32] [046h 0070 8] Address : 1122334455667788
[04Eh 0078 12] Base Address Register : [Generic Address
Structure]
[04Eh 0078 1] Space ID : 01 [SystemIO] [04Fh 0079 1] Bit Width : 64 [050h 0080 1] Bit Offset : 00 [051h 0081 1] Encoded Access Width : 04 [QWord Access:64] [052h 0082 8] Address : AABBCCDDEEFF0011
[05Ah 0090 4] Address Size : 76543210 [05Eh 0094 4] Address Size : FEDCBA98
[062h 0098 9] Namepath : "MyDevice"
[06Bh 0107 13] OEM Data : 01 02 03 04 05 06 07
08
09 0A 0B 0C 0D
[078h 0120 1] Revision : 00 [079h 0121 2] Length : 0056 [07Bh 0123 1] Register Count : 01 [07Ch 0124 2] Namepath Length : 0010 [07Eh 0126 2] Namepath Offset : 0026 [080h 0128 2] OEM Data Length : 0020 [082h 0130 2] OEM Data Offset : 0036 [084h 0132 2] Port Type : 8000 [086h 0134 2] Port Subtype : 0000 [088h 0136 2] Reserved : 0000 [08Ah 0138 2] Base Address Offset : 0016 [08Ch 0140 2] Address Size Offset : 0022
[08Eh 0142 12] Base Address Register : [Generic Address
Structure]
[08Eh 0142 1] Space ID : 01 [SystemIO] [08Fh 0143 1] Bit Width : 64 [090h 0144 1] Bit Offset : 00 [091h 0145 1] Encoded Access Width : 04 [QWord Access:64] [092h 0146 8] Address : AABBCCDDEEFF0011
[09Ah 0154 4] Address Size : FEDCBA98
[09Eh 0158 16] Namepath : "\_SB_.PCI0.DBGP"
[0AEh 0174 16] OEM Data : 41 42 43 44 45 46 47
48
49 50 51 52 53 54 55 56
[0BEh 0190 16] : 57 58 59 01 02 03 04
05
06 07 08 09 0A 0B 0C 0D
-----Original Message----- From: devel-bounces@acpica.org [mailto:devel-bounces@acpica.org] On Behalf Of naresh.bhat@linaro.org Sent: Wednesday, October 16, 2013 12:49 AM To: devel@acpica.org Cc: linaro-acpi@lists.linaro.org Subject: [Devel] [PATCH 0/2] Fix DBG2 compilation template issue
From: Naresh Bhat naresh.bhat@linaro.org
The patches try to fix the DBG2 table compilation issue and also tries to add a template support for DBG2 tables.
Naresh Bhat (2): iASL: Fix Table Info handler for DBG2 iASL: Add template support for dbg2
source/common/dmtable.c | 2 +- source/compiler/dtcompiler.h | 1 + source/compiler/dttemplate.h | 10 ++++++++++ 3 files changed, 12 insertions(+), 1 deletion(-)
-- 1.7.9.5
Devel mailing list Devel@acpica.org https://lists.acpica.org/mailman/listinfo/devel
-
Al Stone -
Moore, Robert -
Naresh Bhat -
naresh.bhat＠linaro.org