From: Al Stone ahs3@redhat.com
The prior version of this created a "dummy" platform; I did not think that specific enough so the platform is now called "loadtest".
What this patch to acpi-asl does is define only the ACPI tables that are absolutely required to determine if ACPI will initialize properly during kernel boot. These tables contain essentially *no* configuration information and should not.
Changes for v2: -- rename "dummy" to "loadtest" -- reduce tables to bare minimum (including removing the RSDT which has been deprecated)
Al Stone (1): ASL : loadtest.acpi : add in a minimal table set that can be used for testing of core ACPI table loading
platforms/loadtest.acpi/.gitignore | 3 + platforms/loadtest.acpi/dsdt.asl | 17 +++ platforms/loadtest.acpi/facp.asl | 167 ++++++++++++++++++++++++++++++ platforms/loadtest.acpi/facs.asl | 21 ++++ platforms/loadtest.acpi/loadtest.manifest | 13 +++ platforms/loadtest.acpi/rsdp.asl | 17 +++ platforms/loadtest.acpi/xsdt.asl | 23 ++++ 7 files changed, 261 insertions(+) create mode 100644 platforms/loadtest.acpi/.gitignore create mode 100644 platforms/loadtest.acpi/dsdt.asl create mode 100644 platforms/loadtest.acpi/facp.asl create mode 100644 platforms/loadtest.acpi/facs.asl create mode 100644 platforms/loadtest.acpi/loadtest.manifest create mode 100644 platforms/loadtest.acpi/rsdp.asl create mode 100644 platforms/loadtest.acpi/xsdt.asl
From: Al Stone ahs3@redhat.com
Signed-off-by: Al Stone al.stone@linaro.org --- platforms/loadtest.acpi/.gitignore | 3 + platforms/loadtest.acpi/dsdt.asl | 17 +++ platforms/loadtest.acpi/facp.asl | 167 ++++++++++++++++++++++++++++++ platforms/loadtest.acpi/facs.asl | 21 ++++ platforms/loadtest.acpi/loadtest.manifest | 13 +++ platforms/loadtest.acpi/rsdp.asl | 17 +++ platforms/loadtest.acpi/xsdt.asl | 23 ++++ 7 files changed, 261 insertions(+) create mode 100644 platforms/loadtest.acpi/.gitignore create mode 100644 platforms/loadtest.acpi/dsdt.asl create mode 100644 platforms/loadtest.acpi/facp.asl create mode 100644 platforms/loadtest.acpi/facs.asl create mode 100644 platforms/loadtest.acpi/loadtest.manifest create mode 100644 platforms/loadtest.acpi/rsdp.asl create mode 100644 platforms/loadtest.acpi/xsdt.asl
diff --git a/platforms/loadtest.acpi/.gitignore b/platforms/loadtest.acpi/.gitignore new file mode 100644 index 0000000..9585b50 --- /dev/null +++ b/platforms/loadtest.acpi/.gitignore @@ -0,0 +1,3 @@ +*.aml +*.lst +*.acpi diff --git a/platforms/loadtest.acpi/dsdt.asl b/platforms/loadtest.acpi/dsdt.asl new file mode 100644 index 0000000..f57105a --- /dev/null +++ b/platforms/loadtest.acpi/dsdt.asl @@ -0,0 +1,17 @@ +/* + * Copyright (c) 2013, Al Stone al.stone@linaro.org + * + * [DSDT] Null Description + * + * This source is released under the terms of the GPLv2. + */ + +DefinitionBlock ( + "dsdt.aml", // output filename + "DSDT", // table signature + 1, // DSDT compliance revision + "LINARO", // OEM ID + "LOADTEST", // table ID + 0x00000001) // OEM revision +{ +} diff --git a/platforms/loadtest.acpi/facp.asl b/platforms/loadtest.acpi/facp.asl new file mode 100644 index 0000000..5583e68 --- /dev/null +++ b/platforms/loadtest.acpi/facp.asl @@ -0,0 +1,167 @@ +/* + * Copyright (c) 2013, Al Stone al.stone@linaro.org + * + * [FACP] ACPI Table + * + * This source is released under the terms of the GPLv2. + */ + +[0004] Signature : "FACP" +[0004] Table Length : 0000010C +[0001] Revision : 05 +[0001] Checksum : 18 +[0006] Oem ID : "LINARO" +[0008] Oem Table ID : "LOADTEST" +[0004] Oem Revision : 00000000 +[0004] Asl Compiler ID : "INTL" +[0004] Asl Compiler Revision : 20111123 + +[0004] FACS Address : 00000000 +[0004] DSDT Address : 00000010 +[0001] Model : 00 +[0001] PM Profile : 04 /* Enterprise Server */ +[0002] SCI Interrupt : 0000 +[0004] SMI Command Port : 00000000 +[0001] ACPI Enable Value : 00 +[0001] ACPI Disable Value : 00 +[0001] S4BIOS Command : 00 +[0001] P-State Control : 00 +[0004] PM1A Event Block Address : 00000001 +[0004] PM1B Event Block Address : 00000000 +[0004] PM1A Control Block Address : 00000001 +[0004] PM1B Control Block Address : 00000000 +[0004] PM2 Control Block Address : 00000001 +[0004] PM Timer Block Address : 00000001 +[0004] GPE0 Block Address : 00000001 +[0004] GPE1 Block Address : 00000000 +[0001] PM1 Event Block Length : 04 +[0001] PM1 Control Block Length : 02 +[0001] PM2 Control Block Length : 01 +[0001] PM Timer Block Length : 04 +[0001] GPE0 Block Length : 08 +[0001] GPE1 Block Length : 00 +[0001] GPE1 Base Offset : 00 +[0001] _CST Support : 00 +[0002] C2 Latency : 0000 +[0002] C3 Latency : 0000 +[0002] CPU Cache Size : 0000 +[0002] Cache Flush Stride : 0000 +[0001] Duty Cycle Offset : 00 +[0001] Duty Cycle Width : 00 +[0001] RTC Day Alarm Index : 00 +[0001] RTC Month Alarm Index : 00 +[0001] RTC Century Index : 00 +[0002] Boot Flags (decoded below) : 0000 + Legacy Devices Supported (V2) : 0 + 8042 Present on ports 60/64 (V2) : 0 + VGA Not Present (V4) : 0 + MSI Not Supported (V4) : 0 + PCIe ASPM Not Supported (V4) : 0 + CMOS RTC Not Present (V5) : 0 +[0001] Reserved : 00 +[0004] Flags (decoded below) : 00000000 + WBINVD instruction is operational (V1) : 1 + WBINVD flushes all caches (V1) : 1 + All CPUs support C1 (V1) : 0 + C2 works on MP system (V1) : 0 + Control Method Power Button (V1) : 1 + Control Method Sleep Button (V1) : 1 + RTC wake not in fixed reg space (V1) : 0 + RTC can wake system from S4 (V1) : 0 + 32-bit PM Timer (V1) : 0 + Docking Supported (V1) : 0 + Reset Register Supported (V2) : 0 + Sealed Case (V3) : 0 + Headless - No Video (V3) : 1 + Use native instr after SLP_TYPx (V3) : 0 + PCIEXP_WAK Bits Supported (V4) : 0 + Use Platform Timer (V4) : 0 + RTC_STS valid on S4 wake (V4) : 0 + Remote Power-on capable (V4) : 1 + Use APIC Cluster Model (V4) : 0 + Use APIC Physical Destination Mode (V4) : 0 + Hardware Reduced (V5) : 1 + Low Power S0 Idle (V5) : 1 + +[0012] Reset Register : [Generic Address Structure] +[0001] Space ID : 01 [SystemIO] +[0001] Bit Width : 08 +[0001] Bit Offset : 00 +[0001] Encoded Access Width : 01 [Byte Access:8] +[0008] Address : 0000000000000001 + +[0001] Value to cause reset : 00 +[0003] Reserved : 000000 +[0008] FACS Address : 0000000000000000 +[0008] DSDT Address : 0000000000000010 +[0012] PM1A Event Block : [Generic Address Structure] +[0001] Space ID : 01 [SystemIO] +[0001] Bit Width : 20 +[0001] Bit Offset : 00 +[0001] Encoded Access Width : 02 [Word Access:16] +[0008] Address : 0000000000000001 + +[0012] PM1B Event Block : [Generic Address Structure] +[0001] Space ID : 01 [SystemIO] +[0001] Bit Width : 00 +[0001] Bit Offset : 00 +[0001] Encoded Access Width : 00 [Undefined/Legacy] +[0008] Address : 0000000000000000 + +[0012] PM1A Control Block : [Generic Address Structure] +[0001] Space ID : 01 [SystemIO] +[0001] Bit Width : 10 +[0001] Bit Offset : 00 +[0001] Encoded Access Width : 02 [Word Access:16] +[0008] Address : 0000000000000001 + +[0012] PM1B Control Block : [Generic Address Structure] +[0001] Space ID : 01 [SystemIO] +[0001] Bit Width : 00 +[0001] Bit Offset : 00 +[0001] Encoded Access Width : 00 [Undefined/Legacy] +[0008] Address : 0000000000000000 + +[0012] PM2 Control Block : [Generic Address Structure] +[0001] Space ID : 01 [SystemIO] +[0001] Bit Width : 08 +[0001] Bit Offset : 00 +[0001] Encoded Access Width : 00 [Undefined/Legacy] +[0008] Address : 0000000000000001 + +[0012] PM Timer Block : [Generic Address Structure] +[0001] Space ID : 01 [SystemIO] +[0001] Bit Width : 20 +[0001] Bit Offset : 00 +[0001] Encoded Access Width : 03 [DWord Access:32] +[0008] Address : 0000000000000001 + +[0012] GPE0 Block : [Generic Address Structure] +[0001] Space ID : 01 [SystemIO] +[0001] Bit Width : 80 +[0001] Bit Offset : 00 +[0001] Encoded Access Width : 01 [Byte Access:8] +[0008] Address : 0000000000000001 + +[0012] GPE1 Block : [Generic Address Structure] +[0001] Space ID : 01 [SystemIO] +[0001] Bit Width : 00 +[0001] Bit Offset : 00 +[0001] Encoded Access Width : 00 [Undefined/Legacy] +[0008] Address : 0000000000000000 + + +[0012] Sleep Control Register : [Generic Address Structure] +[0001] Space ID : 01 [SystemIO] +[0001] Bit Width : 08 +[0001] Bit Offset : 00 +[0001] Encoded Access Width : 01 [Byte Access:8] +[0008] Address : 0000000000000000 + +[0012] Sleep Status Register : [Generic Address Structure] +[0001] Space ID : 01 [SystemIO] +[0001] Bit Width : 08 +[0001] Bit Offset : 00 +[0001] Encoded Access Width : 01 [Byte Access:8] +[0008] Address : 0000000000000000 + diff --git a/platforms/loadtest.acpi/facs.asl b/platforms/loadtest.acpi/facs.asl new file mode 100644 index 0000000..8d12b41 --- /dev/null +++ b/platforms/loadtest.acpi/facs.asl @@ -0,0 +1,21 @@ +/* + * Copyright (c) 2013, Al Stone al.stone@linaro.org + * + * [FACS] ACPI Table + * + * This source is released under the terms of the GPLv2. + */ + +[0004] Signature : "FACS" +[0004] Length : 00000040 +[0004] Hardware Signature : 00000000 +[0004] 32 Firmware Waking Vector : 00000000 +[0004] Global Lock : 00000000 +[0004] Flags (decoded below) : 00000000 + S4BIOS Support Present : 0 + 64-bit Wake Supported (V2) : 0 +[0008] 64 Firmware Waking Vector : 0000000000000000 +[0001] Version : 02 +[0003] Reserved : 000000 +[0004] OspmFlags (decoded below) : 00000000 + 64-bit Wake Env Required (V2) : 0 diff --git a/platforms/loadtest.acpi/loadtest.manifest b/platforms/loadtest.acpi/loadtest.manifest new file mode 100644 index 0000000..11157e0 --- /dev/null +++ b/platforms/loadtest.acpi/loadtest.manifest @@ -0,0 +1,13 @@ +# +# Each line is either a comment, white space, or two fields: +# +# <signature> : <ASL file name> +# +# NB: for each file x.asl, an AML file called x.aml will be created +# + +rsdp: rsdp.asl +xsdt: xsdt.asl +facp: facp.asl +facs: facs.asl +dsdt: dsdt.asl diff --git a/platforms/loadtest.acpi/rsdp.asl b/platforms/loadtest.acpi/rsdp.asl new file mode 100644 index 0000000..3460a77 --- /dev/null +++ b/platforms/loadtest.acpi/rsdp.asl @@ -0,0 +1,17 @@ +/* + * Copyright (c) 2013, Al Stone al.stone@linaro.org + * + * [RSDP] ACPI Table + * + * This source is released under the terms of the GPLv2. + */ + +[0008] Signature : "RSD PTR " +[0001] Checksum : 43 +[0006] Oem ID : "LINARO" +[0001] Revision : 02 +[0004] RSDT Address : 00000000 +[0004] Length : 00000024 +[0008] XSDT Address : 0000000000000000 +[0001] Extended Checksum : DC +[0003] Reserved : 000000 diff --git a/platforms/loadtest.acpi/xsdt.asl b/platforms/loadtest.acpi/xsdt.asl new file mode 100644 index 0000000..28f05a6 --- /dev/null +++ b/platforms/loadtest.acpi/xsdt.asl @@ -0,0 +1,23 @@ +/* + * Copyright (c) 2013, Al Stone al.stone@linaro.org + * + * [XSDT] Extended System Description Table + * Format: [ByteLength] FieldName : HexFieldValue + * + * This source is released under the terms of the GPLv2. + */ + +[0004] Signature : "XSDT" +[0004] Table Length : 00000064 +[0001] Revision : 01 +[0001] Checksum : 8B +[0006] Oem ID : "LINARO" +[0008] Oem Table ID : "LOADTEST" +[0004] Oem Revision : 00000001 +[0004] Asl Compiler ID : "INTL" +[0004] Asl Compiler Revision : 20100528 + +[0008] ACPI Table Address 0 : 0000000000000010 +[0008] ACPI Table Address 0 : 0000000000000020 +[0008] ACPI Table Address 0 : 0000000000000030 +[0008] ACPI Table Address 0 : 0000000000000040
Fixed up whitespace issues, Acked and applied.
G
On 01/08/13 22:01, al.stone@linaro.org wrote:
From: Al Stone ahs3@redhat.com
Signed-off-by: Al Stone al.stone@linaro.org
platforms/loadtest.acpi/.gitignore | 3 + platforms/loadtest.acpi/dsdt.asl | 17 +++ platforms/loadtest.acpi/facp.asl | 167 ++++++++++++++++++++++++++++++ platforms/loadtest.acpi/facs.asl | 21 ++++ platforms/loadtest.acpi/loadtest.manifest | 13 +++ platforms/loadtest.acpi/rsdp.asl | 17 +++ platforms/loadtest.acpi/xsdt.asl | 23 ++++ 7 files changed, 261 insertions(+) create mode 100644 platforms/loadtest.acpi/.gitignore create mode 100644 platforms/loadtest.acpi/dsdt.asl create mode 100644 platforms/loadtest.acpi/facp.asl create mode 100644 platforms/loadtest.acpi/facs.asl create mode 100644 platforms/loadtest.acpi/loadtest.manifest create mode 100644 platforms/loadtest.acpi/rsdp.asl create mode 100644 platforms/loadtest.acpi/xsdt.asl
diff --git a/platforms/loadtest.acpi/.gitignore b/platforms/loadtest.acpi/.gitignore new file mode 100644 index 0000000..9585b50 --- /dev/null +++ b/platforms/loadtest.acpi/.gitignore @@ -0,0 +1,3 @@ +*.aml +*.lst +*.acpi diff --git a/platforms/loadtest.acpi/dsdt.asl b/platforms/loadtest.acpi/dsdt.asl new file mode 100644 index 0000000..f57105a --- /dev/null +++ b/platforms/loadtest.acpi/dsdt.asl @@ -0,0 +1,17 @@ +/*
- Copyright (c) 2013, Al Stone al.stone@linaro.org
- [DSDT] Null Description
- This source is released under the terms of the GPLv2.
- */
+DefinitionBlock (
- "dsdt.aml", // output filename
- "DSDT", // table signature
- 1, // DSDT compliance revision
- "LINARO", // OEM ID
- "LOADTEST", // table ID
- 0x00000001) // OEM revision
+{ +} diff --git a/platforms/loadtest.acpi/facp.asl b/platforms/loadtest.acpi/facp.asl new file mode 100644 index 0000000..5583e68 --- /dev/null +++ b/platforms/loadtest.acpi/facp.asl @@ -0,0 +1,167 @@ +/*
- Copyright (c) 2013, Al Stone al.stone@linaro.org
- [FACP] ACPI Table
- This source is released under the terms of the GPLv2.
- */
+[0004] Signature : "FACP" +[0004] Table Length : 0000010C +[0001] Revision : 05 +[0001] Checksum : 18 +[0006] Oem ID : "LINARO" +[0008] Oem Table ID : "LOADTEST" +[0004] Oem Revision : 00000000 +[0004] Asl Compiler ID : "INTL" +[0004] Asl Compiler Revision : 20111123
+[0004] FACS Address : 00000000 +[0004] DSDT Address : 00000010 +[0001] Model : 00 +[0001] PM Profile : 04 /* Enterprise Server */ +[0002] SCI Interrupt : 0000 +[0004] SMI Command Port : 00000000 +[0001] ACPI Enable Value : 00 +[0001] ACPI Disable Value : 00 +[0001] S4BIOS Command : 00 +[0001] P-State Control : 00 +[0004] PM1A Event Block Address : 00000001 +[0004] PM1B Event Block Address : 00000000 +[0004] PM1A Control Block Address : 00000001 +[0004] PM1B Control Block Address : 00000000 +[0004] PM2 Control Block Address : 00000001 +[0004] PM Timer Block Address : 00000001 +[0004] GPE0 Block Address : 00000001 +[0004] GPE1 Block Address : 00000000 +[0001] PM1 Event Block Length : 04 +[0001] PM1 Control Block Length : 02 +[0001] PM2 Control Block Length : 01 +[0001] PM Timer Block Length : 04 +[0001] GPE0 Block Length : 08 +[0001] GPE1 Block Length : 00 +[0001] GPE1 Base Offset : 00 +[0001] _CST Support : 00 +[0002] C2 Latency : 0000 +[0002] C3 Latency : 0000 +[0002] CPU Cache Size : 0000 +[0002] Cache Flush Stride : 0000 +[0001] Duty Cycle Offset : 00 +[0001] Duty Cycle Width : 00 +[0001] RTC Day Alarm Index : 00 +[0001] RTC Month Alarm Index : 00 +[0001] RTC Century Index : 00 +[0002] Boot Flags (decoded below) : 0000
Legacy Devices Supported (V2) : 08042 Present on ports 60/64 (V2) : 0VGA Not Present (V4) : 0MSI Not Supported (V4) : 0PCIe ASPM Not Supported (V4) : 0CMOS RTC Not Present (V5) : 0+[0001] Reserved : 00 +[0004] Flags (decoded below) : 00000000
- WBINVD instruction is operational (V1) : 1
WBINVD flushes all caches (V1) : 1All CPUs support C1 (V1) : 0C2 works on MP system (V1) : 0Control Method Power Button (V1) : 1Control Method Sleep Button (V1) : 1RTC wake not in fixed reg space (V1) : 0RTC can wake system from S4 (V1) : 032-bit PM Timer (V1) : 0Docking Supported (V1) : 0Reset Register Supported (V2) : 0Sealed Case (V3) : 0Headless - No Video (V3) : 1Use native instr after SLP_TYPx (V3) : 0PCIEXP_WAK Bits Supported (V4) : 0Use Platform Timer (V4) : 0RTC_STS valid on S4 wake (V4) : 0Remote Power-on capable (V4) : 1Use APIC Cluster Model (V4) : 0- Use APIC Physical Destination Mode (V4) : 0
Hardware Reduced (V5) : 1Low Power S0 Idle (V5) : 1+[0012] Reset Register : [Generic Address Structure] +[0001] Space ID : 01 [SystemIO] +[0001] Bit Width : 08 +[0001] Bit Offset : 00 +[0001] Encoded Access Width : 01 [Byte Access:8] +[0008] Address : 0000000000000001
+[0001] Value to cause reset : 00 +[0003] Reserved : 000000 +[0008] FACS Address : 0000000000000000 +[0008] DSDT Address : 0000000000000010 +[0012] PM1A Event Block : [Generic Address Structure] +[0001] Space ID : 01 [SystemIO] +[0001] Bit Width : 20 +[0001] Bit Offset : 00 +[0001] Encoded Access Width : 02 [Word Access:16] +[0008] Address : 0000000000000001
+[0012] PM1B Event Block : [Generic Address Structure] +[0001] Space ID : 01 [SystemIO] +[0001] Bit Width : 00 +[0001] Bit Offset : 00 +[0001] Encoded Access Width : 00 [Undefined/Legacy] +[0008] Address : 0000000000000000
+[0012] PM1A Control Block : [Generic Address Structure] +[0001] Space ID : 01 [SystemIO] +[0001] Bit Width : 10 +[0001] Bit Offset : 00 +[0001] Encoded Access Width : 02 [Word Access:16] +[0008] Address : 0000000000000001
+[0012] PM1B Control Block : [Generic Address Structure] +[0001] Space ID : 01 [SystemIO] +[0001] Bit Width : 00 +[0001] Bit Offset : 00 +[0001] Encoded Access Width : 00 [Undefined/Legacy] +[0008] Address : 0000000000000000
+[0012] PM2 Control Block : [Generic Address Structure] +[0001] Space ID : 01 [SystemIO] +[0001] Bit Width : 08 +[0001] Bit Offset : 00 +[0001] Encoded Access Width : 00 [Undefined/Legacy] +[0008] Address : 0000000000000001
+[0012] PM Timer Block : [Generic Address Structure] +[0001] Space ID : 01 [SystemIO] +[0001] Bit Width : 20 +[0001] Bit Offset : 00 +[0001] Encoded Access Width : 03 [DWord Access:32] +[0008] Address : 0000000000000001
+[0012] GPE0 Block : [Generic Address Structure] +[0001] Space ID : 01 [SystemIO] +[0001] Bit Width : 80 +[0001] Bit Offset : 00 +[0001] Encoded Access Width : 01 [Byte Access:8] +[0008] Address : 0000000000000001
+[0012] GPE1 Block : [Generic Address Structure] +[0001] Space ID : 01 [SystemIO] +[0001] Bit Width : 00 +[0001] Bit Offset : 00 +[0001] Encoded Access Width : 00 [Undefined/Legacy] +[0008] Address : 0000000000000000
+[0012] Sleep Control Register : [Generic Address Structure] +[0001] Space ID : 01 [SystemIO] +[0001] Bit Width : 08 +[0001] Bit Offset : 00 +[0001] Encoded Access Width : 01 [Byte Access:8] +[0008] Address : 0000000000000000
+[0012] Sleep Status Register : [Generic Address Structure] +[0001] Space ID : 01 [SystemIO] +[0001] Bit Width : 08 +[0001] Bit Offset : 00 +[0001] Encoded Access Width : 01 [Byte Access:8] +[0008] Address : 0000000000000000
diff --git a/platforms/loadtest.acpi/facs.asl b/platforms/loadtest.acpi/facs.asl new file mode 100644 index 0000000..8d12b41 --- /dev/null +++ b/platforms/loadtest.acpi/facs.asl @@ -0,0 +1,21 @@ +/*
- Copyright (c) 2013, Al Stone al.stone@linaro.org
- [FACS] ACPI Table
- This source is released under the terms of the GPLv2.
- */
+[0004] Signature : "FACS" +[0004] Length : 00000040 +[0004] Hardware Signature : 00000000 +[0004] 32 Firmware Waking Vector : 00000000 +[0004] Global Lock : 00000000 +[0004] Flags (decoded below) : 00000000
S4BIOS Support Present : 064-bit Wake Supported (V2) : 0+[0008] 64 Firmware Waking Vector : 0000000000000000 +[0001] Version : 02 +[0003] Reserved : 000000 +[0004] OspmFlags (decoded below) : 00000000
64-bit Wake Env Required (V2) : 0diff --git a/platforms/loadtest.acpi/loadtest.manifest b/platforms/loadtest.acpi/loadtest.manifest new file mode 100644 index 0000000..11157e0 --- /dev/null +++ b/platforms/loadtest.acpi/loadtest.manifest @@ -0,0 +1,13 @@ +# +# Each line is either a comment, white space, or two fields: +# +# <signature> : <ASL file name> +# +# NB: for each file x.asl, an AML file called x.aml will be created +#
+rsdp: rsdp.asl +xsdt: xsdt.asl +facp: facp.asl +facs: facs.asl +dsdt: dsdt.asl diff --git a/platforms/loadtest.acpi/rsdp.asl b/platforms/loadtest.acpi/rsdp.asl new file mode 100644 index 0000000..3460a77 --- /dev/null +++ b/platforms/loadtest.acpi/rsdp.asl @@ -0,0 +1,17 @@ +/*
- Copyright (c) 2013, Al Stone al.stone@linaro.org
- [RSDP] ACPI Table
- This source is released under the terms of the GPLv2.
- */
+[0008] Signature : "RSD PTR " +[0001] Checksum : 43 +[0006] Oem ID : "LINARO" +[0001] Revision : 02 +[0004] RSDT Address : 00000000 +[0004] Length : 00000024 +[0008] XSDT Address : 0000000000000000 +[0001] Extended Checksum : DC +[0003] Reserved : 000000 diff --git a/platforms/loadtest.acpi/xsdt.asl b/platforms/loadtest.acpi/xsdt.asl new file mode 100644 index 0000000..28f05a6 --- /dev/null +++ b/platforms/loadtest.acpi/xsdt.asl @@ -0,0 +1,23 @@ +/*
- Copyright (c) 2013, Al Stone al.stone@linaro.org
- [XSDT] Extended System Description Table
- Format: [ByteLength] FieldName : HexFieldValue
- This source is released under the terms of the GPLv2.
- */
+[0004] Signature : "XSDT" +[0004] Table Length : 00000064 +[0001] Revision : 01 +[0001] Checksum : 8B +[0006] Oem ID : "LINARO" +[0008] Oem Table ID : "LOADTEST" +[0004] Oem Revision : 00000001 +[0004] Asl Compiler ID : "INTL" +[0004] Asl Compiler Revision : 20100528
+[0008] ACPI Table Address 0 : 0000000000000010 +[0008] ACPI Table Address 0 : 0000000000000020 +[0008] ACPI Table Address 0 : 0000000000000030 +[0008] ACPI Table Address 0 : 0000000000000040
-
al.stone＠linaro.org -
Graeme Gregory