From: Fu Wei fu.wei@linaro.org
This patchset: (1)Preparation for adding GTDT support in arm_arch_timer: 1. Move some enums and marcos to header file; 2. Add a new enum for spi type; 3. Improve printk relevant code; 4. use readq to get 64-bit CNTVCT.
(2)Introduce ACPI GTDT parser: drivers/acpi/arm64/acpi_gtdt.c Parse all kinds of timer in GTDT table of ACPI:arch timer, memory-mapped timer and SBSA Generic Watchdog timer. This driver can help to simplify all the relevant timer drivers, and separate all the ACPI GTDT knowledge from them.
(3)Simplify ACPI code for arm_arch_timer
(4)Add GTDT support for ARM memory-mapped timer
This patchset has been tested on the following platforms: (1)ARM Foundation v8 model
Changelog: V9: https://lkml.org/lkml/2016/7/25/ Improve pr_err message in acpi gtdt driver. Update Commit message for 7/9 shorten the irq mapping function name Improve GTDT driver for memory-mapped timer
v8: https://lkml.org/lkml/2016/7/19/660 Improve "pr_fmt(fmt)" definition: add "ACPI" in front of "GTDT", and also improve printk message. Simplify is_timer_block and is_watchdog. Merge acpi_gtdt_desc_init and gtdt_arch_timer_init into acpi_gtdt_init(); Delete __init in include/linux/acpi.h for GTDT API Make ARM64 select GTDT. Delete "#include <linux/module.h>" from acpi_gtdt.c Simplify GT block parse code.
v7: https://lkml.org/lkml/2016/7/13/769 Move the GTDT driver to drivers/acpi/arm64 Add add the ARM64-specific ACPI Support maintainers in MAINTAINERS Merge 3 patches of GTDT parser driver. Fix the for_each_platform_timer bug.
v6: https://lkml.org/lkml/2016/6/29/580 split the GTDT driver to 4 parts: basic, arch_timer, memory-mapped timer, and SBSA Generic Watchdog timer Improve driver by suggestions and example code from Daniel Lezcano
v5: https://lkml.org/lkml/2016/5/24/356 Sorting out all patches, simplify the API of GTDT driver: GTDT driver just fills the data struct for arm_arch_timer driver.
v4: https://lists.linaro.org/pipermail/linaro-acpi/2016-March/006667.html Delete the kvm relevant patches Separate two patches for sorting out the code for arm_arch_timer. Improve irq info export code to allow missing irq info in GTDT table.
v3: https://lkml.org/lkml/2016/2/1/658 Improve GTDT driver code: (1)improve pr_* by defining pr_fmt(fmt) (2)simplify gtdt_sbsa_gwdt_init (3)improve gtdt_arch_timer_data_init, if table is NULL, it will try to get GTDT table. Move enum ppi_nr to arm_arch_timer.h, and add enum spi_nr. Add arm_arch_timer get ppi from DT and GTDT support for kvm.
v2: https://lkml.org/lkml/2015/12/2/10 Rebase to latest kernel version(4.4-rc3). Fix the bug about the config problem, use CONFIG_ACPI_GTDT instead of CONFIG_ACPI in arm_arch_timer.c
v1: The first upstreaming version: https://lkml.org/lkml/2015/10/28/553
Fu Wei (9): clocksource/drivers/arm_arch_timer: Move enums and defines to header file clocksource/drivers/arm_arch_timer: Add a new enum for spi type clocksource/drivers/arm_arch_timer: Improve printk relevant code clocksource/drivers/arm_arch_timer: use readq to get 64-bit CNTVCT acpi/arm64: Add GTDT table parse driver clocksource/drivers/arm_arch_timer: Simplify ACPI support code. acpi/arm64: Add memory-mapped timer support in GTDT driver clocksource/drivers/arm_arch_timer: Add GTDT support for memory-mapped timer acpi/arm64: Add SBSA Generic Watchdog support in GTDT driver
arch/arm64/Kconfig | 1 + drivers/acpi/Kconfig | 5 + drivers/acpi/Makefile | 1 + drivers/acpi/arm64/Kconfig | 5 + drivers/acpi/arm64/Makefile | 1 + drivers/acpi/arm64/acpi_gtdt.c | 309 +++++++++++++++++++++++++++++++++++ drivers/clocksource/Kconfig | 2 +- drivers/clocksource/arm_arch_timer.c | 233 +++++++++++++++++--------- drivers/watchdog/Kconfig | 1 + include/clocksource/arm_arch_timer.h | 32 ++++ include/linux/acpi.h | 7 + 11 files changed, 519 insertions(+), 78 deletions(-) create mode 100644 drivers/acpi/arm64/Kconfig create mode 100644 drivers/acpi/arm64/Makefile create mode 100644 drivers/acpi/arm64/acpi_gtdt.c
From: Fu Wei fu.wei@linaro.org
To support the arm_arch_timer via ACPI we need to share defines and enums between the driver and the ACPI parser code.
Split out the relevant defines and enums into arm_arch_timer.h. No functional change.
Signed-off-by: Fu Wei fu.wei@linaro.org --- drivers/clocksource/arm_arch_timer.c | 11 ----------- include/clocksource/arm_arch_timer.h | 11 +++++++++++ 2 files changed, 11 insertions(+), 11 deletions(-)
diff --git a/drivers/clocksource/arm_arch_timer.c b/drivers/clocksource/arm_arch_timer.c index 4814446..5d7272e 100644 --- a/drivers/clocksource/arm_arch_timer.c +++ b/drivers/clocksource/arm_arch_timer.c @@ -48,8 +48,6 @@ #define CNTV_TVAL 0x38 #define CNTV_CTL 0x3c
-#define ARCH_CP15_TIMER BIT(0) -#define ARCH_MEM_TIMER BIT(1) static unsigned arch_timers_present __initdata;
static void __iomem *arch_counter_base; @@ -62,15 +60,6 @@ struct arch_timer { #define to_arch_timer(e) container_of(e, struct arch_timer, evt)
static u32 arch_timer_rate; - -enum ppi_nr { - PHYS_SECURE_PPI, - PHYS_NONSECURE_PPI, - VIRT_PPI, - HYP_PPI, - MAX_TIMER_PPI -}; - static int arch_timer_ppi[MAX_TIMER_PPI];
static struct clock_event_device __percpu *arch_timer_evt; diff --git a/include/clocksource/arm_arch_timer.h b/include/clocksource/arm_arch_timer.h index caedb74..6f06481 100644 --- a/include/clocksource/arm_arch_timer.h +++ b/include/clocksource/arm_arch_timer.h @@ -19,6 +19,9 @@ #include <linux/timecounter.h> #include <linux/types.h>
+#define ARCH_CP15_TIMER BIT(0) +#define ARCH_MEM_TIMER BIT(1) + #define ARCH_TIMER_CTRL_ENABLE (1 << 0) #define ARCH_TIMER_CTRL_IT_MASK (1 << 1) #define ARCH_TIMER_CTRL_IT_STAT (1 << 2) @@ -34,6 +37,14 @@ enum arch_timer_reg { ARCH_TIMER_REG_TVAL, };
+enum ppi_nr { + PHYS_SECURE_PPI, + PHYS_NONSECURE_PPI, + VIRT_PPI, + HYP_PPI, + MAX_TIMER_PPI +}; + #define ARCH_TIMER_PHYS_ACCESS 0 #define ARCH_TIMER_VIRT_ACCESS 1 #define ARCH_TIMER_MEM_PHYS_ACCESS 2
From: Fu Wei fu.wei@linaro.org
This patch add a new enum "spi_nr" and use it in the driver. Just for code's readability, no functional change.
Signed-off-by: Fu Wei fu.wei@linaro.org --- drivers/clocksource/arm_arch_timer.c | 4 ++-- include/clocksource/arm_arch_timer.h | 6 ++++++ 2 files changed, 8 insertions(+), 2 deletions(-)
diff --git a/drivers/clocksource/arm_arch_timer.c b/drivers/clocksource/arm_arch_timer.c index 5d7272e..966c574 100644 --- a/drivers/clocksource/arm_arch_timer.c +++ b/drivers/clocksource/arm_arch_timer.c @@ -826,9 +826,9 @@ static void __init arch_timer_mem_init(struct device_node *np) }
if (arch_timer_mem_use_virtual) - irq = irq_of_parse_and_map(best_frame, 1); + irq = irq_of_parse_and_map(best_frame, VIRT_SPI); else - irq = irq_of_parse_and_map(best_frame, 0); + irq = irq_of_parse_and_map(best_frame, PHYS_SPI);
if (!irq) { pr_err("arch_timer: Frame missing %s irq", diff --git a/include/clocksource/arm_arch_timer.h b/include/clocksource/arm_arch_timer.h index 6f06481..16dcd10 100644 --- a/include/clocksource/arm_arch_timer.h +++ b/include/clocksource/arm_arch_timer.h @@ -45,6 +45,12 @@ enum ppi_nr { MAX_TIMER_PPI };
+enum spi_nr { + PHYS_SPI, + VIRT_SPI, + MAX_TIMER_SPI +}; + #define ARCH_TIMER_PHYS_ACCESS 0 #define ARCH_TIMER_VIRT_ACCESS 1 #define ARCH_TIMER_MEM_PHYS_ACCESS 2
From: Fu Wei fu.wei@linaro.org
This patch defines pr_fmt(fmt) for all pr_* functions, then the pr_* doesn't need to add "arch_timer:" everytime.
Also delete some Blank Spaces in arch_timer_banner, according to the suggestion from checkpatch.pl.
No functional change.
Signed-off-by: Fu Wei fu.wei@linaro.org --- drivers/clocksource/arm_arch_timer.c | 53 ++++++++++++++++++------------------ 1 file changed, 27 insertions(+), 26 deletions(-)
diff --git a/drivers/clocksource/arm_arch_timer.c b/drivers/clocksource/arm_arch_timer.c index 966c574..e6fd42d 100644 --- a/drivers/clocksource/arm_arch_timer.c +++ b/drivers/clocksource/arm_arch_timer.c @@ -29,6 +29,9 @@
#include <clocksource/arm_arch_timer.h>
+#undef pr_fmt +#define pr_fmt(fmt) "arch_timer: " fmt + #define CNTTIDR 0x08 #define CNTTIDR_VIRT(n) (BIT(1) << ((n) * 4))
@@ -388,24 +391,24 @@ arch_timer_detect_rate(void __iomem *cntbase, struct device_node *np)
/* Check the timer frequency. */ if (arch_timer_rate == 0) - pr_warn("Architected timer frequency not available\n"); + pr_warn("frequency not available\n"); }
static void arch_timer_banner(unsigned type) { - pr_info("Architected %s%s%s timer(s) running at %lu.%02luMHz (%s%s%s).\n", - type & ARCH_CP15_TIMER ? "cp15" : "", - type == (ARCH_CP15_TIMER | ARCH_MEM_TIMER) ? " and " : "", - type & ARCH_MEM_TIMER ? "mmio" : "", - (unsigned long)arch_timer_rate / 1000000, - (unsigned long)(arch_timer_rate / 10000) % 100, - type & ARCH_CP15_TIMER ? - (arch_timer_uses_ppi == VIRT_PPI) ? "virt" : "phys" : - "", - type == (ARCH_CP15_TIMER | ARCH_MEM_TIMER) ? "/" : "", - type & ARCH_MEM_TIMER ? - arch_timer_mem_use_virtual ? "virt" : "phys" : - ""); + pr_info("%s%s%s timer(s) running at %lu.%02luMHz (%s%s%s).\n", + type & ARCH_CP15_TIMER ? "cp15" : "", + type == (ARCH_CP15_TIMER | ARCH_MEM_TIMER) ? " and " : "", + type & ARCH_MEM_TIMER ? "mmio" : "", + (unsigned long)arch_timer_rate / 1000000, + (unsigned long)(arch_timer_rate / 10000) % 100, + type & ARCH_CP15_TIMER ? + (arch_timer_uses_ppi == VIRT_PPI) ? "virt" : "phys" : + "", + type == (ARCH_CP15_TIMER | ARCH_MEM_TIMER) ? "/" : "", + type & ARCH_MEM_TIMER ? + arch_timer_mem_use_virtual ? "virt" : "phys" : + ""); }
u32 arch_timer_get_rate(void) @@ -498,8 +501,7 @@ static void __init arch_counter_register(unsigned type)
static void arch_timer_stop(struct clock_event_device *clk) { - pr_debug("arch_timer_teardown disable IRQ%d cpu #%d\n", - clk->irq, smp_processor_id()); + pr_debug("disable IRQ%d cpu #%d\n", clk->irq, smp_processor_id());
disable_percpu_irq(arch_timer_ppi[arch_timer_uses_ppi]); if (arch_timer_has_nonsecure_ppi()) @@ -597,8 +599,7 @@ static int __init arch_timer_register(void) }
if (err) { - pr_err("arch_timer: can't register interrupt %d (%d)\n", - ppi, err); + pr_err("can't register interrupt %d (%d)\n", ppi, err); goto out_free; }
@@ -650,7 +651,7 @@ static int __init arch_timer_mem_register(void __iomem *base, unsigned int irq)
ret = request_irq(irq, func, IRQF_TIMER, "arch_mem_timer", &t->evt); if (ret) { - pr_err("arch_timer: Failed to request mem timer irq\n"); + pr_err("Failed to request mem timer irq\n"); kfree(t); }
@@ -727,7 +728,7 @@ static void __init arch_timer_init(void) }
if (!has_ppi) { - pr_warn("arch_timer: No interrupt available, giving up\n"); + pr_warn("No interrupt available, giving up\n"); return; } } @@ -743,7 +744,7 @@ static void __init arch_timer_of_init(struct device_node *np) int i;
if (arch_timers_present & ARCH_CP15_TIMER) { - pr_warn("arch_timer: multiple nodes in dt, skipping\n"); + pr_warn("multiple nodes in dt, skipping\n"); return; }
@@ -778,7 +779,7 @@ static void __init arch_timer_mem_init(struct device_node *np) arch_timers_present |= ARCH_MEM_TIMER; cntctlbase = of_iomap(np, 0); if (!cntctlbase) { - pr_err("arch_timer: Can't find CNTCTLBase\n"); + pr_err("Can't find CNTCTLBase\n"); return; }
@@ -793,7 +794,7 @@ static void __init arch_timer_mem_init(struct device_node *np) u32 cntacr;
if (of_property_read_u32(frame, "frame-number", &n)) { - pr_err("arch_timer: Missing frame-number\n"); + pr_err("Missing frame-number\n"); of_node_put(frame); goto out; } @@ -821,7 +822,7 @@ static void __init arch_timer_mem_init(struct device_node *np)
base = arch_counter_base = of_iomap(best_frame, 0); if (!base) { - pr_err("arch_timer: Can't map frame's registers\n"); + pr_err("Can't map frame's registers\n"); goto out; }
@@ -831,7 +832,7 @@ static void __init arch_timer_mem_init(struct device_node *np) irq = irq_of_parse_and_map(best_frame, PHYS_SPI);
if (!irq) { - pr_err("arch_timer: Frame missing %s irq", + pr_err("Frame missing %s irq", arch_timer_mem_use_virtual ? "virt" : "phys"); goto out; } @@ -869,7 +870,7 @@ static int __init arch_timer_acpi_init(struct acpi_table_header *table) struct acpi_table_gtdt *gtdt;
if (arch_timers_present & ARCH_CP15_TIMER) { - pr_warn("arch_timer: already initialized, skipping\n"); + pr_warn("already initialized, skipping\n"); return -EINVAL; }
From: Fu Wei fu.wei@linaro.org
This patch simplify arch_counter_get_cntvct_mem function by using readq to get 64-bit CNTVCT value instead of readl_relaxed.
Signed-off-by: Fu Wei fu.wei@linaro.org --- drivers/clocksource/arm_arch_timer.c | 10 +--------- 1 file changed, 1 insertion(+), 9 deletions(-)
diff --git a/drivers/clocksource/arm_arch_timer.c b/drivers/clocksource/arm_arch_timer.c index e6fd42d..483d2f9 100644 --- a/drivers/clocksource/arm_arch_timer.c +++ b/drivers/clocksource/arm_arch_timer.c @@ -418,15 +418,7 @@ u32 arch_timer_get_rate(void)
static u64 arch_counter_get_cntvct_mem(void) { - u32 vct_lo, vct_hi, tmp_hi; - - do { - vct_hi = readl_relaxed(arch_counter_base + CNTVCT_HI); - vct_lo = readl_relaxed(arch_counter_base + CNTVCT_LO); - tmp_hi = readl_relaxed(arch_counter_base + CNTVCT_HI); - } while (vct_hi != tmp_hi); - - return ((u64) vct_hi << 32) | vct_lo; + return readq(arch_counter_base + CNTVCT_LO); }
/*
On Mon, Jul 25, 2016 at 11:27:02PM +0800, fu.wei@linaro.org wrote:
From: Fu Wei fu.wei@linaro.org
This patch simplify arch_counter_get_cntvct_mem function by using readq to get 64-bit CNTVCT value instead of readl_relaxed.
Signed-off-by: Fu Wei fu.wei@linaro.org
drivers/clocksource/arm_arch_timer.c | 10 +--------- 1 file changed, 1 insertion(+), 9 deletions(-)
diff --git a/drivers/clocksource/arm_arch_timer.c b/drivers/clocksource/arm_arch_timer.c index e6fd42d..483d2f9 100644 --- a/drivers/clocksource/arm_arch_timer.c +++ b/drivers/clocksource/arm_arch_timer.c @@ -418,15 +418,7 @@ u32 arch_timer_get_rate(void) static u64 arch_counter_get_cntvct_mem(void) {
- u32 vct_lo, vct_hi, tmp_hi;
- do {
vct_hi = readl_relaxed(arch_counter_base + CNTVCT_HI);vct_lo = readl_relaxed(arch_counter_base + CNTVCT_LO);tmp_hi = readl_relaxed(arch_counter_base + CNTVCT_HI);- } while (vct_hi != tmp_hi);
- return ((u64) vct_hi << 32) | vct_lo;
- return readq(arch_counter_base + CNTVCT_LO);
Please drop this patch. It doesn't work.
http://lists.infradead.org/pipermail/linux-arm-kernel/2016-July/445369.html
Will
Will Deacon wrote:
{
- u32 vct_lo, vct_hi, tmp_hi;
- do {
vct_hi = readl_relaxed(arch_counter_base + CNTVCT_HI);vct_lo = readl_relaxed(arch_counter_base + CNTVCT_LO);tmp_hi = readl_relaxed(arch_counter_base + CNTVCT_HI);- } while (vct_hi != tmp_hi);
- return ((u64) vct_hi << 32) | vct_lo;
- return readq(arch_counter_base + CNTVCT_LO);
Please drop this patch. It doesn't work.
On systems where readq() does work, wouldn't it be more optimal than the above while-loop?
Hi Will,
On 25 July 2016 at 23:31, Will Deacon will.deacon@arm.com wrote:
On Mon, Jul 25, 2016 at 11:27:02PM +0800, fu.wei@linaro.org wrote:
From: Fu Wei fu.wei@linaro.org
This patch simplify arch_counter_get_cntvct_mem function by using readq to get 64-bit CNTVCT value instead of readl_relaxed.
Signed-off-by: Fu Wei fu.wei@linaro.org
drivers/clocksource/arm_arch_timer.c | 10 +--------- 1 file changed, 1 insertion(+), 9 deletions(-)
diff --git a/drivers/clocksource/arm_arch_timer.c b/drivers/clocksource/arm_arch_timer.c index e6fd42d..483d2f9 100644 --- a/drivers/clocksource/arm_arch_timer.c +++ b/drivers/clocksource/arm_arch_timer.c @@ -418,15 +418,7 @@ u32 arch_timer_get_rate(void)
static u64 arch_counter_get_cntvct_mem(void) {
u32 vct_lo, vct_hi, tmp_hi;do {vct_hi = readl_relaxed(arch_counter_base + CNTVCT_HI);vct_lo = readl_relaxed(arch_counter_base + CNTVCT_LO);tmp_hi = readl_relaxed(arch_counter_base + CNTVCT_HI);} while (vct_hi != tmp_hi);return ((u64) vct_hi << 32) | vct_lo;
return readq(arch_counter_base + CNTVCT_LO);Please drop this patch. It doesn't work.
I am OK to drop this, but could you let me know why it doesn't work?
I did get some problem on Foundation model about readq, but it works on Seattle. I guess that is a problem of model, but not a code problem. So I just got confused, why readq doesn't work, :-)
http://lists.infradead.org/pipermail/linux-arm-kernel/2016-July/445369.html
I just replied to it, sorry.
Will
On Mon, Jul 25, 2016 at 11:55:49PM +0800, Fu Wei wrote:
On 25 July 2016 at 23:31, Will Deacon will.deacon@arm.com wrote:
On Mon, Jul 25, 2016 at 11:27:02PM +0800, fu.wei@linaro.org wrote:
From: Fu Wei fu.wei@linaro.org
This patch simplify arch_counter_get_cntvct_mem function by using readq to get 64-bit CNTVCT value instead of readl_relaxed.
Signed-off-by: Fu Wei fu.wei@linaro.org
drivers/clocksource/arm_arch_timer.c | 10 +--------- 1 file changed, 1 insertion(+), 9 deletions(-)
diff --git a/drivers/clocksource/arm_arch_timer.c b/drivers/clocksource/arm_arch_timer.c index e6fd42d..483d2f9 100644 --- a/drivers/clocksource/arm_arch_timer.c +++ b/drivers/clocksource/arm_arch_timer.c @@ -418,15 +418,7 @@ u32 arch_timer_get_rate(void)
static u64 arch_counter_get_cntvct_mem(void) {
u32 vct_lo, vct_hi, tmp_hi;do {vct_hi = readl_relaxed(arch_counter_base + CNTVCT_HI);vct_lo = readl_relaxed(arch_counter_base + CNTVCT_LO);tmp_hi = readl_relaxed(arch_counter_base + CNTVCT_HI);} while (vct_hi != tmp_hi);return ((u64) vct_hi << 32) | vct_lo;
return readq(arch_counter_base + CNTVCT_LO);Please drop this patch. It doesn't work.
I am OK to drop this, but could you let me know why it doesn't work?
I did get some problem on Foundation model about readq, but it works on Seattle. I guess that is a problem of model, but not a code problem. So I just got confused, why readq doesn't work, :-)
The kernel really needs to support both of those platforms :/
For the memory-mapped counter registers, the architecture says:
`If the implementation supports 64-bit atomic accesses, then the CNTV_CVAL register must be accessible as an atomic 64-bit value.'
which is borderline tautological. If we take the generous reading that this means AArch64 CPUs can use readq (and I'm not completely comfortable with that assertion, particularly as you say that it breaks the model), then you still need to use readq_relaxed here to avoid a DSB. Furthermore, what are you going to do for AArch32? readq doesn't exist over there, and if you use the generic implementation then it's not atomic. In which case, we end up with the current code, as well as a readq_relaxed guarded by a questionable #ifdef that is known to break a supported platform for an unknown performance improvement. Hardly a big win.
Did you see any performance advantage from this? Given that you've added a DSB, this looks to be extremely premature.
Will
On Mon, Jul 25, 2016 at 05:31:45PM +0100, Will Deacon wrote:
On Mon, Jul 25, 2016 at 11:55:49PM +0800, Fu Wei wrote:
On 25 July 2016 at 23:31, Will Deacon will.deacon@arm.com wrote:
On Mon, Jul 25, 2016 at 11:27:02PM +0800, fu.wei@linaro.org wrote:
From: Fu Wei fu.wei@linaro.org
This patch simplify arch_counter_get_cntvct_mem function by using readq to get 64-bit CNTVCT value instead of readl_relaxed.
Signed-off-by: Fu Wei fu.wei@linaro.org
drivers/clocksource/arm_arch_timer.c | 10 +--------- 1 file changed, 1 insertion(+), 9 deletions(-)
diff --git a/drivers/clocksource/arm_arch_timer.c b/drivers/clocksource/arm_arch_timer.c index e6fd42d..483d2f9 100644 --- a/drivers/clocksource/arm_arch_timer.c +++ b/drivers/clocksource/arm_arch_timer.c @@ -418,15 +418,7 @@ u32 arch_timer_get_rate(void)
static u64 arch_counter_get_cntvct_mem(void) {
u32 vct_lo, vct_hi, tmp_hi;do {vct_hi = readl_relaxed(arch_counter_base + CNTVCT_HI);vct_lo = readl_relaxed(arch_counter_base + CNTVCT_LO);tmp_hi = readl_relaxed(arch_counter_base + CNTVCT_HI);} while (vct_hi != tmp_hi);return ((u64) vct_hi << 32) | vct_lo;
return readq(arch_counter_base + CNTVCT_LO);Please drop this patch. It doesn't work.
I am OK to drop this, but could you let me know why it doesn't work?
I did get some problem on Foundation model about readq, but it works on Seattle. I guess that is a problem of model, but not a code problem. So I just got confused, why readq doesn't work, :-)
The kernel really needs to support both of those platforms :/
For the memory-mapped counter registers, the architecture says:
`If the implementation supports 64-bit atomic accesses, then the CNTV_CVAL register must be accessible as an atomic 64-bit value.'
which is borderline tautological. If we take the generous reading that this means AArch64 CPUs can use readq (and I'm not completely comfortable with that assertion, particularly as you say that it breaks the model), then you still need to use readq_relaxed here to avoid a DSB. Furthermore, what are you going to do for AArch32? readq doesn't exist over there, and if you use the generic implementation then it's not atomic. In which case, we end up with the current code, as well as a readq_relaxed guarded by a questionable #ifdef that is known to break a supported platform for an unknown performance improvement. Hardly a big win.
Did you see any performance advantage from this? Given that you've added a DSB, this looks to be extremely premature.
+1, absolutely agreed on the 32-bit ARM bits.
Hi Russell King,
On 26 July 2016 at 06:49, Russell King - ARM Linux linux@armlinux.org.uk wrote:
On Mon, Jul 25, 2016 at 05:31:45PM +0100, Will Deacon wrote:
On Mon, Jul 25, 2016 at 11:55:49PM +0800, Fu Wei wrote:
On 25 July 2016 at 23:31, Will Deacon will.deacon@arm.com wrote:
On Mon, Jul 25, 2016 at 11:27:02PM +0800, fu.wei@linaro.org wrote:
From: Fu Wei fu.wei@linaro.org
This patch simplify arch_counter_get_cntvct_mem function by using readq to get 64-bit CNTVCT value instead of readl_relaxed.
Signed-off-by: Fu Wei fu.wei@linaro.org
drivers/clocksource/arm_arch_timer.c | 10 +--------- 1 file changed, 1 insertion(+), 9 deletions(-)
diff --git a/drivers/clocksource/arm_arch_timer.c b/drivers/clocksource/arm_arch_timer.c index e6fd42d..483d2f9 100644 --- a/drivers/clocksource/arm_arch_timer.c +++ b/drivers/clocksource/arm_arch_timer.c @@ -418,15 +418,7 @@ u32 arch_timer_get_rate(void)
static u64 arch_counter_get_cntvct_mem(void) {
u32 vct_lo, vct_hi, tmp_hi;do {vct_hi = readl_relaxed(arch_counter_base + CNTVCT_HI);vct_lo = readl_relaxed(arch_counter_base + CNTVCT_LO);tmp_hi = readl_relaxed(arch_counter_base + CNTVCT_HI);} while (vct_hi != tmp_hi);return ((u64) vct_hi << 32) | vct_lo;
return readq(arch_counter_base + CNTVCT_LO);Please drop this patch. It doesn't work.
I am OK to drop this, but could you let me know why it doesn't work?
I did get some problem on Foundation model about readq, but it works on Seattle. I guess that is a problem of model, but not a code problem. So I just got confused, why readq doesn't work, :-)
The kernel really needs to support both of those platforms :/
For the memory-mapped counter registers, the architecture says:
`If the implementation supports 64-bit atomic accesses, then the CNTV_CVAL register must be accessible as an atomic 64-bit value.'
which is borderline tautological. If we take the generous reading that this means AArch64 CPUs can use readq (and I'm not completely comfortable with that assertion, particularly as you say that it breaks the model), then you still need to use readq_relaxed here to avoid a DSB. Furthermore, what are you going to do for AArch32? readq doesn't exist over there, and if you use the generic implementation then it's not atomic. In which case, we end up with the current code, as well as a readq_relaxed guarded by a questionable #ifdef that is known to break a supported platform for an unknown performance improvement. Hardly a big win.
Did you see any performance advantage from this? Given that you've added a DSB, this looks to be extremely premature.
+1, absolutely agreed on the 32-bit ARM bits.
Sorry for misunderstanding it, will drop it in v10.
Great thanks for your help! :-)
-- RMK's Patch system: http://www.armlinux.org.uk/developer/patches/ FTTC broadband for 0.8mile line: currently at 9.6Mbps down 400kbps up according to speedtest.net.
Will Deacon wrote:
The kernel really needs to support both of those platforms :/
For the memory-mapped counter registers, the architecture says:
`If the implementation supports 64-bit atomic accesses, then the CNTV_CVAL register must be accessible as an atomic 64-bit value.'
which is borderline tautological. If we take the generous reading that this means AArch64 CPUs can use readq (and I'm not completely comfortable with that assertion, particularly as you say that it breaks the model), then you still need to use readq_relaxed here to avoid a DSB. Furthermore, what are you going to do for AArch32? readq doesn't exist over there, and if you use the generic implementation then it's not atomic. In which case, we end up with the current code, as well as a readq_relaxed guarded by a questionable #ifdef that is known to break a supported platform for an unknown performance improvement. Hardly a big win.
I know Fu dropped this patch, and I don't want to kick a dead horse, but I was wondering if it would be okay to do this:
static u64 arch_counter_get_cntvct_mem(void) { #ifdef readq_relaxed return readq_relaxed(arch_counter_base + CNTVCT_LO); #else u32 vct_lo, vct_hi, tmp_hi;
do { vct_hi = readl_relaxed(arch_counter_base + CNTVCT_HI); vct_lo = readl_relaxed(arch_counter_base + CNTVCT_LO); tmp_hi = readl_relaxed(arch_counter_base + CNTVCT_HI); } while (vct_hi != tmp_hi);
return ((u64) vct_hi << 32) | vct_lo; #endif }
readq and readq_relaxed are defined in arch/arm64/include/asm/io.h. Why would the function exist if AArch64 CPUs can't use it?
Do we need something like ARCH_HAS_64BIT_ATOMIC_READ in order to decide whether readq is safe?
+1
On Tue, 26 Jul 2016 09:11:49 -0500 Timur Tabi wrote:
Will Deacon wrote:
The kernel really needs to support both of those platforms :/
For the memory-mapped counter registers, the architecture says:
`If the implementation supports 64-bit atomic accesses, then the CNTV_CVAL register must be accessible as an atomic 64-bit value.'
which is borderline tautological. If we take the generous reading that this means AArch64 CPUs can use readq (and I'm not completely comfortable with that assertion, particularly as you say that it breaks the model), then you still need to use readq_relaxed here to avoid a DSB. Furthermore, what are you going to do for AArch32? readq doesn't exist over there, and if you use the generic implementation then it's not atomic. In which case, we end up with the current code, as well as a readq_relaxed guarded by a questionable #ifdef that is known to break a supported platform for an unknown performance improvement. Hardly a big win.
I know Fu dropped this patch, and I don't want to kick a dead horse, but I was wondering if it would be okay to do this:
static u64 arch_counter_get_cntvct_mem(void) { #ifdef readq_relaxed return readq_relaxed(arch_counter_base + CNTVCT_LO); #else u32 vct_lo, vct_hi, tmp_hi;
do { vct_hi = readl_relaxed(arch_counter_base + CNTVCT_HI); vct_lo = readl_relaxed(arch_counter_base + CNTVCT_LO); tmp_hi = readl_relaxed(arch_counter_base + CNTVCT_HI); } while (vct_hi != tmp_hi);
return ((u64) vct_hi << 32) | vct_lo; #endif }
readq and readq_relaxed are defined in arch/arm64/include/asm/io.h. Why would the function exist if AArch64 CPUs can't use it?
+1
I measured the performance on berlin arm64 platforms:
compared with original version, using readq_relaxed could reduce time of arch_counter_get_cntvct_mem() by about 42%!
Thanks, Jisheng
Hi all,
On 27 July 2016 at 11:33, Jisheng Zhang jszhang@marvell.com wrote:
+1
On Tue, 26 Jul 2016 09:11:49 -0500 Timur Tabi wrote:
Will Deacon wrote:
The kernel really needs to support both of those platforms :/
For the memory-mapped counter registers, the architecture says:
`If the implementation supports 64-bit atomic accesses, then the CNTV_CVAL register must be accessible as an atomic 64-bit value.'
which is borderline tautological. If we take the generous reading that this means AArch64 CPUs can use readq (and I'm not completely comfortable with that assertion, particularly as you say that it breaks the model), then you still need to use readq_relaxed here to avoid a DSB. Furthermore, what are you going to do for AArch32? readq doesn't exist over there, and if you use the generic implementation then it's not atomic. In which case, we end up with the current code, as well as a readq_relaxed guarded by a questionable #ifdef that is known to break a supported platform for an unknown performance improvement. Hardly a big win.
I know Fu dropped this patch, and I don't want to kick a dead horse, but I was wondering if it would be okay to do this:
static u64 arch_counter_get_cntvct_mem(void) { #ifdef readq_relaxed return readq_relaxed(arch_counter_base + CNTVCT_LO); #else u32 vct_lo, vct_hi, tmp_hi;
do { vct_hi = readl_relaxed(arch_counter_base + CNTVCT_HI); vct_lo = readl_relaxed(arch_counter_base + CNTVCT_LO); tmp_hi = readl_relaxed(arch_counter_base + CNTVCT_HI); } while (vct_hi != tmp_hi); return ((u64) vct_hi << 32) | vct_lo;#endif }
readq and readq_relaxed are defined in arch/arm64/include/asm/io.h. Why would the function exist if AArch64 CPUs can't use it?
yes, that is a good idea. Thanks Timur! :-)
+1
I like this idea too, but please allow me to upstream this patch separately, because this GTDT patchset can work without it, this readq support is a optimizing.
I also can see another arm-related driver are using readq in this way( #ifdef readq): bus/arm-ccn.c And some other drivers are also doing this.
I measured the performance on berlin arm64 platforms:
compared with original version, using readq_relaxed could reduce time of arch_counter_get_cntvct_mem() by about 42%!
Great thanks for your data, :-)
Thanks, Jisheng
On Tue, Jul 26, 2016 at 09:11:49AM -0500, Timur Tabi wrote:
Will Deacon wrote:
The kernel really needs to support both of those platforms :/
For the memory-mapped counter registers, the architecture says:
`If the implementation supports 64-bit atomic accesses, then the CNTV_CVAL register must be accessible as an atomic 64-bit value.'
which is borderline tautological. If we take the generous reading that this means AArch64 CPUs can use readq (and I'm not completely comfortable with that assertion, particularly as you say that it breaks the model), then you still need to use readq_relaxed here to avoid a DSB. Furthermore, what are you going to do for AArch32? readq doesn't exist over there, and if you use the generic implementation then it's not atomic. In which case, we end up with the current code, as well as a readq_relaxed guarded by a questionable #ifdef that is known to break a supported platform for an unknown performance improvement. Hardly a big win.
I know Fu dropped this patch, and I don't want to kick a dead horse, but I was wondering if it would be okay to do this:
static u64 arch_counter_get_cntvct_mem(void) { #ifdef readq_relaxed return readq_relaxed(arch_counter_base + CNTVCT_LO); #else u32 vct_lo, vct_hi, tmp_hi;
do { vct_hi = readl_relaxed(arch_counter_base + CNTVCT_HI); vct_lo = readl_relaxed(arch_counter_base + CNTVCT_LO); tmp_hi = readl_relaxed(arch_counter_base + CNTVCT_HI); } while (vct_hi != tmp_hi);
return ((u64) vct_hi << 32) | vct_lo; #endif }
readq and readq_relaxed are defined in arch/arm64/include/asm/io.h. Why would the function exist if AArch64 CPUs can't use it?
Do we need something like ARCH_HAS_64BIT_ATOMIC_READ in order to decide whether readq is safe?
No, I'm still not ok with this. If you want to use readq_relaxed we need the following guarantees:
1. readq_relaxed is provided by the architecture 2. readq_relaxed is single-copy atomic from the CPU's perspective 3. The memory-mapped timer has been integrated in such a way that it can be accessed using 64-bit transactions.
(1) is easy, and you have that above. For (2), we just need to avoid include/linux/io-64-nonatomic-*.h. (3), however, is not something we can safely probe. If this optimisation really is worthwhile, then we need to extend the device-tree binding for the counter so that we can tell the kernel that it's ok to use 64-bit accesses for the counter without tearing.
I have confirmed this with the architects here at ARM.
Will
From: Fu Wei fu.wei@linaro.org
This patch adds support for parsing arch timer in GTDT, provides some kernel APIs to parse all the PPIs and always-on info in GTDT and export them.
By this driver, we can simplify arm_arch_timer drivers, and separate the ACPI GTDT knowledge from it.
Signed-off-by: Fu Wei fu.wei@linaro.org Signed-off-by: Hanjun Guo hanjun.guo@linaro.org --- arch/arm64/Kconfig | 1 + drivers/acpi/Kconfig | 5 ++ drivers/acpi/Makefile | 1 + drivers/acpi/arm64/Kconfig | 5 ++ drivers/acpi/arm64/Makefile | 1 + drivers/acpi/arm64/acpi_gtdt.c | 152 +++++++++++++++++++++++++++++++++++++++++ drivers/clocksource/Kconfig | 1 - include/linux/acpi.h | 6 ++ 8 files changed, 171 insertions(+), 1 deletion(-)
diff --git a/arch/arm64/Kconfig b/arch/arm64/Kconfig index 5a0a691..0b9fba7 100644 --- a/arch/arm64/Kconfig +++ b/arch/arm64/Kconfig @@ -2,6 +2,7 @@ config ARM64 def_bool y select ACPI_CCA_REQUIRED if ACPI select ACPI_GENERIC_GSI if ACPI + select ACPI_GTDT if ACPI select ACPI_REDUCED_HARDWARE_ONLY if ACPI select ARCH_HAS_DEVMEM_IS_ALLOWED select ARCH_HAS_ATOMIC64_DEC_IF_POSITIVE diff --git a/drivers/acpi/Kconfig b/drivers/acpi/Kconfig index b7e2e77..1cdc7d2 100644 --- a/drivers/acpi/Kconfig +++ b/drivers/acpi/Kconfig @@ -521,4 +521,9 @@ config XPOWER_PMIC_OPREGION
endif
+if ARM64 +source "drivers/acpi/arm64/Kconfig" + +endif + endif # ACPI diff --git a/drivers/acpi/Makefile b/drivers/acpi/Makefile index 251ce85..1a94ff7 100644 --- a/drivers/acpi/Makefile +++ b/drivers/acpi/Makefile @@ -99,5 +99,6 @@ obj-$(CONFIG_ACPI_EXTLOG) += acpi_extlog.o obj-$(CONFIG_PMIC_OPREGION) += pmic/intel_pmic.o obj-$(CONFIG_CRC_PMIC_OPREGION) += pmic/intel_pmic_crc.o obj-$(CONFIG_XPOWER_PMIC_OPREGION) += pmic/intel_pmic_xpower.o +obj-$(CONFIG_ARM64) += arm64/
video-objs += acpi_video.o video_detect.o diff --git a/drivers/acpi/arm64/Kconfig b/drivers/acpi/arm64/Kconfig new file mode 100644 index 0000000..80201be --- /dev/null +++ b/drivers/acpi/arm64/Kconfig @@ -0,0 +1,5 @@ +# +# ACPI Configuration for ARM64 +# +config ACPI_GTDT + bool diff --git a/drivers/acpi/arm64/Makefile b/drivers/acpi/arm64/Makefile new file mode 100644 index 0000000..466de6b --- /dev/null +++ b/drivers/acpi/arm64/Makefile @@ -0,0 +1 @@ +obj-$(CONFIG_ACPI_GTDT) += acpi_gtdt.o diff --git a/drivers/acpi/arm64/acpi_gtdt.c b/drivers/acpi/arm64/acpi_gtdt.c new file mode 100644 index 0000000..cdb2fb1 --- /dev/null +++ b/drivers/acpi/arm64/acpi_gtdt.c @@ -0,0 +1,152 @@ +/* + * ARM Specific GTDT table Support + * + * Copyright (C) 2016, Linaro Ltd. + * Author: Daniel Lezcano daniel.lezcano@linaro.org + * Fu Wei fu.wei@linaro.org + * Hanjun Guo hanjun.guo@linaro.org + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. + */ + +#include <linux/acpi.h> +#include <linux/init.h> +#include <linux/kernel.h> + +#include <clocksource/arm_arch_timer.h> + +#undef pr_fmt +#define pr_fmt(fmt) "ACPI GTDT: " fmt + +typedef struct { + struct acpi_table_gtdt *gtdt; + void *platform_timer_start; + void *gtdt_end; +} acpi_gtdt_desc_t; + +static acpi_gtdt_desc_t acpi_gtdt_desc __initdata; + +static inline void *next_platform_timer(void *platform_timer) +{ + struct acpi_gtdt_header *gh = platform_timer; + + platform_timer += gh->length; + if (platform_timer < acpi_gtdt_desc.gtdt_end) + return platform_timer; + + return NULL; +} + +#define for_each_platform_timer(_g) \ + for (_g = acpi_gtdt_desc.platform_timer_start; _g; \ + _g = next_platform_timer(_g)) + +static inline bool is_timer_block(void *platform_timer) +{ + struct acpi_gtdt_header *gh = platform_timer; + + return gh->type == ACPI_GTDT_TYPE_TIMER_BLOCK; +} + +static inline bool is_watchdog(void *platform_timer) +{ + struct acpi_gtdt_header *gh = platform_timer; + + return gh->type == ACPI_GTDT_TYPE_WATCHDOG; +} + +static int __init map_gt_gsi(u32 interrupt, u32 flags) +{ + int trigger, polarity; + + if (!interrupt) + return 0; + + trigger = (flags & ACPI_GTDT_INTERRUPT_MODE) ? ACPI_EDGE_SENSITIVE + : ACPI_LEVEL_SENSITIVE; + + polarity = (flags & ACPI_GTDT_INTERRUPT_POLARITY) ? ACPI_ACTIVE_LOW + : ACPI_ACTIVE_HIGH; + + return acpi_register_gsi(NULL, interrupt, trigger, polarity); +} + +/* + * Map the PPIs of per-cpu arch_timer. + * @type: the type of PPI + * Returns 0 if error. + */ +int __init acpi_gtdt_map_ppi(int type) +{ + struct acpi_table_gtdt *gtdt = acpi_gtdt_desc.gtdt; + + switch (type) { + case PHYS_SECURE_PPI: + return map_gt_gsi(gtdt->secure_el1_interrupt, + gtdt->secure_el1_flags); + case PHYS_NONSECURE_PPI: + return map_gt_gsi(gtdt->non_secure_el1_interrupt, + gtdt->non_secure_el1_flags); + case VIRT_PPI: + return map_gt_gsi(gtdt->virtual_timer_interrupt, + gtdt->virtual_timer_flags); + + case HYP_PPI: + return map_gt_gsi(gtdt->non_secure_el2_interrupt, + gtdt->non_secure_el2_flags); + default: + pr_err("Failed to map timer interrupt: invalid type.\n"); + } + + return 0; +} + +/* + * acpi_gtdt_c3stop - got c3stop info from GTDT + * + * Returns 1 if the timer is powered in deep idle state, 0 otherwise. + */ +bool __init acpi_gtdt_c3stop(void) +{ + struct acpi_table_gtdt *gtdt = acpi_gtdt_desc.gtdt; + + return !(gtdt->non_secure_el1_flags & ACPI_GTDT_ALWAYS_ON); +} + +/* + * Get some basic info from GTDT table, and init the global variables above + * for all timers initialization of Generic Timer. + * This function does some validation on GTDT table. + */ +int __init acpi_gtdt_init(struct acpi_table_header *table) +{ + void *start; + struct acpi_table_gtdt *gtdt; + + gtdt = container_of(table, struct acpi_table_gtdt, header); + + acpi_gtdt_desc.gtdt = gtdt; + acpi_gtdt_desc.gtdt_end = (void *)table + table->length; + + if (table->revision < 2) { + pr_debug("Revision:%d doesn't support Platform Timers.\n", + table->revision); + return 0; + } + + if (!gtdt->platform_timer_count) { + pr_debug("No Platform Timer.\n"); + return 0; + } + + start = (void *)gtdt + gtdt->platform_timer_offset; + if (start < (void *)table + sizeof(struct acpi_table_gtdt)) { + pr_err(FW_BUG "Failed to retrieve timer info from firmware: invalid data.\n"); + return -EINVAL; + } + acpi_gtdt_desc.platform_timer_start = start; + + return gtdt->platform_timer_count; +} diff --git a/drivers/clocksource/Kconfig b/drivers/clocksource/Kconfig index 47352d2..108dbc3 100644 --- a/drivers/clocksource/Kconfig +++ b/drivers/clocksource/Kconfig @@ -205,7 +205,6 @@ config CLKSRC_MPS2 config ARM_ARCH_TIMER bool select CLKSRC_OF if OF - select CLKSRC_ACPI if ACPI
config ARM_ARCH_TIMER_EVTSTREAM bool "Support for ARM architected timer event stream generation" diff --git a/include/linux/acpi.h b/include/linux/acpi.h index 288fac5..fb8b689 100644 --- a/include/linux/acpi.h +++ b/include/linux/acpi.h @@ -532,6 +532,12 @@ void acpi_walk_dep_device_list(acpi_handle handle); struct platform_device *acpi_create_platform_device(struct acpi_device *); #define ACPI_PTR(_ptr) (_ptr)
+#ifdef CONFIG_ACPI_GTDT +int acpi_gtdt_init(struct acpi_table_header *table); +int acpi_gtdt_map_ppi(int type); +bool acpi_gtdt_c3stop(void); +#endif + #else /* !CONFIG_ACPI */
#define acpi_disabled 1
On Monday, July 25, 2016 11:27:03 PM fu.wei@linaro.org wrote:
From: Fu Wei fu.wei@linaro.org
This patch adds support for parsing arch timer in GTDT, provides some kernel APIs to parse all the PPIs and always-on info in GTDT and export them.
By this driver, we can simplify arm_arch_timer drivers, and separate the ACPI GTDT knowledge from it.
Signed-off-by: Fu Wei fu.wei@linaro.org Signed-off-by: Hanjun Guo hanjun.guo@linaro.org
From the ACPI perspective:
Acked-by: Rafael J. Wysocki rafael.j.wysocki@intel.com
and I'm assuming that the patches will go in via some other (non-ACPI) tree.
arch/arm64/Kconfig | 1 + drivers/acpi/Kconfig | 5 ++ drivers/acpi/Makefile | 1 + drivers/acpi/arm64/Kconfig | 5 ++ drivers/acpi/arm64/Makefile | 1 + drivers/acpi/arm64/acpi_gtdt.c | 152 +++++++++++++++++++++++++++++++++++++++++ drivers/clocksource/Kconfig | 1 - include/linux/acpi.h | 6 ++ 8 files changed, 171 insertions(+), 1 deletion(-)
diff --git a/arch/arm64/Kconfig b/arch/arm64/Kconfig index 5a0a691..0b9fba7 100644 --- a/arch/arm64/Kconfig +++ b/arch/arm64/Kconfig @@ -2,6 +2,7 @@ config ARM64 def_bool y select ACPI_CCA_REQUIRED if ACPI select ACPI_GENERIC_GSI if ACPI
- select ACPI_GTDT if ACPI select ACPI_REDUCED_HARDWARE_ONLY if ACPI select ARCH_HAS_DEVMEM_IS_ALLOWED select ARCH_HAS_ATOMIC64_DEC_IF_POSITIVE
diff --git a/drivers/acpi/Kconfig b/drivers/acpi/Kconfig index b7e2e77..1cdc7d2 100644 --- a/drivers/acpi/Kconfig +++ b/drivers/acpi/Kconfig @@ -521,4 +521,9 @@ config XPOWER_PMIC_OPREGION endif +if ARM64 +source "drivers/acpi/arm64/Kconfig"
+endif
endif # ACPI diff --git a/drivers/acpi/Makefile b/drivers/acpi/Makefile index 251ce85..1a94ff7 100644 --- a/drivers/acpi/Makefile +++ b/drivers/acpi/Makefile @@ -99,5 +99,6 @@ obj-$(CONFIG_ACPI_EXTLOG) += acpi_extlog.o obj-$(CONFIG_PMIC_OPREGION) += pmic/intel_pmic.o obj-$(CONFIG_CRC_PMIC_OPREGION) += pmic/intel_pmic_crc.o obj-$(CONFIG_XPOWER_PMIC_OPREGION) += pmic/intel_pmic_xpower.o +obj-$(CONFIG_ARM64) += arm64/ video-objs += acpi_video.o video_detect.o diff --git a/drivers/acpi/arm64/Kconfig b/drivers/acpi/arm64/Kconfig new file mode 100644 index 0000000..80201be --- /dev/null +++ b/drivers/acpi/arm64/Kconfig @@ -0,0 +1,5 @@ +# +# ACPI Configuration for ARM64 +# +config ACPI_GTDT
- bool
diff --git a/drivers/acpi/arm64/Makefile b/drivers/acpi/arm64/Makefile new file mode 100644 index 0000000..466de6b --- /dev/null +++ b/drivers/acpi/arm64/Makefile @@ -0,0 +1 @@ +obj-$(CONFIG_ACPI_GTDT) += acpi_gtdt.o diff --git a/drivers/acpi/arm64/acpi_gtdt.c b/drivers/acpi/arm64/acpi_gtdt.c new file mode 100644 index 0000000..cdb2fb1 --- /dev/null +++ b/drivers/acpi/arm64/acpi_gtdt.c @@ -0,0 +1,152 @@ +/*
- ARM Specific GTDT table Support
- Copyright (C) 2016, Linaro Ltd.
- Author: Daniel Lezcano daniel.lezcano@linaro.org
Fu Wei <fu.wei@linaro.org>
Hanjun Guo <hanjun.guo@linaro.org>
- This program is free software; you can redistribute it and/or modify
- it under the terms of the GNU General Public License version 2 as
- published by the Free Software Foundation.
- */
+#include <linux/acpi.h> +#include <linux/init.h> +#include <linux/kernel.h>
+#include <clocksource/arm_arch_timer.h>
+#undef pr_fmt +#define pr_fmt(fmt) "ACPI GTDT: " fmt
+typedef struct {
- struct acpi_table_gtdt *gtdt;
- void *platform_timer_start;
- void *gtdt_end;
+} acpi_gtdt_desc_t;
+static acpi_gtdt_desc_t acpi_gtdt_desc __initdata;
+static inline void *next_platform_timer(void *platform_timer) +{
- struct acpi_gtdt_header *gh = platform_timer;
- platform_timer += gh->length;
- if (platform_timer < acpi_gtdt_desc.gtdt_end)
return platform_timer;- return NULL;
+}
+#define for_each_platform_timer(_g) \
- for (_g = acpi_gtdt_desc.platform_timer_start; _g; \
_g = next_platform_timer(_g))+static inline bool is_timer_block(void *platform_timer) +{
- struct acpi_gtdt_header *gh = platform_timer;
- return gh->type == ACPI_GTDT_TYPE_TIMER_BLOCK;
+}
+static inline bool is_watchdog(void *platform_timer) +{
- struct acpi_gtdt_header *gh = platform_timer;
- return gh->type == ACPI_GTDT_TYPE_WATCHDOG;
+}
+static int __init map_gt_gsi(u32 interrupt, u32 flags) +{
- int trigger, polarity;
- if (!interrupt)
return 0;- trigger = (flags & ACPI_GTDT_INTERRUPT_MODE) ? ACPI_EDGE_SENSITIVE
: ACPI_LEVEL_SENSITIVE;- polarity = (flags & ACPI_GTDT_INTERRUPT_POLARITY) ? ACPI_ACTIVE_LOW
: ACPI_ACTIVE_HIGH;- return acpi_register_gsi(NULL, interrupt, trigger, polarity);
+}
+/*
- Map the PPIs of per-cpu arch_timer.
- @type: the type of PPI
- Returns 0 if error.
- */
+int __init acpi_gtdt_map_ppi(int type) +{
- struct acpi_table_gtdt *gtdt = acpi_gtdt_desc.gtdt;
- switch (type) {
- case PHYS_SECURE_PPI:
return map_gt_gsi(gtdt->secure_el1_interrupt,gtdt->secure_el1_flags);- case PHYS_NONSECURE_PPI:
return map_gt_gsi(gtdt->non_secure_el1_interrupt,gtdt->non_secure_el1_flags);- case VIRT_PPI:
return map_gt_gsi(gtdt->virtual_timer_interrupt,gtdt->virtual_timer_flags);- case HYP_PPI:
return map_gt_gsi(gtdt->non_secure_el2_interrupt,gtdt->non_secure_el2_flags);- default:
pr_err("Failed to map timer interrupt: invalid type.\n");- }
- return 0;
+}
+/*
- acpi_gtdt_c3stop - got c3stop info from GTDT
- Returns 1 if the timer is powered in deep idle state, 0 otherwise.
- */
+bool __init acpi_gtdt_c3stop(void) +{
- struct acpi_table_gtdt *gtdt = acpi_gtdt_desc.gtdt;
- return !(gtdt->non_secure_el1_flags & ACPI_GTDT_ALWAYS_ON);
+}
+/*
- Get some basic info from GTDT table, and init the global variables above
- for all timers initialization of Generic Timer.
- This function does some validation on GTDT table.
- */
+int __init acpi_gtdt_init(struct acpi_table_header *table) +{
- void *start;
- struct acpi_table_gtdt *gtdt;
- gtdt = container_of(table, struct acpi_table_gtdt, header);
- acpi_gtdt_desc.gtdt = gtdt;
- acpi_gtdt_desc.gtdt_end = (void *)table + table->length;
- if (table->revision < 2) {
pr_debug("Revision:%d doesn't support Platform Timers.\n",table->revision);return 0;- }
- if (!gtdt->platform_timer_count) {
pr_debug("No Platform Timer.\n");return 0;- }
- start = (void *)gtdt + gtdt->platform_timer_offset;
- if (start < (void *)table + sizeof(struct acpi_table_gtdt)) {
pr_err(FW_BUG "Failed to retrieve timer info from firmware: invalid data.\n");return -EINVAL;- }
- acpi_gtdt_desc.platform_timer_start = start;
- return gtdt->platform_timer_count;
+} diff --git a/drivers/clocksource/Kconfig b/drivers/clocksource/Kconfig index 47352d2..108dbc3 100644 --- a/drivers/clocksource/Kconfig +++ b/drivers/clocksource/Kconfig @@ -205,7 +205,6 @@ config CLKSRC_MPS2 config ARM_ARCH_TIMER bool select CLKSRC_OF if OF
- select CLKSRC_ACPI if ACPI
config ARM_ARCH_TIMER_EVTSTREAM bool "Support for ARM architected timer event stream generation" diff --git a/include/linux/acpi.h b/include/linux/acpi.h index 288fac5..fb8b689 100644 --- a/include/linux/acpi.h +++ b/include/linux/acpi.h @@ -532,6 +532,12 @@ void acpi_walk_dep_device_list(acpi_handle handle); struct platform_device *acpi_create_platform_device(struct acpi_device *); #define ACPI_PTR(_ptr) (_ptr) +#ifdef CONFIG_ACPI_GTDT +int acpi_gtdt_init(struct acpi_table_header *table); +int acpi_gtdt_map_ppi(int type); +bool acpi_gtdt_c3stop(void); +#endif
#else /* !CONFIG_ACPI */ #define acpi_disabled 1
Hi Rafael,
On 26 July 2016 at 19:50, Rafael J. Wysocki rjw@rjwysocki.net wrote:
On Monday, July 25, 2016 11:27:03 PM fu.wei@linaro.org wrote:
From: Fu Wei fu.wei@linaro.org
This patch adds support for parsing arch timer in GTDT, provides some kernel APIs to parse all the PPIs and always-on info in GTDT and export them.
By this driver, we can simplify arm_arch_timer drivers, and separate the ACPI GTDT knowledge from it.
Signed-off-by: Fu Wei fu.wei@linaro.org Signed-off-by: Hanjun Guo hanjun.guo@linaro.org
From the ACPI perspective:
Acked-by: Rafael J. Wysocki rafael.j.wysocki@intel.com
Great thanks for your help, I just posted v10, then got your ACK :-) But there is not change in the patch, I 'm assuming that your ACK still works for my v10 :-)
and I'm assuming that the patches will go in via some other (non-ACPI) tree.
I think so, I guess the clocksource maintainer will take care of it.
Daniel, is this patch will go into clocksource tree?
Thanks for your help! :-)
arch/arm64/Kconfig | 1 + drivers/acpi/Kconfig | 5 ++ drivers/acpi/Makefile | 1 + drivers/acpi/arm64/Kconfig | 5 ++ drivers/acpi/arm64/Makefile | 1 + drivers/acpi/arm64/acpi_gtdt.c | 152 +++++++++++++++++++++++++++++++++++++++++ drivers/clocksource/Kconfig | 1 - include/linux/acpi.h | 6 ++ 8 files changed, 171 insertions(+), 1 deletion(-)
diff --git a/arch/arm64/Kconfig b/arch/arm64/Kconfig index 5a0a691..0b9fba7 100644 --- a/arch/arm64/Kconfig +++ b/arch/arm64/Kconfig @@ -2,6 +2,7 @@ config ARM64 def_bool y select ACPI_CCA_REQUIRED if ACPI select ACPI_GENERIC_GSI if ACPI
select ACPI_GTDT if ACPI select ACPI_REDUCED_HARDWARE_ONLY if ACPI select ARCH_HAS_DEVMEM_IS_ALLOWED select ARCH_HAS_ATOMIC64_DEC_IF_POSITIVEdiff --git a/drivers/acpi/Kconfig b/drivers/acpi/Kconfig index b7e2e77..1cdc7d2 100644 --- a/drivers/acpi/Kconfig +++ b/drivers/acpi/Kconfig @@ -521,4 +521,9 @@ config XPOWER_PMIC_OPREGION
endif
+if ARM64 +source "drivers/acpi/arm64/Kconfig"
+endif
endif # ACPI diff --git a/drivers/acpi/Makefile b/drivers/acpi/Makefile index 251ce85..1a94ff7 100644 --- a/drivers/acpi/Makefile +++ b/drivers/acpi/Makefile @@ -99,5 +99,6 @@ obj-$(CONFIG_ACPI_EXTLOG) += acpi_extlog.o obj-$(CONFIG_PMIC_OPREGION) += pmic/intel_pmic.o obj-$(CONFIG_CRC_PMIC_OPREGION) += pmic/intel_pmic_crc.o obj-$(CONFIG_XPOWER_PMIC_OPREGION) += pmic/intel_pmic_xpower.o +obj-$(CONFIG_ARM64) += arm64/
video-objs += acpi_video.o video_detect.o diff --git a/drivers/acpi/arm64/Kconfig b/drivers/acpi/arm64/Kconfig new file mode 100644 index 0000000..80201be --- /dev/null +++ b/drivers/acpi/arm64/Kconfig @@ -0,0 +1,5 @@ +# +# ACPI Configuration for ARM64 +# +config ACPI_GTDT
booldiff --git a/drivers/acpi/arm64/Makefile b/drivers/acpi/arm64/Makefile new file mode 100644 index 0000000..466de6b --- /dev/null +++ b/drivers/acpi/arm64/Makefile @@ -0,0 +1 @@ +obj-$(CONFIG_ACPI_GTDT) += acpi_gtdt.o diff --git a/drivers/acpi/arm64/acpi_gtdt.c b/drivers/acpi/arm64/acpi_gtdt.c new file mode 100644 index 0000000..cdb2fb1 --- /dev/null +++ b/drivers/acpi/arm64/acpi_gtdt.c @@ -0,0 +1,152 @@ +/*
- ARM Specific GTDT table Support
- Copyright (C) 2016, Linaro Ltd.
- Author: Daniel Lezcano daniel.lezcano@linaro.org
Fu Wei <fu.wei@linaro.org>
Hanjun Guo <hanjun.guo@linaro.org>
- This program is free software; you can redistribute it and/or modify
- it under the terms of the GNU General Public License version 2 as
- published by the Free Software Foundation.
- */
+#include <linux/acpi.h> +#include <linux/init.h> +#include <linux/kernel.h>
+#include <clocksource/arm_arch_timer.h>
+#undef pr_fmt +#define pr_fmt(fmt) "ACPI GTDT: " fmt
+typedef struct {
struct acpi_table_gtdt *gtdt;void *platform_timer_start;void *gtdt_end;+} acpi_gtdt_desc_t;
+static acpi_gtdt_desc_t acpi_gtdt_desc __initdata;
+static inline void *next_platform_timer(void *platform_timer) +{
struct acpi_gtdt_header *gh = platform_timer;platform_timer += gh->length;if (platform_timer < acpi_gtdt_desc.gtdt_end)return platform_timer;return NULL;+}
+#define for_each_platform_timer(_g) \
for (_g = acpi_gtdt_desc.platform_timer_start; _g; \_g = next_platform_timer(_g))+static inline bool is_timer_block(void *platform_timer) +{
struct acpi_gtdt_header *gh = platform_timer;return gh->type == ACPI_GTDT_TYPE_TIMER_BLOCK;+}
+static inline bool is_watchdog(void *platform_timer) +{
struct acpi_gtdt_header *gh = platform_timer;return gh->type == ACPI_GTDT_TYPE_WATCHDOG;+}
+static int __init map_gt_gsi(u32 interrupt, u32 flags) +{
int trigger, polarity;if (!interrupt)return 0;trigger = (flags & ACPI_GTDT_INTERRUPT_MODE) ? ACPI_EDGE_SENSITIVE: ACPI_LEVEL_SENSITIVE;polarity = (flags & ACPI_GTDT_INTERRUPT_POLARITY) ? ACPI_ACTIVE_LOW: ACPI_ACTIVE_HIGH;return acpi_register_gsi(NULL, interrupt, trigger, polarity);+}
+/*
- Map the PPIs of per-cpu arch_timer.
- @type: the type of PPI
- Returns 0 if error.
- */
+int __init acpi_gtdt_map_ppi(int type) +{
struct acpi_table_gtdt *gtdt = acpi_gtdt_desc.gtdt;switch (type) {case PHYS_SECURE_PPI:return map_gt_gsi(gtdt->secure_el1_interrupt,gtdt->secure_el1_flags);case PHYS_NONSECURE_PPI:return map_gt_gsi(gtdt->non_secure_el1_interrupt,gtdt->non_secure_el1_flags);case VIRT_PPI:return map_gt_gsi(gtdt->virtual_timer_interrupt,gtdt->virtual_timer_flags);case HYP_PPI:return map_gt_gsi(gtdt->non_secure_el2_interrupt,gtdt->non_secure_el2_flags);default:pr_err("Failed to map timer interrupt: invalid type.\n");}return 0;+}
+/*
- acpi_gtdt_c3stop - got c3stop info from GTDT
- Returns 1 if the timer is powered in deep idle state, 0 otherwise.
- */
+bool __init acpi_gtdt_c3stop(void) +{
struct acpi_table_gtdt *gtdt = acpi_gtdt_desc.gtdt;return !(gtdt->non_secure_el1_flags & ACPI_GTDT_ALWAYS_ON);+}
+/*
- Get some basic info from GTDT table, and init the global variables above
- for all timers initialization of Generic Timer.
- This function does some validation on GTDT table.
- */
+int __init acpi_gtdt_init(struct acpi_table_header *table) +{
void *start;struct acpi_table_gtdt *gtdt;gtdt = container_of(table, struct acpi_table_gtdt, header);acpi_gtdt_desc.gtdt = gtdt;acpi_gtdt_desc.gtdt_end = (void *)table + table->length;if (table->revision < 2) {pr_debug("Revision:%d doesn't support Platform Timers.\n",table->revision);return 0;}if (!gtdt->platform_timer_count) {pr_debug("No Platform Timer.\n");return 0;}start = (void *)gtdt + gtdt->platform_timer_offset;if (start < (void *)table + sizeof(struct acpi_table_gtdt)) {pr_err(FW_BUG "Failed to retrieve timer info from firmware: invalid data.\n");return -EINVAL;}acpi_gtdt_desc.platform_timer_start = start;return gtdt->platform_timer_count;+} diff --git a/drivers/clocksource/Kconfig b/drivers/clocksource/Kconfig index 47352d2..108dbc3 100644 --- a/drivers/clocksource/Kconfig +++ b/drivers/clocksource/Kconfig @@ -205,7 +205,6 @@ config CLKSRC_MPS2 config ARM_ARCH_TIMER bool select CLKSRC_OF if OF
select CLKSRC_ACPI if ACPIconfig ARM_ARCH_TIMER_EVTSTREAM bool "Support for ARM architected timer event stream generation" diff --git a/include/linux/acpi.h b/include/linux/acpi.h index 288fac5..fb8b689 100644 --- a/include/linux/acpi.h +++ b/include/linux/acpi.h @@ -532,6 +532,12 @@ void acpi_walk_dep_device_list(acpi_handle handle); struct platform_device *acpi_create_platform_device(struct acpi_device *); #define ACPI_PTR(_ptr) (_ptr)
+#ifdef CONFIG_ACPI_GTDT +int acpi_gtdt_init(struct acpi_table_header *table); +int acpi_gtdt_map_ppi(int type); +bool acpi_gtdt_c3stop(void); +#endif
#else /* !CONFIG_ACPI */
#define acpi_disabled 1
From: Fu Wei fu.wei@linaro.org
The patch update arm_arch_timer driver to use the function provided by the new GTDT driver of ACPI. By this way, arm_arch_timer.c can be simplified, and separate all the ACPI GTDT knowledge from this timer driver.
Signed-off-by: Fu Wei fu.wei@linaro.org Signed-off-by: Hanjun Guo hanjun.guo@linaro.org --- drivers/clocksource/Kconfig | 1 + drivers/clocksource/arm_arch_timer.c | 48 +++++++++--------------------------- 2 files changed, 13 insertions(+), 36 deletions(-)
diff --git a/drivers/clocksource/Kconfig b/drivers/clocksource/Kconfig index 108dbc3..61dc160 100644 --- a/drivers/clocksource/Kconfig +++ b/drivers/clocksource/Kconfig @@ -8,6 +8,7 @@ config CLKSRC_OF config CLKSRC_ACPI bool select CLKSRC_PROBE + select ACPI_GTDT if ARM64
config CLKSRC_PROBE bool diff --git a/drivers/clocksource/arm_arch_timer.c b/drivers/clocksource/arm_arch_timer.c index 483d2f9..d285a87 100644 --- a/drivers/clocksource/arm_arch_timer.c +++ b/drivers/clocksource/arm_arch_timer.c @@ -839,60 +839,36 @@ out: CLOCKSOURCE_OF_DECLARE(armv7_arch_timer_mem, "arm,armv7-timer-mem", arch_timer_mem_init);
-#ifdef CONFIG_ACPI -static int __init map_generic_timer_interrupt(u32 interrupt, u32 flags) -{ - int trigger, polarity; - - if (!interrupt) - return 0; - - trigger = (flags & ACPI_GTDT_INTERRUPT_MODE) ? ACPI_EDGE_SENSITIVE - : ACPI_LEVEL_SENSITIVE; - - polarity = (flags & ACPI_GTDT_INTERRUPT_POLARITY) ? ACPI_ACTIVE_LOW - : ACPI_ACTIVE_HIGH; - - return acpi_register_gsi(NULL, interrupt, trigger, polarity); -} - +#ifdef CONFIG_ACPI_GTDT /* Initialize per-processor generic timer */ static int __init arch_timer_acpi_init(struct acpi_table_header *table) { - struct acpi_table_gtdt *gtdt; + int timer_count;
if (arch_timers_present & ARCH_CP15_TIMER) { pr_warn("already initialized, skipping\n"); return -EINVAL; }
- gtdt = container_of(table, struct acpi_table_gtdt, header); - arch_timers_present |= ARCH_CP15_TIMER;
- arch_timer_ppi[PHYS_SECURE_PPI] = - map_generic_timer_interrupt(gtdt->secure_el1_interrupt, - gtdt->secure_el1_flags); - - arch_timer_ppi[PHYS_NONSECURE_PPI] = - map_generic_timer_interrupt(gtdt->non_secure_el1_interrupt, - gtdt->non_secure_el1_flags); - - arch_timer_ppi[VIRT_PPI] = - map_generic_timer_interrupt(gtdt->virtual_timer_interrupt, - gtdt->virtual_timer_flags); + timer_count = acpi_gtdt_init(table);
- arch_timer_ppi[HYP_PPI] = - map_generic_timer_interrupt(gtdt->non_secure_el2_interrupt, - gtdt->non_secure_el2_flags); + arch_timer_ppi[PHYS_SECURE_PPI] = acpi_gtdt_map_ppi(PHYS_SECURE_PPI); + arch_timer_ppi[PHYS_NONSECURE_PPI] = acpi_gtdt_map_ppi(PHYS_NONSECURE_PPI); + arch_timer_ppi[VIRT_PPI] = acpi_gtdt_map_ppi(VIRT_PPI); + arch_timer_ppi[HYP_PPI] = acpi_gtdt_map_ppi(HYP_PPI); + /* Always-on capability */ + arch_timer_c3stop = acpi_gtdt_c3stop();
/* Get the frequency from CNTFRQ */ arch_timer_detect_rate(NULL, NULL);
- /* Always-on capability */ - arch_timer_c3stop = !(gtdt->non_secure_el1_flags & ACPI_GTDT_ALWAYS_ON); + if (timer_count < 0) + pr_err("Failed to get platform timer info, skipping.\n");
arch_timer_init(); + return 0; } CLOCKSOURCE_ACPI_DECLARE(arch_timer, ACPI_SIG_GTDT, arch_timer_acpi_init);
From: Fu Wei fu.wei@linaro.org
On platforms booting with ACPI, architected memory-mapped timers' configuration data is provided by firmware through the ACPI GTDT static table.
The clocksource architected timer kernel driver requires a firmware interface to collect timer configuration and configure its driver. this infrastructure is present for device tree systems, but it is missing on systems booting with ACPI.
Implement the kernel infrastructure required to parse the static ACPI GTDT table so that the architected timer clocksource driver can make use of it on systems booting with ACPI, therefore enabling the corresponding timers configuration.
Signed-off-by: Fu Wei fu.wei@linaro.org Signed-off-by: Hanjun Guo hanjun.guo@linaro.org --- drivers/acpi/arm64/acpi_gtdt.c | 70 ++++++++++++++++++++++++++++++++++++ include/clocksource/arm_arch_timer.h | 15 ++++++++ include/linux/acpi.h | 1 + 3 files changed, 86 insertions(+)
diff --git a/drivers/acpi/arm64/acpi_gtdt.c b/drivers/acpi/arm64/acpi_gtdt.c index cdb2fb1..0159175 100644 --- a/drivers/acpi/arm64/acpi_gtdt.c +++ b/drivers/acpi/arm64/acpi_gtdt.c @@ -150,3 +150,73 @@ int __init acpi_gtdt_init(struct acpi_table_header *table)
return gtdt->platform_timer_count; } + +static int __init gtdt_parse_gt_block(struct acpi_gtdt_timer_block *block, + struct gt_block_data *data) +{ + struct acpi_gtdt_timer_entry *frame; + int i; + + if (!block || !data) + return -EINVAL; + + if (!block->block_address || !block->timer_count) + return -EINVAL; + + data->cntctlbase_phy = (phys_addr_t)block->block_address; + data->timer_count = block->timer_count; + + frame = (void *)block + block->timer_offset; + if (frame + block->timer_count != (void *)block + block->header.length) + return -EINVAL; + + /* + * Get the GT timer Frame data for every GT Block Timer + */ + for (i = 0; i < block->timer_count; i++, frame++) { + if (!frame->base_address || !frame->timer_interrupt) + return -EINVAL; + + data->timer[i].irq = map_gt_gsi(frame->timer_interrupt, + frame->timer_flags); + if (data->timer[i].irq <= 0) + return -EINVAL; + + if (frame->virtual_timer_interrupt) { + data->timer[i].virtual_irq = + map_gt_gsi(frame->virtual_timer_interrupt, + frame->virtual_timer_flags); + if (data->timer[i].virtual_irq <= 0) + return -EINVAL; + } + + data->timer[i].frame_nr = frame->frame_number; + data->timer[i].cntbase_phy = frame->base_address; + } + + return 0; +} + +/* + * Get the GT block info for memory-mapped timer from GTDT table. + */ +int __init gtdt_arch_timer_mem_init(struct gt_block_data *data) +{ + void *platform_timer; + int index = 0; + int ret; + + for_each_platform_timer(platform_timer) { + if (!is_timer_block(platform_timer)) + continue; + ret = gtdt_parse_gt_block(platform_timer, data + index); + if (ret) + return ret; + index++; + } + + if (index) + pr_info("found %d memory-mapped timer block(s).\n", index); + + return index; +} diff --git a/include/clocksource/arm_arch_timer.h b/include/clocksource/arm_arch_timer.h index 16dcd10..94a5d14 100644 --- a/include/clocksource/arm_arch_timer.h +++ b/include/clocksource/arm_arch_timer.h @@ -56,6 +56,8 @@ enum spi_nr { #define ARCH_TIMER_MEM_PHYS_ACCESS 2 #define ARCH_TIMER_MEM_VIRT_ACCESS 3
+#define ARCH_TIMER_MEM_MAX_FRAME 8 + #define ARCH_TIMER_USR_PCT_ACCESS_EN (1 << 0) /* physical counter */ #define ARCH_TIMER_USR_VCT_ACCESS_EN (1 << 1) /* virtual counter */ #define ARCH_TIMER_VIRT_EVT_EN (1 << 2) @@ -71,6 +73,19 @@ struct arch_timer_kvm_info { int virtual_irq; };
+struct gt_timer_data { + int frame_nr; + phys_addr_t cntbase_phy; + int irq; + int virtual_irq; +}; + +struct gt_block_data { + phys_addr_t cntctlbase_phy; + int timer_count; + struct gt_timer_data timer[ARCH_TIMER_MEM_MAX_FRAME]; +}; + #ifdef CONFIG_ARM_ARCH_TIMER
extern u32 arch_timer_get_rate(void); diff --git a/include/linux/acpi.h b/include/linux/acpi.h index fb8b689..24b1750 100644 --- a/include/linux/acpi.h +++ b/include/linux/acpi.h @@ -536,6 +536,7 @@ struct platform_device *acpi_create_platform_device(struct acpi_device *); int acpi_gtdt_init(struct acpi_table_header *table); int acpi_gtdt_map_ppi(int type); bool acpi_gtdt_c3stop(void); +int gtdt_arch_timer_mem_init(struct gt_block_data *data); #endif
#else /* !CONFIG_ACPI */
From: Fu Wei fu.wei@linaro.org
The patch add memory-mapped timer register support by using the information provided by the new GTDT driver of ACPI.
Signed-off-by: Fu Wei fu.wei@linaro.org --- drivers/clocksource/arm_arch_timer.c | 127 ++++++++++++++++++++++++++++++++++- 1 file changed, 124 insertions(+), 3 deletions(-)
diff --git a/drivers/clocksource/arm_arch_timer.c b/drivers/clocksource/arm_arch_timer.c index d285a87..e4909b2 100644 --- a/drivers/clocksource/arm_arch_timer.c +++ b/drivers/clocksource/arm_arch_timer.c @@ -840,7 +840,128 @@ CLOCKSOURCE_OF_DECLARE(armv7_arch_timer_mem, "arm,armv7-timer-mem", arch_timer_mem_init);
#ifdef CONFIG_ACPI_GTDT -/* Initialize per-processor generic timer */ +static struct gt_timer_data __init *arch_timer_mem_get_timer( + struct gt_block_data *gt_blocks) +{ + struct gt_block_data *gt_block = gt_blocks; + struct gt_timer_data *best_frame = NULL; + void __iomem *cntctlbase; + u32 cnttidr; + int i; + + /* + * According to ARMv8 Architecture Reference Manual(ARM), + * the size of CNTCTLBase frame of memory-mapped timer + * is SZ_4K(Offset 0x000 – 0xFFF). + */ + cntctlbase = ioremap(gt_block->cntctlbase_phy, SZ_4K); + if (!cntctlbase) { + pr_err("Failed to map mem timer control frame base address\n"); + return NULL; + } + cnttidr = readl_relaxed(cntctlbase + CNTTIDR); + + /* + * Try to find a virtual capable frame. Otherwise fall back to a + * physical capable frame. + */ + for (i = 0; i < gt_block->timer_count; i++) { + int n; + u32 cntacr; + + n = gt_block->timer[i].frame_nr; + + /* Try enabling everything, and see what sticks */ + cntacr = CNTACR_RFRQ | CNTACR_RWPT | CNTACR_RPCT | + CNTACR_RWVT | CNTACR_RVOFF | CNTACR_RVCT; + writel_relaxed(cntacr, cntctlbase + CNTACR(n)); + cntacr = readl_relaxed(cntctlbase + CNTACR(n)); + + if ((cnttidr & CNTTIDR_VIRT(n)) && + !(~cntacr & (CNTACR_RWVT | CNTACR_RVCT))) { + best_frame = >_block->timer[i]; + arch_timer_mem_use_virtual = true; + break; + } + + if (~cntacr & (CNTACR_RWPT | CNTACR_RPCT)) + continue; + + best_frame = >_block->timer[i]; + } + iounmap(cntctlbase); + + return best_frame; +} + +static int __init arch_timer_mem_acpi_init(size_t timer_count) +{ + struct gt_block_data *gt_blocks; + struct gt_timer_data *gt_timer; + void __iomem *timer_cntbase; + int ret = -EINVAL; + int timer_irq; + + /* + * If we don't have any Platform Timer Structures, just return. + */ + if (!timer_count) + return 0; + + /* + * before really check all the Platform Timer Structures, + * we assume they are GT block, and allocate memory for them. + * We will free these memory once we finish the initialization. + */ + gt_blocks = kcalloc(timer_count, sizeof(*gt_blocks), GFP_KERNEL); + if (!gt_blocks) + return -ENOMEM; + + if (gtdt_arch_timer_mem_init(gt_blocks) > 0) { + gt_timer = arch_timer_mem_get_timer(gt_blocks); + if (!gt_timer) { + pr_err("Failed to get mem timer info.\n"); + goto error; + } + + if (arch_timer_mem_use_virtual) + timer_irq = gt_timer->virtual_irq; + else + timer_irq = gt_timer->irq; + if (!timer_irq) { + pr_err("Failed to get %s irq for mem timer.", + arch_timer_mem_use_virtual ? "virt" : "phys"); + goto error; + } + + /* + * According to ARMv8 Architecture Reference Manual(ARM), + * the size of CNTBaseN frames of memory-mapped timer + * is SZ_4K(Offset 0x000 – 0xFFF). + */ + timer_cntbase = ioremap(gt_timer->cntbase_phy, SZ_4K); + if (!timer_cntbase) { + pr_err("Failed to map mem timer base address.\n"); + goto error; + } + + ret = arch_timer_mem_register(timer_cntbase, timer_irq); + if (ret) { + iounmap(timer_cntbase); + pr_err("Failed to register mem timer.\n"); + goto error; + } + + arch_counter_base = timer_cntbase; + arch_timers_present |= ARCH_MEM_TIMER; + } + +error: + kfree(gt_blocks); + return ret; +} + +/* Initialize per-processor generic timer and memory-mapped timer(if present) */ static int __init arch_timer_acpi_init(struct acpi_table_header *table) { int timer_count; @@ -864,8 +985,8 @@ static int __init arch_timer_acpi_init(struct acpi_table_header *table) /* Get the frequency from CNTFRQ */ arch_timer_detect_rate(NULL, NULL);
- if (timer_count < 0) - pr_err("Failed to get platform timer info, skipping.\n"); + if (timer_count < 0 || arch_timer_mem_acpi_init((size_t)timer_count)) + pr_err("Failed to initialize memory-mapped timer, skipping.\n");
arch_timer_init();
From: Fu Wei fu.wei@linaro.org
This driver adds support for parsing SBSA Generic Watchdog timer in GTDT, parse all info in SBSA Generic Watchdog Structure in GTDT, and creating a platform device with that information.
This allows the operating system to obtain device data from the resource of platform device. The platform device named "sbsa-gwdt" can be used by the ARM SBSA Generic Watchdog driver.
Signed-off-by: Fu Wei fu.wei@linaro.org Signed-off-by: Hanjun Guo hanjun.guo@linaro.org --- drivers/acpi/arm64/acpi_gtdt.c | 87 ++++++++++++++++++++++++++++++++++++++++++ drivers/watchdog/Kconfig | 1 + 2 files changed, 88 insertions(+)
diff --git a/drivers/acpi/arm64/acpi_gtdt.c b/drivers/acpi/arm64/acpi_gtdt.c index 0159175..05e838f 100644 --- a/drivers/acpi/arm64/acpi_gtdt.c +++ b/drivers/acpi/arm64/acpi_gtdt.c @@ -14,6 +14,7 @@ #include <linux/acpi.h> #include <linux/init.h> #include <linux/kernel.h> +#include <linux/platform_device.h>
#include <clocksource/arm_arch_timer.h>
@@ -220,3 +221,89 @@ int __init gtdt_arch_timer_mem_init(struct gt_block_data *data)
return index; } + +/* + * Initialize a SBSA generic Watchdog platform device info from GTDT + */ +static int __init gtdt_import_sbsa_gwdt(struct acpi_gtdt_watchdog *wd, + int index) +{ + struct platform_device *pdev; + int irq = map_gt_gsi(wd->timer_interrupt, wd->timer_flags); + int no_irq = 1; + + /* + * According to SBSA specification the size of refresh and control + * frames of SBSA Generic Watchdog is SZ_4K(Offset 0x000 – 0xFFF). + */ + struct resource res[] = { + DEFINE_RES_MEM(wd->control_frame_address, SZ_4K), + DEFINE_RES_MEM(wd->refresh_frame_address, SZ_4K), + DEFINE_RES_IRQ(irq), + }; + + pr_debug("found a Watchdog (0x%llx/0x%llx gsi:%u flags:0x%x).\n", + wd->refresh_frame_address, wd->control_frame_address, + wd->timer_interrupt, wd->timer_flags); + + if (!(wd->refresh_frame_address && wd->control_frame_address)) { + pr_err(FW_BUG "failed to get the Watchdog base address.\n"); + return -EINVAL; + } + + if (!wd->timer_interrupt) + pr_warn(FW_BUG "failed to get the Watchdog interrupt.\n"); + else if (irq <= 0) + pr_warn("failed to map the Watchdog interrupt.\n"); + else + no_irq = 0; + + /* + * Add a platform device named "sbsa-gwdt" to match the platform driver. + * "sbsa-gwdt": SBSA(Server Base System Architecture) Generic Watchdog + * The platform driver (like drivers/watchdog/sbsa_gwdt.c)can get device + * info below by matching this name. + */ + pdev = platform_device_register_simple("sbsa-gwdt", index, res, + ARRAY_SIZE(res) - no_irq); + if (IS_ERR(pdev)) { + acpi_unregister_gsi(wd->timer_interrupt); + return PTR_ERR(pdev); + } + + return 0; +} + +static int __init gtdt_sbsa_gwdt_init(void) +{ + struct acpi_table_header *table; + void *platform_timer; + int index = 0; + int ret; + + if (acpi_disabled) + return 0; + + if (ACPI_FAILURE(acpi_get_table(ACPI_SIG_GTDT, 0, &table))) + return -EINVAL; + + ret = acpi_gtdt_init(table); + if (ret <= 0) + return ret; + + for_each_platform_timer(platform_timer) { + if (!is_watchdog(platform_timer)) + continue; + ret = gtdt_import_sbsa_gwdt(platform_timer, index); + if (ret) + break; + index++; + } + + if (index) + pr_info("found %d SBSA generic Watchdog(s).\n", index); + + return ret; +} + +device_initcall(gtdt_sbsa_gwdt_init); diff --git a/drivers/watchdog/Kconfig b/drivers/watchdog/Kconfig index b4b3e25..4019792 100644 --- a/drivers/watchdog/Kconfig +++ b/drivers/watchdog/Kconfig @@ -206,6 +206,7 @@ config ARM_SBSA_WATCHDOG tristate "ARM SBSA Generic Watchdog" depends on ARM64 depends on ARM_ARCH_TIMER + depends on ACPI_GTDT || !ACPI select WATCHDOG_CORE help ARM SBSA Generic Watchdog has two stage timeouts:
Hi Fu,
Are you planing to respin the series based on v4.8-rc1 ? My IORT patches depend on this series since they will end up in the same drivers/acpi/arm64/
I think patches are in good shape so we need to enquire who is going to pull it in ?
Thanks, Tomasz
On 25.07.2016 17:26, fu.wei@linaro.org wrote:
From: Fu Wei fu.wei@linaro.org
This patchset: (1)Preparation for adding GTDT support in arm_arch_timer: 1. Move some enums and marcos to header file; 2. Add a new enum for spi type; 3. Improve printk relevant code; 4. use readq to get 64-bit CNTVCT.
(2)Introduce ACPI GTDT parser: drivers/acpi/arm64/acpi_gtdt.c Parse all kinds of timer in GTDT table of ACPI:arch timer, memory-mapped timer and SBSA Generic Watchdog timer. This driver can help to simplify all the relevant timer drivers, and separate all the ACPI GTDT knowledge from them. (3)Simplify ACPI code for arm_arch_timer (4)Add GTDT support for ARM memory-mapped timerThis patchset has been tested on the following platforms: (1)ARM Foundation v8 model
Changelog: V9: https://lkml.org/lkml/2016/7/25/ Improve pr_err message in acpi gtdt driver. Update Commit message for 7/9 shorten the irq mapping function name Improve GTDT driver for memory-mapped timer
v8: https://lkml.org/lkml/2016/7/19/660 Improve "pr_fmt(fmt)" definition: add "ACPI" in front of "GTDT", and also improve printk message. Simplify is_timer_block and is_watchdog. Merge acpi_gtdt_desc_init and gtdt_arch_timer_init into acpi_gtdt_init(); Delete __init in include/linux/acpi.h for GTDT API Make ARM64 select GTDT. Delete "#include <linux/module.h>" from acpi_gtdt.c Simplify GT block parse code.
v7: https://lkml.org/lkml/2016/7/13/769 Move the GTDT driver to drivers/acpi/arm64 Add add the ARM64-specific ACPI Support maintainers in MAINTAINERS Merge 3 patches of GTDT parser driver. Fix the for_each_platform_timer bug.
v6: https://lkml.org/lkml/2016/6/29/580 split the GTDT driver to 4 parts: basic, arch_timer, memory-mapped timer, and SBSA Generic Watchdog timer Improve driver by suggestions and example code from Daniel Lezcano
v5: https://lkml.org/lkml/2016/5/24/356 Sorting out all patches, simplify the API of GTDT driver: GTDT driver just fills the data struct for arm_arch_timer driver.
v4: https://lists.linaro.org/pipermail/linaro-acpi/2016-March/006667.html Delete the kvm relevant patches Separate two patches for sorting out the code for arm_arch_timer. Improve irq info export code to allow missing irq info in GTDT table.
v3: https://lkml.org/lkml/2016/2/1/658 Improve GTDT driver code: (1)improve pr_* by defining pr_fmt(fmt) (2)simplify gtdt_sbsa_gwdt_init (3)improve gtdt_arch_timer_data_init, if table is NULL, it will try to get GTDT table. Move enum ppi_nr to arm_arch_timer.h, and add enum spi_nr. Add arm_arch_timer get ppi from DT and GTDT support for kvm.
v2: https://lkml.org/lkml/2015/12/2/10 Rebase to latest kernel version(4.4-rc3). Fix the bug about the config problem, use CONFIG_ACPI_GTDT instead of CONFIG_ACPI in arm_arch_timer.c
v1: The first upstreaming version: https://lkml.org/lkml/2015/10/28/553
Fu Wei (9): clocksource/drivers/arm_arch_timer: Move enums and defines to header file clocksource/drivers/arm_arch_timer: Add a new enum for spi type clocksource/drivers/arm_arch_timer: Improve printk relevant code clocksource/drivers/arm_arch_timer: use readq to get 64-bit CNTVCT acpi/arm64: Add GTDT table parse driver clocksource/drivers/arm_arch_timer: Simplify ACPI support code. acpi/arm64: Add memory-mapped timer support in GTDT driver clocksource/drivers/arm_arch_timer: Add GTDT support for memory-mapped timer acpi/arm64: Add SBSA Generic Watchdog support in GTDT driver
arch/arm64/Kconfig | 1 + drivers/acpi/Kconfig | 5 + drivers/acpi/Makefile | 1 + drivers/acpi/arm64/Kconfig | 5 + drivers/acpi/arm64/Makefile | 1 + drivers/acpi/arm64/acpi_gtdt.c | 309 +++++++++++++++++++++++++++++++++++ drivers/clocksource/Kconfig | 2 +- drivers/clocksource/arm_arch_timer.c | 233 +++++++++++++++++--------- drivers/watchdog/Kconfig | 1 + include/clocksource/arm_arch_timer.h | 32 ++++ include/linux/acpi.h | 7 + 11 files changed, 519 insertions(+), 78 deletions(-) create mode 100644 drivers/acpi/arm64/Kconfig create mode 100644 drivers/acpi/arm64/Makefile create mode 100644 drivers/acpi/arm64/acpi_gtdt.c
Hi Tomasz
On 9 August 2016 at 19:03, Tomasz Nowicki tn@semihalf.com wrote:
Hi Fu,
Are you planing to respin the series based on v4.8-rc1 ? My IORT patches depend on this series since they will end up in the same drivers/acpi/arm64/
I think patches are in good shape so we need to enquire who is going to pull it in ?
the latest v10 patchset can apply on v4.8-rc1: https://lkml.org/lkml/2016/7/26/215
Thanks, Tomasz
On 25.07.2016 17:26, fu.wei@linaro.org wrote:
From: Fu Wei fu.wei@linaro.org
This patchset: (1)Preparation for adding GTDT support in arm_arch_timer: 1. Move some enums and marcos to header file; 2. Add a new enum for spi type; 3. Improve printk relevant code; 4. use readq to get 64-bit CNTVCT.
(2)Introduce ACPI GTDT parser: drivers/acpi/arm64/acpi_gtdt.c Parse all kinds of timer in GTDT table of ACPI:arch timer, memory-mapped timer and SBSA Generic Watchdog timer. This driver can help to simplify all the relevant timer drivers, and separate all the ACPI GTDT knowledge from them. (3)Simplify ACPI code for arm_arch_timer (4)Add GTDT support for ARM memory-mapped timerThis patchset has been tested on the following platforms: (1)ARM Foundation v8 model
Changelog: V9: https://lkml.org/lkml/2016/7/25/ Improve pr_err message in acpi gtdt driver. Update Commit message for 7/9 shorten the irq mapping function name Improve GTDT driver for memory-mapped timer
v8: https://lkml.org/lkml/2016/7/19/660 Improve "pr_fmt(fmt)" definition: add "ACPI" in front of "GTDT", and also improve printk message. Simplify is_timer_block and is_watchdog. Merge acpi_gtdt_desc_init and gtdt_arch_timer_init into acpi_gtdt_init(); Delete __init in include/linux/acpi.h for GTDT API Make ARM64 select GTDT. Delete "#include <linux/module.h>" from acpi_gtdt.c Simplify GT block parse code.
v7: https://lkml.org/lkml/2016/7/13/769 Move the GTDT driver to drivers/acpi/arm64 Add add the ARM64-specific ACPI Support maintainers in MAINTAINERS Merge 3 patches of GTDT parser driver. Fix the for_each_platform_timer bug.
v6: https://lkml.org/lkml/2016/6/29/580 split the GTDT driver to 4 parts: basic, arch_timer, memory-mapped timer, and SBSA Generic Watchdog timer Improve driver by suggestions and example code from Daniel Lezcano
v5: https://lkml.org/lkml/2016/5/24/356 Sorting out all patches, simplify the API of GTDT driver: GTDT driver just fills the data struct for arm_arch_timer driver.
v4: https://lists.linaro.org/pipermail/linaro-acpi/2016-March/006667.html Delete the kvm relevant patches Separate two patches for sorting out the code for arm_arch_timer. Improve irq info export code to allow missing irq info in GTDT table.
v3: https://lkml.org/lkml/2016/2/1/658 Improve GTDT driver code: (1)improve pr_* by defining pr_fmt(fmt) (2)simplify gtdt_sbsa_gwdt_init (3)improve gtdt_arch_timer_data_init, if table is NULL, it will try to get GTDT table. Move enum ppi_nr to arm_arch_timer.h, and add enum spi_nr. Add arm_arch_timer get ppi from DT and GTDT support for kvm.
v2: https://lkml.org/lkml/2015/12/2/10 Rebase to latest kernel version(4.4-rc3). Fix the bug about the config problem, use CONFIG_ACPI_GTDT instead of CONFIG_ACPI in arm_arch_timer.c
v1: The first upstreaming version: https://lkml.org/lkml/2015/10/28/553
Fu Wei (9): clocksource/drivers/arm_arch_timer: Move enums and defines to header file clocksource/drivers/arm_arch_timer: Add a new enum for spi type clocksource/drivers/arm_arch_timer: Improve printk relevant code clocksource/drivers/arm_arch_timer: use readq to get 64-bit CNTVCT acpi/arm64: Add GTDT table parse driver clocksource/drivers/arm_arch_timer: Simplify ACPI support code. acpi/arm64: Add memory-mapped timer support in GTDT driver clocksource/drivers/arm_arch_timer: Add GTDT support for memory-mapped timer acpi/arm64: Add SBSA Generic Watchdog support in GTDT driver
arch/arm64/Kconfig | 1 + drivers/acpi/Kconfig | 5 + drivers/acpi/Makefile | 1 + drivers/acpi/arm64/Kconfig | 5 + drivers/acpi/arm64/Makefile | 1 + drivers/acpi/arm64/acpi_gtdt.c | 309 +++++++++++++++++++++++++++++++++++ drivers/clocksource/Kconfig | 2 +- drivers/clocksource/arm_arch_timer.c | 233 +++++++++++++++++--------- drivers/watchdog/Kconfig | 1 + include/clocksource/arm_arch_timer.h | 32 ++++ include/linux/acpi.h | 7 + 11 files changed, 519 insertions(+), 78 deletions(-) create mode 100644 drivers/acpi/arm64/Kconfig create mode 100644 drivers/acpi/arm64/Makefile create mode 100644 drivers/acpi/arm64/acpi_gtdt.c
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Fu Wei -
fu.wei＠linaro.org
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Jisheng Zhang -
Rafael J. Wysocki -
Russell King - ARM Linux -
Timur Tabi -
Tomasz Nowicki -
Will Deacon