When boot the kernel with MADT, the cpu possible and present maps should be prefilled for cpu topology and acpi based cpu hot-plug.

The logic cpu id maps to APIC id (GIC id) is also implemented, it is needed for acpi processor drivers.

Signed-off-by: Hanjun Guo hanjun.guo@linaro.org --- arch/arm64/include/asm/acpi.h | 10 ++-- arch/arm64/kernel/setup.c | 2 + arch/arm64/kernel/smp.c | 2 + drivers/acpi/plat/arm-core.c | 118 +++++++++++++++++++++++++++++++++++++++++ 4 files changed, 129 insertions(+), 3 deletions(-)

diff --git a/arch/arm64/include/asm/acpi.h b/arch/arm64/include/asm/acpi.h index be2951c..423a32c 100644 --- a/arch/arm64/include/asm/acpi.h +++ b/arch/arm64/include/asm/acpi.h @@ -76,9 +76,6 @@ static inline void acpi_disable_pci(void) /* FIXME: this function should be moved to topology.h when it's ready */ void arch_fix_phys_package_id(int num, u32 slot);

-/* temperally define -1 to make acpi core compilerable */ -#define cpu_physical_id(cpu) -1 - /* Low-level suspend routine. */ extern int (*acpi_suspend_lowlevel)(void); #define acpi_wakeup_address (0) @@ -86,6 +83,13 @@ extern int (*acpi_suspend_lowlevel)(void); #define MAX_GIC_CPU_INTERFACE 256 #define MAX_GIC_DISTRIBUTOR 1 /* should be the same as MAX_GIC_NR */

+/* map logic cpu id to physical GIC id */ +extern int arm_cpu_to_apicid[NR_CPUS]; +extern int boot_cpu_apic_id; +#define cpu_physical_id(cpu) arm_cpu_to_apicid[cpu] + +extern void prefill_possible_map(void); + #else /* !CONFIG_ACPI */ #define acpi_disabled 1 /* ACPI sometimes enabled on ARM */ #define acpi_noirq 1 /* ACPI sometimes enabled on ARM */ diff --git a/arch/arm64/kernel/setup.c b/arch/arm64/kernel/setup.c index 8199360..08f11e2 100644 --- a/arch/arm64/kernel/setup.c +++ b/arch/arm64/kernel/setup.c @@ -231,7 +231,9 @@ void __init setup_arch(char **cmdline_p) */ acpi_boot_table_init(); early_acpi_boot_init(); + boot_cpu_apic_id = read_cpuid_mpidr() & MPIDR_HWID_BITMASK; acpi_boot_init(); + prefill_possible_map();

paging_init(); request_standard_resources(); diff --git a/arch/arm64/kernel/smp.c b/arch/arm64/kernel/smp.c index a0c2ca6..1428024 100644 --- a/arch/arm64/kernel/smp.c +++ b/arch/arm64/kernel/smp.c @@ -420,7 +420,9 @@ void __init smp_prepare_cpus(unsigned int max_cpus) if (err) continue;

+#ifndef CONFIG_ACPI set_cpu_present(cpu, true); +#endif max_cpus--; } } diff --git a/drivers/acpi/plat/arm-core.c b/drivers/acpi/plat/arm-core.c index 45ff625..8527ecc 100644 --- a/drivers/acpi/plat/arm-core.c +++ b/drivers/acpi/plat/arm-core.c @@ -58,6 +58,13 @@ EXPORT_SYMBOL(acpi_pci_disabled); */ static u64 acpi_lapic_addr __initdata;

+/* available_cpus here means enabled cpu in MADT */ +int available_cpus; + +/* Map logic cpu id to physical GIC id. */ +int arm_cpu_to_apicid[NR_CPUS] = { [0 ... NR_CPUS-1] = -1 }; +int boot_cpu_apic_id = -1; + #define BAD_MADT_ENTRY(entry, end) ( \ (!entry) || (unsigned long)entry + sizeof(*entry) > end || \ ((struct acpi_subtable_header *)entry)->length < sizeof(*entry)) @@ -142,6 +149,39 @@ static int __init acpi_parse_madt(struct acpi_table_header *table) * Please refer to chapter5.2.12.14/15 of ACPI 5.0 */

+static void acpi_register_gic_cpu_interface(int id, u8 enabled) +{ + int cpu; + + if (id >= MAX_GIC_CPU_INTERFACE) { + pr_info(PREFIX "skipped apicid that is too big\n"); + return; + } + + total_cpus++; + if (!enabled) + return; + + available_cpus++; + + /* allocate a logic cpu id for the new comer */ + if (boot_cpu_apic_id == id) { + /* + * boot_cpu_init() already hold bit 0 in cpu_present_mask + * for BSP, no need to allocte again. + */ + cpu = 0; + } else { + cpu = cpumask_next_zero(-1, cpu_present_mask); + } + + /* map the logic cpu id to APIC id */ + arm_cpu_to_apicid[cpu] = id; + + set_cpu_present(cpu, true); + set_cpu_possible(cpu, true); +} + static int __init acpi_parse_gic(struct acpi_subtable_header *header, const unsigned long end) { @@ -154,6 +194,16 @@ acpi_parse_gic(struct acpi_subtable_header *header, const unsigned long end)

acpi_table_print_madt_entry(header);

+ /* + * We need to register disabled CPU as well to permit + * counting disabled CPUs. This allows us to size + * cpus_possible_map more accurately, to permit + * to not preallocating memory for all NR_CPUS + * when we use CPU hotplug. + */ + acpi_register_gic_cpu_interface(processor->gic_id, + processor->flags & ACPI_MADT_ENABLED); + return 0; }

@@ -196,6 +246,19 @@ static int __init acpi_parse_madt_gic_entries(void) return count; }

+#ifdef CONFIG_SMP + if (available_cpus == 0) { + pr_info(PREFIX "Found 0 CPUs; assuming 1\n"); + /* FIXME: should be the real GIC id read from hardware */ + arm_cpu_to_apicid[available_cpus] = 0; + available_cpus = 1; /* We've got at least one of these */ + } +#endif + + /* Make boot-up look pretty */ + pr_info("%d CPUs available, %d CPUs total\n", available_cpus, + total_cpus); + return 0; }

@@ -221,6 +284,61 @@ static int __init acpi_parse_madt_gic_distributor_entries(void) return 0; }

+static int setup_possible_cpus __initdata = -1; +static int __init _setup_possible_cpus(char *str) +{ + get_option(&str, &setup_possible_cpus); + return 0; +} +early_param("possible_cpus", _setup_possible_cpus); + +/* + * cpu_possible_mask should be static, it cannot change as cpu's + * are onlined, or offlined. The reason is per-cpu data-structures + * are allocated by some modules at init time, and dont expect to + * do this dynamically on cpu arrival/departure. + * cpu_present_mask on the other hand can change dynamically. + * In case when cpu_hotplug is not compiled, then we resort to current + * behaviour, which is cpu_possible == cpu_present. + * - Ashok Raj + * + * Three ways to find out the number of additional hotplug CPUs: + * - If the BIOS specified disabled CPUs in ACPI/mptables use that. + * - The user can overwrite it with possible_cpus=NUM + * - Otherwise don't reserve additional CPUs. + * We do this because additional CPUs waste a lot of memory. + * -AK + */ +void __init prefill_possible_map(void) +{ + int i; + int possible, disabled_cpus; + + disabled_cpus = total_cpus - available_cpus; + + if (setup_possible_cpus == -1) { + if (disabled_cpus > 0) + setup_possible_cpus = disabled_cpus; + else + setup_possible_cpus = 0; + } + + possible = available_cpus + setup_possible_cpus; + + pr_info("SMP: the system is limited to %d CPUs\n", nr_cpu_ids); + + if (possible > nr_cpu_ids) + possible = nr_cpu_ids; + + pr_info("SMP: Allowing %d CPUs, %d hotplug CPUs\n", + possible, max((possible - available_cpus), 0)); + + for (i = 0; i < possible; i++) + set_cpu_possible(i, true); + for (; i < NR_CPUS; i++) + set_cpu_possible(i, false); +} + int acpi_gsi_to_irq(u32 gsi, unsigned int *irq) { *irq = gsi_to_irq(gsi);

Parked Address in GIC structure can be used as cpu release address for spin table SMP initialisation.

This patch gets parked address from MADT and use it for SMP initialisation when DT is not available.

Signed-off-by: Hanjun Guo hanjun.guo@linaro.org --- arch/arm64/include/asm/acpi.h | 3 +++ arch/arm64/kernel/smp_spin_table.c | 16 +++++++++--- drivers/acpi/plat/arm-core.c | 50 ++++++++++++++++++++++++++++++++++++ 3 files changed, 66 insertions(+), 3 deletions(-)

diff --git a/arch/arm64/include/asm/acpi.h b/arch/arm64/include/asm/acpi.h index 423a32c..180de4a 100644 --- a/arch/arm64/include/asm/acpi.h +++ b/arch/arm64/include/asm/acpi.h @@ -90,6 +90,9 @@ extern int boot_cpu_apic_id;

extern void prefill_possible_map(void);

+extern int acpi_get_parked_address_with_gic_id(u32 gic_id, + u64 *parked_address); + #else /* !CONFIG_ACPI */ #define acpi_disabled 1 /* ACPI sometimes enabled on ARM */ #define acpi_noirq 1 /* ACPI sometimes enabled on ARM */ diff --git a/arch/arm64/kernel/smp_spin_table.c b/arch/arm64/kernel/smp_spin_table.c index 44c2280..7997873 100644 --- a/arch/arm64/kernel/smp_spin_table.c +++ b/arch/arm64/kernel/smp_spin_table.c @@ -25,6 +25,7 @@ #include <asm/cpu_ops.h> #include <asm/cputype.h> #include <asm/smp_plat.h> +#include <asm/acpi.h>

extern void secondary_holding_pen(void); volatile unsigned long secondary_holding_pen_release = INVALID_HWID; @@ -47,6 +48,11 @@ static void write_pen_release(u64 val) __flush_dcache_area(start, size); }

+static int get_cpu_release_addr_acpi(unsigned int cpu, u64 *parked_address) +{ + return acpi_get_parked_address_with_gic_id(arm_cpu_to_apicid[cpu], + parked_address); +}

static int smp_spin_table_cpu_init(struct device_node *dn, unsigned int cpu) { @@ -55,10 +61,14 @@ static int smp_spin_table_cpu_init(struct device_node *dn, unsigned int cpu) */ if (of_property_read_u64(dn, "cpu-release-addr", &cpu_release_addr[cpu])) { - pr_err("CPU %d: missing or invalid cpu-release-addr property\n", - cpu);

- return -1; + /* try ACPI way */ + if (get_cpu_release_addr_acpi(cpu, &cpu_release_addr[cpu])) { + pr_err("CPU %d: missing or invalid cpu-release-addr property\n", + cpu); + + return -1; + } }

return 0; diff --git a/drivers/acpi/plat/arm-core.c b/drivers/acpi/plat/arm-core.c index 8527ecc..c4c8c68 100644 --- a/drivers/acpi/plat/arm-core.c +++ b/drivers/acpi/plat/arm-core.c @@ -262,6 +262,56 @@ static int __init acpi_parse_madt_gic_entries(void) return 0; }

+/* Parked Address in ACPI GIC structure can be used as cpu release addr */ +int acpi_get_parked_address_with_gic_id(u32 gic_id, u64 *parked_address) +{ + struct acpi_table_header *table_header = NULL; + struct acpi_subtable_header *entry; + int err = 0; + unsigned long table_end; + acpi_size tbl_size; + struct acpi_madt_generic_interrupt *processor = NULL; + + if (!parked_address) + return -EINVAL; + + acpi_get_table_with_size(ACPI_SIG_MADT, 0, &table_header, &tbl_size); + if (!table_header) { + pr_warn(PREFIX "MADT table not present\n"); + return -ENODEV; + } + + table_end = (unsigned long)table_header + table_header->length; + + /* Parse all entries looking for a match. */ + entry = (struct acpi_subtable_header *) + ((unsigned long)table_header + sizeof(struct acpi_table_madt)); + + while (((unsigned long)entry) + sizeof(struct acpi_subtable_header) < + table_end) { + if (entry->type != ACPI_MADT_TYPE_GENERIC_INTERRUPT + || BAD_MADT_ENTRY(entry, table_end)) + continue; + + processor = (struct acpi_madt_generic_interrupt *)entry; + + if (processor->gic_id == gic_id) { + *parked_address = processor->parked_address; + goto out; + } + + entry = (struct acpi_subtable_header *) + ((unsigned long)entry + entry->length); + } + + err = -ENODEV; +out: + if (!acpi_gbl_permanent_mmap) + __acpi_unmap_table((char *)table_header, tbl_size); + + return err; +} + /* * Parse GIC distributor related entries in MADT * returns 0 on success, < 0 on error

If we set the GIC as the default domain then we can access it for IRQ mapping within the ACPI code.

Signed-off-by: Graeme Gregory graeme.gregory@linaro.org Signed-off-by: Hanjun Guo hanjun.guo@linaro.org --- drivers/irqchip/irq-gic.c | 7 +++++++ 1 file changed, 7 insertions(+)

diff --git a/drivers/irqchip/irq-gic.c b/drivers/irqchip/irq-gic.c index 9031171..f522c9a 100644 --- a/drivers/irqchip/irq-gic.c +++ b/drivers/irqchip/irq-gic.c @@ -957,6 +957,13 @@ void __init gic_init_bases(unsigned int gic_nr, int irq_start, if (WARN_ON(!gic->domain)) return;

+ /* + * do not set default host for GIC domain multi-times. + * FIXME: This probably needs revisited when multi GICs supported + */ + if (!gic_nr) + irq_set_default_host(gic->domain); + #ifdef CONFIG_SMP set_smp_cross_call(gic_raise_softirq); register_cpu_notifier(&gic_cpu_notifier);

This API is similar to DT based irq_of_parse_and_map but does link parent/child IRQ controllers. This is tested for primary GIC PPI and GIC SPI interrupts and not for secondary child irq controllers.

Signed-off-by: Amit Daniel Kachhap amit.daniel@samsung.com Signed-off-by: Hanjun Guo hanjun.guo@linaro.org --- drivers/acpi/plat/arm-core.c | 36 ++++++++++++++++++++++++++++++++++-- 1 file changed, 34 insertions(+), 2 deletions(-)

diff --git a/drivers/acpi/plat/arm-core.c b/drivers/acpi/plat/arm-core.c index 9cc0208..17c99e1 100644 --- a/drivers/acpi/plat/arm-core.c +++ b/drivers/acpi/plat/arm-core.c @@ -90,7 +90,7 @@ enum acpi_irq_model_id acpi_irq_model = ACPI_IRQ_MODEL_GIC;

static unsigned int gsi_to_irq(unsigned int gsi) { - int irq = irq_create_mapping(NULL, gsi); + int irq = irq_find_mapping(NULL, gsi);

return irq; } @@ -407,7 +407,39 @@ EXPORT_SYMBOL_GPL(acpi_gsi_to_irq); */ int acpi_register_gsi(struct device *dev, u32 gsi, int trigger, int polarity) { - return -1; + unsigned int irq; + unsigned int irq_type; + + /* + * ACPI have no bindings to indicate SPI or PPI, so we + * use different mappings from DT in ACPI. + * + * For FDT + * PPI interrupt: in the range [0, 15]; + * SPI interrupt: in the range [0, 987]; + * + * For ACPI, using identity mapping for hwirq: + * PPI interrupt: in the range [16, 31]; + * SPI interrupt: in the range [32, 1019]; + */ + + if (trigger == ACPI_EDGE_SENSITIVE && + polarity == ACPI_ACTIVE_LOW) + irq_type = IRQ_TYPE_EDGE_FALLING; + else if (trigger == ACPI_EDGE_SENSITIVE && + polarity == ACPI_ACTIVE_HIGH) + irq_type = IRQ_TYPE_EDGE_RISING; + else if (trigger == ACPI_LEVEL_SENSITIVE && + polarity == ACPI_ACTIVE_LOW) + irq_type = IRQ_TYPE_LEVEL_LOW; + else if (trigger == ACPI_LEVEL_SENSITIVE && + polarity == ACPI_ACTIVE_HIGH) + irq_type = IRQ_TYPE_LEVEL_HIGH; + else + irq_type = IRQ_TYPE_NONE; + + irq = irq_create_acpi_mapping(gsi, irq_type); + return irq; } EXPORT_SYMBOL_GPL(acpi_register_gsi);

In MADT table, there are GIC cpu interface base address and GIC distributor base address, use them to convert GIC to ACPI.

Signed-off-by: Hanjun Guo hanjun.guo@linaro.org --- arch/arm64/kernel/irq.c | 5 ++++ drivers/acpi/plat/arm-core.c | 66 ++++++++++++++++++++++++++++++++++++------ include/linux/acpi.h | 6 ++++ 3 files changed, 68 insertions(+), 9 deletions(-)

diff --git a/arch/arm64/kernel/irq.c b/arch/arm64/kernel/irq.c index 473e5db..a9e68bf 100644 --- a/arch/arm64/kernel/irq.c +++ b/arch/arm64/kernel/irq.c @@ -25,6 +25,7 @@ #include <linux/irq.h> #include <linux/smp.h> #include <linux/init.h> +#include <linux/acpi.h> #include <linux/irqchip.h> #include <linux/seq_file.h> #include <linux/ratelimit.h> @@ -78,6 +79,10 @@ void __init set_handle_irq(void (*handle_irq)(struct pt_regs *)) void __init init_IRQ(void) { irqchip_init(); + + if (!handle_arch_irq) + acpi_gic_init(); + if (!handle_arch_irq) panic("No interrupt controller found."); } diff --git a/drivers/acpi/plat/arm-core.c b/drivers/acpi/plat/arm-core.c index 17c99e1..509b847 100644 --- a/drivers/acpi/plat/arm-core.c +++ b/drivers/acpi/plat/arm-core.c @@ -29,6 +29,7 @@ #include <linux/module.h> #include <linux/irq.h> #include <linux/irqdomain.h> +#include <linux/irqchip/arm-gic.h> #include <linux/slab.h> #include <linux/bootmem.h> #include <linux/ioport.h> @@ -211,11 +212,21 @@ acpi_parse_gic(struct acpi_subtable_header *header, const unsigned long end) return 0; }

+#ifdef CONFIG_ARM_GIC +/* + * Hard code here, we can not get memory size from MADT (but FDT does), + * this size is described in ARMv8 foudation model's User Guide + */ +#define GIC_DISTRIBUTOR_MEMORY_SIZE (SZ_8K) +#define GIC_CPU_INTERFACE_MEMORY_SIZE (SZ_4K) + static int __init acpi_parse_gic_distributor(struct acpi_subtable_header *header, const unsigned long end) { struct acpi_madt_generic_distributor *distributor = NULL; + void __iomem *dist_base = NULL; + void __iomem *cpu_base = NULL;

distributor = (struct acpi_madt_generic_distributor *)header;

@@ -224,8 +235,43 @@ acpi_parse_gic_distributor(struct acpi_subtable_header *header,

acpi_table_print_madt_entry(header);

+ /* GIC is initialised after page_init(), no need for early_ioremap */ + dist_base = ioremap(distributor->base_address, + GIC_CPU_INTERFACE_MEMORY_SIZE); + if (!dist_base) { + pr_warn(PREFIX "unable to map gic dist registers\n"); + return -ENOMEM; + } + + /* + * acpi_lapic_addr is stored in acpi_parse_madt(), + * so we can use it here for GIC init + */ + if (acpi_lapic_addr) { + iounmap(dist_base); + pr_warn(PREFIX "Invalid GIC cpu interface base address\n"); + return -EINVAL; + } + + cpu_base = ioremap(acpi_lapic_addr, GIC_CPU_INTERFACE_MEMORY_SIZE); + if (!cpu_base) { + iounmap(dist_base); + pr_warn(PREFIX "unable to map gic cpu registers\n"); + return -ENOMEM; + } + + gic_init(distributor->gic_id, -1, dist_base, cpu_base); + return 0; } +#else +static int __init +acpi_parse_gic_distributor(struct acpi_subtable_header *header, + const unsigned long end) +{ + return -ENODEV; +} +#endif /* CONFIG_ARM_GIC */

/* * Parse GIC cpu interface related entries in MADT @@ -234,7 +280,7 @@ acpi_parse_gic_distributor(struct acpi_subtable_header *header, static int __init acpi_parse_madt_gic_entries(void) { int count; - + /* * do a partial walk of MADT to determine how many CPUs * we have including disabled CPUs @@ -468,19 +514,21 @@ static void __init acpi_process_madt(void) * Parse MADT GIC cpu interface entries */ error = acpi_parse_madt_gic_entries(); - if (!error) { - /* - * Parse MADT GIC distributor entries - */ - acpi_parse_madt_gic_distributor_entries(); - } + if (!error) + pr_info("Using ACPI for processor (GIC) configuration information\n"); }

- pr_info("Using ACPI for processor (GIC) configuration information\n"); - return; }

+int __init acpi_gic_init(void) +{ + /* + * Parse MADT GIC distributor entries + */ + return acpi_parse_madt_gic_distributor_entries(); +} + /* * acpi_boot_table_init() and acpi_boot_init() * called from setup_arch(), always. diff --git a/include/linux/acpi.h b/include/linux/acpi.h index edd5806..58a4bf4 100644 --- a/include/linux/acpi.h +++ b/include/linux/acpi.h @@ -112,6 +112,7 @@ char * __acpi_map_table (unsigned long phys_addr, unsigned long size); void __acpi_unmap_table(char *map, unsigned long size); int early_acpi_boot_init(void); int acpi_boot_init (void); +int acpi_gic_init(void); void acpi_boot_table_init (void); int acpi_mps_check (void); int acpi_numa_init (void); @@ -444,6 +445,11 @@ static inline int acpi_boot_init(void) return 0; }

+static inline int acpi_gic_init(void) +{ + return -ENODEV; +} + static inline void acpi_boot_table_init(void) { return;