From: Fu Wei fu.wei@linaro.org
This patchset: (1)Preparation for adding GTDT support in arm_arch_timer: 1. Move some enums and marcos to header file; 2. Add a new enum for spi type; 3. Improve printk relevant code. 4. rename some enums and defines, and some cleanups. 5. separate out arch_timer_uses_ppi init code and fix a potential bug 6. Introduce some new structs and refactor the timer init code
(2)Introduce ACPI GTDT parser: drivers/acpi/arm64/acpi_gtdt.c Parse all kinds of timer in GTDT table of ACPI:arch timer, memory-mapped timer and SBSA Generic Watchdog timer. This driver can help to simplify all the relevant timer drivers, and separate all the ACPI GTDT knowledge from them.
(3)Simplify ACPI code for arm_arch_timer
(4)Add GTDT support for ARM memory-mapped timer, also refactor original memory-mapped timer dt support for reusing some common code.
This patchset has been tested on the following platforms with ACPI enabled: (1)ARM Foundation v8 model
Changelog: v15: https://lkml.org/lkml/2016/11/15/ Re-order patches Add arm_arch_timer refactoring patches to prepare for GTDT: 1. rename some enums and defines, and some cleanups 2. separate out arch_timer_uses_ppi init code and fix a potential bug 3. Improve some new structs, refactor the timer init code. Since the some structs have been changed, GTDT parser for memory-mapped timer and SBSA Generic Watchdog timer have been update.
v14: https://lkml.org/lkml/2016/9/28/573 Separate memory-mapped timer GTDT support into two patches 1. Refactor the timer init code to prepare for GTDT 2. Add GTDT support for memory-mapped timer
v13: http://www.mail-archive.com/linux-kernel@vger.kernel.org/msg1231717.html Improve arm_arch_timer code for memory-mapped timer GTDT support, refactor original memory-mapped timer dt support for reusing some common code.
v12: https://lkml.org/lkml/2016/9/13/250 Rebase to latest Linux 4.8-rc6 Delete the confusing "skipping" in the error message.
V11: https://lkml.org/lkml/2016/9/6/354 Rebase to latest Linux 4.8-rc5 Delete typedef (suggested by checkpatch.pl)
V10: https://lkml.org/lkml/2016/7/26/215 Drop the "readq" patch. Rebase to latest Linux 4.7.
V9: https://lkml.org/lkml/2016/7/25/345 Improve pr_err message in acpi gtdt driver. Update Commit message for 7/9 shorten the irq mapping function name Improve GTDT driver for memory-mapped timer
v8: https://lkml.org/lkml/2016/7/19/660 Improve "pr_fmt(fmt)" definition: add "ACPI" in front of "GTDT", and also improve printk message. Simplify is_timer_block and is_watchdog. Merge acpi_gtdt_desc_init and gtdt_arch_timer_init into acpi_gtdt_init(); Delete __init in include/linux/acpi.h for GTDT API Make ARM64 select GTDT. Delete "#include <linux/module.h>" from acpi_gtdt.c Simplify GT block parse code.
v7: https://lkml.org/lkml/2016/7/13/769 Move the GTDT driver to drivers/acpi/arm64 Add add the ARM64-specific ACPI Support maintainers in MAINTAINERS Merge 3 patches of GTDT parser driver. Fix the for_each_platform_timer bug.
v6: https://lkml.org/lkml/2016/6/29/580 split the GTDT driver to 4 parts: basic, arch_timer, memory-mapped timer, and SBSA Generic Watchdog timer Improve driver by suggestions and example code from Daniel Lezcano
v5: https://lkml.org/lkml/2016/5/24/356 Sorting out all patches, simplify the API of GTDT driver: GTDT driver just fills the data struct for arm_arch_timer driver.
v4: https://lists.linaro.org/pipermail/linaro-acpi/2016-March/006667.html Delete the kvm relevant patches Separate two patches for sorting out the code for arm_arch_timer. Improve irq info export code to allow missing irq info in GTDT table.
v3: https://lkml.org/lkml/2016/2/1/658 Improve GTDT driver code: (1)improve pr_* by defining pr_fmt(fmt) (2)simplify gtdt_sbsa_gwdt_init (3)improve gtdt_arch_timer_data_init, if table is NULL, it will try to get GTDT table. Move enum ppi_nr to arm_arch_timer.h, and add enum spi_nr. Add arm_arch_timer get ppi from DT and GTDT support for kvm.
v2: https://lkml.org/lkml/2015/12/2/10 Rebase to latest kernel version(4.4-rc3). Fix the bug about the config problem, use CONFIG_ACPI_GTDT instead of CONFIG_ACPI in arm_arch_timer.c
v1: The first upstreaming version: https://lkml.org/lkml/2015/10/28/553
Fu Wei (13): clocksource/drivers/arm_arch_timer: Move enums and defines to header file clocksource/drivers/arm_arch_timer: Add a new enum for spi type clocksource/drivers/arm_arch_timer: Improve printk relevant code clocksource/drivers/arm_arch_timer: rename some enums and defines, and some cleanups. clocksource/drivers/arm_arch_timer: fix a bug in arch_timer_register about arch_timer_uses_ppi clocksource/drivers/arm_arch_timer: separate out arch_timer_uses_ppi init code to prepare for GTDT. clocksource/drivers/arm_arch_timer: Introduce some new structs to prepare for GTDT clocksource/drivers/arm_arch_timer: Refactor the timer init code to prepare for GTDT acpi/arm64: Add GTDT table parse driver clocksource/drivers/arm_arch_timer: Simplify ACPI support code. acpi/arm64: Add memory-mapped timer support in GTDT driver clocksource/drivers/arm_arch_timer: Add GTDT support for memory-mapped timer acpi/arm64: Add SBSA Generic Watchdog support in GTDT driver
arch/arm64/Kconfig | 1 + drivers/acpi/arm64/Kconfig | 3 + drivers/acpi/arm64/Makefile | 1 + drivers/acpi/arm64/gtdt.c | 411 ++++++++++++++++++++++++++++++++++ drivers/clocksource/arm_arch_timer.c | 420 ++++++++++++++++++++--------------- drivers/watchdog/Kconfig | 1 + include/clocksource/arm_arch_timer.h | 61 +++-- include/linux/acpi.h | 8 + virt/kvm/arm/hyp/timer-sr.c | 6 +- 9 files changed, 720 insertions(+), 192 deletions(-) create mode 100644 drivers/acpi/arm64/gtdt.c
From: Fu Wei fu.wei@linaro.org
To support the arm_arch_timer via ACPI we need to share defines and enums between the driver and the ACPI parser code.
Split out the relevant defines and enums into arm_arch_timer.h, and change "enum ppi_nr" to "enum arch_timer_ppi_nr" to avoid the potential name clashes. No functional change.
Signed-off-by: Fu Wei fu.wei@linaro.org Acked-by: Mark Rutland mark.rutland@arm.com --- drivers/clocksource/arm_arch_timer.c | 11 ----------- include/clocksource/arm_arch_timer.h | 12 ++++++++++++ 2 files changed, 12 insertions(+), 11 deletions(-)
diff --git a/drivers/clocksource/arm_arch_timer.c b/drivers/clocksource/arm_arch_timer.c index 73c487d..9826f06 100644 --- a/drivers/clocksource/arm_arch_timer.c +++ b/drivers/clocksource/arm_arch_timer.c @@ -51,8 +51,6 @@ #define CNTV_TVAL 0x38 #define CNTV_CTL 0x3c
-#define ARCH_CP15_TIMER BIT(0) -#define ARCH_MEM_TIMER BIT(1) static unsigned arch_timers_present __initdata;
static void __iomem *arch_counter_base; @@ -65,15 +63,6 @@ struct arch_timer { #define to_arch_timer(e) container_of(e, struct arch_timer, evt)
static u32 arch_timer_rate; - -enum ppi_nr { - PHYS_SECURE_PPI, - PHYS_NONSECURE_PPI, - VIRT_PPI, - HYP_PPI, - MAX_TIMER_PPI -}; - static int arch_timer_ppi[MAX_TIMER_PPI];
static struct clock_event_device __percpu *arch_timer_evt; diff --git a/include/clocksource/arm_arch_timer.h b/include/clocksource/arm_arch_timer.h index caedb74..557f869 100644 --- a/include/clocksource/arm_arch_timer.h +++ b/include/clocksource/arm_arch_timer.h @@ -16,9 +16,13 @@ #ifndef __CLKSOURCE_ARM_ARCH_TIMER_H #define __CLKSOURCE_ARM_ARCH_TIMER_H
+#include <linux/bitops.h> #include <linux/timecounter.h> #include <linux/types.h>
+#define ARCH_CP15_TIMER BIT(0) +#define ARCH_MEM_TIMER BIT(1) + #define ARCH_TIMER_CTRL_ENABLE (1 << 0) #define ARCH_TIMER_CTRL_IT_MASK (1 << 1) #define ARCH_TIMER_CTRL_IT_STAT (1 << 2) @@ -34,6 +38,14 @@ enum arch_timer_reg { ARCH_TIMER_REG_TVAL, };
+enum arch_timer_ppi_nr { + PHYS_SECURE_PPI, + PHYS_NONSECURE_PPI, + VIRT_PPI, + HYP_PPI, + MAX_TIMER_PPI +}; + #define ARCH_TIMER_PHYS_ACCESS 0 #define ARCH_TIMER_VIRT_ACCESS 1 #define ARCH_TIMER_MEM_PHYS_ACCESS 2
Hi Fu,
[auto build test ERROR on tip/timers/core] [also build test ERROR on v4.9-rc5 next-20161115] [if your patch is applied to the wrong git tree, please drop us a note to help improve the system]
url: https://github.com/0day-ci/linux/commits/fu-wei-linaro-org/acpi-clocksource-... config: arm-hisi_defconfig (attached as .config) compiler: arm-linux-gnueabi-gcc (Debian 6.1.1-9) 6.1.1 20160705 reproduce: wget https://git.kernel.org/cgit/linux/kernel/git/wfg/lkp-tests.git/plain/sbin/ma... -O ~/bin/make.cross chmod +x ~/bin/make.cross # save the attached .config to linux build tree make.cross ARCH=arm
Note: the linux-review/fu-wei-linaro-org/acpi-clocksource-add-GTDT-driver-and-GTDT-support-in-arm_arch_timer/20161116-004444 HEAD 47004b0566d2fd65c05836078319b02c5af2a1fc builds fine. It only hurts bisectibility.
All error/warnings (new ones prefixed by >>):
drivers/clocksource/arm_arch_timer.c:70:13: error: variable 'arch_timer_uses_ppi' has initializer but incomplete type
static enum ppi_nr arch_timer_uses_ppi = VIRT_PPI; ^~~~~~ drivers/clocksource/arm_arch_timer.c: In function '__arch_timer_setup':
drivers/clocksource/arm_arch_timer.c:358:3: error: 'arch_timer_uses_ppi' has an incomplete type 'enum ppi_nr'
clk->irq = arch_timer_ppi[arch_timer_uses_ppi]; ^~~ drivers/clocksource/arm_arch_timer.c:359:3: error: 'arch_timer_uses_ppi' has an incomplete type 'enum ppi_nr' switch (arch_timer_uses_ppi) { ^~~~~~ drivers/clocksource/arm_arch_timer.c: In function 'arch_timer_has_nonsecure_ppi': drivers/clocksource/arm_arch_timer.c:447:2: error: 'arch_timer_uses_ppi' has an incomplete type 'enum ppi_nr' return (arch_timer_uses_ppi == PHYS_SECURE_PPI && ^~~~~~ drivers/clocksource/arm_arch_timer.c: In function 'arch_timer_starting_cpu': drivers/clocksource/arm_arch_timer.c:471:2: error: 'arch_timer_uses_ppi' has an incomplete type 'enum ppi_nr' flags = check_ppi_trigger(arch_timer_ppi[arch_timer_uses_ppi]); ^~~~~ drivers/clocksource/arm_arch_timer.c:472:2: error: 'arch_timer_uses_ppi' has an incomplete type 'enum ppi_nr' enable_percpu_irq(arch_timer_ppi[arch_timer_uses_ppi], flags); ^~~~~~~~~~~~~~~~~ drivers/clocksource/arm_arch_timer.c: In function 'arch_timer_banner': drivers/clocksource/arm_arch_timer.c:512:2: error: 'arch_timer_uses_ppi' has an incomplete type 'enum ppi_nr' pr_info("Architected %s%s%s timer(s) running at %lu.%02luMHz (%s%s%s).\n", ^~~~~~~ drivers/clocksource/arm_arch_timer.c: In function 'arch_counter_register': drivers/clocksource/arm_arch_timer.c:589:3: error: 'arch_timer_uses_ppi' has an incomplete type 'enum ppi_nr' if (IS_ENABLED(CONFIG_ARM64) || arch_timer_uses_ppi == VIRT_PPI) ^~ drivers/clocksource/arm_arch_timer.c: In function 'arch_timer_stop': drivers/clocksource/arm_arch_timer.c:624:2: error: 'arch_timer_uses_ppi' has an incomplete type 'enum ppi_nr' disable_percpu_irq(arch_timer_ppi[arch_timer_uses_ppi]); ^~~~~~~~~~~~~~~~~~ drivers/clocksource/arm_arch_timer.c: In function 'arch_timer_register': drivers/clocksource/arm_arch_timer.c:687:2: error: 'arch_timer_uses_ppi' has an incomplete type 'enum ppi_nr' ppi = arch_timer_ppi[arch_timer_uses_ppi]; ^~~ drivers/clocksource/arm_arch_timer.c:688:2: error: 'arch_timer_uses_ppi' has an incomplete type 'enum ppi_nr' switch (arch_timer_uses_ppi) { ^~~~~~ drivers/clocksource/arm_arch_timer.c:737:2: error: 'arch_timer_uses_ppi' has an incomplete type 'enum ppi_nr' free_percpu_irq(arch_timer_ppi[arch_timer_uses_ppi], arch_timer_evt); ^~~~~~~~~~~~~~~ drivers/clocksource/arm_arch_timer.c: In function 'arch_timer_init': drivers/clocksource/arm_arch_timer.c:838:4: error: 'arch_timer_uses_ppi' has an incomplete type 'enum ppi_nr' arch_timer_uses_ppi = HYP_PPI; ^~~~~~~~~~~~~~~~~~~ drivers/clocksource/arm_arch_timer.c:841:4: error: 'arch_timer_uses_ppi' has an incomplete type 'enum ppi_nr' arch_timer_uses_ppi = PHYS_SECURE_PPI; ^~~~~~~~~~~~~~~~~~~ drivers/clocksource/arm_arch_timer.c: In function 'arch_timer_of_init': drivers/clocksource/arm_arch_timer.c:897:3: error: 'arch_timer_uses_ppi' has an incomplete type 'enum ppi_nr' arch_timer_uses_ppi = PHYS_SECURE_PPI; ^~~~~~~~~~~~~~~~~~~ drivers/clocksource/arm_arch_timer.c: At top level:
drivers/clocksource/arm_arch_timer.c:70:20: error: storage size of 'arch_timer_uses_ppi' isn't known
static enum ppi_nr arch_timer_uses_ppi = VIRT_PPI; ^~~~~~~~~~~~~~~~~~~ drivers/clocksource/arm_arch_timer.c: In function 'arch_timer_has_nonsecure_ppi':
drivers/clocksource/arm_arch_timer.c:449:1: warning: control reaches end of non-void function [-Wreturn-type]
} ^
vim +/arch_timer_uses_ppi +70 drivers/clocksource/arm_arch_timer.c
220069945 Stephen Boyd 2013-07-18 64 8a4da6e36 Mark Rutland 2012-11-12 65 static u32 arch_timer_rate; 8a4da6e36 Mark Rutland 2012-11-12 66 static int arch_timer_ppi[MAX_TIMER_PPI]; 8a4da6e36 Mark Rutland 2012-11-12 67 8a4da6e36 Mark Rutland 2012-11-12 68 static struct clock_event_device __percpu *arch_timer_evt; 8a4da6e36 Mark Rutland 2012-11-12 69 f81f03fa2 Marc Zyngier 2014-02-20 @70 static enum ppi_nr arch_timer_uses_ppi = VIRT_PPI; 82a561941 Lorenzo Pieralisi 2014-04-08 71 static bool arch_timer_c3stop; 220069945 Stephen Boyd 2013-07-18 72 static bool arch_timer_mem_use_virtual; 8a4da6e36 Mark Rutland 2012-11-12 73
:::::: The code at line 70 was first introduced by commit :::::: f81f03fa231a8c3aacd580759e73b9238b92ba29 arm64: Allow the arch timer to use the HYP timer
:::::: TO: Marc Zyngier marc.zyngier@arm.com :::::: CC: Marc Zyngier marc.zyngier@arm.com
--- 0-DAY kernel test infrastructure Open Source Technology Center https://lists.01.org/pipermail/kbuild-all Intel Corporation
Hi Marc,
On 16 November 2016 at 03:23, kbuild test robot lkp@intel.com wrote:
Hi Fu,
[auto build test ERROR on tip/timers/core] [also build test ERROR on v4.9-rc5 next-20161115] [if your patch is applied to the wrong git tree, please drop us a note to help improve the system]
url: https://github.com/0day-ci/linux/commits/fu-wei-linaro-org/acpi-clocksource-... config: arm-hisi_defconfig (attached as .config) compiler: arm-linux-gnueabi-gcc (Debian 6.1.1-9) 6.1.1 20160705 reproduce: wget https://git.kernel.org/cgit/linux/kernel/git/wfg/lkp-tests.git/plain/sbin/ma... -O ~/bin/make.cross chmod +x ~/bin/make.cross # save the attached .config to linux build tree make.cross ARCH=arm
Note: the linux-review/fu-wei-linaro-org/acpi-clocksource-add-GTDT-driver-and-GTDT-support-in-arm_arch_timer/20161116-004444 HEAD 47004b0566d2fd65c05836078319b02c5af2a1fc builds fine. It only hurts bisectibility.
All error/warnings (new ones prefixed by >>):
drivers/clocksource/arm_arch_timer.c:70:13: error: variable 'arch_timer_uses_ppi' has initializer but incomplete type
static enum ppi_nr arch_timer_uses_ppi = VIRT_PPI;
I have figured out this, I should move a change from patch 4/15 to here to avoid the problem.
it should be static enum arch_timer_ppi_nr arch_timer_uses_ppi = VIRT_PPI; will improve this
Thanks
^~~~~~drivers/clocksource/arm_arch_timer.c: In function '__arch_timer_setup':
drivers/clocksource/arm_arch_timer.c:358:3: error: 'arch_timer_uses_ppi' has an incomplete type 'enum ppi_nr'
clk->irq = arch_timer_ppi[arch_timer_uses_ppi]; ^~~drivers/clocksource/arm_arch_timer.c:359:3: error: 'arch_timer_uses_ppi' has an incomplete type 'enum ppi_nr' switch (arch_timer_uses_ppi) { ^~~~~~ drivers/clocksource/arm_arch_timer.c: In function 'arch_timer_has_nonsecure_ppi': drivers/clocksource/arm_arch_timer.c:447:2: error: 'arch_timer_uses_ppi' has an incomplete type 'enum ppi_nr' return (arch_timer_uses_ppi == PHYS_SECURE_PPI && ^~~~~~ drivers/clocksource/arm_arch_timer.c: In function 'arch_timer_starting_cpu': drivers/clocksource/arm_arch_timer.c:471:2: error: 'arch_timer_uses_ppi' has an incomplete type 'enum ppi_nr' flags = check_ppi_trigger(arch_timer_ppi[arch_timer_uses_ppi]); ^~~~~ drivers/clocksource/arm_arch_timer.c:472:2: error: 'arch_timer_uses_ppi' has an incomplete type 'enum ppi_nr' enable_percpu_irq(arch_timer_ppi[arch_timer_uses_ppi], flags); ^~~~~~~~~~~~~~~~~ drivers/clocksource/arm_arch_timer.c: In function 'arch_timer_banner': drivers/clocksource/arm_arch_timer.c:512:2: error: 'arch_timer_uses_ppi' has an incomplete type 'enum ppi_nr' pr_info("Architected %s%s%s timer(s) running at %lu.%02luMHz (%s%s%s).\n", ^~~~~~~ drivers/clocksource/arm_arch_timer.c: In function 'arch_counter_register': drivers/clocksource/arm_arch_timer.c:589:3: error: 'arch_timer_uses_ppi' has an incomplete type 'enum ppi_nr' if (IS_ENABLED(CONFIG_ARM64) || arch_timer_uses_ppi == VIRT_PPI) ^~ drivers/clocksource/arm_arch_timer.c: In function 'arch_timer_stop': drivers/clocksource/arm_arch_timer.c:624:2: error: 'arch_timer_uses_ppi' has an incomplete type 'enum ppi_nr' disable_percpu_irq(arch_timer_ppi[arch_timer_uses_ppi]); ^~~~~~~~~~~~~~~~~~ drivers/clocksource/arm_arch_timer.c: In function 'arch_timer_register': drivers/clocksource/arm_arch_timer.c:687:2: error: 'arch_timer_uses_ppi' has an incomplete type 'enum ppi_nr' ppi = arch_timer_ppi[arch_timer_uses_ppi]; ^~~ drivers/clocksource/arm_arch_timer.c:688:2: error: 'arch_timer_uses_ppi' has an incomplete type 'enum ppi_nr' switch (arch_timer_uses_ppi) { ^~~~~~ drivers/clocksource/arm_arch_timer.c:737:2: error: 'arch_timer_uses_ppi' has an incomplete type 'enum ppi_nr' free_percpu_irq(arch_timer_ppi[arch_timer_uses_ppi], arch_timer_evt); ^~~~~~~~~~~~~~~ drivers/clocksource/arm_arch_timer.c: In function 'arch_timer_init': drivers/clocksource/arm_arch_timer.c:838:4: error: 'arch_timer_uses_ppi' has an incomplete type 'enum ppi_nr' arch_timer_uses_ppi = HYP_PPI; ^~~~~~~~~~~~~~~~~~~ drivers/clocksource/arm_arch_timer.c:841:4: error: 'arch_timer_uses_ppi' has an incomplete type 'enum ppi_nr' arch_timer_uses_ppi = PHYS_SECURE_PPI; ^~~~~~~~~~~~~~~~~~~ drivers/clocksource/arm_arch_timer.c: In function 'arch_timer_of_init': drivers/clocksource/arm_arch_timer.c:897:3: error: 'arch_timer_uses_ppi' has an incomplete type 'enum ppi_nr' arch_timer_uses_ppi = PHYS_SECURE_PPI; ^~~~~~~~~~~~~~~~~~~ drivers/clocksource/arm_arch_timer.c: At top level:
drivers/clocksource/arm_arch_timer.c:70:20: error: storage size of 'arch_timer_uses_ppi' isn't known
static enum ppi_nr arch_timer_uses_ppi = VIRT_PPI; ^~~~~~~~~~~~~~~~~~~drivers/clocksource/arm_arch_timer.c: In function 'arch_timer_has_nonsecure_ppi':
drivers/clocksource/arm_arch_timer.c:449:1: warning: control reaches end of non-void function [-Wreturn-type]
} ^vim +/arch_timer_uses_ppi +70 drivers/clocksource/arm_arch_timer.c
220069945 Stephen Boyd 2013-07-18 64 8a4da6e36 Mark Rutland 2012-11-12 65 static u32 arch_timer_rate; 8a4da6e36 Mark Rutland 2012-11-12 66 static int arch_timer_ppi[MAX_TIMER_PPI]; 8a4da6e36 Mark Rutland 2012-11-12 67 8a4da6e36 Mark Rutland 2012-11-12 68 static struct clock_event_device __percpu *arch_timer_evt; 8a4da6e36 Mark Rutland 2012-11-12 69 f81f03fa2 Marc Zyngier 2014-02-20 @70 static enum ppi_nr arch_timer_uses_ppi = VIRT_PPI; 82a561941 Lorenzo Pieralisi 2014-04-08 71 static bool arch_timer_c3stop; 220069945 Stephen Boyd 2013-07-18 72 static bool arch_timer_mem_use_virtual; 8a4da6e36 Mark Rutland 2012-11-12 73
:::::: The code at line 70 was first introduced by commit :::::: f81f03fa231a8c3aacd580759e73b9238b92ba29 arm64: Allow the arch timer to use the HYP timer
:::::: TO: Marc Zyngier marc.zyngier@arm.com :::::: CC: Marc Zyngier marc.zyngier@arm.com
0-DAY kernel test infrastructure Open Source Technology Center https://lists.01.org/pipermail/kbuild-all Intel Corporation
From: Fu Wei fu.wei@linaro.org
This patch add a new enum "arch_timer_spi_nr" and use it in the driver. Just for code's readability, no functional change.
Signed-off-by: Fu Wei fu.wei@linaro.org Acked-by: Mark Rutland mark.rutland@arm.com --- drivers/clocksource/arm_arch_timer.c | 4 ++-- include/clocksource/arm_arch_timer.h | 6 ++++++ 2 files changed, 8 insertions(+), 2 deletions(-)
diff --git a/drivers/clocksource/arm_arch_timer.c b/drivers/clocksource/arm_arch_timer.c index 9826f06..96c88bb 100644 --- a/drivers/clocksource/arm_arch_timer.c +++ b/drivers/clocksource/arm_arch_timer.c @@ -960,9 +960,9 @@ static int __init arch_timer_mem_init(struct device_node *np) }
if (arch_timer_mem_use_virtual) - irq = irq_of_parse_and_map(best_frame, 1); + irq = irq_of_parse_and_map(best_frame, ARCH_TIMER_VIRT_SPI); else - irq = irq_of_parse_and_map(best_frame, 0); + irq = irq_of_parse_and_map(best_frame, ARCH_TIMER_PHYS_SPI);
ret = -EINVAL; if (!irq) { diff --git a/include/clocksource/arm_arch_timer.h b/include/clocksource/arm_arch_timer.h index 557f869..d23c381 100644 --- a/include/clocksource/arm_arch_timer.h +++ b/include/clocksource/arm_arch_timer.h @@ -46,6 +46,12 @@ enum arch_timer_ppi_nr { MAX_TIMER_PPI };
+enum arch_timer_spi_nr { + ARCH_TIMER_PHYS_SPI, + ARCH_TIMER_VIRT_SPI, + ARCH_TIMER_MAX_TIMER_SPI +}; + #define ARCH_TIMER_PHYS_ACCESS 0 #define ARCH_TIMER_VIRT_ACCESS 1 #define ARCH_TIMER_MEM_PHYS_ACCESS 2
From: Fu Wei fu.wei@linaro.org
This patch defines pr_fmt(fmt) for all pr_* functions, then the pr_* doesn't need to add "arch_timer:" everytime.
According to the suggestion from checkpatch.pl: (1) delete some Blank Spaces in arch_timer_banner; (2) delete a redundant Tab in a bland line of arch_timer_init(void)
No functional change.
Signed-off-by: Fu Wei fu.wei@linaro.org Acked-by: Mark Rutland mark.rutland@arm.com --- drivers/clocksource/arm_arch_timer.c | 49 ++++++++++++++++++------------------ 1 file changed, 25 insertions(+), 24 deletions(-)
diff --git a/drivers/clocksource/arm_arch_timer.c b/drivers/clocksource/arm_arch_timer.c index 96c88bb..b0365043 100644 --- a/drivers/clocksource/arm_arch_timer.c +++ b/drivers/clocksource/arm_arch_timer.c @@ -32,6 +32,9 @@
#include <clocksource/arm_arch_timer.h>
+#undef pr_fmt +#define pr_fmt(fmt) "arch_timer: " fmt + #define CNTTIDR 0x08 #define CNTTIDR_VIRT(n) (BIT(1) << ((n) * 4))
@@ -504,22 +507,22 @@ arch_timer_detect_rate(void __iomem *cntbase, struct device_node *np)
/* Check the timer frequency. */ if (arch_timer_rate == 0) - pr_warn("Architected timer frequency not available\n"); + pr_warn("frequency not available\n"); }
static void arch_timer_banner(unsigned type) { - pr_info("Architected %s%s%s timer(s) running at %lu.%02luMHz (%s%s%s).\n", - type & ARCH_CP15_TIMER ? "cp15" : "", - type == (ARCH_CP15_TIMER | ARCH_MEM_TIMER) ? " and " : "", - type & ARCH_MEM_TIMER ? "mmio" : "", - (unsigned long)arch_timer_rate / 1000000, - (unsigned long)(arch_timer_rate / 10000) % 100, - type & ARCH_CP15_TIMER ? - (arch_timer_uses_ppi == VIRT_PPI) ? "virt" : "phys" : + pr_info("%s%s%s timer(s) running at %lu.%02luMHz (%s%s%s).\n", + type & ARCH_CP15_TIMER ? "cp15" : "", + type == (ARCH_CP15_TIMER | ARCH_MEM_TIMER) ? " and " : "", + type & ARCH_MEM_TIMER ? "mmio" : "", + (unsigned long)arch_timer_rate / 1000000, + (unsigned long)(arch_timer_rate / 10000) % 100, + type & ARCH_CP15_TIMER ? + (arch_timer_uses_ppi == VIRT_PPI) ? "virt" : "phys" : "", - type == (ARCH_CP15_TIMER | ARCH_MEM_TIMER) ? "/" : "", - type & ARCH_MEM_TIMER ? + type == (ARCH_CP15_TIMER | ARCH_MEM_TIMER) ? "/" : "", + type & ARCH_MEM_TIMER ? arch_timer_mem_use_virtual ? "virt" : "phys" : ""); } @@ -618,8 +621,7 @@ static void __init arch_counter_register(unsigned type)
static void arch_timer_stop(struct clock_event_device *clk) { - pr_debug("arch_timer_teardown disable IRQ%d cpu #%d\n", - clk->irq, smp_processor_id()); + pr_debug("disable IRQ%d cpu #%d\n", clk->irq, smp_processor_id());
disable_percpu_irq(arch_timer_ppi[arch_timer_uses_ppi]); if (arch_timer_has_nonsecure_ppi()) @@ -712,8 +714,7 @@ static int __init arch_timer_register(void) }
if (err) { - pr_err("arch_timer: can't register interrupt %d (%d)\n", - ppi, err); + pr_err("can't register interrupt %d (%d)\n", ppi, err); goto out_free; }
@@ -766,7 +767,7 @@ static int __init arch_timer_mem_register(void __iomem *base, unsigned int irq)
ret = request_irq(irq, func, IRQF_TIMER, "arch_mem_timer", &t->evt); if (ret) { - pr_err("arch_timer: Failed to request mem timer irq\n"); + pr_err("Failed to request mem timer irq\n"); kfree(t); }
@@ -844,7 +845,7 @@ static int __init arch_timer_init(void) }
if (!has_ppi) { - pr_warn("arch_timer: No interrupt available, giving up\n"); + pr_warn("No interrupt available, giving up\n"); return -EINVAL; } } @@ -858,7 +859,7 @@ static int __init arch_timer_init(void) return ret;
arch_timer_kvm_info.virtual_irq = arch_timer_ppi[VIRT_PPI]; - + return 0; }
@@ -867,7 +868,7 @@ static int __init arch_timer_of_init(struct device_node *np) int i;
if (arch_timers_present & ARCH_CP15_TIMER) { - pr_warn("arch_timer: multiple nodes in dt, skipping\n"); + pr_warn("multiple nodes in dt, skipping\n"); return 0; }
@@ -911,7 +912,7 @@ static int __init arch_timer_mem_init(struct device_node *np) arch_timers_present |= ARCH_MEM_TIMER; cntctlbase = of_iomap(np, 0); if (!cntctlbase) { - pr_err("arch_timer: Can't find CNTCTLBase\n"); + pr_err("Can't find CNTCTLBase\n"); return -ENXIO; }
@@ -926,7 +927,7 @@ static int __init arch_timer_mem_init(struct device_node *np) u32 cntacr;
if (of_property_read_u32(frame, "frame-number", &n)) { - pr_err("arch_timer: Missing frame-number\n"); + pr_err("Missing frame-number\n"); of_node_put(frame); goto out; } @@ -955,7 +956,7 @@ static int __init arch_timer_mem_init(struct device_node *np) ret= -ENXIO; base = arch_counter_base = of_iomap(best_frame, 0); if (!base) { - pr_err("arch_timer: Can't map frame's registers\n"); + pr_err("Can't map frame's registers\n"); goto out; }
@@ -966,7 +967,7 @@ static int __init arch_timer_mem_init(struct device_node *np)
ret = -EINVAL; if (!irq) { - pr_err("arch_timer: Frame missing %s irq", + pr_err("Frame missing %s irq", arch_timer_mem_use_virtual ? "virt" : "phys"); goto out; } @@ -1008,7 +1009,7 @@ static int __init arch_timer_acpi_init(struct acpi_table_header *table) struct acpi_table_gtdt *gtdt;
if (arch_timers_present & ARCH_CP15_TIMER) { - pr_warn("arch_timer: already initialized, skipping\n"); + pr_warn("already initialized, skipping\n"); return -EINVAL; }
From: Fu Wei fu.wei@linaro.org
Rename some enums and defines, to unify the format of enums and defines in arm_arch_timer.h, also update all the users of these enums and defines: drivers/clocksource/arm_arch_timer.c virt/kvm/arm/hyp/timer-sr.c And do some cleanups, according to the suggestion from checkpatch.pl: (1) using BIT(nr) instead of (1 << nr) (2) using 'unsigned int' instead of 'unsigned'
No functional change.
Signed-off-by: Fu Wei fu.wei@linaro.org --- drivers/clocksource/arm_arch_timer.c | 111 ++++++++++++++++++----------------- include/clocksource/arm_arch_timer.h | 40 ++++++------- virt/kvm/arm/hyp/timer-sr.c | 6 +- 3 files changed, 81 insertions(+), 76 deletions(-)
diff --git a/drivers/clocksource/arm_arch_timer.c b/drivers/clocksource/arm_arch_timer.c index b0365043..dd1040d 100644 --- a/drivers/clocksource/arm_arch_timer.c +++ b/drivers/clocksource/arm_arch_timer.c @@ -66,11 +66,11 @@ struct arch_timer { #define to_arch_timer(e) container_of(e, struct arch_timer, evt)
static u32 arch_timer_rate; -static int arch_timer_ppi[MAX_TIMER_PPI]; +static int arch_timer_ppi[ARCH_TIMER_MAX_TIMER_PPI];
static struct clock_event_device __percpu *arch_timer_evt;
-static enum ppi_nr arch_timer_uses_ppi = VIRT_PPI; +static enum arch_timer_ppi_nr arch_timer_uses_ppi = ARCH_TIMER_VIRT_PPI; static bool arch_timer_c3stop; static bool arch_timer_mem_use_virtual;
@@ -340,7 +340,7 @@ static void fsl_a008585_set_sne(struct clock_event_device *clk) if (!static_branch_unlikely(&arch_timer_read_ool_enabled)) return;
- if (arch_timer_uses_ppi == VIRT_PPI) + if (arch_timer_uses_ppi == ARCH_TIMER_VIRT_PPI) clk->set_next_event = fsl_a008585_set_next_event_virt; else clk->set_next_event = fsl_a008585_set_next_event_phys; @@ -352,7 +352,7 @@ static void __arch_timer_setup(unsigned type, { clk->features = CLOCK_EVT_FEAT_ONESHOT;
- if (type == ARCH_CP15_TIMER) { + if (type == ARCH_TIMER_TYPE_CP15) { if (arch_timer_c3stop) clk->features |= CLOCK_EVT_FEAT_C3STOP; clk->name = "arch_sys_timer"; @@ -360,14 +360,14 @@ static void __arch_timer_setup(unsigned type, clk->cpumask = cpumask_of(smp_processor_id()); clk->irq = arch_timer_ppi[arch_timer_uses_ppi]; switch (arch_timer_uses_ppi) { - case VIRT_PPI: + case ARCH_TIMER_VIRT_PPI: clk->set_state_shutdown = arch_timer_shutdown_virt; clk->set_state_oneshot_stopped = arch_timer_shutdown_virt; clk->set_next_event = arch_timer_set_next_event_virt; break; - case PHYS_SECURE_PPI: - case PHYS_NONSECURE_PPI: - case HYP_PPI: + case ARCH_TIMER_PHYS_SECURE_PPI: + case ARCH_TIMER_PHYS_NONSECURE_PPI: + case ARCH_TIMER_HYP_PPI: clk->set_state_shutdown = arch_timer_shutdown_phys; clk->set_state_oneshot_stopped = arch_timer_shutdown_phys; clk->set_next_event = arch_timer_set_next_event_phys; @@ -447,8 +447,8 @@ static void arch_counter_set_user_access(void)
static bool arch_timer_has_nonsecure_ppi(void) { - return (arch_timer_uses_ppi == PHYS_SECURE_PPI && - arch_timer_ppi[PHYS_NONSECURE_PPI]); + return (arch_timer_uses_ppi == ARCH_TIMER_PHYS_SECURE_PPI && + arch_timer_ppi[ARCH_TIMER_PHYS_NONSECURE_PPI]); }
static u32 check_ppi_trigger(int irq) @@ -469,14 +469,15 @@ static int arch_timer_starting_cpu(unsigned int cpu) struct clock_event_device *clk = this_cpu_ptr(arch_timer_evt); u32 flags;
- __arch_timer_setup(ARCH_CP15_TIMER, clk); + __arch_timer_setup(ARCH_TIMER_TYPE_CP15, clk);
flags = check_ppi_trigger(arch_timer_ppi[arch_timer_uses_ppi]); enable_percpu_irq(arch_timer_ppi[arch_timer_uses_ppi], flags);
if (arch_timer_has_nonsecure_ppi()) { - flags = check_ppi_trigger(arch_timer_ppi[PHYS_NONSECURE_PPI]); - enable_percpu_irq(arch_timer_ppi[PHYS_NONSECURE_PPI], flags); + flags = check_ppi_trigger(arch_timer_ppi[ARCH_TIMER_PHYS_NONSECURE_PPI]); + enable_percpu_irq(arch_timer_ppi[ARCH_TIMER_PHYS_NONSECURE_PPI], + flags); }
arch_counter_set_user_access(); @@ -513,16 +514,17 @@ arch_timer_detect_rate(void __iomem *cntbase, struct device_node *np) static void arch_timer_banner(unsigned type) { pr_info("%s%s%s timer(s) running at %lu.%02luMHz (%s%s%s).\n", - type & ARCH_CP15_TIMER ? "cp15" : "", - type == (ARCH_CP15_TIMER | ARCH_MEM_TIMER) ? " and " : "", - type & ARCH_MEM_TIMER ? "mmio" : "", + type & ARCH_TIMER_TYPE_CP15 ? "cp15" : "", + type == (ARCH_TIMER_TYPE_CP15 | ARCH_TIMER_TYPE_MEM) ? + " and " : "", + type & ARCH_TIMER_TYPE_MEM ? "mmio" : "", (unsigned long)arch_timer_rate / 1000000, (unsigned long)(arch_timer_rate / 10000) % 100, - type & ARCH_CP15_TIMER ? - (arch_timer_uses_ppi == VIRT_PPI) ? "virt" : "phys" : + type & ARCH_TIMER_TYPE_CP15 ? + (arch_timer_uses_ppi == ARCH_TIMER_VIRT_PPI) ? "virt" : "phys" : "", - type == (ARCH_CP15_TIMER | ARCH_MEM_TIMER) ? "/" : "", - type & ARCH_MEM_TIMER ? + type == (ARCH_TIMER_TYPE_CP15 | ARCH_TIMER_TYPE_MEM) ? "/" : "", + type & ARCH_TIMER_TYPE_MEM ? arch_timer_mem_use_virtual ? "virt" : "phys" : ""); } @@ -588,8 +590,9 @@ static void __init arch_counter_register(unsigned type) u64 start_count;
/* Register the CP15 based counter if we have one */ - if (type & ARCH_CP15_TIMER) { - if (IS_ENABLED(CONFIG_ARM64) || arch_timer_uses_ppi == VIRT_PPI) + if (type & ARCH_TIMER_TYPE_CP15) { + if (IS_ENABLED(CONFIG_ARM64) || + arch_timer_uses_ppi == ARCH_TIMER_VIRT_PPI) arch_timer_read_counter = arch_counter_get_cntvct; else arch_timer_read_counter = arch_counter_get_cntpct; @@ -625,7 +628,7 @@ static void arch_timer_stop(struct clock_event_device *clk)
disable_percpu_irq(arch_timer_ppi[arch_timer_uses_ppi]); if (arch_timer_has_nonsecure_ppi()) - disable_percpu_irq(arch_timer_ppi[PHYS_NONSECURE_PPI]); + disable_percpu_irq(arch_timer_ppi[ARCH_TIMER_PHYS_NONSECURE_PPI]);
clk->set_state_shutdown(clk); } @@ -688,24 +691,24 @@ static int __init arch_timer_register(void)
ppi = arch_timer_ppi[arch_timer_uses_ppi]; switch (arch_timer_uses_ppi) { - case VIRT_PPI: + case ARCH_TIMER_VIRT_PPI: err = request_percpu_irq(ppi, arch_timer_handler_virt, "arch_timer", arch_timer_evt); break; - case PHYS_SECURE_PPI: - case PHYS_NONSECURE_PPI: + case ARCH_TIMER_PHYS_SECURE_PPI: + case ARCH_TIMER_PHYS_NONSECURE_PPI: err = request_percpu_irq(ppi, arch_timer_handler_phys, "arch_timer", arch_timer_evt); - if (!err && arch_timer_ppi[PHYS_NONSECURE_PPI]) { - ppi = arch_timer_ppi[PHYS_NONSECURE_PPI]; + if (!err && arch_timer_ppi[ARCH_TIMER_PHYS_NONSECURE_PPI]) { + ppi = arch_timer_ppi[ARCH_TIMER_PHYS_NONSECURE_PPI]; err = request_percpu_irq(ppi, arch_timer_handler_phys, "arch_timer", arch_timer_evt); if (err) - free_percpu_irq(arch_timer_ppi[PHYS_SECURE_PPI], + free_percpu_irq(arch_timer_ppi[ARCH_TIMER_PHYS_SECURE_PPI], arch_timer_evt); } break; - case HYP_PPI: + case ARCH_TIMER_HYP_PPI: err = request_percpu_irq(ppi, arch_timer_handler_phys, "arch_timer", arch_timer_evt); break; @@ -737,7 +740,7 @@ static int __init arch_timer_register(void) out_unreg_notify: free_percpu_irq(arch_timer_ppi[arch_timer_uses_ppi], arch_timer_evt); if (arch_timer_has_nonsecure_ppi()) - free_percpu_irq(arch_timer_ppi[PHYS_NONSECURE_PPI], + free_percpu_irq(arch_timer_ppi[ARCH_TIMER_PHYS_NONSECURE_PPI], arch_timer_evt);
out_free: @@ -758,7 +761,7 @@ static int __init arch_timer_mem_register(void __iomem *base, unsigned int irq)
t->base = base; t->evt.irq = irq; - __arch_timer_setup(ARCH_MEM_TIMER, &t->evt); + __arch_timer_setup(ARCH_TIMER_TYPE_MEM, &t->evt);
if (arch_timer_mem_use_virtual) func = arch_timer_handler_virt_mem; @@ -801,13 +804,15 @@ arch_timer_needs_probing(int type, const struct of_device_id *matches)
static int __init arch_timer_common_init(void) { - unsigned mask = ARCH_CP15_TIMER | ARCH_MEM_TIMER; + unsigned int mask = ARCH_TIMER_TYPE_CP15 | ARCH_TIMER_TYPE_MEM;
/* Wait until both nodes are probed if we have two timers */ if ((arch_timers_present & mask) != mask) { - if (arch_timer_needs_probing(ARCH_MEM_TIMER, arch_timer_mem_of_match)) + if (arch_timer_needs_probing(ARCH_TIMER_TYPE_MEM, + arch_timer_mem_of_match)) return 0; - if (arch_timer_needs_probing(ARCH_CP15_TIMER, arch_timer_of_match)) + if (arch_timer_needs_probing(ARCH_TIMER_TYPE_CP15, + arch_timer_of_match)) return 0; }
@@ -832,16 +837,16 @@ static int __init arch_timer_init(void) * their CNTHP_*_EL2 counterparts, and use a different PPI * number. */ - if (is_hyp_mode_available() || !arch_timer_ppi[VIRT_PPI]) { + if (is_hyp_mode_available() || !arch_timer_ppi[ARCH_TIMER_VIRT_PPI]) { bool has_ppi;
if (is_kernel_in_hyp_mode()) { - arch_timer_uses_ppi = HYP_PPI; - has_ppi = !!arch_timer_ppi[HYP_PPI]; + arch_timer_uses_ppi = ARCH_TIMER_HYP_PPI; + has_ppi = !!arch_timer_ppi[ARCH_TIMER_HYP_PPI]; } else { - arch_timer_uses_ppi = PHYS_SECURE_PPI; - has_ppi = (!!arch_timer_ppi[PHYS_SECURE_PPI] || - !!arch_timer_ppi[PHYS_NONSECURE_PPI]); + arch_timer_uses_ppi = ARCH_TIMER_PHYS_SECURE_PPI; + has_ppi = (!!arch_timer_ppi[ARCH_TIMER_PHYS_SECURE_PPI] || + !!arch_timer_ppi[ARCH_TIMER_PHYS_NONSECURE_PPI]); }
if (!has_ppi) { @@ -858,7 +863,7 @@ static int __init arch_timer_init(void) if (ret) return ret;
- arch_timer_kvm_info.virtual_irq = arch_timer_ppi[VIRT_PPI]; + arch_timer_kvm_info.virtual_irq = arch_timer_ppi[ARCH_TIMER_VIRT_PPI];
return 0; } @@ -867,13 +872,13 @@ static int __init arch_timer_of_init(struct device_node *np) { int i;
- if (arch_timers_present & ARCH_CP15_TIMER) { + if (arch_timers_present & ARCH_TIMER_TYPE_CP15) { pr_warn("multiple nodes in dt, skipping\n"); return 0; }
- arch_timers_present |= ARCH_CP15_TIMER; - for (i = PHYS_SECURE_PPI; i < MAX_TIMER_PPI; i++) + arch_timers_present |= ARCH_TIMER_TYPE_CP15; + for (i = ARCH_TIMER_PHYS_SECURE_PPI; i < ARCH_TIMER_MAX_TIMER_PPI; i++) arch_timer_ppi[i] = irq_of_parse_and_map(np, i);
arch_timer_detect_rate(NULL, np); @@ -895,7 +900,7 @@ static int __init arch_timer_of_init(struct device_node *np) */ if (IS_ENABLED(CONFIG_ARM) && of_property_read_bool(np, "arm,cpu-registers-not-fw-configured")) - arch_timer_uses_ppi = PHYS_SECURE_PPI; + arch_timer_uses_ppi = ARCH_TIMER_PHYS_SECURE_PPI;
return arch_timer_init(); } @@ -909,7 +914,7 @@ static int __init arch_timer_mem_init(struct device_node *np) unsigned int irq, ret = -EINVAL; u32 cnttidr;
- arch_timers_present |= ARCH_MEM_TIMER; + arch_timers_present |= ARCH_TIMER_TYPE_MEM; cntctlbase = of_iomap(np, 0); if (!cntctlbase) { pr_err("Can't find CNTCTLBase\n"); @@ -1008,28 +1013,28 @@ static int __init arch_timer_acpi_init(struct acpi_table_header *table) { struct acpi_table_gtdt *gtdt;
- if (arch_timers_present & ARCH_CP15_TIMER) { + if (arch_timers_present & ARCH_TIMER_TYPE_CP15) { pr_warn("already initialized, skipping\n"); return -EINVAL; }
gtdt = container_of(table, struct acpi_table_gtdt, header);
- arch_timers_present |= ARCH_CP15_TIMER; + arch_timers_present |= ARCH_TIMER_TYPE_CP15;
- arch_timer_ppi[PHYS_SECURE_PPI] = + arch_timer_ppi[ARCH_TIMER_PHYS_SECURE_PPI] = map_generic_timer_interrupt(gtdt->secure_el1_interrupt, gtdt->secure_el1_flags);
- arch_timer_ppi[PHYS_NONSECURE_PPI] = + arch_timer_ppi[ARCH_TIMER_PHYS_NONSECURE_PPI] = map_generic_timer_interrupt(gtdt->non_secure_el1_interrupt, gtdt->non_secure_el1_flags);
- arch_timer_ppi[VIRT_PPI] = + arch_timer_ppi[ARCH_TIMER_VIRT_PPI] = map_generic_timer_interrupt(gtdt->virtual_timer_interrupt, gtdt->virtual_timer_flags);
- arch_timer_ppi[HYP_PPI] = + arch_timer_ppi[ARCH_TIMER_HYP_PPI] = map_generic_timer_interrupt(gtdt->non_secure_el2_interrupt, gtdt->non_secure_el2_flags);
diff --git a/include/clocksource/arm_arch_timer.h b/include/clocksource/arm_arch_timer.h index d23c381..2625ff1 100644 --- a/include/clocksource/arm_arch_timer.h +++ b/include/clocksource/arm_arch_timer.h @@ -20,18 +20,18 @@ #include <linux/timecounter.h> #include <linux/types.h>
-#define ARCH_CP15_TIMER BIT(0) -#define ARCH_MEM_TIMER BIT(1) +#define ARCH_TIMER_TYPE_CP15 BIT(0) +#define ARCH_TIMER_TYPE_MEM BIT(1)
-#define ARCH_TIMER_CTRL_ENABLE (1 << 0) -#define ARCH_TIMER_CTRL_IT_MASK (1 << 1) -#define ARCH_TIMER_CTRL_IT_STAT (1 << 2) +#define ARCH_TIMER_CTRL_ENABLE BIT(0) +#define ARCH_TIMER_CTRL_IT_MASK BIT(1) +#define ARCH_TIMER_CTRL_IT_STAT BIT(2)
-#define CNTHCTL_EL1PCTEN (1 << 0) -#define CNTHCTL_EL1PCEN (1 << 1) -#define CNTHCTL_EVNTEN (1 << 2) -#define CNTHCTL_EVNTDIR (1 << 3) -#define CNTHCTL_EVNTI (0xF << 4) +#define ARCH_TIMER_CNTHCTL_EL1PCTEN BIT(0) +#define ARCH_TIMER_CNTHCTL_EL1PCEN BIT(1) +#define ARCH_TIMER_CNTHCTL_EVNTEN BIT(2) +#define ARCH_TIMER_CNTHCTL_EVNTDIR BIT(3) +#define ARCH_TIMER_CNTHCTL_EVNTI (0xF << 4)
enum arch_timer_reg { ARCH_TIMER_REG_CTRL, @@ -39,11 +39,11 @@ enum arch_timer_reg { };
enum arch_timer_ppi_nr { - PHYS_SECURE_PPI, - PHYS_NONSECURE_PPI, - VIRT_PPI, - HYP_PPI, - MAX_TIMER_PPI + ARCH_TIMER_PHYS_SECURE_PPI, + ARCH_TIMER_PHYS_NONSECURE_PPI, + ARCH_TIMER_VIRT_PPI, + ARCH_TIMER_HYP_PPI, + ARCH_TIMER_MAX_TIMER_PPI };
enum arch_timer_spi_nr { @@ -57,13 +57,13 @@ enum arch_timer_spi_nr { #define ARCH_TIMER_MEM_PHYS_ACCESS 2 #define ARCH_TIMER_MEM_VIRT_ACCESS 3
-#define ARCH_TIMER_USR_PCT_ACCESS_EN (1 << 0) /* physical counter */ -#define ARCH_TIMER_USR_VCT_ACCESS_EN (1 << 1) /* virtual counter */ -#define ARCH_TIMER_VIRT_EVT_EN (1 << 2) +#define ARCH_TIMER_USR_PCT_ACCESS_EN BIT(0) /* physical counter */ +#define ARCH_TIMER_USR_VCT_ACCESS_EN BIT(1) /* virtual counter */ +#define ARCH_TIMER_VIRT_EVT_EN BIT(2) #define ARCH_TIMER_EVT_TRIGGER_SHIFT (4) #define ARCH_TIMER_EVT_TRIGGER_MASK (0xF << ARCH_TIMER_EVT_TRIGGER_SHIFT) -#define ARCH_TIMER_USR_VT_ACCESS_EN (1 << 8) /* virtual timer registers */ -#define ARCH_TIMER_USR_PT_ACCESS_EN (1 << 9) /* physical timer registers */ +#define ARCH_TIMER_USR_VT_ACCESS_EN BIT(8) /* virtual timer registers */ +#define ARCH_TIMER_USR_PT_ACCESS_EN BIT(9) /* physical timer registers */
#define ARCH_TIMER_EVT_STREAM_FREQ 10000 /* 100us */
diff --git a/virt/kvm/arm/hyp/timer-sr.c b/virt/kvm/arm/hyp/timer-sr.c index 798866a..695b9d9 100644 --- a/virt/kvm/arm/hyp/timer-sr.c +++ b/virt/kvm/arm/hyp/timer-sr.c @@ -37,7 +37,7 @@ void __hyp_text __timer_save_state(struct kvm_vcpu *vcpu)
/* Allow physical timer/counter access for the host */ val = read_sysreg(cnthctl_el2); - val |= CNTHCTL_EL1PCTEN | CNTHCTL_EL1PCEN; + val |= ARCH_TIMER_CNTHCTL_EL1PCTEN | ARCH_TIMER_CNTHCTL_EL1PCEN; write_sysreg(val, cnthctl_el2);
/* Clear cntvoff for the host */ @@ -55,8 +55,8 @@ void __hyp_text __timer_restore_state(struct kvm_vcpu *vcpu) * Physical counter access is allowed */ val = read_sysreg(cnthctl_el2); - val &= ~CNTHCTL_EL1PCEN; - val |= CNTHCTL_EL1PCTEN; + val &= ~ARCH_TIMER_CNTHCTL_EL1PCEN; + val |= ARCH_TIMER_CNTHCTL_EL1PCTEN; write_sysreg(val, cnthctl_el2);
if (timer->enabled) {
From: Fu Wei fu.wei@linaro.org
The patch fix a potential bug about arch_timer_uses_ppi in arch_timer_register. On ARM64, we don't use ARCH_TIMER_PHYS_SECURE_PPI in Linux, so we will just igorne it in init code. If arch_timer_uses_ppi is ARCH_TIMER_PHYS_NONSECURE_PPI, the orignal code of arch_timer_uses_ppi may go wrong.
Signed-off-by: Fu Wei fu.wei@linaro.org --- drivers/clocksource/arm_arch_timer.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/clocksource/arm_arch_timer.c b/drivers/clocksource/arm_arch_timer.c index dd1040d..6de164f 100644 --- a/drivers/clocksource/arm_arch_timer.c +++ b/drivers/clocksource/arm_arch_timer.c @@ -699,7 +699,7 @@ static int __init arch_timer_register(void) case ARCH_TIMER_PHYS_NONSECURE_PPI: err = request_percpu_irq(ppi, arch_timer_handler_phys, "arch_timer", arch_timer_evt); - if (!err && arch_timer_ppi[ARCH_TIMER_PHYS_NONSECURE_PPI]) { + if (!err && arch_timer_has_nonsecure_ppi()) { ppi = arch_timer_ppi[ARCH_TIMER_PHYS_NONSECURE_PPI]; err = request_percpu_irq(ppi, arch_timer_handler_phys, "arch_timer", arch_timer_evt);
From: Fu Wei fu.wei@linaro.org
The patch refactor original arch_timer_uses_ppi init code: (1) Extract a subfunction: arch_timer_uses_ppi_init (2) Use the new subfunction in arch_timer_of_init and arch_timer_acpi_init
Signed-off-by: Fu Wei fu.wei@linaro.org --- drivers/clocksource/arm_arch_timer.c | 73 +++++++++++++++++++++--------------- 1 file changed, 42 insertions(+), 31 deletions(-)
diff --git a/drivers/clocksource/arm_arch_timer.c b/drivers/clocksource/arm_arch_timer.c index 6de164f..af22953 100644 --- a/drivers/clocksource/arm_arch_timer.c +++ b/drivers/clocksource/arm_arch_timer.c @@ -821,40 +821,42 @@ static int __init arch_timer_common_init(void) return arch_timer_arch_init(); }
-static int __init arch_timer_init(void) +/* + * If HYP mode is available, we know that the physical timer + * has been configured to be accessible from PL1. Use it, so + * that a guest can use the virtual timer instead. + * + * If no interrupt provided for virtual timer, we'll have to + * stick to the physical timer. It'd better be accessible... + * On ARM64, we we only use ARCH_TIMER_PHYS_NONSECURE_PPI in Linux. + * + * On ARMv8.1 with VH extensions, the kernel runs in HYP. VHE + * accesses to CNTP_*_EL1 registers are silently redirected to + * their CNTHP_*_EL2 counterparts, and use a different PPI + * number. + */ +static int __init arch_timer_uses_ppi_init(void) { - int ret; - /* - * If HYP mode is available, we know that the physical timer - * has been configured to be accessible from PL1. Use it, so - * that a guest can use the virtual timer instead. - * - * If no interrupt provided for virtual timer, we'll have to - * stick to the physical timer. It'd better be accessible... - * - * On ARMv8.1 with VH extensions, the kernel runs in HYP. VHE - * accesses to CNTP_*_EL1 registers are silently redirected to - * their CNTHP_*_EL2 counterparts, and use a different PPI - * number. - */ - if (is_hyp_mode_available() || !arch_timer_ppi[ARCH_TIMER_VIRT_PPI]) { - bool has_ppi; - - if (is_kernel_in_hyp_mode()) { - arch_timer_uses_ppi = ARCH_TIMER_HYP_PPI; - has_ppi = !!arch_timer_ppi[ARCH_TIMER_HYP_PPI]; - } else { + if (is_hyp_mode_available() && is_kernel_in_hyp_mode()) { + arch_timer_uses_ppi = ARCH_TIMER_HYP_PPI; + } else if (!arch_timer_ppi[ARCH_TIMER_VIRT_PPI]) { + if (IS_ENABLED(CONFIG_ARM64)) + arch_timer_uses_ppi = ARCH_TIMER_PHYS_NONSECURE_PPI; + else arch_timer_uses_ppi = ARCH_TIMER_PHYS_SECURE_PPI; - has_ppi = (!!arch_timer_ppi[ARCH_TIMER_PHYS_SECURE_PPI] || - !!arch_timer_ppi[ARCH_TIMER_PHYS_NONSECURE_PPI]); - } - - if (!has_ppi) { - pr_warn("No interrupt available, giving up\n"); - return -EINVAL; - } }
+ if (arch_timer_ppi[arch_timer_uses_ppi]) + return 0; + + pr_warn("No interrupt available, giving up\n"); + return -EINVAL; +} + +static int __init arch_timer_init(void) +{ + int ret; + ret = arch_timer_register(); if (ret) return ret; @@ -870,7 +872,7 @@ static int __init arch_timer_init(void)
static int __init arch_timer_of_init(struct device_node *np) { - int i; + int i, ret;
if (arch_timers_present & ARCH_TIMER_TYPE_CP15) { pr_warn("multiple nodes in dt, skipping\n"); @@ -902,6 +904,10 @@ static int __init arch_timer_of_init(struct device_node *np) of_property_read_bool(np, "arm,cpu-registers-not-fw-configured")) arch_timer_uses_ppi = ARCH_TIMER_PHYS_SECURE_PPI;
+ ret = arch_timer_uses_ppi_init(); + if (ret) + return ret; + return arch_timer_init(); } CLOCKSOURCE_OF_DECLARE(armv7_arch_timer, "arm,armv7-timer", arch_timer_of_init); @@ -1011,6 +1017,7 @@ static int __init map_generic_timer_interrupt(u32 interrupt, u32 flags) /* Initialize per-processor generic timer */ static int __init arch_timer_acpi_init(struct acpi_table_header *table) { + int ret; struct acpi_table_gtdt *gtdt;
if (arch_timers_present & ARCH_TIMER_TYPE_CP15) { @@ -1041,6 +1048,10 @@ static int __init arch_timer_acpi_init(struct acpi_table_header *table) /* Get the frequency from CNTFRQ */ arch_timer_detect_rate(NULL, NULL);
+ ret = arch_timer_uses_ppi_init(); + if (ret) + return ret; + /* Always-on capability */ arch_timer_c3stop = !(gtdt->non_secure_el1_flags & ACPI_GTDT_ALWAYS_ON);
From: Fu Wei fu.wei@linaro.org
The patch introduce two new structs: arch_timer_mem, arch_timer_mem_frame. And also introduce a new define: ARCH_TIMER_MEM_MAX_FRAMES
These will be used for refactoring the memory-mapped timer init code to prepare for GTDT
Signed-off-by: Fu Wei fu.wei@linaro.org --- include/clocksource/arm_arch_timer.h | 17 +++++++++++++++++ 1 file changed, 17 insertions(+)
diff --git a/include/clocksource/arm_arch_timer.h b/include/clocksource/arm_arch_timer.h index 2625ff1..cc986a3 100644 --- a/include/clocksource/arm_arch_timer.h +++ b/include/clocksource/arm_arch_timer.h @@ -57,6 +57,8 @@ enum arch_timer_spi_nr { #define ARCH_TIMER_MEM_PHYS_ACCESS 2 #define ARCH_TIMER_MEM_VIRT_ACCESS 3
+#define ARCH_TIMER_MEM_MAX_FRAMES 8 + #define ARCH_TIMER_USR_PCT_ACCESS_EN BIT(0) /* physical counter */ #define ARCH_TIMER_USR_VCT_ACCESS_EN BIT(1) /* virtual counter */ #define ARCH_TIMER_VIRT_EVT_EN BIT(2) @@ -72,6 +74,21 @@ struct arch_timer_kvm_info { int virtual_irq; };
+struct arch_timer_mem_frame { + int frame_nr; + phys_addr_t cntbase; + size_t size; + int phys_irq; + int virt_irq; +}; + +struct arch_timer_mem { + phys_addr_t cntctlbase; + size_t size; + int num_frames; + struct arch_timer_mem_frame frame[ARCH_TIMER_MEM_MAX_FRAMES]; +}; + #ifdef CONFIG_ARM_ARCH_TIMER
extern u32 arch_timer_get_rate(void);
From: Fu Wei fu.wei@linaro.org
The patch refactor original memory-mapped timer init code: (1) Extract a subfunction for detecting a bast time frame: is_best_frame. (2) Refactor "arch_timer_mem_init", make it become a common code for memory-mapped timer init. (3) Add a new function "arch_timer_mem_of_init" for DT init.
Signed-off-by: Fu Wei fu.wei@linaro.org --- drivers/clocksource/arm_arch_timer.c | 153 ++++++++++++++++++++++++----------- 1 file changed, 104 insertions(+), 49 deletions(-)
diff --git a/drivers/clocksource/arm_arch_timer.c b/drivers/clocksource/arm_arch_timer.c index af22953..a44e44d 100644 --- a/drivers/clocksource/arm_arch_timer.c +++ b/drivers/clocksource/arm_arch_timer.c @@ -913,17 +913,35 @@ static int __init arch_timer_of_init(struct device_node *np) CLOCKSOURCE_OF_DECLARE(armv7_arch_timer, "arm,armv7-timer", arch_timer_of_init); CLOCKSOURCE_OF_DECLARE(armv8_arch_timer, "arm,armv8-timer", arch_timer_of_init);
-static int __init arch_timer_mem_init(struct device_node *np) +static bool __init is_best_frame(void __iomem *cntctlbase, u32 cnttidr, int n) +{ + u32 cntacr = CNTACR_RFRQ | CNTACR_RWPT | CNTACR_RPCT | CNTACR_RWVT | + CNTACR_RVOFF | CNTACR_RVCT; + + /* Try enabling everything, and see what sticks */ + writel_relaxed(cntacr, cntctlbase + CNTACR(n)); + cntacr = readl_relaxed(cntctlbase + CNTACR(n)); + + if ((cnttidr & CNTTIDR_VIRT(n)) && + !(~cntacr & (CNTACR_RWVT | CNTACR_RVCT))) + arch_timer_mem_use_virtual = true; + else if (~cntacr & (CNTACR_RWPT | CNTACR_RPCT)) + return false; + + return true; +} + +static int __init arch_timer_mem_init(struct arch_timer_mem *timer_mem) { - struct device_node *frame, *best_frame = NULL; void __iomem *cntctlbase, *base; - unsigned int irq, ret = -EINVAL; + struct arch_timer_mem_frame *best_frame = NULL; + unsigned int irq; u32 cnttidr; + int i, ret;
- arch_timers_present |= ARCH_TIMER_TYPE_MEM; - cntctlbase = of_iomap(np, 0); + cntctlbase = ioremap(timer_mem->cntctlbase, timer_mem->size); if (!cntctlbase) { - pr_err("Can't find CNTCTLBase\n"); + pr_err("Can't map CNTCTLBase.\n"); return -ENXIO; }
@@ -933,69 +951,106 @@ static int __init arch_timer_mem_init(struct device_node *np) * Try to find a virtual capable frame. Otherwise fall back to a * physical capable frame. */ - for_each_available_child_of_node(np, frame) { - int n; - u32 cntacr; - - if (of_property_read_u32(frame, "frame-number", &n)) { - pr_err("Missing frame-number\n"); - of_node_put(frame); - goto out; - } - - /* Try enabling everything, and see what sticks */ - cntacr = CNTACR_RFRQ | CNTACR_RWPT | CNTACR_RPCT | - CNTACR_RWVT | CNTACR_RVOFF | CNTACR_RVCT; - writel_relaxed(cntacr, cntctlbase + CNTACR(n)); - cntacr = readl_relaxed(cntctlbase + CNTACR(n)); - - if ((cnttidr & CNTTIDR_VIRT(n)) && - !(~cntacr & (CNTACR_RWVT | CNTACR_RVCT))) { - of_node_put(best_frame); - best_frame = frame; - arch_timer_mem_use_virtual = true; - break; + for (i = 0; i < timer_mem->num_frames; i++) { + if (is_best_frame(cntctlbase, cnttidr, + timer_mem->frame[i].frame_nr)) { + best_frame = &timer_mem->frame[i]; + if (arch_timer_mem_use_virtual) + break; } - - if (~cntacr & (CNTACR_RWPT | CNTACR_RPCT)) - continue; - - of_node_put(best_frame); - best_frame = of_node_get(frame); } + iounmap(cntctlbase);
- ret= -ENXIO; - base = arch_counter_base = of_iomap(best_frame, 0); - if (!base) { - pr_err("Can't map frame's registers\n"); - goto out; + if (!best_frame) { + pr_err("Can't find frame for register\n"); + return -EINVAL; }
if (arch_timer_mem_use_virtual) - irq = irq_of_parse_and_map(best_frame, ARCH_TIMER_VIRT_SPI); + irq = best_frame->virt_irq; else - irq = irq_of_parse_and_map(best_frame, ARCH_TIMER_PHYS_SPI); + irq = best_frame->phys_irq;
- ret = -EINVAL; if (!irq) { pr_err("Frame missing %s irq", arch_timer_mem_use_virtual ? "virt" : "phys"); - goto out; + return -EINVAL; + } + + base = ioremap(best_frame->cntbase, best_frame->size); + if (!base) { + pr_err("Can't map frame's registers\n"); + return -ENXIO; }
- arch_timer_detect_rate(base, np); + arch_timer_detect_rate(base, NULL); ret = arch_timer_mem_register(base, irq); - if (ret) + if (ret) { + iounmap(base); + return ret; + } + + arch_counter_base = base; + arch_timers_present |= ARCH_TIMER_TYPE_MEM; + + return 0; +} + +static int __init arch_timer_mem_of_init(struct device_node *np) +{ + struct arch_timer_mem *timer_mem; + struct device_node *frame_node; + struct resource res; + int i, ret = -EINVAL; + + timer_mem = kzalloc(sizeof(*timer_mem), GFP_KERNEL); + if (!timer_mem) + return -ENOMEM; + + if (of_address_to_resource(np, 0, &res)) goto out; + timer_mem->cntctlbase = res.start; + timer_mem->size = resource_size(&res);
- return arch_timer_common_init(); + i = 0; + for_each_available_child_of_node(np, frame_node) { + int n; + struct arch_timer_mem_frame *frame = &timer_mem->frame[i]; + + if (of_property_read_u32(frame_node, "frame-number", &n)) { + pr_err("Missing frame-number\n"); + of_node_put(frame_node); + goto out; + } + frame->frame_nr = n; + + if (of_address_to_resource(frame_node, 0, &res)) { + of_node_put(frame_node); + goto out; + } + frame->cntbase = res.start; + frame->size = resource_size(&res); + + frame->virt_irq = irq_of_parse_and_map(frame_node, + ARCH_TIMER_VIRT_SPI); + frame->phys_irq = irq_of_parse_and_map(frame_node, + ARCH_TIMER_PHYS_SPI); + + if (++i >= ARCH_TIMER_MEM_MAX_FRAMES) + break; + } + timer_mem->num_frames = i; + + arch_timer_detect_rate(NULL, np); + ret = arch_timer_mem_init(timer_mem); + if (!ret) + ret = arch_timer_common_init(); out: - iounmap(cntctlbase); - of_node_put(best_frame); + kfree(timer_mem); return ret; } CLOCKSOURCE_OF_DECLARE(armv7_arch_timer_mem, "arm,armv7-timer-mem", - arch_timer_mem_init); + arch_timer_mem_of_init);
#ifdef CONFIG_ACPI static int __init map_generic_timer_interrupt(u32 interrupt, u32 flags)
From: Fu Wei fu.wei@linaro.org
This patch adds support for parsing arch timer in GTDT, provides some kernel APIs to parse all the PPIs and always-on info in GTDT and export them.
By this driver, we can simplify arm_arch_timer drivers, and separate the ACPI GTDT knowledge from it.
Signed-off-by: Fu Wei fu.wei@linaro.org Signed-off-by: Hanjun Guo hanjun.guo@linaro.org Acked-by: Rafael J. Wysocki rafael.j.wysocki@intel.com --- arch/arm64/Kconfig | 1 + drivers/acpi/arm64/Kconfig | 3 + drivers/acpi/arm64/Makefile | 1 + drivers/acpi/arm64/gtdt.c | 216 ++++++++++++++++++++++++++++++++++++++++++++ include/linux/acpi.h | 7 ++ 5 files changed, 228 insertions(+)
diff --git a/arch/arm64/Kconfig b/arch/arm64/Kconfig index 969ef88..4277a21 100644 --- a/arch/arm64/Kconfig +++ b/arch/arm64/Kconfig @@ -2,6 +2,7 @@ config ARM64 def_bool y select ACPI_CCA_REQUIRED if ACPI select ACPI_GENERIC_GSI if ACPI + select ACPI_GTDT if ACPI select ACPI_REDUCED_HARDWARE_ONLY if ACPI select ACPI_MCFG if ACPI select ACPI_SPCR_TABLE if ACPI diff --git a/drivers/acpi/arm64/Kconfig b/drivers/acpi/arm64/Kconfig index 4616da4..5a6f80f 100644 --- a/drivers/acpi/arm64/Kconfig +++ b/drivers/acpi/arm64/Kconfig @@ -4,3 +4,6 @@
config ACPI_IORT bool + +config ACPI_GTDT + bool diff --git a/drivers/acpi/arm64/Makefile b/drivers/acpi/arm64/Makefile index 72331f2..1017def 100644 --- a/drivers/acpi/arm64/Makefile +++ b/drivers/acpi/arm64/Makefile @@ -1 +1,2 @@ obj-$(CONFIG_ACPI_IORT) += iort.o +obj-$(CONFIG_ACPI_GTDT) += gtdt.o diff --git a/drivers/acpi/arm64/gtdt.c b/drivers/acpi/arm64/gtdt.c new file mode 100644 index 0000000..2de79aa --- /dev/null +++ b/drivers/acpi/arm64/gtdt.c @@ -0,0 +1,216 @@ +/* + * ARM Specific GTDT table Support + * + * Copyright (C) 2016, Linaro Ltd. + * Author: Daniel Lezcano daniel.lezcano@linaro.org + * Fu Wei fu.wei@linaro.org + * Hanjun Guo hanjun.guo@linaro.org + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. + */ + +#include <linux/acpi.h> +#include <linux/init.h> +#include <linux/kernel.h> + +#include <clocksource/arm_arch_timer.h> + +#undef pr_fmt +#define pr_fmt(fmt) "ACPI GTDT: " fmt + +struct acpi_gtdt_descriptor { + struct acpi_table_gtdt *gtdt; + void *gtdt_end; + unsigned int timer_block_count; + unsigned int watchdog_count; +}; + +static struct acpi_gtdt_descriptor acpi_gtdt_desc __initdata; +static struct acpi_gtdt_timer_block **timer_block __initdata; +static struct acpi_gtdt_watchdog **watchdog __initdata; + +static inline void *next_platform_timer(void *platform_timer) +{ + struct acpi_gtdt_header *gh = platform_timer; + + platform_timer += gh->length; + if (platform_timer < acpi_gtdt_desc.gtdt_end) + return platform_timer; + + return NULL; +} + +#define for_each_platform_timer(_g) for (; _g; _g = next_platform_timer(_g)) + +static inline bool is_timer_block(void *platform_timer) +{ + struct acpi_gtdt_header *gh = platform_timer; + + return gh->type == ACPI_GTDT_TYPE_TIMER_BLOCK; +} + +static inline bool is_watchdog(void *platform_timer) +{ + struct acpi_gtdt_header *gh = platform_timer; + + return gh->type == ACPI_GTDT_TYPE_WATCHDOG; +} + +static int __init map_gt_gsi(u32 interrupt, u32 flags) +{ + int trigger, polarity; + + trigger = (flags & ACPI_GTDT_INTERRUPT_MODE) ? ACPI_EDGE_SENSITIVE + : ACPI_LEVEL_SENSITIVE; + + polarity = (flags & ACPI_GTDT_INTERRUPT_POLARITY) ? ACPI_ACTIVE_LOW + : ACPI_ACTIVE_HIGH; + + return acpi_register_gsi(NULL, interrupt, trigger, polarity); +} + +/* + * Map the PPIs of per-cpu arch_timer. + * @type: the type of PPI + * Returns 0 if error. + * Note: Linux on arm64 isn't supported on the secure side. + * So we only handle the non-secure timer PPIs, + * ARCH_TIMER_PHYS_SECURE_PPI is treated as invalid type. + */ +int __init acpi_gtdt_map_ppi(int type) +{ + struct acpi_table_gtdt *gtdt = acpi_gtdt_desc.gtdt; + + switch (type) { + case ARCH_TIMER_PHYS_NONSECURE_PPI: + return map_gt_gsi(gtdt->non_secure_el1_interrupt, + gtdt->non_secure_el1_flags); + case ARCH_TIMER_VIRT_PPI: + return map_gt_gsi(gtdt->virtual_timer_interrupt, + gtdt->virtual_timer_flags); + + case ARCH_TIMER_HYP_PPI: + return map_gt_gsi(gtdt->non_secure_el2_interrupt, + gtdt->non_secure_el2_flags); + default: + pr_err("Failed to map timer interrupt: invalid type.\n"); + } + + return 0; +} + +/* + * acpi_gtdt_c3stop - got c3stop info from GTDT + * @type: the type of PPI + * Returns 1 if the timer is powered in deep idle state, 0 otherwise. + */ +bool __init acpi_gtdt_c3stop(int type) +{ + struct acpi_table_gtdt *gtdt = acpi_gtdt_desc.gtdt; + + switch (type) { + case ARCH_TIMER_PHYS_NONSECURE_PPI: + return !(gtdt->non_secure_el1_flags & ACPI_GTDT_ALWAYS_ON); + + case ARCH_TIMER_VIRT_PPI: + return !(gtdt->virtual_timer_flags & ACPI_GTDT_ALWAYS_ON); + + case ARCH_TIMER_HYP_PPI: + return !(gtdt->non_secure_el2_flags & ACPI_GTDT_ALWAYS_ON); + + default: + pr_err("Failed to get c3stop info: invalid type.\n"); + } + + return 0; +} + +/* + * Release the memory we have allocated in acpi_gtdt_init. + * This should be called, when the driver who called "acpi_gtdt_init" previously + * doesn't need the GTDT info anymore. + */ +void __init acpi_gtdt_release(void) +{ + kfree(timer_block); + kfree(watchdog); + timer_block = NULL; + watchdog = NULL; +} + +/* + * Get some basic info from GTDT table, and init the global variables above + * for all timers initialization of Generic Timer. + * This function does some validation on GTDT table. + */ +int __init acpi_gtdt_init(struct acpi_table_header *table) +{ + int timer_count; + void *platform_timer; + struct acpi_table_gtdt *gtdt; + + gtdt = container_of(table, struct acpi_table_gtdt, header); + + if (table->revision < 2) { + pr_debug("Revision:%d doesn't support Platform Timers.\n", + table->revision); + timer_count = 0; + } else if (!gtdt->platform_timer_count) { + pr_debug("No Platform Timer.\n"); + timer_count = 0; + } else { + timer_count = gtdt->platform_timer_count; + } + + acpi_gtdt_desc.gtdt = gtdt; + acpi_gtdt_desc.gtdt_end = (void *)table + table->length; + + if (!timer_count) + return 0; + + platform_timer = (void *)gtdt + gtdt->platform_timer_offset; + if (platform_timer < (void *)table + sizeof(struct acpi_table_gtdt)) { + pr_err(FW_BUG "Failed to retrieve timer info from firmware: invalid data.\n"); + return -EINVAL; + } + + timer_block = kcalloc(timer_count, + sizeof(struct acpi_gtdt_timer_block *), + GFP_KERNEL); + if (!timer_block) + return -ENOMEM; + + watchdog = kcalloc(timer_count, sizeof(struct acpi_gtdt_watchdog *), + GFP_KERNEL); + if (!watchdog) { + kfree(timer_block); + timer_block = NULL; + return -ENOMEM; + } + + acpi_gtdt_desc.timer_block_count = 0; + acpi_gtdt_desc.watchdog_count = 0; + for_each_platform_timer(platform_timer) { + if (is_timer_block(platform_timer)) { + timer_block[acpi_gtdt_desc.timer_block_count++] = + platform_timer; + } else if (is_watchdog(platform_timer)) { + watchdog[acpi_gtdt_desc.watchdog_count++] = + platform_timer; + } else { + pr_err(FW_BUG "Invalid platform timer type.\n"); + goto error; + } + } + + if (timer_count == acpi_gtdt_desc.watchdog_count + + acpi_gtdt_desc.timer_block_count) + return 0; + + pr_err(FW_BUG "Invalid platform timer number.\n"); +error: + acpi_gtdt_release(); + return -EINVAL; +} diff --git a/include/linux/acpi.h b/include/linux/acpi.h index 61a3d90..a1611d1 100644 --- a/include/linux/acpi.h +++ b/include/linux/acpi.h @@ -577,6 +577,13 @@ enum acpi_reconfig_event { int acpi_reconfig_notifier_register(struct notifier_block *nb); int acpi_reconfig_notifier_unregister(struct notifier_block *nb);
+#ifdef CONFIG_ACPI_GTDT +int acpi_gtdt_init(struct acpi_table_header *table); +int acpi_gtdt_map_ppi(int type); +bool acpi_gtdt_c3stop(int type); +void acpi_gtdt_release(void); +#endif + #else /* !CONFIG_ACPI */
#define acpi_disabled 1
From: Fu Wei fu.wei@linaro.org
The patch update arm_arch_timer driver to use the function provided by the new GTDT driver of ACPI. By this way, arm_arch_timer.c can be simplified, and separate all the ACPI GTDT knowledge from this timer driver.
Signed-off-by: Fu Wei fu.wei@linaro.org Signed-off-by: Hanjun Guo hanjun.guo@linaro.org --- drivers/clocksource/arm_arch_timer.c | 55 +++++++++++++----------------------- 1 file changed, 19 insertions(+), 36 deletions(-)
diff --git a/drivers/clocksource/arm_arch_timer.c b/drivers/clocksource/arm_arch_timer.c index a44e44d..653374c 100644 --- a/drivers/clocksource/arm_arch_timer.c +++ b/drivers/clocksource/arm_arch_timer.c @@ -1052,66 +1052,49 @@ static int __init arch_timer_mem_of_init(struct device_node *np) CLOCKSOURCE_OF_DECLARE(armv7_arch_timer_mem, "arm,armv7-timer-mem", arch_timer_mem_of_init);
-#ifdef CONFIG_ACPI -static int __init map_generic_timer_interrupt(u32 interrupt, u32 flags) -{ - int trigger, polarity; - - if (!interrupt) - return 0; - - trigger = (flags & ACPI_GTDT_INTERRUPT_MODE) ? ACPI_EDGE_SENSITIVE - : ACPI_LEVEL_SENSITIVE; - - polarity = (flags & ACPI_GTDT_INTERRUPT_POLARITY) ? ACPI_ACTIVE_LOW - : ACPI_ACTIVE_HIGH; - - return acpi_register_gsi(NULL, interrupt, trigger, polarity); -} - +#ifdef CONFIG_ACPI_GTDT /* Initialize per-processor generic timer */ static int __init arch_timer_acpi_init(struct acpi_table_header *table) { int ret; - struct acpi_table_gtdt *gtdt;
if (arch_timers_present & ARCH_TIMER_TYPE_CP15) { pr_warn("already initialized, skipping\n"); return -EINVAL; }
- gtdt = container_of(table, struct acpi_table_gtdt, header); - arch_timers_present |= ARCH_TIMER_TYPE_CP15;
- arch_timer_ppi[ARCH_TIMER_PHYS_SECURE_PPI] = - map_generic_timer_interrupt(gtdt->secure_el1_interrupt, - gtdt->secure_el1_flags); + ret = acpi_gtdt_init(table); + if (ret) { + pr_err("Failed to init GTDT table.\n"); + return ret; + }
arch_timer_ppi[ARCH_TIMER_PHYS_NONSECURE_PPI] = - map_generic_timer_interrupt(gtdt->non_secure_el1_interrupt, - gtdt->non_secure_el1_flags); + acpi_gtdt_map_ppi(ARCH_TIMER_PHYS_NONSECURE_PPI);
arch_timer_ppi[ARCH_TIMER_VIRT_PPI] = - map_generic_timer_interrupt(gtdt->virtual_timer_interrupt, - gtdt->virtual_timer_flags); + acpi_gtdt_map_ppi(ARCH_TIMER_VIRT_PPI);
arch_timer_ppi[ARCH_TIMER_HYP_PPI] = - map_generic_timer_interrupt(gtdt->non_secure_el2_interrupt, - gtdt->non_secure_el2_flags); - - /* Get the frequency from CNTFRQ */ - arch_timer_detect_rate(NULL, NULL); + acpi_gtdt_map_ppi(ARCH_TIMER_HYP_PPI);
ret = arch_timer_uses_ppi_init(); if (ret) - return ret; + goto error;
/* Always-on capability */ - arch_timer_c3stop = !(gtdt->non_secure_el1_flags & ACPI_GTDT_ALWAYS_ON); + arch_timer_c3stop = acpi_gtdt_c3stop(arch_timer_uses_ppi);
- arch_timer_init(); - return 0; + /* Get the frequency from CNTFRQ */ + arch_timer_detect_rate(NULL, NULL); + + ret = arch_timer_init(); + +error: + acpi_gtdt_release(); + return ret; } CLOCKSOURCE_ACPI_DECLARE(arch_timer, ACPI_SIG_GTDT, arch_timer_acpi_init); #endif
From: Fu Wei fu.wei@linaro.org
On platforms booting with ACPI, architected memory-mapped timers' configuration data is provided by firmware through the ACPI GTDT static table.
The clocksource architected timer kernel driver requires a firmware interface to collect timer configuration and configure its driver. this infrastructure is present for device tree systems, but it is missing on systems booting with ACPI.
Implement the kernel infrastructure required to parse the static ACPI GTDT table so that the architected timer clocksource driver can make use of it on systems booting with ACPI, therefore enabling the corresponding timers configuration.
Signed-off-by: Fu Wei fu.wei@linaro.org Signed-off-by: Hanjun Guo hanjun.guo@linaro.org --- drivers/acpi/arm64/gtdt.c | 95 +++++++++++++++++++++++++++++++++++++++++++++++ include/linux/acpi.h | 1 + 2 files changed, 96 insertions(+)
diff --git a/drivers/acpi/arm64/gtdt.c b/drivers/acpi/arm64/gtdt.c index 2de79aa..08d9506 100644 --- a/drivers/acpi/arm64/gtdt.c +++ b/drivers/acpi/arm64/gtdt.c @@ -51,6 +51,14 @@ static inline bool is_timer_block(void *platform_timer) return gh->type == ACPI_GTDT_TYPE_TIMER_BLOCK; }
+static inline struct acpi_gtdt_timer_block *get_timer_block(unsigned int index) +{ + if (index >= acpi_gtdt_desc.timer_block_count || !timer_block) + return NULL; + + return timer_block[index]; +} + static inline bool is_watchdog(void *platform_timer) { struct acpi_gtdt_header *gh = platform_timer; @@ -214,3 +222,90 @@ int __init acpi_gtdt_init(struct acpi_table_header *table) acpi_gtdt_release(); return -EINVAL; } + +/* + * Get ONE GT block info for memory-mapped timer from GTDT table. + * @data: the GT block data (parsing result) + * @index: the index number of GT block + * Note: we already verify @data in caller, it can't be NULL here. + * Returns 0 if success, -EINVAL/-ENODEV if error. + */ +int __init gtdt_arch_timer_mem_init(struct arch_timer_mem *data, + unsigned int index) +{ + struct acpi_gtdt_timer_block *block; + struct acpi_gtdt_timer_entry *frame; + int i; + + block = get_timer_block(index); + if (!block) + return -ENODEV; + + if (!block->timer_count) { + pr_err(FW_BUG "GT block present, but frame count is zero."); + return -ENODEV; + } + + if (block->timer_count > ARCH_TIMER_MEM_MAX_FRAMES) { + pr_err(FW_BUG "GT block lists %d frames, ACPI spec only allows 8\n", + block->timer_count); + return -EINVAL; + } + + data->cntctlbase = (phys_addr_t)block->block_address; + /* + * We can NOT get the size info from GTDT table, + * but according to "Table * CNTCTLBase memory map" of + * <ARM Architecture Reference Manual> for ARMv8, + * it should be 4KB(Offset 0x000 – 0xFFC). + */ + data->size = SZ_4K; + data->num_frames = block->timer_count; + + frame = (void *)block + block->timer_offset; + if (frame + block->timer_count != (void *)block + block->header.length) + return -EINVAL; + + /* + * Get the GT timer Frame data for every GT Block Timer + */ + for (i = 0; i < block->timer_count; i++, frame++) { + if (!frame->base_address || !frame->timer_interrupt) + return -EINVAL; + + data->frame[i].phys_irq = map_gt_gsi(frame->timer_interrupt, + frame->timer_flags); + if (data->frame[i].phys_irq <= 0) { + pr_warn("failed to map physical timer irq in frame %d.\n", + i); + return -EINVAL; + } + + if (frame->virtual_timer_interrupt) { + data->frame[i].virt_irq = + map_gt_gsi(frame->virtual_timer_interrupt, + frame->virtual_timer_flags); + if (data->frame[i].virt_irq <= 0) { + pr_warn("failed to map virtual timer irq in frame %d.\n", + i); + return -EINVAL; + } + } + + data->frame[i].frame_nr = frame->frame_number; + data->frame[i].cntbase = frame->base_address; + /* + * We can NOT get the size info from GTDT table, + * but according to "Table * CNTBaseN memory map" of + * <ARM Architecture Reference Manual> for ARMv8, + * it should be 4KB(Offset 0x000 – 0xFFC). + */ + data->frame[i].size = SZ_4K; + } + + if (acpi_gtdt_desc.timer_block_count) + pr_info("parsed No.%d of %d memory-mapped timer block(s).\n", + index, acpi_gtdt_desc.timer_block_count); + + return 0; +} diff --git a/include/linux/acpi.h b/include/linux/acpi.h index a1611d1..44b8c1b 100644 --- a/include/linux/acpi.h +++ b/include/linux/acpi.h @@ -582,6 +582,7 @@ int acpi_gtdt_init(struct acpi_table_header *table); int acpi_gtdt_map_ppi(int type); bool acpi_gtdt_c3stop(int type); void acpi_gtdt_release(void); +int gtdt_arch_timer_mem_init(struct arch_timer_mem *data, unsigned int index); #endif
#else /* !CONFIG_ACPI */
From: Fu Wei fu.wei@linaro.org
The patch add memory-mapped timer register support by using the information provided by the new GTDT driver of ACPI.
Signed-off-by: Fu Wei fu.wei@linaro.org --- drivers/clocksource/arm_arch_timer.c | 26 +++++++++++++++++++++++++- 1 file changed, 25 insertions(+), 1 deletion(-)
diff --git a/drivers/clocksource/arm_arch_timer.c b/drivers/clocksource/arm_arch_timer.c index 653374c..350d0b9 100644 --- a/drivers/clocksource/arm_arch_timer.c +++ b/drivers/clocksource/arm_arch_timer.c @@ -1053,7 +1053,28 @@ CLOCKSOURCE_OF_DECLARE(armv7_arch_timer_mem, "arm,armv7-timer-mem", arch_timer_mem_of_init);
#ifdef CONFIG_ACPI_GTDT -/* Initialize per-processor generic timer */ +static int __init arch_timer_mem_acpi_init(void) +{ + struct arch_timer_mem *timer_mem; + int ret = 0; + int i = 0; + + timer_mem = kzalloc(sizeof(*timer_mem), GFP_KERNEL); + if (!timer_mem) + return -ENOMEM; + + while (!gtdt_arch_timer_mem_init(timer_mem, i)) { + ret = arch_timer_mem_init(timer_mem); + if (ret) + break; + i++; + } + + kfree(timer_mem); + return ret; +} + +/* Initialize per-processor generic timer and memory-mapped timer(if present) */ static int __init arch_timer_acpi_init(struct acpi_table_header *table) { int ret; @@ -1090,6 +1111,9 @@ static int __init arch_timer_acpi_init(struct acpi_table_header *table) /* Get the frequency from CNTFRQ */ arch_timer_detect_rate(NULL, NULL);
+ if (arch_timer_mem_acpi_init()) + pr_err("Failed to initialize memory-mapped timer.\n"); + ret = arch_timer_init();
error:
From: Fu Wei fu.wei@linaro.org
This driver adds support for parsing SBSA Generic Watchdog timer in GTDT, parse all info in SBSA Generic Watchdog Structure in GTDT, and creating a platform device with that information.
This allows the operating system to obtain device data from the resource of platform device. The platform device named "sbsa-gwdt" can be used by the ARM SBSA Generic Watchdog driver.
Signed-off-by: Fu Wei fu.wei@linaro.org Signed-off-by: Hanjun Guo hanjun.guo@linaro.org Tested-by: Xiongfeng Wang wangxiongfeng2@huawei.com --- drivers/acpi/arm64/gtdt.c | 100 ++++++++++++++++++++++++++++++++++++++++++++++ drivers/watchdog/Kconfig | 1 + 2 files changed, 101 insertions(+)
diff --git a/drivers/acpi/arm64/gtdt.c b/drivers/acpi/arm64/gtdt.c index 08d9506..69483f6 100644 --- a/drivers/acpi/arm64/gtdt.c +++ b/drivers/acpi/arm64/gtdt.c @@ -14,6 +14,7 @@ #include <linux/acpi.h> #include <linux/init.h> #include <linux/kernel.h> +#include <linux/platform_device.h>
#include <clocksource/arm_arch_timer.h>
@@ -66,6 +67,14 @@ static inline bool is_watchdog(void *platform_timer) return gh->type == ACPI_GTDT_TYPE_WATCHDOG; }
+static inline struct acpi_gtdt_watchdog *get_watchdog(unsigned int index) +{ + if (index >= acpi_gtdt_desc.watchdog_count || !watchdog) + return NULL; + + return watchdog[index]; +} + static int __init map_gt_gsi(u32 interrupt, u32 flags) { int trigger, polarity; @@ -309,3 +318,94 @@ int __init gtdt_arch_timer_mem_init(struct arch_timer_mem *data,
return 0; } + +/* + * Initialize a SBSA generic Watchdog platform device info from GTDT + */ +static int __init gtdt_import_sbsa_gwdt(struct acpi_gtdt_watchdog *wd, + int index) +{ + struct platform_device *pdev; + int irq = map_gt_gsi(wd->timer_interrupt, wd->timer_flags); + int no_irq = 1; + + /* + * According to SBSA specification the size of refresh and control + * frames of SBSA Generic Watchdog is SZ_4K(Offset 0x000 – 0xFFF). + */ + struct resource res[] = { + DEFINE_RES_MEM(wd->control_frame_address, SZ_4K), + DEFINE_RES_MEM(wd->refresh_frame_address, SZ_4K), + DEFINE_RES_IRQ(irq), + }; + + pr_debug("found a Watchdog (0x%llx/0x%llx gsi:%u flags:0x%x).\n", + wd->refresh_frame_address, wd->control_frame_address, + wd->timer_interrupt, wd->timer_flags); + + if (!(wd->refresh_frame_address && wd->control_frame_address)) { + pr_err(FW_BUG "failed to get the Watchdog base address.\n"); + return -EINVAL; + } + + if (!wd->timer_interrupt) + pr_warn(FW_BUG "failed to get the Watchdog interrupt.\n"); + else if (irq <= 0) + pr_warn("failed to map the Watchdog interrupt.\n"); + else + no_irq = 0; + + /* + * Add a platform device named "sbsa-gwdt" to match the platform driver. + * "sbsa-gwdt": SBSA(Server Base System Architecture) Generic Watchdog + * The platform driver (like drivers/watchdog/sbsa_gwdt.c)can get device + * info below by matching this name. + */ + pdev = platform_device_register_simple("sbsa-gwdt", index, res, + ARRAY_SIZE(res) - no_irq); + if (IS_ERR(pdev)) { + acpi_unregister_gsi(wd->timer_interrupt); + return PTR_ERR(pdev); + } + + return 0; +} + +static int __init gtdt_sbsa_gwdt_init(void) +{ + int i, ret; + struct acpi_table_header *table; + struct acpi_gtdt_watchdog *watchdog; + + if (acpi_disabled) + return 0; + + if (ACPI_FAILURE(acpi_get_table(ACPI_SIG_GTDT, 0, &table))) + return -EINVAL; + + ret = acpi_gtdt_init(table); + if (ret) + return ret; + + if (!acpi_gtdt_desc.watchdog_count) + return 0; + + for (i = 0; i < acpi_gtdt_desc.watchdog_count; i++) { + watchdog = get_watchdog(i); + if (!watchdog) { + ret = -ENODEV; + break; + } + ret = gtdt_import_sbsa_gwdt(watchdog, i); + if (ret) + break; + } + + pr_info("found %d SBSA generic Watchdog(s), %d imported.\n", + acpi_gtdt_desc.watchdog_count, i); + + acpi_gtdt_release(); + return ret; +} + +device_initcall(gtdt_sbsa_gwdt_init); diff --git a/drivers/watchdog/Kconfig b/drivers/watchdog/Kconfig index fdd3228..e5ba1f0 100644 --- a/drivers/watchdog/Kconfig +++ b/drivers/watchdog/Kconfig @@ -218,6 +218,7 @@ config ARM_SBSA_WATCHDOG tristate "ARM SBSA Generic Watchdog" depends on ARM64 depends on ARM_ARCH_TIMER + depends on ACPI_GTDT || !ACPI select WATCHDOG_CORE help ARM SBSA Generic Watchdog has two stage timeouts:
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Fu Wei -
fu.wei＠linaro.org
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kbuild test robot