Include the correct definitions for gic_acpi_init() when building with CONFIG_ACPI=n.
Signed-off-by: Ashwin Chaugule ashwin.chaugule@linaro.org --- arch/arm64/kernel/irq.c | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-)
diff --git a/arch/arm64/kernel/irq.c b/arch/arm64/kernel/irq.c index a99bfc7..9ea35113 100644 --- a/arch/arm64/kernel/irq.c +++ b/arch/arm64/kernel/irq.c @@ -25,11 +25,12 @@ #include <linux/irq.h> #include <linux/smp.h> #include <linux/init.h> -#include <linux/acpi.h> #include <linux/irqchip.h> #include <linux/seq_file.h> #include <linux/ratelimit.h>
+#include <asm/acpi.h> + unsigned long irq_err_count;
int arch_show_interrupts(struct seq_file *p, int prec)
Except for getting the enable_method, the rest of the operations are similar for DT and ACPI and thus can be unified.
Signed-off-by: Ashwin Chaugule ashwin.chaugule@linaro.org --- arch/arm64/include/asm/cpu_ops.h | 2 +- arch/arm64/kernel/cpu_ops.c | 96 +++++++++++++++------------------------- arch/arm64/kernel/smp.c | 4 +- 3 files changed, 38 insertions(+), 64 deletions(-)
diff --git a/arch/arm64/include/asm/cpu_ops.h b/arch/arm64/include/asm/cpu_ops.h index 14e5fc7..1524130 100644 --- a/arch/arm64/include/asm/cpu_ops.h +++ b/arch/arm64/include/asm/cpu_ops.h @@ -59,7 +59,7 @@ struct cpu_operations { };
extern const struct cpu_operations *cpu_ops[NR_CPUS]; -extern int __init cpu_of_read_ops(struct device_node *dn, int cpu); +extern int __init cpu_read_ops(struct device_node *dn, int cpu); extern void __init cpu_read_bootcpu_ops(void);
#endif /* ifndef __ASM_CPU_OPS_H */ diff --git a/arch/arm64/kernel/cpu_ops.c b/arch/arm64/kernel/cpu_ops.c index c93ae18..b0274e8 100644 --- a/arch/arm64/kernel/cpu_ops.c +++ b/arch/arm64/kernel/cpu_ops.c @@ -44,36 +44,8 @@ static const struct cpu_operations * __init cpu_get_ops(const char *name) return *ops;
ops++; - } - - return NULL; -} - -/* - * Read a cpu's enable method from the device tree and record it in cpu_ops. - */ -int __init cpu_of_read_ops(struct device_node *dn, int cpu) -{ - const char *enable_method = of_get_property(dn, "enable-method", NULL); - if (!enable_method) { - /* - * The boot CPU may not have an enable method (e.g. when - * spin-table is used for secondaries). Don't warn spuriously. - */ - if (cpu != 0) - pr_err("%s: missing enable-method property\n", - dn->full_name); - return -ENOENT; - } - - cpu_ops[cpu] = cpu_get_ops(enable_method); - if (!cpu_ops[cpu]) { - pr_warn("%s: unsupported enable-method property: %s\n", - dn->full_name, enable_method); - return -EOPNOTSUPP; - } - - return 0; + } + return NULL; }
#ifdef CONFIG_ACPI @@ -88,42 +60,44 @@ static const char *cpu_acpi_get_enable_method(int cpu) { return "psci"; } - -/* - * Read a cpu's enable method in the ACPI way and record it in cpu_ops. - */ -int __init cpu_acpi_read_ops(int cpu) +#else +static const char *cpu_acpi_get_enable_method(int cpu) { - const char *enable_method = cpu_acpi_get_enable_method(cpu); - if (!enable_method) { - /* - * The boot CPU may not have an enable method (e.g. when - * spin-table is used for secondaries). Don't warn spuriously. - */ - if (cpu != 0) - pr_err("Missing enable-method property for boot cpu\n"); - return -ENOENT; - } - - cpu_ops[cpu] = cpu_get_ops(enable_method); - if (!cpu_ops[cpu]) { - pr_warn("CPU %d: unsupported enable-method property: %s\n", - cpu, enable_method); - return -EOPNOTSUPP; - } - - return 0; + return NULL; } #endif
+int __init cpu_read_ops(struct device_node *dn, int cpu) +{ + const char *enable_method = NULL; + /* If you get a valid dn, then we're using OF, else ACPI. */ + if (dn) + enable_method = of_get_property(dn, "enable-method", NULL); + else + enable_method = cpu_acpi_get_enable_method(cpu); + + if (!enable_method) { + /* + * The boot CPU may not have an enable method (e.g. when + * spin-table is used for secondaries). Don't warn spuriously. + */ + if (cpu != 0) + pr_err("Missing enable-method property for boot cpu\n"); + return -ENOENT; + } + + cpu_ops[cpu] = cpu_get_ops(enable_method); + if (!cpu_ops[cpu]) { + pr_warn("CPU %d: unsupported enable-method property: %s\n", + cpu, enable_method); + return -EOPNOTSUPP; + } + return 0; +} +
void __init cpu_read_bootcpu_ops(void) { - struct device_node *dn = of_get_cpu_node(0, NULL); - if (dn) { - cpu_of_read_ops(dn, 0); - return; - } - - cpu_acpi_read_ops(0); + struct device_node *dn = of_get_cpu_node(0, NULL); + cpu_read_ops(dn, 0); } diff --git a/arch/arm64/kernel/smp.c b/arch/arm64/kernel/smp.c index e6ed0cc..78b49dd 100644 --- a/arch/arm64/kernel/smp.c +++ b/arch/arm64/kernel/smp.c @@ -351,7 +351,7 @@ static int __init of_smp_init_cpus(void) if (cpu >= NR_CPUS) goto next;
- if (cpu_of_read_ops(dn, cpu) != 0) + if (cpu_read_ops(dn, cpu) != 0) goto next;
if (cpu_ops[cpu]->cpu_init(dn, cpu)) @@ -475,7 +475,7 @@ acpi_smp_parse_madt(struct acpi_subtable_header *header, const unsigned long end if (cpu >= NR_CPUS) continue;
- if (cpu_acpi_read_ops(cpu) != 0) + if (cpu_read_ops(NULL, cpu) != 0) continue;
if (cpu_ops[cpu]->cpu_init(NULL, cpu))
If we decide to stay with v2 in acpi-mainline-core, then:
Acked-by: Tomasz Nowicki tomasz.nowicki@linaro.org
On 12.03.2014 04:30, Ashwin Chaugule wrote:
Except for getting the enable_method, the rest of the operations are similar for DT and ACPI and thus can be unified.
Signed-off-by: Ashwin Chaugule ashwin.chaugule@linaro.org
arch/arm64/include/asm/cpu_ops.h | 2 +- arch/arm64/kernel/cpu_ops.c | 96 +++++++++++++++------------------------- arch/arm64/kernel/smp.c | 4 +- 3 files changed, 38 insertions(+), 64 deletions(-)
diff --git a/arch/arm64/include/asm/cpu_ops.h b/arch/arm64/include/asm/cpu_ops.h index 14e5fc7..1524130 100644 --- a/arch/arm64/include/asm/cpu_ops.h +++ b/arch/arm64/include/asm/cpu_ops.h @@ -59,7 +59,7 @@ struct cpu_operations { };
extern const struct cpu_operations *cpu_ops[NR_CPUS]; -extern int __init cpu_of_read_ops(struct device_node *dn, int cpu); +extern int __init cpu_read_ops(struct device_node *dn, int cpu); extern void __init cpu_read_bootcpu_ops(void);
#endif /* ifndef __ASM_CPU_OPS_H */ diff --git a/arch/arm64/kernel/cpu_ops.c b/arch/arm64/kernel/cpu_ops.c index c93ae18..b0274e8 100644 --- a/arch/arm64/kernel/cpu_ops.c +++ b/arch/arm64/kernel/cpu_ops.c @@ -44,36 +44,8 @@ static const struct cpu_operations * __init cpu_get_ops(const char *name) return *ops;
ops++;
- }
- return NULL;
-}
-/*
- Read a cpu's enable method from the device tree and record it in cpu_ops.
- */
-int __init cpu_of_read_ops(struct device_node *dn, int cpu) -{
- const char *enable_method = of_get_property(dn, "enable-method", NULL);
- if (!enable_method) {
/*
* The boot CPU may not have an enable method (e.g. when
* spin-table is used for secondaries). Don't warn spuriously.
*/
if (cpu != 0)
pr_err("%s: missing enable-method property\n",
dn->full_name);
return -ENOENT;
- }
- cpu_ops[cpu] = cpu_get_ops(enable_method);
- if (!cpu_ops[cpu]) {
pr_warn("%s: unsupported enable-method property: %s\n",
dn->full_name, enable_method);
return -EOPNOTSUPP;
- }
- return 0;
}
return NULL; }
#ifdef CONFIG_ACPI
@@ -88,42 +60,44 @@ static const char *cpu_acpi_get_enable_method(int cpu) { return "psci"; }
-/*
- Read a cpu's enable method in the ACPI way and record it in cpu_ops.
- */
-int __init cpu_acpi_read_ops(int cpu) +#else +static const char *cpu_acpi_get_enable_method(int cpu) {
- const char *enable_method = cpu_acpi_get_enable_method(cpu);
- if (!enable_method) {
/*
* The boot CPU may not have an enable method (e.g. when
* spin-table is used for secondaries). Don't warn spuriously.
*/
if (cpu != 0)
pr_err("Missing enable-method property for boot cpu\n");
return -ENOENT;
- }
- cpu_ops[cpu] = cpu_get_ops(enable_method);
- if (!cpu_ops[cpu]) {
pr_warn("CPU %d: unsupported enable-method property: %s\n",
cpu, enable_method);
return -EOPNOTSUPP;
- }
- return 0;
- return NULL; } #endif
+int __init cpu_read_ops(struct device_node *dn, int cpu) +{
- const char *enable_method = NULL;
- /* If you get a valid dn, then we're using OF, else ACPI. */
- if (dn)
enable_method = of_get_property(dn, "enable-method", NULL);
- else
enable_method = cpu_acpi_get_enable_method(cpu);
- if (!enable_method) {
/*
* The boot CPU may not have an enable method (e.g. when
* spin-table is used for secondaries). Don't warn spuriously.
*/
if (cpu != 0)
pr_err("Missing enable-method property for boot cpu\n");
return -ENOENT;
- }
- cpu_ops[cpu] = cpu_get_ops(enable_method);
- if (!cpu_ops[cpu]) {
pr_warn("CPU %d: unsupported enable-method property: %s\n",
cpu, enable_method);
return -EOPNOTSUPP;
- }
- return 0;
+}
void __init cpu_read_bootcpu_ops(void) {
- struct device_node *dn = of_get_cpu_node(0, NULL);
- if (dn) {
cpu_of_read_ops(dn, 0);
return;
- }
- cpu_acpi_read_ops(0);
- struct device_node *dn = of_get_cpu_node(0, NULL);
- cpu_read_ops(dn, 0); }
diff --git a/arch/arm64/kernel/smp.c b/arch/arm64/kernel/smp.c index e6ed0cc..78b49dd 100644 --- a/arch/arm64/kernel/smp.c +++ b/arch/arm64/kernel/smp.c @@ -351,7 +351,7 @@ static int __init of_smp_init_cpus(void) if (cpu >= NR_CPUS) goto next;
if (cpu_of_read_ops(dn, cpu) != 0)
if (cpu_read_ops(dn, cpu) != 0) goto next;
if (cpu_ops[cpu]->cpu_init(dn, cpu))
@@ -475,7 +475,7 @@ acpi_smp_parse_madt(struct acpi_subtable_header *header, const unsigned long end if (cpu >= NR_CPUS) continue;
if (cpu_acpi_read_ops(cpu) != 0)
if (cpu_read_ops(NULL, cpu) != 0) continue;
if (cpu_ops[cpu]->cpu_init(NULL, cpu))
Hi Ashwin,
On 2014-3-12 11:30, Ashwin Chaugule wrote:
Include the correct definitions for gic_acpi_init() when building with CONFIG_ACPI=n.
Signed-off-by: Ashwin Chaugule ashwin.chaugule@linaro.org
arch/arm64/kernel/irq.c | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-)
diff --git a/arch/arm64/kernel/irq.c b/arch/arm64/kernel/irq.c
Which git repo of this patch set based on?
Thanks Hanjun
On Wed, Mar 12, 2014 at 04:17:21PM +0800, Hanjun Guo wrote:
Hi Ashwin,
On 2014-3-12 11:30, Ashwin Chaugule wrote:
Include the correct definitions for gic_acpi_init() when building with CONFIG_ACPI=n.
Signed-off-by: Ashwin Chaugule ashwin.chaugule@linaro.org
arch/arm64/kernel/irq.c | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-)
diff --git a/arch/arm64/kernel/irq.c b/arch/arm64/kernel/irq.c
Which git repo of this patch set based on?
Hi Hanjun, Tomasz,
Do you guys have an ETA on the next version of your patchset, I get feeling you have already covered some of the changes Ashwin made.
Would be good to get a newer version into acpi-mainline-core ASAP.
Thanks
Graeme
On 2014年03月12日 17:04, Graeme Gregory wrote:
On Wed, Mar 12, 2014 at 04:17:21PM +0800, Hanjun Guo wrote:
Hi Ashwin,
On 2014-3-12 11:30, Ashwin Chaugule wrote:
Include the correct definitions for gic_acpi_init() when building with CONFIG_ACPI=n.
Signed-off-by: Ashwin Chaugule ashwin.chaugule@linaro.org
arch/arm64/kernel/irq.c | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-)
diff --git a/arch/arm64/kernel/irq.c b/arch/arm64/kernel/irq.c
Which git repo of this patch set based on?
Hi Hanjun, Tomasz,
Do you guys have an ETA on the next version of your patchset, I get feeling you have already covered some of the changes Ashwin made.
Would be good to get a newer version into acpi-mainline-core ASAP.
Yes, we have a newer version, but haven't finished yet, My thinking is that we update the patches according to the new proposals to ASWG and send them out internally for review, how do you think about that?
Thanks Hanjun
On Wed, Mar 12, 2014 at 05:16:24PM +0800, Hanjun Guo wrote:
On 2014年03月12日 17:04, Graeme Gregory wrote:
On Wed, Mar 12, 2014 at 04:17:21PM +0800, Hanjun Guo wrote:
Hi Ashwin,
On 2014-3-12 11:30, Ashwin Chaugule wrote:
Include the correct definitions for gic_acpi_init() when building with CONFIG_ACPI=n.
Signed-off-by: Ashwin Chaugule ashwin.chaugule@linaro.org
arch/arm64/kernel/irq.c | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-)
diff --git a/arch/arm64/kernel/irq.c b/arch/arm64/kernel/irq.c
Which git repo of this patch set based on?
Hi Hanjun, Tomasz,
Do you guys have an ETA on the next version of your patchset, I get feeling you have already covered some of the changes Ashwin made.
Would be good to get a newer version into acpi-mainline-core ASAP.
Yes, we have a newer version, but haven't finished yet, My thinking is that we update the patches according to the new proposals to ASWG and send them out internally for review, how do you think about that?
Hi Hanjun,
I think we need a version first which we can update acpi-mainline-core with. Basically a latest version of what we currently have. Then we can work on proto type changes.
Graeme
On Wed, Mar 12, 2014 at 09:29:47AM +0000, Graeme Gregory wrote:
On Wed, Mar 12, 2014 at 05:16:24PM +0800, Hanjun Guo wrote:
On 2014年03月12日 17:04, Graeme Gregory wrote:
On Wed, Mar 12, 2014 at 04:17:21PM +0800, Hanjun Guo wrote:
Hi Ashwin,
On 2014-3-12 11:30, Ashwin Chaugule wrote:
Include the correct definitions for gic_acpi_init() when building with CONFIG_ACPI=n.
Signed-off-by: Ashwin Chaugule ashwin.chaugule@linaro.org
arch/arm64/kernel/irq.c | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-)
diff --git a/arch/arm64/kernel/irq.c b/arch/arm64/kernel/irq.c
Which git repo of this patch set based on?
Hi Hanjun, Tomasz,
Do you guys have an ETA on the next version of your patchset, I get feeling you have already covered some of the changes Ashwin made.
Would be good to get a newer version into acpi-mainline-core ASAP.
Yes, we have a newer version, but haven't finished yet, My thinking is that we update the patches according to the new proposals to ASWG and send them out internally for review, how do you think about that?
Hi Hanjun,
I think we need a version first which we can update acpi-mainline-core with. Basically a latest version of what we currently have. Then we can work on proto type changes.
Just to clarify I don't mean we need to send these upstream, just that we need to update the git repo.
Graeme
On 2014-3-12 17:30, Graeme Gregory wrote:
On Wed, Mar 12, 2014 at 09:29:47AM +0000, Graeme Gregory wrote:
On Wed, Mar 12, 2014 at 05:16:24PM +0800, Hanjun Guo wrote:
On 2014年03月12日 17:04, Graeme Gregory wrote:
On Wed, Mar 12, 2014 at 04:17:21PM +0800, Hanjun Guo wrote:
Hi Ashwin,
On 2014-3-12 11:30, Ashwin Chaugule wrote:
Include the correct definitions for gic_acpi_init() when building with CONFIG_ACPI=n.
Signed-off-by: Ashwin Chaugule ashwin.chaugule@linaro.org
arch/arm64/kernel/irq.c | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-)
diff --git a/arch/arm64/kernel/irq.c b/arch/arm64/kernel/irq.c
Which git repo of this patch set based on?
Hi Hanjun, Tomasz,
Do you guys have an ETA on the next version of your patchset, I get feeling you have already covered some of the changes Ashwin made.
Would be good to get a newer version into acpi-mainline-core ASAP.
Yes, we have a newer version, but haven't finished yet, My thinking is that we update the patches according to the new proposals to ASWG and send them out internally for review, how do you think about that?
Hi Hanjun,
I think we need a version first which we can update acpi-mainline-core with. Basically a latest version of what we currently have. Then we can work on proto type changes.
Just to clarify I don't mean we need to send these upstream, just that we need to update the git repo.
I think we can merge Ashwin's patches into acpi-mainline-core and leave alone the new version of patches, you know, v2 patches are still working, is that ok?
Thanks Hanjun
I don't think right now we can merge it. Since the git repo is read only. When the IT fix the issue, we can consider the request.
-Regards Naresh
On 12 March 2014 15:50, Hanjun Guo hanjun.guo@linaro.org wrote:
On 2014-3-12 17:30, Graeme Gregory wrote:
On Wed, Mar 12, 2014 at 09:29:47AM +0000, Graeme Gregory wrote:
On Wed, Mar 12, 2014 at 05:16:24PM +0800, Hanjun Guo wrote:
On 2014年03月12日 17:04, Graeme Gregory wrote:
On Wed, Mar 12, 2014 at 04:17:21PM +0800, Hanjun Guo wrote:
Hi Ashwin,
On 2014-3-12 11:30, Ashwin Chaugule wrote: > Include the correct definitions for gic_acpi_init() > when building with CONFIG_ACPI=n. > > Signed-off-by: Ashwin Chaugule ashwin.chaugule@linaro.org > --- > arch/arm64/kernel/irq.c | 3 ++- > 1 file changed, 2 insertions(+), 1 deletion(-) > > diff --git a/arch/arm64/kernel/irq.c b/arch/arm64/kernel/irq.c Which git repo of this patch set based on?
Hi Hanjun, Tomasz,
Do you guys have an ETA on the next version of your patchset, I get feeling you have already covered some of the changes Ashwin made.
Would be good to get a newer version into acpi-mainline-core ASAP.
Yes, we have a newer version, but haven't finished yet, My thinking is that we update the patches according to the new proposals to ASWG and send them out internally for review, how do you think about that?
Hi Hanjun,
I think we need a version first which we can update acpi-mainline-core with. Basically a latest version of what we currently have. Then we can work on proto type changes.
Just to clarify I don't mean we need to send these upstream, just that we need to update the git repo.
I think we can merge Ashwin's patches into acpi-mainline-core and leave alone the new version of patches, you know, v2 patches are still working, is that ok?
Thanks Hanjun
Linaro-acpi mailing list Linaro-acpi@lists.linaro.org http://lists.linaro.org/mailman/listinfo/linaro-acpi
On Wed, Mar 12, 2014 at 06:20:05PM +0800, Hanjun Guo wrote:
On 2014-3-12 17:30, Graeme Gregory wrote:
On Wed, Mar 12, 2014 at 09:29:47AM +0000, Graeme Gregory wrote:
On Wed, Mar 12, 2014 at 05:16:24PM +0800, Hanjun Guo wrote:
On 2014年03月12日 17:04, Graeme Gregory wrote:
On Wed, Mar 12, 2014 at 04:17:21PM +0800, Hanjun Guo wrote:
Hi Ashwin,
On 2014-3-12 11:30, Ashwin Chaugule wrote: > Include the correct definitions for gic_acpi_init() > when building with CONFIG_ACPI=n. > > Signed-off-by: Ashwin Chaugule ashwin.chaugule@linaro.org > --- > arch/arm64/kernel/irq.c | 3 ++- > 1 file changed, 2 insertions(+), 1 deletion(-) > > diff --git a/arch/arm64/kernel/irq.c b/arch/arm64/kernel/irq.c Which git repo of this patch set based on?
Hi Hanjun, Tomasz,
Do you guys have an ETA on the next version of your patchset, I get feeling you have already covered some of the changes Ashwin made.
Would be good to get a newer version into acpi-mainline-core ASAP.
Yes, we have a newer version, but haven't finished yet, My thinking is that we update the patches according to the new proposals to ASWG and send them out internally for review, how do you think about that?
Hi Hanjun,
I think we need a version first which we can update acpi-mainline-core with. Basically a latest version of what we currently have. Then we can work on proto type changes.
Just to clarify I don't mean we need to send these upstream, just that we need to update the git repo.
I think we can merge Ashwin's patches into acpi-mainline-core and leave alone the new version of patches, you know, v2 patches are still working, is that ok?
Ok if you think there are no substansive changes we should make public before we are forced into this "dark" period.
Graeme
On 12.03.2014 10:16, Hanjun Guo wrote:
On 2014年03月12日 17:04, Graeme Gregory wrote:
On Wed, Mar 12, 2014 at 04:17:21PM +0800, Hanjun Guo wrote:
Hi Ashwin,
On 2014-3-12 11:30, Ashwin Chaugule wrote:
Include the correct definitions for gic_acpi_init() when building with CONFIG_ACPI=n.
Signed-off-by: Ashwin Chaugule ashwin.chaugule@linaro.org
arch/arm64/kernel/irq.c | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-)
diff --git a/arch/arm64/kernel/irq.c b/arch/arm64/kernel/irq.c
Which git repo of this patch set based on?
Hi Hanjun, Tomasz,
Do you guys have an ETA on the next version of your patchset, I get feeling you have already covered some of the changes Ashwin made.
Would be good to get a newer version into acpi-mainline-core ASAP.
Yes, we have a newer version, but haven't finished yet, My thinking is that we update the patches according to the new proposals to ASWG and send them out internally for review, how do you think about that?
Right, agree with Hanjun. Also, we will pull Ashwin patches to the next version if those will be applicable.
Tomasz
On 12 March 2014 04:17, Hanjun Guo hanjun.guo@linaro.org wrote:
Hi Ashwin,
Hi Hanjun,
On 2014-3-12 11:30, Ashwin Chaugule wrote:
Include the correct definitions for gic_acpi_init() when building with CONFIG_ACPI=n.
Signed-off-by: Ashwin Chaugule ashwin.chaugule@linaro.org
arch/arm64/kernel/irq.c | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-)
diff --git a/arch/arm64/kernel/irq.c b/arch/arm64/kernel/irq.c
Which git repo of this patch set based on?
Based off of acpi.git acpi-core, but tested on leg-kernel tip.
Cheers, Ashwin