Linaro-acpi November 2013

linaro-acpi@lists.linaro.org

21 participants
48 discussions

[PATCH] armv8, pmu: Remove unnecessary #ifdef CONFIG_ACPI

by Tomasz Nowicki

Internally include file and ACPI_PTR are already protected in the case of #ifndef CONFIG_ACPI so we don't need these checks. --- arch/arm64/kernel/perf_event.c | 4 ---- 1 file changed, 4 deletions(-) diff --git a/arch/arm64/kernel/perf_event.c b/arch/arm64/kernel/perf_event.c index 460f158..85e6e3a 100644 --- a/arch/arm64/kernel/perf_event.c +++ b/arch/arm64/kernel/perf_event.c @@ -28,9 +28,7 @@ #include <linux/platform_device.h> #include <linux/spinlock.h> #include <linux/uaccess.h> -#ifdef CONFIG_ACPI #include <linux/acpi.h> -#endif #include <asm/cputype.h> #include <asm/irq.h> @@ -1255,9 +1253,7 @@ static struct platform_driver armpmu_driver = { .driver = { .name = "arm-pmu", .of_match_table = armpmu_of_device_ids, -#ifdef CONFIG_ACPI .acpi_match_table = ACPI_PTR(armpmu_acpi_match), -#endif }, .probe = armpmu_device_probe, }; -- 1.7.9.5

10 years, 5 months

[PATCH 0/4] ACPI/ARM: AMBA bus ACPI module

by Brandon Anderson

This patch series requires the fixed-clock patches from Hanjun Guo. Provides an ACPI module to probe ARM AMBA devices that have a hardware ID, which is used with struct amba_device to match up the appropriate driver. See required DSDT definition format below. Brandon Anderson (4): early fixed-clock AMBA bus ACPI implementation Add ACPI to AMBA SPI driver remove unneeded sections of DTS definition arch/arm64/boot/dts/foundation-v8-acpi.dts | 10 +- arch/arm64/boot/dts/rtsm_ve-aemv8a-acpi.dts | 4 + arch/arm64/boot/dts/rtsm_ve-motherboard-acpi.dtsi | 8 + drivers/acpi/acpi_platform.c | 2 + drivers/amba/Makefile | 2 +- drivers/amba/acpi.c | 339 +++++++++++++++++++++ drivers/clk/clk-fixed-rate.c | 2 +- drivers/spi/spi-pl022.c | 49 +++ include/linux/amba/acpi.h | 29 ++ 9 files changed, 440 insertions(+), 5 deletions(-) create mode 100644 drivers/amba/acpi.c create mode 100644 include/linux/amba/acpi.h -- 1.7.9.5 ----------- diff --git a/platforms/rtsm_ve-aemv8a.acpi/dsdt.asl b/platforms/rtsm_ve-aemv8a.acpi/dsdt.asl index 0bcc94d..64e84a4 100644 --- a/platforms/rtsm_ve-aemv8a.acpi/dsdt.asl +++ b/platforms/rtsm_ve-aemv8a.acpi/dsdt.asl @@ -252,6 +252,33 @@ DefinitionBlock ( } } + Device (CLK0) { + Name (_HID, "LINA0008") + Name (_UID, 0) + + Method (FREQ, 0x0, NotSerialized) { + Return (24000000) + } + } + + Device (CLK1) { + Name (_HID, "LINA0008") + Name (_UID, 1) + + Method (FREQ, 0x0, NotSerialized) { + Return (1000000) + } + } + + Device (CLK2) { + Name (_HID, "LINA0008") + Name (_UID, 2) + + Method (FREQ, 0x0, NotSerialized) { + Return (32768) + } + } + Device (PMU0) { Name (_HID, "LINA0007") Name (_UID, 0) @@ -263,5 +290,229 @@ DefinitionBlock ( Return (RBUF) } } + + Method (DTGP, 5, NotSerialized) + { + If (LEqual (Arg0, Buffer (0x10) + { + /* UUID: a706b112-bf0b-48d2-9fa3-95591a3c4c06 */ + /* 0000 */ 0xa7, 0x06, 0xb1, 0x12, 0xbf, 0x0b, 0x48, 0xd2, + /* 0008 */ 0x9f, 0xa3, 0x95, 0x59, 0x1a, 0x3c, 0x4c, 0x06 + })) + { + If (LEqual (Arg1, 0x01)) + { + If (LEqual (Arg2, 0x00)) + { + Store (Buffer (0x01) + { + 0x03 + }, Arg4) + Return (0x01) + } + + If (LEqual (Arg2, 0x01)) + { + Return (0x01) + } + } + } + + Store (Buffer (0x01) + { + 0x00 + }, Arg4) + Return (0x00) + } + + Device (AMBA) { + Name (_HID, "AMBA0000") /* the parallel to "arm,primecell" in DTS */ + Name (_UID, 0) + + /* Define 'apb_pclk' as a default clock source since it is + common with devices below */ + Method(_DSM, 4, NotSerialized) { + Store (Package (2) + { + "clock-name", "apb_pclk \\_SB.CLK0", + }, Local0) + + DTGP (Arg0, Arg1, Arg2, Arg3, RefOf (Local0)) + + Return (Local0) + } + + Device (SCT0) { + Name (_ADR, 0x1c020000) /* SYSCTL */ + Method (_CRS, 0x0, Serialized) { + Name (RBUF, ResourceTemplate () { + Memory32Fixed (ReadWrite, 0x1c020000, 0x00001000) + }) + Return (RBUF) + } + Method(_DSM, 4, Serialized) { + Store (Package (4) + { + "clock-name", "refclk \\_SB.CLK2", + "clock-name", "timclk \\_SB.CLK1", + }, Local0) + + DTGP (Arg0, Arg1, Arg2, Arg3, RefOf (Local0)) + + Return (Local0) + } + } + + Device (KMI0) { + Name (_ADR, 0x1c060000) + Method (_CRS, 0x0, Serialized) { + Name (RBUF, ResourceTemplate () { + Memory32Fixed (ReadWrite, 0x1c060000, 0x00001000) + Interrupt (ResourceConsumer, Edge, ActiveBoth, + Exclusive, , , ) {44} + }) + Return (RBUF) + } + Method(_DSM, 4, Serialized) { + Store (Package (2) + { + "clock-name", "KMIREFCLK \\_SB.CLK0", + }, Local0) + + DTGP (Arg0, Arg1, Arg2, Arg3, RefOf (Local0)) + + Return (Local0) + } + } + + Device (KMI1) { + Name (_ADR, 0x1c070000) + Method (_CRS, 0x0, Serialized) { + Name (RBUF, ResourceTemplate () { + Memory32Fixed (ReadWrite, 0x1c070000, 0x00001000) + Interrupt (ResourceConsumer, Edge, ActiveBoth, + Exclusive, , , ) {45} + }) + Return (RBUF) + } + Method(_DSM, 4, NotSerialized) { + Store (Package (2) + { + "clock-name", "KMIREFCLK \\_SB.CLK0", + }, Local0) + + DTGP (Arg0, Arg1, Arg2, Arg3, RefOf (Local0)) + + Return (Local0) + } + } + + Device (SER0) { + Name (_ADR, 0x1c090000) /* UART0 */ + Method (_CRS, 0x0, Serialized) { + Name (RBUF, ResourceTemplate () { + Memory32Fixed (ReadWrite, 0x1c090000, 0x00001000) + Interrupt (ResourceConsumer, Edge, ActiveBoth, + Exclusive, , , ) {37} + }) + Return (RBUF) + } + } + + Device (SER1) { + Name (_ADR, 0x1c0a0000) /* UART1 */ + Method (_CRS, 0x0, Serialized) { + Name (RBUF, ResourceTemplate () { + Memory32Fixed (ReadWrite, 0x1c0a0000, 0x00001000) + Interrupt (ResourceConsumer, Edge, ActiveBoth, + Exclusive, , , ) {38} + }) + Return (RBUF) + } + } + Device (SER2) { + Name (_ADR, 0x1c0b0000) /* UART2 */ + Method (_CRS, 0x0, Serialized) { + Name (RBUF, ResourceTemplate () { + Memory32Fixed (ReadWrite, 0x1c0b0000, 0x00001000) + Interrupt (ResourceConsumer, Edge, ActiveBoth, + Exclusive, , , ) {39} + }) + Return (RBUF) + } + } + + Device (SER3) { + Name (_ADR, 0x1c0c0000) /* UART3 */ + Method (_CRS, 0x0, Serialized) { + Name (RBUF, ResourceTemplate () { + Memory32Fixed (ReadWrite, 0x1c0c0000, 0x00001000) + Interrupt (ResourceConsumer, Edge, ActiveBoth, + Exclusive, , , ) {40} + }) + Return (RBUF) + } + } + + Device (AAC0) { + Name (_ADR, 0x1c040000) /* AACI */ + Method (_CRS, 0x0, Serialized) { + Name (RBUF, ResourceTemplate () { + Memory32Fixed (ReadWrite, 0x1c040000, 0x00001000) + Interrupt (ResourceConsumer, Edge, ActiveBoth, + Exclusive, , , ) {43} + }) + Return (RBUF) + } + } + + Device (WDT0) { + Name (_ADR, 0x1c0f0000) /* WDT */ + Method (_CRS, 0x0, Serialized) { + Name (RBUF, ResourceTemplate () { + Memory32Fixed (ReadWrite, 0x1c0f0000, 0x00001000) + Interrupt (ResourceConsumer, Edge, ActiveBoth, + Exclusive, , , ) {32} + }) + Return (RBUF) + } + } + + Device (TIM0) { + Name (_ADR, 0x1c110000) /* TIMER01 */ + Method (_CRS, 0x0, Serialized) { + Name (RBUF, ResourceTemplate () { + Memory32Fixed (ReadWrite, 0x1c110000, 0x00001000) + Interrupt (ResourceConsumer, Edge, ActiveBoth, + Exclusive, , , ) {34} + }) + Return (RBUF) + } + } + + Device (TIM2) { + Name (_ADR, 0x1c120000) /* TIMER23 */ + Method (_CRS, 0x0, Serialized) { + Name (RBUF, ResourceTemplate () { + Memory32Fixed (ReadWrite, 0x1c120000, 0x00001000) + Interrupt (ResourceConsumer, Edge, ActiveBoth, + Exclusive, , , ) {35} + }) + Return (RBUF) + } + } + + Device (RTC0) { + Name (_ADR, 0x1c170000) /* RTC */ + Method (_CRS, 0x0, Serialized) { + Name (RBUF, ResourceTemplate () { + Memory32Fixed (ReadWrite, 0x1c170000, 0x00001000) + Interrupt (ResourceConsumer, Edge, ActiveBoth, + Exclusive, , , ) {36} + }) + Return (RBUF) + } + } + } } }

10 years, 5 months

[PATCH v4 00/13] Hardware Reduced Mode cleanup for ACPI

by al.stone＠linaro.org

From: Al Stone <ahs3(a)redhat.com> This series of patches starts with Hanjun's patch to create a kernel config item for CONFIG_ACPI_REDUCED_HARDWARE [0]. Building on that, I then reviewed all of the code that touched any of several fields in the FADT that the OSPM is supposed to ignore when ACPI is in Hardware Reduced mode [1]. Any time there was a use of one of the fields to be ignored, I evaluated whether or not the code was implementing Hardware Reduced mode correctly. Similarly, for each the flags in the FADT flags field that are to be ignored in Hardware Reduced mode, the kernel code was again scanned for proper usage. The remainder of the patches are to fix all of the situations I could find where the kernel would not behave correctly in this ACPI mode. These are being submitted as an RFC to the linaro-acpi@ list so I can get some other eyes looking at them before sending them to linux-acpi@ where they really need to go. These seem to work just fine on the RTSM model for ARMv7, both with and without ACPI enabled, and with and without ACPI_REDUCED_HARDWARE enabled. However, there's no way I can think of or test all possible scenarios so feedback would be greatly appreciated. NB: these changes are only applicable to the LEG ACPI working tree. The macros in patch 1/13 will have to change for the linux-acpi tree. Changes for v4: -- Remove use of ACPI_HW_DEPENDENT_RETURN_{*} macros; they were not usable without invasive change. -- Completely remove global lock/unlock routines on ARM (vs #ifdef) Changes for v3: -- Consistent use of #if (!ACPI_REDUCED_HARDWARE) -- Use of ACPI_HW_DEPENDENT_RETURN_{*} macros -- Simplify wherever possible Changes for v2: -- Change patch series title -- Add in the FACS global lock patch as further hardware reduced mode cleanup that is needed -- Remove whitespace change that should not have gotten in [1] Please see the ACPI Specification v5.0 for details on Hardware Reduced mode. [0] List at https://wiki.linaro.org/LEG/Engineering/Kernel/ACPI/AcpiReducedHw#Section_5… Al Stone (13): ACPI: introduce CONFIG_ACPI_REDUCED_HARDWARE to enable this ACPI mode ACPI: bus master reload not supported in reduced HW mode ACPI: clean up compiler warning about uninitialized field ACPI: HW reduced mode does not allow use of the FADT sci_interrupt field ACPI: ARM: exclude calls on ARM platforms, not include them on x86 ACPI: ensure several FADT fields are only used in HW reduced mode ACPI: do not reserve memory regions for some FADT entries in HW reduced mode ACPI: in HW reduced mode, getting power latencies from FADT is not allowed ACPI: add clarifying comment about processor throttling in HW reduced mode ACPI: ACPI_FADT_C2_MP_SUPPORTED must be ignored in HW reduced mode ACPI: use of ACPI_FADT_32BIT_TIMER is not allowed in HW reduced mode ACPI: correct #ifdef so compilation without ACPI_REDUCED_HARDWARE works ACPI: ARM/ARM64: ensure the ACPI FACS global_lock is never used in HW reduced mode arch/arm/include/asm/acpi.h | 10 ---------- arch/arm64/include/asm/acpi.h | 10 ---------- drivers/acpi/Kconfig | 8 ++++++++ drivers/acpi/acpica/utxface.c | 3 ++- drivers/acpi/bus.c | 7 ++++--- drivers/acpi/osl.c | 28 ++++++++++++++++++++-------- drivers/acpi/pci_link.c | 14 ++++++++------ drivers/acpi/plat/arm/boot.c | 2 ++ drivers/acpi/processor_idle.c | 19 ++++++++++++++----- drivers/acpi/processor_throttling.c | 8 ++++++++ drivers/acpi/sleep.c | 2 +- include/acpi/acconfig.h | 2 +- include/acpi/acpixf.h | 3 +++ include/acpi/platform/aclinux.h | 6 ++++++ 14 files changed, 77 insertions(+), 45 deletions(-) -- 1.8.3.1

10 years, 5 months

[PATCH] ARM: ACPI: simplify directory structure

by Graeme Gregory

I don't think there is any need for such a deep directory structure and the filename boot.c was not very descriptive of what the file does. Make directory structure less deep and remane to arm-core.c Signed-off-by: Graeme Gregory <graeme.gregory(a)linaro.org> --- drivers/acpi/Makefile | 3 +- drivers/acpi/plat/Makefile | 2 + drivers/acpi/plat/arm-core.c | 695 +++++++++++++++++++++++++++++++++++++++++ drivers/acpi/plat/arm/Makefile | 2 - drivers/acpi/plat/arm/boot.c | 695 ----------------------------------------- 5 files changed, 698 insertions(+), 699 deletions(-) create mode 100644 drivers/acpi/plat/Makefile create mode 100644 drivers/acpi/plat/arm-core.c delete mode 100644 drivers/acpi/plat/arm/Makefile delete mode 100644 drivers/acpi/plat/arm/boot.c diff --git a/drivers/acpi/Makefile b/drivers/acpi/Makefile index a792d00..262f0be 100644 --- a/drivers/acpi/Makefile +++ b/drivers/acpi/Makefile @@ -84,5 +84,4 @@ obj-$(CONFIG_ACPI_PROCESSOR_AGGREGATOR) += acpi_pad.o obj-$(CONFIG_ACPI_APEI) += apei/ -obj-$(CONFIG_ACPI_ARM) += plat/arm/ - +obj-y += plat/ diff --git a/drivers/acpi/plat/Makefile b/drivers/acpi/plat/Makefile new file mode 100644 index 0000000..b65bcba --- /dev/null +++ b/drivers/acpi/plat/Makefile @@ -0,0 +1,2 @@ +obj-$(CONFIG_ACPI_ARM) += arm-core.o + diff --git a/drivers/acpi/plat/arm-core.c b/drivers/acpi/plat/arm-core.c new file mode 100644 index 0000000..b77af0f --- /dev/null +++ b/drivers/acpi/plat/arm-core.c @@ -0,0 +1,695 @@ +/* + * ARM/ARM64 Specific Low-Level ACPI Boot Support + * + * Copyright (C) 2001, 2002 Paul Diefenbaugh <paul.s.diefenbaugh(a)intel.com> + * Copyright (C) 2001 Jun Nakajima <jun.nakajima(a)intel.com> + * Copyright (C) 2013, Al Stone <al.stone(a)linaro.org> (ARM version) + * + * ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA + * + * ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ + */ + +#include <linux/init.h> +#include <linux/acpi.h> +#include <linux/acpi_pmtmr.h> +#include <linux/efi.h> +#include <linux/cpumask.h> +#include <linux/memblock.h> +#include <linux/module.h> +#include <linux/irq.h> +#include <linux/irqdomain.h> +#include <linux/slab.h> +#include <linux/bootmem.h> +#include <linux/ioport.h> +#include <linux/pci.h> + +#include <asm/pgtable.h> +#include <asm/io.h> +#include <asm/smp.h> +#include <asm/acpi.h> + +/* + * We never plan to use RSDT on arm/arm64 as its deprecated in spec but this + * variable is still required by the ACPI core + */ +u32 acpi_rsdt_forced; + +int acpi_disabled; +EXPORT_SYMBOL(acpi_disabled); + +/* available_cpus here means enabled cpu in MADT */ +int available_cpus; + +/* Map logic cpu id to physical APIC id. + * APIC = GIC cpu interface on ARM + */ +volatile int arm_cpu_to_apicid[NR_CPUS] = { [0 ... NR_CPUS-1] = -1 }; +int boot_cpu_apic_id = -1; + +#define BAD_MADT_ENTRY(entry, end) ( \ + (!entry) || (unsigned long)entry + sizeof(*entry) > end || \ + ((struct acpi_subtable_header *)entry)->length < sizeof(*entry)) + +#define PREFIX "ACPI: " + +int acpi_noirq; /* skip ACPI IRQ initialization */ +int acpi_pci_disabled; /* skip ACPI PCI scan and IRQ initialization */ +EXPORT_SYMBOL(acpi_pci_disabled); + +int acpi_lapic; +int acpi_ioapic; +int acpi_strict; + +u8 acpi_sci_flags __initdata; +int acpi_sci_override_gsi __initdata; +int acpi_skip_timer_override __initdata; +int acpi_use_timer_override __initdata; +int acpi_fix_pin2_polarity __initdata; +static u64 acpi_lapic_addr __initdata; + +struct acpi_arm_root acpi_arm_rsdp_info; /* info about RSDP from FDT */ + +/* + * Boot-time Configuration + */ + +/* + * The default interrupt routing model is PIC (8259). This gets + * overridden if IOAPICs are enumerated (below). + * + * Since we're on ARM, it clearly has to be GIC. + */ +enum acpi_irq_model_id acpi_irq_model = ACPI_IRQ_MODEL_GIC; + +static unsigned int gsi_to_irq(unsigned int gsi) +{ + int irq = irq_create_mapping(NULL, gsi); + + return irq; +} + +char *__init __acpi_map_table(phys_addr_t phys, unsigned long size) +{ + if (!phys || !size) + return NULL; + + return early_memremap(phys, size); +} + +void __init __acpi_unmap_table(char *map, unsigned long size) +{ + if (!map || !size) + return; + + early_iounmap(map, size); + return; +} + +static int __init acpi_parse_madt(struct acpi_table_header *table) +{ + struct acpi_table_madt *madt = NULL; + + madt = (struct acpi_table_madt *)table; + if (!madt) { + pr_warn(PREFIX "Unable to map MADT\n"); + return -ENODEV; + } + + if (madt->address) { + acpi_lapic_addr = (u64) madt->address; + + pr_info(PREFIX "Local APIC address 0x%08x\n", madt->address); + } + + return 0; +} + +/* Local APIC = GIC cpu interface on ARM */ +static void acpi_register_lapic(int id, u8 enabled) +{ + int cpu; + + if (id >= MAX_LOCAL_APIC) { + pr_info(PREFIX "skipped apicid that is too big\n"); + return; + } + + total_cpus++; + if (!enabled) + return; + + available_cpus++; + + /* allocate a logic cpu id for the new comer */ + if (boot_cpu_apic_id == id) { + /* + * boot_cpu_init() already hold bit 0 in cpu_present_mask + * for BSP, no need to allocte again. + */ + cpu = 0; + } else { + cpu = cpumask_next_zero(-1, cpu_present_mask); + } + + /* map the logic cpu id to APIC id */ + arm_cpu_to_apicid[cpu] = id; + + set_cpu_present(cpu, true); + set_cpu_possible(cpu, true); +} + +static int __init +acpi_parse_gic(struct acpi_subtable_header *header, const unsigned long end) +{ + struct acpi_madt_generic_interrupt *processor = NULL; + + processor = (struct acpi_madt_generic_interrupt *)header; + + if (BAD_MADT_ENTRY(processor, end)) + return -EINVAL; + + acpi_table_print_madt_entry(header); + + /* + * We need to register disabled CPU as well to permit + * counting disabled CPUs. This allows us to size + * cpus_possible_map more accurately, to permit + * to not preallocating memory for all NR_CPUS + * when we use CPU hotplug. + */ + acpi_register_lapic(processor->gic_id, + processor->flags & ACPI_MADT_ENABLED); + + return 0; +} + +static int __init +acpi_parse_gic_distributor(struct acpi_subtable_header *header, + const unsigned long end) +{ + struct acpi_madt_generic_distributor *distributor = NULL; + + distributor = (struct acpi_madt_generic_distributor *)header; + + if (BAD_MADT_ENTRY(distributor, end)) + return -EINVAL; + + acpi_table_print_madt_entry(header); + + /* TODO: handle with the base_address and irq_base for irq system */ + + return 0; +} + +int acpi_gsi_to_irq(u32 gsi, unsigned int *irq) +{ + *irq = gsi_to_irq(gsi); + + return 0; +} +EXPORT_SYMBOL_GPL(acpi_gsi_to_irq); + +static int acpi_register_gsi_pic(struct device *dev, u32 gsi, + int trigger, int polarity) +{ +#ifdef CONFIG_PCI + /* + * Make sure all (legacy) PCI IRQs are set as level-triggered. + */ + if (trigger == ACPI_LEVEL_SENSITIVE) + eisa_set_level_irq(gsi); +#endif + + return gsi; +} + +static int acpi_register_gsi_ioapic(struct device *dev, u32 gsi, + int trigger, int polarity) +{ + return gsi; +} + +int (*__acpi_register_gsi)(struct device *dev, u32 gsi, + int trigger, int polarity) = acpi_register_gsi_pic; + +/* + * success: return IRQ number (>=0) + * failure: return < 0 + */ +int acpi_register_gsi(struct device *dev, u32 gsi, int trigger, int polarity) +{ + unsigned int irq; + unsigned int plat_gsi = gsi; + + plat_gsi = (*__acpi_register_gsi)(dev, gsi, trigger, polarity); + + irq = gsi_to_irq(plat_gsi); + + return irq; +} +EXPORT_SYMBOL_GPL(acpi_register_gsi); + +void acpi_unregister_gsi(u32 gsi) +{ +} +EXPORT_SYMBOL_GPL(acpi_unregister_gsi); + +void __init acpi_set_irq_model_pic(void) +{ + acpi_irq_model = ACPI_IRQ_MODEL_PIC; + __acpi_register_gsi = acpi_register_gsi_pic; + acpi_ioapic = 0; +} + +void __init acpi_set_irq_model_gic(void) +{ + acpi_irq_model = ACPI_IRQ_MODEL_GIC; + __acpi_register_gsi = acpi_register_gsi_ioapic; + acpi_ioapic = 1; +} + +static int __initdata setup_possible_cpus = -1; +static int __init _setup_possible_cpus(char *str) +{ + get_option(&str, &setup_possible_cpus); + return 0; +} +early_param("possible_cpus", _setup_possible_cpus); + +/* + * cpu_possible_mask should be static, it cannot change as cpu's + * are onlined, or offlined. The reason is per-cpu data-structures + * are allocated by some modules at init time, and dont expect to + * do this dynamically on cpu arrival/departure. + * cpu_present_mask on the other hand can change dynamically. + * In case when cpu_hotplug is not compiled, then we resort to current + * behaviour, which is cpu_possible == cpu_present. + * - Ashok Raj + * + * Three ways to find out the number of additional hotplug CPUs: + * - If the BIOS specified disabled CPUs in ACPI/mptables use that. + * - The user can overwrite it with possible_cpus=NUM + * - Otherwise don't reserve additional CPUs. + * We do this because additional CPUs waste a lot of memory. + * -AK + */ +void __init prefill_possible_map(void) +{ + int i; + int possible, disabled_cpus; + + disabled_cpus = total_cpus - available_cpus; + + if (setup_possible_cpus == -1) { + if (disabled_cpus > 0) + setup_possible_cpus = disabled_cpus; + else + setup_possible_cpus = 0; + } + + possible = available_cpus + setup_possible_cpus; + + pr_info("SMP: the system is limited to %d CPUs\n", nr_cpu_ids); + + /* + * On armv8 foundation model --cores=4 lets nr_cpu_ids=4, so we can't + * get possible map correctly when more than 4 APIC entries in MADT. + */ + if (possible > nr_cpu_ids) + possible = nr_cpu_ids; + + pr_info("SMP: Allowing %d CPUs, %d hotplug CPUs\n", + possible, max((possible - available_cpus), 0)); + + for (i = 0; i < possible; i++) + set_cpu_possible(i, true); + for (; i < NR_CPUS; i++) + set_cpu_possible(i, false); +} + +/* + * ACPI based hotplug support for CPU + */ +#ifdef CONFIG_ACPI_HOTPLUG_CPU +#include <acpi/processor.h> + +static void acpi_map_cpu2node(acpi_handle handle, int cpu, int physid) +{ +#ifdef CONFIG_ACPI_NUMA + int nid; + + nid = acpi_get_node(handle); + if (nid == -1 || !node_online(nid)) + return; + set_apicid_to_node(physid, nid); + numa_set_node(cpu, nid); +#endif +} + +static int _acpi_map_lsapic(acpi_handle handle, int *pcpu) +{ + struct acpi_buffer buffer = { ACPI_ALLOCATE_BUFFER, NULL }; + union acpi_object *obj; + struct acpi_madt_generic_interrupt *lapic; + cpumask_var_t tmp_map, new_map; + u8 physid; + int cpu; + int retval = -ENOMEM; + + if (ACPI_FAILURE(acpi_evaluate_object(handle, "_MAT", NULL, &buffer))) + return -EINVAL; + + if (!buffer.length || !buffer.pointer) + return -EINVAL; + + obj = buffer.pointer; + if (obj->type != ACPI_TYPE_BUFFER || + obj->buffer.length < sizeof(*lapic)) { + kfree(buffer.pointer); + return -EINVAL; + } + + lapic = (struct acpi_madt_generic_interrupt *)obj->buffer.pointer; + + if (lapic->header.type != ACPI_MADT_TYPE_GENERIC_INTERRUPT || + !(lapic->flags & ACPI_MADT_ENABLED)) { + kfree(buffer.pointer); + return -EINVAL; + } + + physid = lapic->gic_id; + + kfree(buffer.pointer); + buffer.length = ACPI_ALLOCATE_BUFFER; + buffer.pointer = NULL; + lapic = NULL; + + if (!alloc_cpumask_var(&tmp_map, GFP_KERNEL)) + goto out; + + if (!alloc_cpumask_var(&new_map, GFP_KERNEL)) + goto free_tmp_map; + + cpumask_copy(tmp_map, cpu_present_mask); + acpi_register_lapic(physid, ACPI_MADT_ENABLED); + + /* + * If acpi_register_lapic successfully generates a new logical cpu + * number, then the following will get us exactly what was mapped + */ + cpumask_andnot(new_map, cpu_present_mask, tmp_map); + if (cpumask_empty(new_map)) { + pr_err("Unable to map lapic to logical cpu number\n"); + retval = -EINVAL; + goto free_new_map; + } + + acpi_processor_set_pdc(handle); + + cpu = cpumask_first(new_map); + acpi_map_cpu2node(handle, cpu, physid); + + *pcpu = cpu; + retval = 0; + +free_new_map: + free_cpumask_var(new_map); +free_tmp_map: + free_cpumask_var(tmp_map); +out: + return retval; +} + +/* wrapper to silence section mismatch warning */ +int __ref acpi_map_lsapic(acpi_handle handle, int *pcpu) +{ + return _acpi_map_lsapic(handle, pcpu); +} +EXPORT_SYMBOL(acpi_map_lsapic); + +int acpi_unmap_lsapic(int cpu) +{ + arm_cpu_to_apicid[cpu] = -1; + set_cpu_present(cpu, false); + available_cpus--; + + return 0; +} +EXPORT_SYMBOL(acpi_unmap_lsapic); +#endif /* CONFIG_ACPI_HOTPLUG_CPU */ + +/* Local APIC = GIC cpu interface on ARM */ +static int __init acpi_parse_madt_lapic_entries(void) +{ + int count; + + /* + * do a partial walk of MADT to determine how many CPUs + * we have including disabled CPUs + */ + count = acpi_table_parse_madt(ACPI_MADT_TYPE_GENERIC_INTERRUPT, + acpi_parse_gic, MAX_LOCAL_APIC); + + if (!count) { + pr_err(PREFIX "No LAPIC entries present\n"); + /* TBD: Cleanup to allow fallback to MPS */ + return -ENODEV; + } else if (count < 0) { + pr_err(PREFIX "Error parsing LAPIC entry\n"); + /* TBD: Cleanup to allow fallback to MPS */ + return count; + } + +#ifdef CONFIG_SMP + if (available_cpus == 0) { + pr_info(PREFIX "Found 0 CPUS; assuming 1\n"); + /* FIXME: should be the real GIC id read from hardware */ + arm_cpu_to_apicid[available_cpus] = 0; + available_cpus = 1; /* We've got at least one of these */ + } +#endif + /* Make boot-up look pretty */ + pr_info("%d CPUs available, %d CPUs total\n", available_cpus, + total_cpus); + + return 0; +} + +static int __init acpi_parse_fadt(struct acpi_table_header *table) +{ + return 0; +} + +/* + * Parse IOAPIC related entries in MADT + * returns 0 on success, < 0 on error + * IOAPIC = GIC distributor on ARM + */ +static int __init acpi_parse_madt_ioapic_entries(void) +{ + int count; + + /* + * ACPI interpreter is required to complete interrupt setup, + * so if it is off, don't enumerate the io-apics with ACPI. + * If MPS is present, it will handle them, + * otherwise the system will stay in PIC mode + */ + if (acpi_disabled || acpi_noirq) + return -ENODEV; + + count = acpi_table_parse_madt(ACPI_MADT_TYPE_GENERIC_DISTRIBUTOR, + acpi_parse_gic_distributor, MAX_IO_APICS); + + if (!count) { + pr_err(PREFIX "No IOAPIC entries present\n"); + return -ENODEV; + } else if (count < 0) { + pr_err(PREFIX "Error parsing IOAPIC entry\n"); + return count; + } + + return 0; +} + +static void __init early_acpi_process_madt(void) +{ + /* should I introduce CONFIG_ARM_LOCAL_APIC like x86 does? */ + acpi_table_parse(ACPI_SIG_MADT, acpi_parse_madt); +} + +static void __init acpi_process_madt(void) +{ + /* should I introduce CONFIG_ARM_LOCAL_APIC like x86 does? */ + int error; + + if (!acpi_table_parse(ACPI_SIG_MADT, acpi_parse_madt)) { + + /* + * Parse MADT LAPIC entries + */ + error = acpi_parse_madt_lapic_entries(); + if (!error) { + acpi_lapic = 1; + + /* + * Parse MADT IO-APIC entries + */ + error = acpi_parse_madt_ioapic_entries(); + if (!error) + acpi_set_irq_model_gic(); + } + } + + /* + * ACPI supports both logical (e.g. Hyper-Threading) and physical + * processors, where MPS only supports physical. + */ + if (acpi_lapic && acpi_ioapic) + pr_info("Using ACPI (MADT) for SMP configuration " + "information\n"); + else if (acpi_lapic) + pr_info("Using ACPI for processor (LAPIC) " + "configuration information\n"); + + return; +} + +/* + * ========== OLD COMMENTS FROM x86 ================================= + * acpi_boot_table_init() and acpi_boot_init() + * called from setup_arch(), always. + * 1. checksums all tables + * 2. enumerates lapics + * 3. enumerates io-apics + * + * acpi_table_init() is separate to allow reading SRAT without + * other side effects. + * + * side effects of acpi_boot_init: + * acpi_lapic = 1 if LAPIC found + * acpi_ioapic = 1 if IOAPIC found + * if (acpi_lapic && acpi_ioapic) smp_found_config = 1; + * if acpi_blacklisted() acpi_disabled = 1; + * acpi_irq_model=... + * ... + * ================================================================== + * + * We have to approach this a little different on ARMv7. We are + * passed in an ACPI blob and we really have no idea where in RAM + * it will be located. So, what should have been the physical + * addresses of other tables cannot really be hardcoded into the + * tables. What we will do is put an offset in the blob that is + * the offset from the beginning of the RSDP structure. However, + * what that means is that we have to unpack the blob and do a + * bit of fixup work on the offsets to turn them into kernel + * virtual addresses so we can pass them on for later use. + */ +void __init acpi_boot_table_init(void) +{ + /* + * If acpi_disabled, bail out + */ + if (acpi_disabled) + return; + + /* + * Initialize the ACPI boot-time table parser. + */ + if (acpi_table_init()) { + disable_acpi(); + return; + } +} + +int __init early_acpi_boot_init(void) +{ + /* + * If acpi_disabled, bail out + */ + if (acpi_disabled) + return 1; + + /* + * Process the Multiple APIC Description Table (MADT), if present + */ + early_acpi_process_madt(); + + return 0; +} + +int __init acpi_boot_init(void) +{ + /* + * If acpi_disabled, bail out + */ + if (acpi_disabled) + return 1; + + /* + * set sci_int and PM timer address + */ + acpi_table_parse(ACPI_SIG_FADT, acpi_parse_fadt); + + /* + * Process the Multiple APIC Description Table (MADT), if present + */ + acpi_process_madt(); + + return 0; +} + +/* + * make sure that the address passed for ACPI tables which is normall in + * system ram is removed from the kernel memory map + */ +void __init arm_acpi_reserve_memory() +{ + unsigned long section_offset; + unsigned long num_sections; + phys_addr_t addr = acpi_arm_rsdp_info.phys_address; + int size = acpi_arm_rsdp_info.size; + + /* if ACPI tables were not passed in FDT then escape here */ + if (!addr || !size) + return; + + section_offset = addr - (addr & SECTION_MASK); + num_sections = size / SECTION_SIZE; + if (size % SECTION_SIZE) + num_sections++; + + memblock_remove(addr - section_offset, num_sections * SECTION_SIZE); +} + +static int __init parse_acpi(char *arg) +{ + if (!arg) + return -EINVAL; + + /* "acpi=off" disables both ACPI table parsing and interpreter */ + if (strcmp(arg, "off") == 0) { + disable_acpi(); + } + /* acpi=strict disables out-of-spec workarounds */ + else if (strcmp(arg, "strict") == 0) { + acpi_strict = 1; + } + return 0; +} +early_param("acpi", parse_acpi); diff --git a/drivers/acpi/plat/arm/Makefile b/drivers/acpi/plat/arm/Makefile deleted file mode 100644 index 9d59aaf..0000000 --- a/drivers/acpi/plat/arm/Makefile +++ /dev/null @@ -1,2 +0,0 @@ -obj-y += boot.o - diff --git a/drivers/acpi/plat/arm/boot.c b/drivers/acpi/plat/arm/boot.c deleted file mode 100644 index a912a7a..0000000 --- a/drivers/acpi/plat/arm/boot.c +++ /dev/null @@ -1,695 +0,0 @@ -/* - * boot.c - Architecture-Specific Low-Level ACPI Boot Support - * - * Copyright (C) 2001, 2002 Paul Diefenbaugh <paul.s.diefenbaugh(a)intel.com> - * Copyright (C) 2001 Jun Nakajima <jun.nakajima(a)intel.com> - * Copyright (C) 2013, Al Stone <al.stone(a)linaro.org> (ARM version) - * - * ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; either version 2 of the License, or - * (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA - * - * ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ - */ - -#include <linux/init.h> -#include <linux/acpi.h> -#include <linux/acpi_pmtmr.h> -#include <linux/efi.h> -#include <linux/cpumask.h> -#include <linux/memblock.h> -#include <linux/module.h> -#include <linux/irq.h> -#include <linux/irqdomain.h> -#include <linux/slab.h> -#include <linux/bootmem.h> -#include <linux/ioport.h> -#include <linux/pci.h> - -#include <asm/pgtable.h> -#include <asm/io.h> -#include <asm/smp.h> -#include <asm/acpi.h> - -/* - * We never plan to use RSDT on arm/arm64 as its deprecated in spec but this - * variable is still required by the ACPI core - */ -u32 acpi_rsdt_forced; - -int acpi_disabled; -EXPORT_SYMBOL(acpi_disabled); - -/* available_cpus here means enabled cpu in MADT */ -int available_cpus; - -/* Map logic cpu id to physical APIC id. - * APIC = GIC cpu interface on ARM - */ -volatile int arm_cpu_to_apicid[NR_CPUS] = { [0 ... NR_CPUS-1] = -1 }; -int boot_cpu_apic_id = -1; - -#define BAD_MADT_ENTRY(entry, end) ( \ - (!entry) || (unsigned long)entry + sizeof(*entry) > end || \ - ((struct acpi_subtable_header *)entry)->length < sizeof(*entry)) - -#define PREFIX "ACPI: " - -int acpi_noirq; /* skip ACPI IRQ initialization */ -int acpi_pci_disabled; /* skip ACPI PCI scan and IRQ initialization */ -EXPORT_SYMBOL(acpi_pci_disabled); - -int acpi_lapic; -int acpi_ioapic; -int acpi_strict; - -u8 acpi_sci_flags __initdata; -int acpi_sci_override_gsi __initdata; -int acpi_skip_timer_override __initdata; -int acpi_use_timer_override __initdata; -int acpi_fix_pin2_polarity __initdata; -static u64 acpi_lapic_addr __initdata; - -struct acpi_arm_root acpi_arm_rsdp_info; /* info about RSDP from FDT */ - -/* - * Boot-time Configuration - */ - -/* - * The default interrupt routing model is PIC (8259). This gets - * overridden if IOAPICs are enumerated (below). - * - * Since we're on ARM, it clearly has to be GIC. - */ -enum acpi_irq_model_id acpi_irq_model = ACPI_IRQ_MODEL_GIC; - -static unsigned int gsi_to_irq(unsigned int gsi) -{ - int irq = irq_create_mapping(NULL, gsi); - - return irq; -} - -char *__init __acpi_map_table(phys_addr_t phys, unsigned long size) -{ - if (!phys || !size) - return NULL; - - return early_memremap(phys, size); -} - -void __init __acpi_unmap_table(char *map, unsigned long size) -{ - if (!map || !size) - return; - - early_iounmap(map, size); - return; -} - -static int __init acpi_parse_madt(struct acpi_table_header *table) -{ - struct acpi_table_madt *madt = NULL; - - madt = (struct acpi_table_madt *)table; - if (!madt) { - pr_warn(PREFIX "Unable to map MADT\n"); - return -ENODEV; - } - - if (madt->address) { - acpi_lapic_addr = (u64) madt->address; - - pr_info(PREFIX "Local APIC address 0x%08x\n", madt->address); - } - - return 0; -} - -/* Local APIC = GIC cpu interface on ARM */ -static void acpi_register_lapic(int id, u8 enabled) -{ - int cpu; - - if (id >= MAX_LOCAL_APIC) { - pr_info(PREFIX "skipped apicid that is too big\n"); - return; - } - - total_cpus++; - if (!enabled) - return; - - available_cpus++; - - /* allocate a logic cpu id for the new comer */ - if (boot_cpu_apic_id == id) { - /* - * boot_cpu_init() already hold bit 0 in cpu_present_mask - * for BSP, no need to allocte again. - */ - cpu = 0; - } else { - cpu = cpumask_next_zero(-1, cpu_present_mask); - } - - /* map the logic cpu id to APIC id */ - arm_cpu_to_apicid[cpu] = id; - - set_cpu_present(cpu, true); - set_cpu_possible(cpu, true); -} - -static int __init -acpi_parse_gic(struct acpi_subtable_header *header, const unsigned long end) -{ - struct acpi_madt_generic_interrupt *processor = NULL; - - processor = (struct acpi_madt_generic_interrupt *)header; - - if (BAD_MADT_ENTRY(processor, end)) - return -EINVAL; - - acpi_table_print_madt_entry(header); - - /* - * We need to register disabled CPU as well to permit - * counting disabled CPUs. This allows us to size - * cpus_possible_map more accurately, to permit - * to not preallocating memory for all NR_CPUS - * when we use CPU hotplug. - */ - acpi_register_lapic(processor->gic_id, - processor->flags & ACPI_MADT_ENABLED); - - return 0; -} - -static int __init -acpi_parse_gic_distributor(struct acpi_subtable_header *header, - const unsigned long end) -{ - struct acpi_madt_generic_distributor *distributor = NULL; - - distributor = (struct acpi_madt_generic_distributor *)header; - - if (BAD_MADT_ENTRY(distributor, end)) - return -EINVAL; - - acpi_table_print_madt_entry(header); - - /* TODO: handle with the base_address and irq_base for irq system */ - - return 0; -} - -int acpi_gsi_to_irq(u32 gsi, unsigned int *irq) -{ - *irq = gsi_to_irq(gsi); - - return 0; -} -EXPORT_SYMBOL_GPL(acpi_gsi_to_irq); - -static int acpi_register_gsi_pic(struct device *dev, u32 gsi, - int trigger, int polarity) -{ -#ifdef CONFIG_PCI - /* - * Make sure all (legacy) PCI IRQs are set as level-triggered. - */ - if (trigger == ACPI_LEVEL_SENSITIVE) - eisa_set_level_irq(gsi); -#endif - - return gsi; -} - -static int acpi_register_gsi_ioapic(struct device *dev, u32 gsi, - int trigger, int polarity) -{ - return gsi; -} - -int (*__acpi_register_gsi)(struct device *dev, u32 gsi, - int trigger, int polarity) = acpi_register_gsi_pic; - -/* - * success: return IRQ number (>=0) - * failure: return < 0 - */ -int acpi_register_gsi(struct device *dev, u32 gsi, int trigger, int polarity) -{ - unsigned int irq; - unsigned int plat_gsi = gsi; - - plat_gsi = (*__acpi_register_gsi)(dev, gsi, trigger, polarity); - - irq = gsi_to_irq(plat_gsi); - - return irq; -} -EXPORT_SYMBOL_GPL(acpi_register_gsi); - -void acpi_unregister_gsi(u32 gsi) -{ -} -EXPORT_SYMBOL_GPL(acpi_unregister_gsi); - -void __init acpi_set_irq_model_pic(void) -{ - acpi_irq_model = ACPI_IRQ_MODEL_PIC; - __acpi_register_gsi = acpi_register_gsi_pic; - acpi_ioapic = 0; -} - -void __init acpi_set_irq_model_gic(void) -{ - acpi_irq_model = ACPI_IRQ_MODEL_GIC; - __acpi_register_gsi = acpi_register_gsi_ioapic; - acpi_ioapic = 1; -} - -static int __initdata setup_possible_cpus = -1; -static int __init _setup_possible_cpus(char *str) -{ - get_option(&str, &setup_possible_cpus); - return 0; -} -early_param("possible_cpus", _setup_possible_cpus); - -/* - * cpu_possible_mask should be static, it cannot change as cpu's - * are onlined, or offlined. The reason is per-cpu data-structures - * are allocated by some modules at init time, and dont expect to - * do this dynamically on cpu arrival/departure. - * cpu_present_mask on the other hand can change dynamically. - * In case when cpu_hotplug is not compiled, then we resort to current - * behaviour, which is cpu_possible == cpu_present. - * - Ashok Raj - * - * Three ways to find out the number of additional hotplug CPUs: - * - If the BIOS specified disabled CPUs in ACPI/mptables use that. - * - The user can overwrite it with possible_cpus=NUM - * - Otherwise don't reserve additional CPUs. - * We do this because additional CPUs waste a lot of memory. - * -AK - */ -void __init prefill_possible_map(void) -{ - int i; - int possible, disabled_cpus; - - disabled_cpus = total_cpus - available_cpus; - - if (setup_possible_cpus == -1) { - if (disabled_cpus > 0) - setup_possible_cpus = disabled_cpus; - else - setup_possible_cpus = 0; - } - - possible = available_cpus + setup_possible_cpus; - - pr_info("SMP: the system is limited to %d CPUs\n", nr_cpu_ids); - - /* - * On armv8 foundation model --cores=4 lets nr_cpu_ids=4, so we can't - * get possible map correctly when more than 4 APIC entries in MADT. - */ - if (possible > nr_cpu_ids) - possible = nr_cpu_ids; - - pr_info("SMP: Allowing %d CPUs, %d hotplug CPUs\n", - possible, max((possible - available_cpus), 0)); - - for (i = 0; i < possible; i++) - set_cpu_possible(i, true); - for (; i < NR_CPUS; i++) - set_cpu_possible(i, false); -} - -/* - * ACPI based hotplug support for CPU - */ -#ifdef CONFIG_ACPI_HOTPLUG_CPU -#include <acpi/processor.h> - -static void acpi_map_cpu2node(acpi_handle handle, int cpu, int physid) -{ -#ifdef CONFIG_ACPI_NUMA - int nid; - - nid = acpi_get_node(handle); - if (nid == -1 || !node_online(nid)) - return; - set_apicid_to_node(physid, nid); - numa_set_node(cpu, nid); -#endif -} - -static int _acpi_map_lsapic(acpi_handle handle, int *pcpu) -{ - struct acpi_buffer buffer = { ACPI_ALLOCATE_BUFFER, NULL }; - union acpi_object *obj; - struct acpi_madt_generic_interrupt *lapic; - cpumask_var_t tmp_map, new_map; - u8 physid; - int cpu; - int retval = -ENOMEM; - - if (ACPI_FAILURE(acpi_evaluate_object(handle, "_MAT", NULL, &buffer))) - return -EINVAL; - - if (!buffer.length || !buffer.pointer) - return -EINVAL; - - obj = buffer.pointer; - if (obj->type != ACPI_TYPE_BUFFER || - obj->buffer.length < sizeof(*lapic)) { - kfree(buffer.pointer); - return -EINVAL; - } - - lapic = (struct acpi_madt_generic_interrupt *)obj->buffer.pointer; - - if (lapic->header.type != ACPI_MADT_TYPE_GENERIC_INTERRUPT || - !(lapic->flags & ACPI_MADT_ENABLED)) { - kfree(buffer.pointer); - return -EINVAL; - } - - physid = lapic->gic_id; - - kfree(buffer.pointer); - buffer.length = ACPI_ALLOCATE_BUFFER; - buffer.pointer = NULL; - lapic = NULL; - - if (!alloc_cpumask_var(&tmp_map, GFP_KERNEL)) - goto out; - - if (!alloc_cpumask_var(&new_map, GFP_KERNEL)) - goto free_tmp_map; - - cpumask_copy(tmp_map, cpu_present_mask); - acpi_register_lapic(physid, ACPI_MADT_ENABLED); - - /* - * If acpi_register_lapic successfully generates a new logical cpu - * number, then the following will get us exactly what was mapped - */ - cpumask_andnot(new_map, cpu_present_mask, tmp_map); - if (cpumask_empty(new_map)) { - pr_err("Unable to map lapic to logical cpu number\n"); - retval = -EINVAL; - goto free_new_map; - } - - acpi_processor_set_pdc(handle); - - cpu = cpumask_first(new_map); - acpi_map_cpu2node(handle, cpu, physid); - - *pcpu = cpu; - retval = 0; - -free_new_map: - free_cpumask_var(new_map); -free_tmp_map: - free_cpumask_var(tmp_map); -out: - return retval; -} - -/* wrapper to silence section mismatch warning */ -int __ref acpi_map_lsapic(acpi_handle handle, int *pcpu) -{ - return _acpi_map_lsapic(handle, pcpu); -} -EXPORT_SYMBOL(acpi_map_lsapic); - -int acpi_unmap_lsapic(int cpu) -{ - arm_cpu_to_apicid[cpu] = -1; - set_cpu_present(cpu, false); - available_cpus--; - - return 0; -} -EXPORT_SYMBOL(acpi_unmap_lsapic); -#endif /* CONFIG_ACPI_HOTPLUG_CPU */ - -/* Local APIC = GIC cpu interface on ARM */ -static int __init acpi_parse_madt_lapic_entries(void) -{ - int count; - - /* - * do a partial walk of MADT to determine how many CPUs - * we have including disabled CPUs - */ - count = acpi_table_parse_madt(ACPI_MADT_TYPE_GENERIC_INTERRUPT, - acpi_parse_gic, MAX_LOCAL_APIC); - - if (!count) { - pr_err(PREFIX "No LAPIC entries present\n"); - /* TBD: Cleanup to allow fallback to MPS */ - return -ENODEV; - } else if (count < 0) { - pr_err(PREFIX "Error parsing LAPIC entry\n"); - /* TBD: Cleanup to allow fallback to MPS */ - return count; - } - -#ifdef CONFIG_SMP - if (available_cpus == 0) { - pr_info(PREFIX "Found 0 CPUS; assuming 1\n"); - /* FIXME: should be the real GIC id read from hardware */ - arm_cpu_to_apicid[available_cpus] = 0; - available_cpus = 1; /* We've got at least one of these */ - } -#endif - /* Make boot-up look pretty */ - pr_info("%d CPUs available, %d CPUs total\n", available_cpus, - total_cpus); - - return 0; -} - -static int __init acpi_parse_fadt(struct acpi_table_header *table) -{ - return 0; -} - -/* - * Parse IOAPIC related entries in MADT - * returns 0 on success, < 0 on error - * IOAPIC = GIC distributor on ARM - */ -static int __init acpi_parse_madt_ioapic_entries(void) -{ - int count; - - /* - * ACPI interpreter is required to complete interrupt setup, - * so if it is off, don't enumerate the io-apics with ACPI. - * If MPS is present, it will handle them, - * otherwise the system will stay in PIC mode - */ - if (acpi_disabled || acpi_noirq) - return -ENODEV; - - count = acpi_table_parse_madt(ACPI_MADT_TYPE_GENERIC_DISTRIBUTOR, - acpi_parse_gic_distributor, MAX_IO_APICS); - - if (!count) { - pr_err(PREFIX "No IOAPIC entries present\n"); - return -ENODEV; - } else if (count < 0) { - pr_err(PREFIX "Error parsing IOAPIC entry\n"); - return count; - } - - return 0; -} - -static void __init early_acpi_process_madt(void) -{ - /* should I introduce CONFIG_ARM_LOCAL_APIC like x86 does? */ - acpi_table_parse(ACPI_SIG_MADT, acpi_parse_madt); -} - -static void __init acpi_process_madt(void) -{ - /* should I introduce CONFIG_ARM_LOCAL_APIC like x86 does? */ - int error; - - if (!acpi_table_parse(ACPI_SIG_MADT, acpi_parse_madt)) { - - /* - * Parse MADT LAPIC entries - */ - error = acpi_parse_madt_lapic_entries(); - if (!error) { - acpi_lapic = 1; - - /* - * Parse MADT IO-APIC entries - */ - error = acpi_parse_madt_ioapic_entries(); - if (!error) - acpi_set_irq_model_gic(); - } - } - - /* - * ACPI supports both logical (e.g. Hyper-Threading) and physical - * processors, where MPS only supports physical. - */ - if (acpi_lapic && acpi_ioapic) - pr_info("Using ACPI (MADT) for SMP configuration " - "information\n"); - else if (acpi_lapic) - pr_info("Using ACPI for processor (LAPIC) " - "configuration information\n"); - - return; -} - -/* - * ========== OLD COMMENTS FROM x86 ================================= - * acpi_boot_table_init() and acpi_boot_init() - * called from setup_arch(), always. - * 1. checksums all tables - * 2. enumerates lapics - * 3. enumerates io-apics - * - * acpi_table_init() is separate to allow reading SRAT without - * other side effects. - * - * side effects of acpi_boot_init: - * acpi_lapic = 1 if LAPIC found - * acpi_ioapic = 1 if IOAPIC found - * if (acpi_lapic && acpi_ioapic) smp_found_config = 1; - * if acpi_blacklisted() acpi_disabled = 1; - * acpi_irq_model=... - * ... - * ================================================================== - * - * We have to approach this a little different on ARMv7. We are - * passed in an ACPI blob and we really have no idea where in RAM - * it will be located. So, what should have been the physical - * addresses of other tables cannot really be hardcoded into the - * tables. What we will do is put an offset in the blob that is - * the offset from the beginning of the RSDP structure. However, - * what that means is that we have to unpack the blob and do a - * bit of fixup work on the offsets to turn them into kernel - * virtual addresses so we can pass them on for later use. - */ -void __init acpi_boot_table_init(void) -{ - /* - * If acpi_disabled, bail out - */ - if (acpi_disabled) - return; - - /* - * Initialize the ACPI boot-time table parser. - */ - if (acpi_table_init()) { - disable_acpi(); - return; - } -} - -int __init early_acpi_boot_init(void) -{ - /* - * If acpi_disabled, bail out - */ - if (acpi_disabled) - return 1; - - /* - * Process the Multiple APIC Description Table (MADT), if present - */ - early_acpi_process_madt(); - - return 0; -} - -int __init acpi_boot_init(void) -{ - /* - * If acpi_disabled, bail out - */ - if (acpi_disabled) - return 1; - - /* - * set sci_int and PM timer address - */ - acpi_table_parse(ACPI_SIG_FADT, acpi_parse_fadt); - - /* - * Process the Multiple APIC Description Table (MADT), if present - */ - acpi_process_madt(); - - return 0; -} - -/* - * make sure that the address passed for ACPI tables which is normall in - * system ram is removed from the kernel memory map - */ -void __init arm_acpi_reserve_memory() -{ - unsigned long section_offset; - unsigned long num_sections; - phys_addr_t addr = acpi_arm_rsdp_info.phys_address; - int size = acpi_arm_rsdp_info.size; - - /* if ACPI tables were not passed in FDT then escape here */ - if (!addr || !size) - return; - - section_offset = addr - (addr & SECTION_MASK); - num_sections = size / SECTION_SIZE; - if (size % SECTION_SIZE) - num_sections++; - - memblock_remove(addr - section_offset, num_sections * SECTION_SIZE); -} - -static int __init parse_acpi(char *arg) -{ - if (!arg) - return -EINVAL; - - /* "acpi=off" disables both ACPI table parsing and interpreter */ - if (strcmp(arg, "off") == 0) { - disable_acpi(); - } - /* acpi=strict disables out-of-spec workarounds */ - else if (strcmp(arg, "strict") == 0) { - acpi_strict = 1; - } - return 0; -} -early_param("acpi", parse_acpi); -- 1.8.3.1

10 years, 5 months

[PATCH 1/2] ARM: ACPI: removce #if around acpi.h

by Graeme Gregory

Internally include file is already protected in the case of #ifndef CONFIG_ACPI so we don't need these checks. Signed-off-by: Graeme Gregory <graeme.gregory(a)linaro.org> --- arch/arm/kernel/setup.c | 2 -- 1 file changed, 2 deletions(-) diff --git a/arch/arm/kernel/setup.c b/arch/arm/kernel/setup.c index c3ed159..953ac40 100644 --- a/arch/arm/kernel/setup.c +++ b/arch/arm/kernel/setup.c @@ -30,9 +30,7 @@ #include <linux/bug.h> #include <linux/compiler.h> #include <linux/sort.h> -#ifdef CONFIG_ACPI #include <linux/acpi.h> -#endif #include <asm/unified.h> #include <asm/cp15.h> -- 1.8.3.1

10 years, 5 months

[PATCH 0/3] Further cleanups to prepare for upstream

by Hanjun Guo

This patch set is based on Graeme's patches "ARM: ACPI: simplify directory structure" and "ARM: ACPI: remove irq type switching from core". Hanjun Guo (3): ARM / ACPI: Remove acpi_lapic and acpi_ioapic related code ARM / ACPI: Remove the global lock definition in header file ARM / ACPI: Remove unused variables arch/arm/include/asm/acpi.h | 11 ----------- arch/arm64/include/asm/acpi.h | 11 ----------- drivers/acpi/plat/arm-core.c | 23 +---------------------- 3 files changed, 1 insertion(+), 44 deletions(-) -- 1.7.9.5

10 years, 5 months

[PATCH] ARM: ACPI: remove irq type switching from core

by Graeme Gregory

ARM/ARM64 only support GIC type under ACPI so remove the various x86 style IRQ type switching and the EISA support. Signed-off-by: Graeme Gregory <graeme.gregory(a)linaro.org> --- drivers/acpi/plat/arm-core.c | 43 +------------------------------------------ 1 file changed, 1 insertion(+), 42 deletions(-) diff --git a/drivers/acpi/plat/arm-core.c b/drivers/acpi/plat/arm-core.c index b77af0f..6710631 100644 --- a/drivers/acpi/plat/arm-core.c +++ b/drivers/acpi/plat/arm-core.c @@ -224,29 +224,6 @@ int acpi_gsi_to_irq(u32 gsi, unsigned int *irq) } EXPORT_SYMBOL_GPL(acpi_gsi_to_irq); -static int acpi_register_gsi_pic(struct device *dev, u32 gsi, - int trigger, int polarity) -{ -#ifdef CONFIG_PCI - /* - * Make sure all (legacy) PCI IRQs are set as level-triggered. - */ - if (trigger == ACPI_LEVEL_SENSITIVE) - eisa_set_level_irq(gsi); -#endif - - return gsi; -} - -static int acpi_register_gsi_ioapic(struct device *dev, u32 gsi, - int trigger, int polarity) -{ - return gsi; -} - -int (*__acpi_register_gsi)(struct device *dev, u32 gsi, - int trigger, int polarity) = acpi_register_gsi_pic; - /* * success: return IRQ number (>=0) * failure: return < 0 @@ -256,8 +233,6 @@ int acpi_register_gsi(struct device *dev, u32 gsi, int trigger, int polarity) unsigned int irq; unsigned int plat_gsi = gsi; - plat_gsi = (*__acpi_register_gsi)(dev, gsi, trigger, polarity); - irq = gsi_to_irq(plat_gsi); return irq; @@ -269,20 +244,6 @@ void acpi_unregister_gsi(u32 gsi) } EXPORT_SYMBOL_GPL(acpi_unregister_gsi); -void __init acpi_set_irq_model_pic(void) -{ - acpi_irq_model = ACPI_IRQ_MODEL_PIC; - __acpi_register_gsi = acpi_register_gsi_pic; - acpi_ioapic = 0; -} - -void __init acpi_set_irq_model_gic(void) -{ - acpi_irq_model = ACPI_IRQ_MODEL_GIC; - __acpi_register_gsi = acpi_register_gsi_ioapic; - acpi_ioapic = 1; -} - static int __initdata setup_possible_cpus = -1; static int __init _setup_possible_cpus(char *str) { @@ -550,9 +511,7 @@ static void __init acpi_process_madt(void) /* * Parse MADT IO-APIC entries */ - error = acpi_parse_madt_ioapic_entries(); - if (!error) - acpi_set_irq_model_gic(); + acpi_parse_madt_ioapic_entries(); } } -- 1.8.3.1

10 years, 5 months

[PATCH] ACPI: clean up compiler warning about uninitialized field

by al.stone＠linaro.org

From: Al Stone <ahs3(a)redhat.com> Initialize pwr_btn_status as disabled which (a) makes sure it is in a proper state to start, and (b) cleans up a compiler warning about an uninitialized variable. Signed-off-by: Al Stone <al.stone(a)linaro.org> --- drivers/acpi/sleep.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/acpi/sleep.c b/drivers/acpi/sleep.c index 14df305..721e949 100644 --- a/drivers/acpi/sleep.c +++ b/drivers/acpi/sleep.c @@ -525,7 +525,7 @@ static int acpi_suspend_enter(suspend_state_t pm_state) * generate wakeup events. */ if (ACPI_SUCCESS(status) && (acpi_state == ACPI_STATE_S3)) { - acpi_event_status pwr_btn_status; + acpi_event_status pwr_btn_status = ACPI_EVENT_FLAG_DISABLED; acpi_get_event_status(ACPI_EVENT_POWER_BUTTON, &pwr_btn_status); -- 1.8.3.1

10 years, 5 months

[PATCH] ACPI: ARM: remove sleep.c

by Graeme Gregory

sleep.c is not needed by the arm port as it will most likely be covered by some other power management framework like PSCI in the future so remove it. Signed-off-by: Graeme Gregory <graeme.gregory(a)linaro.org> --- drivers/acpi/plat/arm/Makefile | 1 - drivers/acpi/plat/arm/sleep.c | 126 ----------------------------------------- drivers/acpi/plat/arm/sleep.h | 17 ------ 3 files changed, 144 deletions(-) delete mode 100644 drivers/acpi/plat/arm/sleep.c delete mode 100644 drivers/acpi/plat/arm/sleep.h diff --git a/drivers/acpi/plat/arm/Makefile b/drivers/acpi/plat/arm/Makefile index a1f056d..9d59aaf 100644 --- a/drivers/acpi/plat/arm/Makefile +++ b/drivers/acpi/plat/arm/Makefile @@ -1,3 +1,2 @@ obj-y += boot.o -obj-y += sleep.o diff --git a/drivers/acpi/plat/arm/sleep.c b/drivers/acpi/plat/arm/sleep.c deleted file mode 100644 index 9129c7e..0000000 --- a/drivers/acpi/plat/arm/sleep.c +++ /dev/null @@ -1,126 +0,0 @@ -/* - * sleep.c - x86-specific ACPI sleep support. - * - * Copyright (C) 2001-2003 Patrick Mochel - * Copyright (C) 2001-2003 Pavel Machek <pavel(a)ucw.cz> - */ - -int acpi_suspend_lowlevel(void) -{ - /* BOZO: dummy routine; see below for actual */ - return 0; -} - -#ifdef CONFIG_X86 -/* BOZO: disable everything for now... */ - -#include <linux/acpi.h> -#include <linux/bootmem.h> -#include <linux/memblock.h> -#include <linux/dmi.h> -#include <linux/cpumask.h> -#include <asm/segment.h> -#include <asm/desc.h> -#include <asm/pgtable.h> -#include <asm/cacheflush.h> -#include <asm/realmode.h> - -#include "../../realmode/rm/wakeup.h" -#include "sleep.h" - -unsigned long acpi_realmode_flags; - -#if defined(CONFIG_SMP) && defined(CONFIG_64BIT) -static char temp_stack[4096]; -#endif - -/** - * acpi_suspend_lowlevel - save kernel state - * - * Create an identity mapped page table and copy the wakeup routine to - * low memory. - */ -int acpi_suspend_lowlevel(void) -{ - struct wakeup_header *header = - (struct wakeup_header *) __va(real_mode_header->wakeup_header); - - if (header->signature != WAKEUP_HEADER_SIGNATURE) { - printk(KERN_ERR "wakeup header does not match\n"); - return -EINVAL; - } - - header->video_mode = saved_video_mode; - - header->pmode_behavior = 0; - -#ifndef CONFIG_64BIT - store_gdt((struct desc_ptr *)&header->pmode_gdt); - - if (!rdmsr_safe(MSR_EFER, - &header->pmode_efer_low, - &header->pmode_efer_high)) - header->pmode_behavior |= (1 << WAKEUP_BEHAVIOR_RESTORE_EFER); -#endif /* !CONFIG_64BIT */ - - header->pmode_cr0 = read_cr0(); - if (__this_cpu_read(cpu_info.cpuid_level) >= 0) { - header->pmode_cr4 = read_cr4(); - header->pmode_behavior |= (1 << WAKEUP_BEHAVIOR_RESTORE_CR4); - } - if (!rdmsr_safe(MSR_IA32_MISC_ENABLE, - &header->pmode_misc_en_low, - &header->pmode_misc_en_high)) - header->pmode_behavior |= - (1 << WAKEUP_BEHAVIOR_RESTORE_MISC_ENABLE); - header->realmode_flags = acpi_realmode_flags; - header->real_magic = 0x12345678; - -#ifndef CONFIG_64BIT - header->pmode_entry = (u32)&wakeup_pmode_return; - header->pmode_cr3 = (u32)__pa(&initial_page_table); - saved_magic = 0x12345678; -#else /* CONFIG_64BIT */ -#ifdef CONFIG_SMP - stack_start = (unsigned long)temp_stack + sizeof(temp_stack); - early_gdt_descr.address = - (unsigned long)get_cpu_gdt_table(smp_processor_id()); - initial_gs = per_cpu_offset(smp_processor_id()); -#endif - initial_code = (unsigned long)wakeup_long64; - saved_magic = 0x123456789abcdef0L; -#endif /* CONFIG_64BIT */ - - do_suspend_lowlevel(); - return 0; -} - -static int __init acpi_sleep_setup(char *str) -{ - while ((str != NULL) && (*str != '\0')) { - if (strncmp(str, "s3_bios", 7) == 0) - acpi_realmode_flags |= 1; - if (strncmp(str, "s3_mode", 7) == 0) - acpi_realmode_flags |= 2; - if (strncmp(str, "s3_beep", 7) == 0) - acpi_realmode_flags |= 4; -#ifdef CONFIG_HIBERNATION - if (strncmp(str, "s4_nohwsig", 10) == 0) - acpi_no_s4_hw_signature(); -#endif - if (strncmp(str, "nonvs", 5) == 0) - acpi_nvs_nosave(); - if (strncmp(str, "nonvs_s3", 8) == 0) - acpi_nvs_nosave_s3(); - if (strncmp(str, "old_ordering", 12) == 0) - acpi_old_suspend_ordering(); - str = strchr(str, ','); - if (str != NULL) - str += strspn(str, ", \t"); - } - return 1; -} - -__setup("acpi_sleep=", acpi_sleep_setup); - -#endif diff --git a/drivers/acpi/plat/arm/sleep.h b/drivers/acpi/plat/arm/sleep.h deleted file mode 100644 index 67f59f8..0000000 --- a/drivers/acpi/plat/arm/sleep.h +++ /dev/null @@ -1,17 +0,0 @@ -/* - * Variables and functions used by the code in sleep.c - */ - -#include <asm/realmode.h> - -extern unsigned long saved_video_mode; -extern long saved_magic; - -extern int wakeup_pmode_return; - -extern u8 wake_sleep_flags; - -extern unsigned long acpi_copy_wakeup_routine(unsigned long); -extern void wakeup_long64(void); - -extern void do_suspend_lowlevel(void); -- 1.8.3.1

10 years, 5 months

[PATCH v2 0/4] Convert arch timer to ACPI using GTDT

by Hanjun Guo

This patch trys to convert arch timer to ACPI using GTDT. it is based on the converting GIC to ACPI patchset. After convert the arch timer, it works fine when booted up (added AMBA patches). root@genericarmv8:~# cat /proc/interrupts CPU0 CPU1 CPU2 CPU3 29: 0 0 0 0 GIC 29 arch_timer 30: 10751 1821 1888 1252 GIC 30 arch_timer 37: 123 0 0 0 GIC 37 uart-pl011 47: 5 0 0 0 GIC 47 eth0 74: 1031 0 0 0 GIC 74 virtio0 IPI0: 2249 1676 1229 1605 Rescheduling interrupts IPI1: 126 123 114 66 Function call interrupts IPI2: 0 0 0 0 Single function call interrupts IPI3: 0 0 0 0 CPU stop interrupts Err: v2: a) add missed early_iounmap() for acpi_get_tables(); b) add if(acpi_disabled) check c) rebased on the latest linaro-acpi kernel Hanjun Guo (4): clocksource: arch_timer: Use ACPI GTDT table to initialize arch timer ARMv8 / colcksource: use arch_timer_acpi_init() ARMv7 / clocksource: use arch_timer_acpi_init() Foundation model / dts: remove timer node since it is converted to ACPI arch/arm/kernel/time.c | 4 + arch/arm64/boot/dts/foundation-v8-acpi.dts | 4 + arch/arm64/kernel/time.c | 4 + drivers/clocksource/arm_arch_timer.c | 129 ++++++++++++++++++++++++---- include/clocksource/arm_arch_timer.h | 7 +- 5 files changed, 132 insertions(+), 16 deletions(-) -- 1.7.9.5

10 years, 5 months

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Linaro-acpi November 2013