Linaro-acpi November 2013

linaro-acpi@lists.linaro.org

21 participants
48 discussions

[RFC PATCH 0/4] Convert arch timer to ACPI using GTDT

by Hanjun Guo

This patch trys to convert arch timer to ACPI using GTDT which based on the convert GIC to ACPI patchset. After convert the arch timer, it works fine when booted up. root@genericarmv8:~# cat /proc/interrupts CPU0 CPU1 CPU2 CPU3 29: 0 0 0 0 GIC 29 arch_timer 30: 10751 1821 1888 1252 GIC 30 arch_timer 37: 123 0 0 0 GIC 37 uart-pl011 47: 5 0 0 0 GIC 47 eth0 74: 1031 0 0 0 GIC 74 virtio0 IPI0: 2249 1676 1229 1605 Rescheduling interrupts IPI1: 126 123 114 66 Function call interrupts IPI2: 0 0 0 0 Single function call interrupts IPI3: 0 0 0 0 CPU stop interrupts Err: Hanjun Guo (4): clocksource: arch_timer: Use ACPI GTDT table to initialize arch timer ARMv8 / colcksource: use arch_timer_acpi_init() ARMv7 / clocksource: use arch_timer_acpi_init() Foundation model / dts: remove timer node since it is converted to ACPI arch/arm/kernel/time.c | 4 + arch/arm64/boot/dts/foundation-v8-acpi.dts | 6 +- arch/arm64/kernel/time.c | 4 + drivers/clocksource/arm_arch_timer.c | 122 ++++++++++++++++++++++++---- include/clocksource/arm_arch_timer.h | 7 +- 5 files changed, 124 insertions(+), 19 deletions(-) -- 1.7.9.5

10 years, 5 months

[PATCH v3 0/4] Convert GIC to ACPI

by Hanjun Guo

This patch set trys to convert GIC to ACPI which based on patches from Amit, I rework them and try to get things simpler. In MADT table, there are GIC cpu interface base address and GIC distributor base address, use them to convert GIC to ACPI. GIC should be converted after all the devices refer to GIC are converted. But this patch set can be safely applied to linaro-acpi git tree if we don't remove the DT node of GIC, the node of GIC can be removed after all the devices converted to ACPI. v2: a) fix missed iounmap() when return in error path; b) add stub for acpi_gic_init(void) when !CONFIG_ACPI C) modify the GSI mapping from DT to ACPI d) remove the hack code and modify the change log a bit v3: a) modify the minor typo for ACPI hwirq mapping "range [16, 31]" b) return -ENODEV when !CONFIG_ACPI in stub function acpi_gic_init(void) c) rebased on the latest linaro-acpi kernel Amit Daniel Kachhap (2): irqdomain: Add a new API irq_create_acpi_mapping() ACPI: ARM: Update acpi_register_gsi to register with the core IRQ subsystem Hanjun Guo (2): irqchip / GIC: do not set default host for GIC domain multi-times when ACPI enabled ARM / GIC: convert GIC to ACPI using the information in MADT arch/arm64/kernel/irq.c | 4 ++ drivers/acpi/plat/arm/boot.c | 98 ++++++++++++++++++++++++++++++++++++------ drivers/irqchip/irq-gic.c | 5 ++- include/linux/acpi.h | 8 ++++ kernel/irq/irqdomain.c | 27 ++++++++++++ 5 files changed, 127 insertions(+), 15 deletions(-) -- 1.7.9.5

10 years, 5 months

[PATCH 1/2] acpi: Be sure ACPI structure are packed with 1 byte alignment.

by Tomasz Nowicki

--- tools/common/include/acpi.h | 5 +++++ 1 file changed, 5 insertions(+) diff --git a/tools/common/include/acpi.h b/tools/common/include/acpi.h index c06bafb..ba8004b 100644 --- a/tools/common/include/acpi.h +++ b/tools/common/include/acpi.h @@ -18,6 +18,8 @@ #define ACPI_OEM_ID_SIZE 6 #define ACPI_OEM_TABLE_ID_SIZE 8 +#pragma pack(1) + /* Generic ACPI table header */ struct acpi_table_header { @@ -295,4 +297,7 @@ struct acpi_whea_header { uint64_t mask; /* Bitmask required for this register instruction */ }; +/* Reset to default packing */ +#pragma pack() + #endif /* ACPI_H_ */ -- 1.7.9.5

10 years, 5 months

[PATCH 1/2] ARM/ARM64 : remove HPET related stuff

by Hanjun Guo

HPET is definite not for ARM/ARM64, remove its related stuff. Signed-off-by: Hanjun Guo <hanjun.guo(a)linaro.org> --- drivers/acpi/plat/arm/boot.c | 75 ------------------------------------------ 1 file changed, 75 deletions(-) diff --git a/drivers/acpi/plat/arm/boot.c b/drivers/acpi/plat/arm/boot.c index 3bfe86e..a6c5a5e 100644 --- a/drivers/acpi/plat/arm/boot.c +++ b/drivers/acpi/plat/arm/boot.c @@ -466,79 +466,6 @@ static int __init acpi_parse_sbf(struct acpi_table_header *table) return 0; } -#ifdef CONFIG_HPET_TIMER -#include <asm/hpet.h> - -static struct __initdata resource * hpet_res; - -static int __init acpi_parse_hpet(struct acpi_table_header *table) -{ - struct acpi_table_hpet *hpet_tbl; - - hpet_tbl = (struct acpi_table_hpet *)table; - if (!hpet_tbl) { - printk(KERN_WARNING PREFIX "Unable to map HPET\n"); - return -ENODEV; - } - - if (hpet_tbl->address.space_id != ACPI_SPACE_MEM) { - printk(KERN_WARNING PREFIX "HPET timers must be located in " - "memory.\n"); - return -1; - } - - hpet_address = hpet_tbl->address.address; - hpet_blockid = hpet_tbl->sequence; - - /* - * Some broken BIOSes advertise HPET at 0x0. We really do not - * want to allocate a resource there. - */ - if (!hpet_address) { - printk(KERN_WARNING PREFIX - "HPET id: %#x base: %#lx is invalid\n", - hpet_tbl->id, hpet_address); - return 0; - } - printk(KERN_INFO PREFIX "HPET id: %#x base: %#lx\n", - hpet_tbl->id, hpet_address); - - /* - * Allocate and initialize the HPET firmware resource for adding into - * the resource tree during the lateinit timeframe. - */ -#define HPET_RESOURCE_NAME_SIZE 9 - hpet_res = alloc_bootmem(sizeof(*hpet_res) + HPET_RESOURCE_NAME_SIZE); - - hpet_res->name = (void *)&hpet_res[1]; - hpet_res->flags = IORESOURCE_MEM; - snprintf((char *)hpet_res->name, HPET_RESOURCE_NAME_SIZE, "HPET %u", - hpet_tbl->sequence); - - hpet_res->start = hpet_address; - hpet_res->end = hpet_address + (1 * 1024) - 1; - - return 0; -} - -/* - * hpet_insert_resource inserts the HPET resources used into the resource - * tree. - */ -static int __init hpet_insert_resource(void) -{ - if (!hpet_res) - return 1; - - return insert_resource(&iomem_resource, hpet_res); -} - -late_initcall(hpet_insert_resource); - -#else -#define acpi_parse_hpet NULL -#endif - /* Local APIC = GIC cpu interface on ARM */ static int __init acpi_parse_madt_lapic_entries(void) { @@ -741,8 +668,6 @@ int __init acpi_boot_init(void) */ acpi_process_madt(); - acpi_table_parse(ACPI_SIG_HPET, acpi_parse_hpet); - return 0; } -- 1.7.9.5

10 years, 5 months

[RFC PATCH 0/5] Convert GIC to ACPI

by Hanjun Guo

This patch set trys to convert GIC to ACPI which based on patches from Amit, I rework two patches from him and fix two minor bugs :) In MADT table, there are GIC cpu interface base address and GIC distributor base address, use them to convert GIC to ACPI. GIC should be converted after all the devices refer to GIC are converted. So I hack some code to test this patch set. Amit Daniel Kachhap (2): irqdomain: Add a new API irq_create_acpi_mapping ACPI: ARM: Update acpi_register_gsi to register with the core IRQ subsystem Hanjun Guo (3): irqchip / GIC: do not set default host for GIC domain multi-times when ACPI enabled ARM / GIC: convert GIC to ACPI using the information in MADT ACPI / timer: hack to test GIC in ACPI mode arch/arm64/kernel/irq.c | 4 ++ drivers/acpi/plat/arm/boot.c | 100 +++++++++++++++++++++++++++++----- drivers/clocksource/arm_arch_timer.c | 11 +++- drivers/irqchip/irq-gic.c | 9 ++- include/linux/acpi.h | 3 + kernel/irq/irqdomain.c | 27 +++++++++ 6 files changed, 133 insertions(+), 21 deletions(-) -- 1.7.9.5

10 years, 5 months

ACPI standup 2013/11/19

by Tomasz Nowicki

Hi, Here is update from my side: - send out summary of APEI work and RFC regarding next steps, - once we have clear view on this, we will create cards - now implementing cfi-flash driver Regards, Tomasz

10 years, 5 months

[PATCH] Foundation model / ASL: fix another interrupt type and level flag error

by Hanjun Guo

As commit 4a52df24 (ARM64 / ASL: Fix interrupt type and level flag for device interrupts) did, this patch fix the same problem. Signed-off-by: Hanjun Guo <hanjun.guo(a)linaro.org> --- platforms/foundation-v8.acpi/dsdt.asl | 8 ++++---- 1 file changed, 4 insertions(+), 4 deletions(-) diff --git a/platforms/foundation-v8.acpi/dsdt.asl b/platforms/foundation-v8.acpi/dsdt.asl index ecf25ae..0660dbf 100644 --- a/platforms/foundation-v8.acpi/dsdt.asl +++ b/platforms/foundation-v8.acpi/dsdt.asl @@ -476,7 +476,7 @@ DefinitionBlock ( Method (_CRS, 0x0, Serialized) { Name (RBUF, ResourceTemplate() { Memory32Fixed (ReadWrite, 0x1c090000, 0x1000) - Interrupt (ResourceConsumer, Edge, ActiveBoth, Exclusive, , , ) {0x25} + Interrupt (ResourceConsumer, Level, ActiveHigh, Exclusive, , , ) {0x25} }) Return (RBUF) } @@ -490,7 +490,7 @@ DefinitionBlock ( Method (_CRS, 0x0, Serialized) { Name (RBUF, ResourceTemplate() { Memory32Fixed (ReadWrite, 0x1c0a0000, 0x1000) - Interrupt (ResourceConsumer, Edge, ActiveBoth, Exclusive, , , ) {0x26} + Interrupt (ResourceConsumer, Level, ActiveHigh, Exclusive, , , ) {0x26} }) Return (RBUF) } @@ -504,7 +504,7 @@ DefinitionBlock ( Method (_CRS, 0x0, Serialized) { Name (RBUF, ResourceTemplate() { Memory32Fixed (ReadWrite, 0x1c0b0000, 0x1000) - Interrupt (ResourceConsumer, Edge, ActiveBoth, Exclusive, , , ) {0x27} + Interrupt (ResourceConsumer, Level, ActiveHigh, Exclusive, , , ) {0x27} }) Return (RBUF) } @@ -518,7 +518,7 @@ DefinitionBlock ( Method (_CRS, 0x0, Serialized) { Name (RBUF, ResourceTemplate() { Memory32Fixed (ReadWrite, 0x1c0c0000, 0x1000) - Interrupt (ResourceConsumer, Edge, ActiveBoth, Exclusive, , , ) {0x28} + Interrupt (ResourceConsumer, Level, ActiveHigh, Exclusive, , , ) {0x28} }) Return (RBUF) } -- 1.7.9.5

10 years, 5 months

[PATCH] RTSM model: Create GTDT table for arch timer

by Hanjun Guo

Create GTDT table to convert arch timer for early boot. Signed-off-by: Hanjun Guo <hanjun.guo(a)linaro.org> --- platforms/rtsm_ve-aemv8a.acpi/gtdt.asl | 37 +++++++++++++++++++++----------- 1 file changed, 24 insertions(+), 13 deletions(-) diff --git a/platforms/rtsm_ve-aemv8a.acpi/gtdt.asl b/platforms/rtsm_ve-aemv8a.acpi/gtdt.asl index 068ad4a..26eac38 100644 --- a/platforms/rtsm_ve-aemv8a.acpi/gtdt.asl +++ b/platforms/rtsm_ve-aemv8a.acpi/gtdt.asl @@ -1,6 +1,7 @@ /* * Copyright (c) 2013, Al Stone <al.stone(a)linaro.org> - * + * Hanjun Guo <hanjun.guo(a)linaro.org> + * * [GTDT] Generic Timer Description Table * Format: [ByteLength] FieldName : HexFieldValue * @@ -21,22 +22,32 @@ [0004] Flags (decoded below) : 00000001 Memory Present : 1 -[0004] Secure PL1 Interrupt : 00000000 -[0004] SPL1 Flags (decoded below) : 00000000 - Trigger Mode : 0 +/* In Foundation model's dts file, the last cell of interrupts + * is 0xff01, it means its cpu mask is FF, and trigger type + * and flag is 1 = low-to-high edge triggered. + * + * so in ACPI the Trigger Mode is 1 - Edge triggered, and + * Polarity is 0 - Active high as ACPI spec describled. + * + * using direct mapping for hwirqs, it means that we using + * ID [16, 31] for PPI, not [0, 15] used in FDT. + */ +[0004] Secure PL1 Interrupt : 0000001d +[0004] SPL1 Flags (decoded below) : 00000001 + Trigger Mode : 1 Polarity : 0 -[0004] Non-Secure PL1 Interrupt : 00000000 -[0004] NSPL1 Flags (decoded below) : 00000000 - Trigger Mode : 0 +[0004] Non-Secure PL1 Interrupt : 0000001e +[0004] NSPL1 Flags (decoded below) : 00000001 + Trigger Mode : 1 Polarity : 0 -[0004] Virtual Timer Interrupt : 00000000 -[0004] VT Flags (decoded below) : 00000000 - Trigger Mode : 0 +[0004] Virtual Timer Interrupt : 0000001b +[0004] VT Flags (decoded below) : 00000001 + Trigger Mode : 1 Polarity : 0 -[0004] Non-Secure PL2 Interrupt : 00000000 -[0004] NSPL2 Flags (decoded below) : 00000000 - Trigger Mode : 0 +[0004] Non-Secure PL2 Interrupt : 0000001a +[0004] NSPL2 Flags (decoded below) : 00000001 + Trigger Mode : 1 Polarity : 0 -- 1.7.9.5

10 years, 5 months

Re: [Linaro-acpi] UEFI Clock

by Hanjun Guo

Hi Loc, Grant, >On Thu, 14 Nov 2013 16:01:13 -0800, Loc Ho <lho@xxxxxxx> wrote: >> Hi Mike, >> >> I will be looking into covering the clock driver to support UEFI. >> Before I do this, can someone explain to me how x86 system handle each >> IP clock as I don't see such thing? > >UEFI is completely unrelated to the clock drivers, it is only a firmware >interface for the OS loader. UEFI mostly disappears after Linux is >loaded. Are you perhaps asking about ACPI? > >There isn't such a thing on x86. This is entirely new territory. On x86 >as far as I know any clock manipulation that does need to be done would >be performed by an ACPI method, but there is no concept of an IP clock >in the ACPI namespace, and so no standard way of describing them. Yes, there is no standard way (ACPI device object or ACPI table) to describe clocks for x86 in ACPI spec, but there is a table called GTDT (Generic Timer Description Table) for ARM which contains information for arch timer initialization. you can refer to ACPI spec 5.0 chapter 5.2.24: http://www.acpi.info/spec50.htm > >You'd be much better of talking to Al Stone and Grame Gregory about what >their plans are for clock support in ACPI and to post your question to >the ACPI mailing list. We already finished the implementation of convert fixed clock and arch timer to ACPI, and I had already post the RFC patch set for review now: http://marc.info/?l=linaro-acpi&m=138450991609818&w=2 http://marc.info/?l=linaro-acpi&m=138198249622451&w=2 Thanks Hanjun

10 years, 5 months

[PATCH] ACPI: ARM: link ARM and the ACPI reduced hardware profile

by al.stone＠linaro.org

From: Al Stone <ahs3(a)redhat.com> Modify the kernel configuration so that if ARM is selected, then ACPI_REDUCED_HARDWARE is also selected. Signed-off-by: Al Stone <al.stone(a)linaro.org> --- drivers/acpi/Kconfig | 1 + 1 file changed, 1 insertion(+) diff --git a/drivers/acpi/Kconfig b/drivers/acpi/Kconfig index 099ca81..23522b4 100644 --- a/drivers/acpi/Kconfig +++ b/drivers/acpi/Kconfig @@ -5,6 +5,7 @@ config ACPI_ARM bool select EARLY_IOREMAP + select ACPI_REDUCED_HARDWARE menuconfig ACPI bool "ACPI (Advanced Configuration and Power Interface) Support" -- 1.8.3.1

10 years, 5 months

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Linaro-acpi November 2013