Linaro-acpi June 2013

linaro-acpi@lists.linaro.org

9 participants
33 discussions

[PATCH] ARM: ACPI: remove 64bit divide replace with do_div

by Graeme Gregory

From: Graeme Gregory <graeme.gregory(a)linaro.org> I some situations custom 64bit by 32bit divide was giving the wrong values so replace it with the internal kernel do_div function instead. Signed-off-by: Graeme Gregory <graeme.gregory(a)linaro.org> --- arch/arm/include/asm/acpi.h | 18 ++--- drivers/acpi/plat/arm/Makefile | 1 - drivers/acpi/plat/arm/acpi_div_64_by_32.S | 105 ----------------------------- 3 files changed, 7 insertions(+), 117 deletions(-) delete mode 100644 drivers/acpi/plat/arm/acpi_div_64_by_32.S diff --git a/arch/arm/include/asm/acpi.h b/arch/arm/include/asm/acpi.h index aafc276..e752c5c 100644 --- a/arch/arm/include/asm/acpi.h +++ b/arch/arm/include/asm/acpi.h @@ -31,6 +31,8 @@ #include <linux/init.h> +#include <asm/div64.h> + #define COMPILER_DEPENDENT_INT64 long long #define COMPILER_DEPENDENT_UINT64 unsigned long long @@ -54,17 +56,11 @@ #define ACPI_ENABLE_IRQS() local_irq_enable() #define ACPI_FLUSH_CPU_CACHE() flush_cache_all() -#define ACPI_DIV_64_BY_32(n_hi, n_lo, d32, q32, r32) \ - asm ("mov r0, %2\n" \ - "mov r1, %3\n" \ - "mov r2, %4\n" \ - "bl __arm_acpi_div_64_by_32\n" \ - "mov %0, r0\n" \ - "mov %1, r1\n" \ - : "=r"(q32), "=r"(r32) /* output operands */ \ - : "r"(n_hi), "r"(n_lo), "r"(d32) /* input operands */ \ - : "r0", "r1", "r2" /* clobbered registers */ \ - ) +#define ACPI_DIV_64_BY_32(n_hi, n_lo, d32, q32, r32) { \ + u64 value = (u64)n_hi << 32 | n_lo; \ + r32 = do_div(value, d32); \ + q32 = value; \ + } #define ACPI_SHIFT_RIGHT_64(n_hi, n_lo) \ asm ("mov r0, %2\n" \ diff --git a/drivers/acpi/plat/arm/Makefile b/drivers/acpi/plat/arm/Makefile index aa9dd19..a1f056d 100644 --- a/drivers/acpi/plat/arm/Makefile +++ b/drivers/acpi/plat/arm/Makefile @@ -1,4 +1,3 @@ obj-y += boot.o obj-y += sleep.o -obj-$(CONFIG_ARM) += acpi_div_64_by_32.o diff --git a/drivers/acpi/plat/arm/acpi_div_64_by_32.S b/drivers/acpi/plat/arm/acpi_div_64_by_32.S deleted file mode 100644 index 573bce4..0000000 --- a/drivers/acpi/plat/arm/acpi_div_64_by_32.S +++ /dev/null @@ -1,105 +0,0 @@ -/* - * Copyright (c) 2013, Al Stone <ahs3(a)redhat.com> - * - * __acpi_arm_div64_by_32: perform integer division of a 64-bit value - * a 32-bit value - * - * The algorithm is borrowed from the GMP library, but has been redone - * here in order to put this implementation under a GPLv2 license. - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; either version 2 of the License, or - * (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA - */ - -#ifdef __ARM_ARCH_7A__ - -#include <linux/linkage.h> - -/* - * This needs to be called in the following manner: - * n_lo => r0 # these are the low 32 bits of the dividend - * n_hi => r1 # the high 32 bits of the dividend - * d32 => r2 # the 32-bit divisor - * - * The result is: - * q32 <= r0 # the 32-bit quotient - * r32 <= r1 # the 32-bit remainder - * - * This should be consistent with the normal ARMv7 calling conventions. - * - */ - -ENTRY(__arm_acpi_div_64_by_32) - mov r12, #32 // loop counter - cmp r2, #0x80000000 // check divisor MSB and clear carry - bcs bigdiv - -loop: adcs r1, r1, r1 // handle each bit - adc r0, r0, r0 - cmp r0, r2 - subcs r0, r0, r2 - sub r12, r12, #1 - teq r12, #0 - bne loop - - mov r3, r0 // stash the remainder for a tic - adc r0, r1, r1 // quotient: add in last carry - mov r1, r3 // remainder (now in right register) - mov pc, lr - -bigdiv: stmfd sp!, { r8, lr } // clear some scratch space - - and r8, r1, #1 // save LSB of dividend - mov lr, r0, lsl #31 - orrs r1, lr, r1, lsr #1 // r1 = lower part >> 1 bit - mov r0, r0, lsr #1 // r0 = higher part >> 1 bit - - and lr, r2, #1 // save LSB of divisor - movs r2, r2, lsr #1 // r2 = floor(divisor / 2) - adc r2, r2, #0 // r2 = ceil(divisor / 2) - -loop2: adcs r1, r1, r1 // handle each bit - adc r0, r0, r0 - cmp r0, r2 - subcs r0, r0, r2 - sub r12, r12, #1 - teq r12, #0 - bne loop2 - - adc r1, r1, r1 // shift and add last carry - add r0, r8, r0, lsl #1 // shift in remaining dividend LSB - tst lr, lr - beq evendiv - - rsb r2, lr, r2, lsl #1 // restore divisor value - adds r0, r0, r1 // adjust for omitted divisor LSB - addcs r1, r1, #1 // adjust quotient if a carry results - subcs r0, r0, r2 // adjust remainder, if carry - cmp r0, r2 - subcs r0, r0, #1 // adjust remainder - addcs r1, r1, #1 // adjust quotient - -evendiv: - mov r3, r0 // stash the remainder for a tic - mov r0, r1 // quotient - mov r1, r3 // remainder - - ldmfd sp!, { r8, pc } // restore the registers used - -ENDPROC(__arm_acpi_div_64_by_32) - -#else /* ! __ARM_ARCH_7A__ */ -#error __arm_acpi_div_64_by_32 not defined for this architecture -#endif - -- 1.7.10.4

10 years, 10 months

RAS and ACPI

by Tomasz Nowicki

Hi Robert, I am doing APEI implementation of ACPI specification. That is, ACPI kernel side of RAS work. I am manage to test some of APEI functionality now. I would like to ask about status of LEG-389 since I want to avoid of doing work that may be actually already done. Regards, Tomasz Nowicki

10 years, 10 months

example GPIO ASL

by Al Stone

Sorry I did not send this out sooner -- I rewrote it a several different times over the last week to play with some ideas... Nonetheless, here's the simple bit of ASL I'm using for GPIO right now: Scope (\_SB) { // Base Address: 0x11400000 Device (GPA0) // GPIO controller GPA0 { Name (_HID, "LINA0002") Name (_UID, 0x00) Method (_CRS, 0x0, Serialized) { Name(RBUF, ResourceTemplate () { Memory32Fixed (ReadWrite, 0x11400000, 0x18) GpioIo (Exclusive, PullDefault, , // debounce timeout , // drive strength , // IO restriction "GPA0") { // pin numbers 0x00, 0x01, 0x02, 0x03, 0x04, 0x05, 0x06, 0x07 } }) Return(RBUF) } } } This is still not quite working in the Samsung gpiolib code just yet. They never really used FDT before (or at least, not in a way I would consider proper) so I'm having to unwind some partial movement to FDT and their specific data structures. GPIO interrupts are not going to be much different but I don't have a good example to send out just yet. You should be able to figure out the address from the current FDT. The pin numbers are much better hidden in mach-exynos/include/mach/gpio.h. Sometimes it's easier just to read them from /sys :). I put this in an SSDT just for grins, but it can also go in the DSDT. -- ciao, al ----------------------------------- Al Stone Software Engineer Linaro Enterprise Group al.stone(a)linaro.org -----------------------------------

10 years, 10 months

[PATCH 1/1] Set macro ACPI_REDUCED_HARDWARE as TRUE for reduced hardware paltform

by Hanjun Guo

PM Event and Control registers and other ACPI fixed hardware features were not supported on ARM64 yet, so we need enable reduced hardware as described in ACPI 5.0. I met a boot panic failure on the ARMv8 model, [ 9.024370] Unable to handle kernel paging request at virtual address ffffffbffbe00001 [ 9.024423] pgd = ffffffc00007d000 [ 9.024468] [ffffffbffbe00001] *pgd=000000008007f003, *pmd=0000000000000000 [ 9.024538] Internal error: Oops: 96000006 [#1] SMP [ 9.024577] Modules linked in: [ 9.024627] CPU: 0 Not tainted (3.9.0+ #3) [ 9.024691] PC is at acpi_os_read_port+0x58/0xc8 [ 9.024753] LR is at acpi_hw_read_port+0x4c/0xc4 [ 9.024810] pc : [<ffffffc0002810cc>] lr : [<ffffffc0002a4fc4>] pstate: 600003c5 .... [ 9.031956] Call trace: [ 9.032021] [<ffffffc0002810cc>] acpi_os_read_port+0x58/0xc8 [ 9.032094] [<ffffffc0002a4fc4>] acpi_hw_read_port+0x4c/0xc4 [ 9.032165] [<ffffffc0002a4198>] acpi_hw_read+0x6c/0x100 [ 9.032237] [<ffffffc0002a4250>] acpi_hw_read_multiple+0x24/0x70 [ 9.032312] [<ffffffc0002a457c>] acpi_hw_register_read+0xa8/0x164 [ 9.032386] [<ffffffc0002a52dc>] acpi_write_bit_register+0x9c/0x194 [ 9.032472] [<ffffffc0002bffb4>] acpi_processor_get_power_info+0x6c4/0x748 [ 9.032550] [<ffffffc000565220>] acpi_processor_power_init+0xac/0x138 [ 9.032630] [<ffffffc0003f3c00>] acpi_processor_start+0x48/0x138 [ 9.032704] [<ffffffc000565118>] acpi_processor_add+0x43c/0x498 [ 9.032784] [<ffffffc000283a74>] acpi_device_probe+0x3c/0x198 [ 9.032862] [<ffffffc0002ef0fc>] driver_probe_device+0x90/0x348 [ 9.032940] [<ffffffc0002ef450>] __driver_attach+0x9c/0xa0 [ 9.033015] [<ffffffc0002ed40c>] bus_for_each_dev+0x4c/0x8c [ 9.033090] [<ffffffc0002eeb98>] driver_attach+0x20/0x28 [ 9.033166] [<ffffffc0002ee6e0>] bus_add_driver+0xfc/0x254 [ 9.033244] [<ffffffc0002ef8b0>] driver_register+0x6c/0x184 [ 9.033325] [<ffffffc000284894>] acpi_bus_register_driver+0x34/0x44 [ 9.033400] [<ffffffc000559c60>] acpi_processor_init+0x28/0x40 [ 9.033469] [<ffffffc000081438>] do_one_initcall+0x100/0x138 [ 9.033544] [<ffffffc0005448c8>] kernel_init_freeable+0x128/0x1cc [ 9.033620] [<ffffffc0003f2f90>] kernel_init+0x10/0xcc [ 9.033700] Code: d2bf7c02 f2dff7e2 f2ffffe2 8b020000 (79400000) [ 9.033843] ---[ end trace 64376967e6bc20a9 ]--- [ 9.033995] Kernel panic - not syncing: Attempted to kill init! exitcode=0x0000000b Since PM control register is not exist on ARM64, It will cause such failure. ACPICA provided a macro to enable reduced hardware feature, and functions deal with ACPI hardware will defined as empty when ACPI_REDUCED_HARDWARE is TRUE, so we can avoid panic when excute the ACPI driver code. Signed-off-by: Hanjun Guo <hanjun.guo(a)linaro.org> --- include/acpi/acconfig.h | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) mode change 100644 => 100755 arch/arm64/boot/install.sh diff --git a/arch/arm64/boot/install.sh b/arch/arm64/boot/install.sh old mode 100644 new mode 100755 diff --git a/include/acpi/acconfig.h b/include/acpi/acconfig.h index 14ceff7..cb80ea9 100644 --- a/include/acpi/acconfig.h +++ b/include/acpi/acconfig.h @@ -100,7 +100,7 @@ * ACPI PM timer * FACS table (Waking vectors and Global Lock) */ -#define ACPI_REDUCED_HARDWARE FALSE +#define ACPI_REDUCED_HARDWARE TRUE /****************************************************************************** * -- 1.7.9.5

10 years, 10 months

Combined armv7/armv8 3.10-rc6 kernel

by Graeme Gregory

Hi Everyone, I have combined our work on armv7 and armv8 into one branch based on 3.10rc6 mainline kernel. This is newer than our previous base which was 3.9 based. This kernel boots on both of our main test platforms 1) Arndale 2) armv8 Foundation Model The branch is available here. https://git.linaro.org/gitweb?p=arm/acpi/acpi.git;a=shortlog;h=refs/heads/a… I have attached to the email the two configs I used. I would suggest that we use this is a base for ongoing work so its easy to switch between model and hardware for tests. Thanks Graeme

10 years, 10 months

Upstreaming Session

by Graeme Gregory

Hi, I think the upstreaming session I was talking about at standup is this one. http://lce-13.zerista.com/event/member/81058 I suggest that even though this clashes with hacking sessions most of the team should go to this to prevent Greg KH using you as an example at future connects. For those who were not at last connect here is the video of Gregs talk https://www.youtube.com/watch?v=iiED1K98lnw Thanks Graeme

10 years, 10 months

[PATCH 00/14] armv8 ACPI bringup

by Graeme Gregory

Hi Guys, I have just pushed this series of patches to the official repo. Branch is acpi-armv8 This brings us to the same state in armv8 as we are in for armv7. Without the prototype stuff like i2c drivers. But is a base to start work on for armv8. I have tried to get these patches as checkpatch clean as possible. I want to try and merge armv7 and armv8 changes into one and maintain that together as I think there is very little different in the two platforms from the point of initialisation or drivers. Thanks Graeme

10 years, 10 months

[PATCH 1/2] ARM64: ACPI: fix email address for Al Stone

by Graeme Gregory

From: Graeme Gregory <graeme.gregory(a)linaro.org> Change to @linaro.org for Al Stone email address Signed-off-by: Graeme Gregory <graeme.gregory(a)linaro.org> --- arch/arm64/include/asm/acpi.h | 2 +- arch/arm64/kernel/acpi/boot.c | 2 +- 2 files changed, 2 insertions(+), 2 deletions(-) diff --git a/arch/arm64/include/asm/acpi.h b/arch/arm64/include/asm/acpi.h index b68d819..605478e 100644 --- a/arch/arm64/include/asm/acpi.h +++ b/arch/arm64/include/asm/acpi.h @@ -1,5 +1,5 @@ /* - * Copyright (C) 2013, Al Stone <ahs3(a)redhat.com> + * Copyright (C) 2013, Al Stone <al.stone(a)linaro.org> * * ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ * diff --git a/arch/arm64/kernel/acpi/boot.c b/arch/arm64/kernel/acpi/boot.c index 5db7f6b..e62d167 100644 --- a/arch/arm64/kernel/acpi/boot.c +++ b/arch/arm64/kernel/acpi/boot.c @@ -3,7 +3,7 @@ * * Copyright (C) 2001, 2002 Paul Diefenbaugh <paul.s.diefenbaugh(a)intel.com> * Copyright (C) 2001 Jun Nakajima <jun.nakajima(a)intel.com> - * Copyright (C) 2013, Al Stone <ahs3(a)redhat.com> (ARM version) + * Copyright (C) 2013, Al Stone <al.stone(a)linaro.org> (ARM version) * * ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ * -- 1.7.10.4

10 years, 10 months

[PATCH] ACPI: ARM: clean up unneeded error/debug messages on boot

by al.stone＠linaro.org

From: Al Stone <ahs3(a)redhat.com> Signed-off-by: Al Stone <al.stone(a)linaro.org> --- arch/arm/kernel/acpi/boot.c | 6 ------ drivers/acpi/osl.c | 28 ++++++++++++++-------------- 2 files changed, 14 insertions(+), 20 deletions(-) diff --git a/arch/arm/kernel/acpi/boot.c b/arch/arm/kernel/acpi/boot.c index 8848024..be1e5d2 100644 --- a/arch/arm/kernel/acpi/boot.c +++ b/arch/arm/kernel/acpi/boot.c @@ -1390,7 +1390,6 @@ void __init acpi_boot_table_init(void) return; } - printk(KERN_INFO "(I) acpi_table_init call completed\n"); acpi_table_parse(ACPI_SIG_BOOT, acpi_parse_sbf); /* @@ -1406,7 +1405,6 @@ void __init acpi_boot_table_init(void) } } - printk(KERN_INFO "(I) exit acpi_boot_table_init\n"); } int __init early_acpi_boot_init(void) @@ -1417,8 +1415,6 @@ int __init early_acpi_boot_init(void) if (acpi_disabled) return 1; - printk(KERN_INFO "enter early_acpi_boot_init\n"); - /* * Process the Multiple APIC Description Table (MADT), if present */ @@ -1435,8 +1431,6 @@ int __init acpi_boot_init(void) if (acpi_disabled) return 1; - printk(KERN_INFO "enter acpi_boot_init\n"); - acpi_table_parse(ACPI_SIG_BOOT, acpi_parse_sbf); /* diff --git a/drivers/acpi/osl.c b/drivers/acpi/osl.c index 1e17bfd..42255a1 100644 --- a/drivers/acpi/osl.c +++ b/drivers/acpi/osl.c @@ -253,7 +253,7 @@ void acpi_find_arm_root_pointer(acpi_physical_address *pa) * What we do is, while using u-boot still, is use the values * that have already been retrieved from the FDT node * (/chosen/linux,acpi-start and /chosen/linux,acpi-len) which - * contain the address of the first byte of the RSDP after it + * contain the address of the first byte of the RSDP after it * has been loaded into RAM during u-boot (e.g., using something * like fatload mmc 0:2 42008000 my.blob), and the size of the * data in the complete ACPI blob. We only do this since we have @@ -267,7 +267,7 @@ void acpi_find_arm_root_pointer(acpi_physical_address *pa) struct acpi_table_rsdp *rp; if (!acpi_arm_rsdp_info.phys_address && !acpi_arm_rsdp_info.size) { - printk(KERN_ERR "(E) ACPI: failed to find rsdp info\n"); + printk(KERN_ERR PREFIX "failed to find rsdp info\n"); *pa = (acpi_physical_address)NULL; return; } @@ -277,25 +277,25 @@ void acpi_find_arm_root_pointer(acpi_physical_address *pa) *pa = (acpi_physical_address)address; rp = (struct acpi_table_rsdp *)address; - printk(KERN_DEBUG "(I) ACPI rsdp rp: 0x%08lx\n", (long unsigned int)rp); + printk(KERN_DEBUG PREFIX "rsdp rp: 0x%08lx\n", (long unsigned int)rp); if (rp) { - printk(KERN_DEBUG "(I) ACPI rsdp content:\n"); - printk(KERN_DEBUG "(I) signature: %.8s\n", rp->signature); - printk(KERN_DEBUG "(I) checksum: 0x%02x\n", rp->checksum); - printk(KERN_DEBUG "(I) oem_id: %.6s\n", rp->oem_id); - printk(KERN_DEBUG "(I) revision: %d\n", rp->revision); - printk(KERN_DEBUG "(I) rsdt: 0x%08lX\n", + printk(KERN_DEBUG PREFIX "rsdp content:\n"); + printk(KERN_DEBUG PREFIX " signature: %.8s\n", rp->signature); + printk(KERN_DEBUG PREFIX " checksum: 0x%02x\n", rp->checksum); + printk(KERN_DEBUG PREFIX " oem_id: %.6s\n", rp->oem_id); + printk(KERN_DEBUG PREFIX " revision: %d\n", rp->revision); + printk(KERN_DEBUG PREFIX " rsdt: 0x%08lX\n", (long unsigned int)rp->rsdt_physical_address); - printk(KERN_DEBUG "(I) length: %d\n", rp->length); - printk(KERN_DEBUG "(I) xsdt: 0x%016llX\n", + printk(KERN_DEBUG PREFIX " length: %d\n", rp->length); + printk(KERN_DEBUG PREFIX " xsdt: 0x%016llX\n", (u64)rp->xsdt_physical_address); - printk(KERN_DEBUG "(I) x_checksum: 0x%02x\n", + printk(KERN_DEBUG PREFIX " x_checksum: 0x%02x\n", rp->extended_checksum); *pa = (acpi_physical_address)(virt_to_phys(rp)); } else { - printk(KERN_ERR "(E) ACPI missing rsdp info\n"); + printk(KERN_ERR PREFIX "missing rsdp info\n"); *pa = (acpi_physical_address)NULL; } @@ -1324,7 +1324,7 @@ acpi_status acpi_os_wait_semaphore(acpi_handle handle, u32 units, u16 timeout) jiffies = MAX_SCHEDULE_TIMEOUT; else jiffies = msecs_to_jiffies(timeout); - + ret = down_timeout(sem, jiffies); if (ret) status = AE_TIME; -- 1.8.1.4

10 years, 10 months

[PATCH] ARM64: ACPI remove unused assembler optimisations

by Graeme Gregory

From: Graeme Gregory <graeme.gregory(a)linaro.org> Modern linux systems all define ACPI_USE_NATIVE_DIVIDE as they support 64bit maths natively. So these assembly versions are never used. Remove them to save confusion. Signed-off-by: Graeme Gregory <graeme.gregory(a)linaro.org> --- arch/arm64/include/asm/acpi.h | 26 ------- arch/arm64/kernel/acpi/acpi_div_64_by_32.S | 105 ---------------------------- 2 files changed, 131 deletions(-) delete mode 100644 arch/arm64/kernel/acpi/acpi_div_64_by_32.S diff --git a/arch/arm64/include/asm/acpi.h b/arch/arm64/include/asm/acpi.h index 3ef9fc0..b68d819 100644 --- a/arch/arm64/include/asm/acpi.h +++ b/arch/arm64/include/asm/acpi.h @@ -54,32 +54,6 @@ #define ACPI_ENABLE_IRQS() local_irq_enable() #define ACPI_FLUSH_CPU_CACHE() flush_cache_all() -#define ACPI_DIV_64_BY_32(n_hi, n_lo, d32, q32, r32) (\ - asm ("mov r0, %2\n" \ - "mov r1, %3\n" \ - "mov r2, %4\n" \ - "bl __arm_acpi_div_64_by_32\n" \ - "mov %0, r0\n" \ - "mov %1, r1\n" \ - : "=r"(q32), "=r"(r32) /* output */ \ - : "r"(n_hi), "r"(n_lo), "r"(d32) /* input */ \ - : "r0", "r1", "r2" /* clobbered registers */ \ - )) - -#define ACPI_SHIFT_RIGHT_64(n_hi, n_lo) (\ - asm ("mov r0, %2\n" \ - "mov r1, %3\n" \ - "and r2, r0, #1\n" \ - "lsr r0, r0, #1\n" \ - "lsr r1, r1, #1\n" \ - "orr r1, r1, r2, lsl #31\n" \ - "mov %0, r0\n" \ - "mov %1, r1\n" \ - : "=r"(n_hi), "=r"(n_lo) /* output operands */ \ - : "0"(n_hi), "1"(n_lo) /* input operands */ \ - : "r0", "r1", "r2" /* clobbered registers */ \ - )) - /* Blob handling macros */ #define ACPI_BLOB_HEADER_SIZE 8 diff --git a/arch/arm64/kernel/acpi/acpi_div_64_by_32.S b/arch/arm64/kernel/acpi/acpi_div_64_by_32.S deleted file mode 100644 index 99a14a4..0000000 --- a/arch/arm64/kernel/acpi/acpi_div_64_by_32.S +++ /dev/null @@ -1,105 +0,0 @@ -/* - * Copyright (c) 2013, Al Stone <ahs3(a)redhat.com> - * - * __acpi_arm_div64_by_32: perform integer division of a 64-bit value - * a 32-bit value - * - * The algorithm is borrowed from the GMP library, but has been redone - * here in order to put this implementation under a GPLv2 license. - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; either version 2 of the License, or - * (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA - */ - -#ifdef __ARM_ARCH_8__ - -#include <linux/linkage.h> - -/* - * This needs to be called in the following manner: - * n_lo => r0 # these are the low 32 bits of the dividend - * n_hi => r1 # the high 32 bits of the dividend - * d32 => r2 # the 32-bit divisor - * - * The result is: - * q32 <= r0 # the 32-bit quotient - * r32 <= r1 # the 32-bit remainder - * - * This should be consistent with the normal ARMv7 calling conventions. - * - */ - -ENTRY(__arm_acpi_div_64_by_32) - mov r12, #32 // loop counter - cmp r2, #0x80000000 // check divisor MSB and clear carry - bcs bigdiv - -loop: adcs r1, r1, r1 // handle each bit - adc r0, r0, r0 - cmp r0, r2 - subcs r0, r0, r2 - sub r12, r12, #1 - teq r12, #0 - bne loop - - mov r3, r0 // stash the remainder for a tic - adc r0, r1, r1 // quotient: add in last carry - mov r1, r3 // remainder (now in right register) - mov pc, lr - -bigdiv: stmfd sp!, { r8, lr } // clear some scratch space - - and r8, r1, #1 // save LSB of dividend - mov lr, r0, lsl #31 - orrs r1, lr, r1, lsr #1 // r1 = lower part >> 1 bit - mov r0, r0, lsr #1 // r0 = higher part >> 1 bit - - and lr, r2, #1 // save LSB of divisor - movs r2, r2, lsr #1 // r2 = floor(divisor / 2) - adc r2, r2, #0 // r2 = ceil(divisor / 2) - -loop2: adcs r1, r1, r1 // handle each bit - adc r0, r0, r0 - cmp r0, r2 - subcs r0, r0, r2 - sub r12, r12, #1 - teq r12, #0 - bne loop2 - - adc r1, r1, r1 // shift and add last carry - add r0, r8, r0, lsl #1 // shift in remaining dividend LSB - tst lr, lr - beq evendiv - - rsb r2, lr, r2, lsl #1 // restore divisor value - adds r0, r0, r1 // adjust for omitted divisor LSB - addcs r1, r1, #1 // adjust quotient if a carry results - subcs r0, r0, r2 // adjust remainder, if carry - cmp r0, r2 - subcs r0, r0, #1 // adjust remainder - addcs r1, r1, #1 // adjust quotient - -evendiv: - mov r3, r0 // stash the remainder for a tic - mov r0, r1 // quotient - mov r1, r3 // remainder - - ldmfd sp!, { r8, pc } // restore the registers used - -ENDPROC(__arm_acpi_div_64_by_32) - -#else /* ! __ARM_ARCH_7A__ */ -#error __arm_acpi_div_64_by_32 not defined for this architecture -#endif - -- 1.7.10.4

10 years, 10 months

2024

2023

2022

2021

2020

2019

2018

2017

2016

2015

2014

2013

Linaro-acpi June 2013