From: Graeme Gregory <graeme.gregory(a)linaro.org>
I some situations custom 64bit by 32bit divide was giving the wrong
values so replace it with the internal kernel do_div function instead.
Signed-off-by: Graeme Gregory <graeme.gregory(a)linaro.org>
---
arch/arm/include/asm/acpi.h | 18 ++---
drivers/acpi/plat/arm/Makefile | 1 -
drivers/acpi/plat/arm/acpi_div_64_by_32.S | 105 -----------------------------
3 files changed, 7 insertions(+), 117 deletions(-)
delete mode 100644 drivers/acpi/plat/arm/acpi_div_64_by_32.S
diff --git a/arch/arm/include/asm/acpi.h b/arch/arm/include/asm/acpi.h
index aafc276..e752c5c 100644
--- a/arch/arm/include/asm/acpi.h
+++ b/arch/arm/include/asm/acpi.h
@@ -31,6 +31,8 @@
#include <linux/init.h>
+#include <asm/div64.h>
+
#define COMPILER_DEPENDENT_INT64 long long
#define COMPILER_DEPENDENT_UINT64 unsigned long long
@@ -54,17 +56,11 @@
#define ACPI_ENABLE_IRQS() local_irq_enable()
#define ACPI_FLUSH_CPU_CACHE() flush_cache_all()
-#define ACPI_DIV_64_BY_32(n_hi, n_lo, d32, q32, r32) \
- asm ("mov r0, %2\n" \
- "mov r1, %3\n" \
- "mov r2, %4\n" \
- "bl __arm_acpi_div_64_by_32\n" \
- "mov %0, r0\n" \
- "mov %1, r1\n" \
- : "=r"(q32), "=r"(r32) /* output operands */ \
- : "r"(n_hi), "r"(n_lo), "r"(d32) /* input operands */ \
- : "r0", "r1", "r2" /* clobbered registers */ \
- )
+#define ACPI_DIV_64_BY_32(n_hi, n_lo, d32, q32, r32) { \
+ u64 value = (u64)n_hi << 32 | n_lo; \
+ r32 = do_div(value, d32); \
+ q32 = value; \
+ }
#define ACPI_SHIFT_RIGHT_64(n_hi, n_lo) \
asm ("mov r0, %2\n" \
diff --git a/drivers/acpi/plat/arm/Makefile b/drivers/acpi/plat/arm/Makefile
index aa9dd19..a1f056d 100644
--- a/drivers/acpi/plat/arm/Makefile
+++ b/drivers/acpi/plat/arm/Makefile
@@ -1,4 +1,3 @@
obj-y += boot.o
obj-y += sleep.o
-obj-$(CONFIG_ARM) += acpi_div_64_by_32.o
diff --git a/drivers/acpi/plat/arm/acpi_div_64_by_32.S b/drivers/acpi/plat/arm/acpi_div_64_by_32.S
deleted file mode 100644
index 573bce4..0000000
--- a/drivers/acpi/plat/arm/acpi_div_64_by_32.S
+++ /dev/null
@@ -1,105 +0,0 @@
-/*
- * Copyright (c) 2013, Al Stone <ahs3(a)redhat.com>
- *
- * __acpi_arm_div64_by_32: perform integer division of a 64-bit value
- * a 32-bit value
- *
- * The algorithm is borrowed from the GMP library, but has been redone
- * here in order to put this implementation under a GPLv2 license.
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; either version 2 of the License, or
- * (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
- */
-
-#ifdef __ARM_ARCH_7A__
-
-#include <linux/linkage.h>
-
-/*
- * This needs to be called in the following manner:
- * n_lo => r0 # these are the low 32 bits of the dividend
- * n_hi => r1 # the high 32 bits of the dividend
- * d32 => r2 # the 32-bit divisor
- *
- * The result is:
- * q32 <= r0 # the 32-bit quotient
- * r32 <= r1 # the 32-bit remainder
- *
- * This should be consistent with the normal ARMv7 calling conventions.
- *
- */
-
-ENTRY(__arm_acpi_div_64_by_32)
- mov r12, #32 // loop counter
- cmp r2, #0x80000000 // check divisor MSB and clear carry
- bcs bigdiv
-
-loop: adcs r1, r1, r1 // handle each bit
- adc r0, r0, r0
- cmp r0, r2
- subcs r0, r0, r2
- sub r12, r12, #1
- teq r12, #0
- bne loop
-
- mov r3, r0 // stash the remainder for a tic
- adc r0, r1, r1 // quotient: add in last carry
- mov r1, r3 // remainder (now in right register)
- mov pc, lr
-
-bigdiv: stmfd sp!, { r8, lr } // clear some scratch space
-
- and r8, r1, #1 // save LSB of dividend
- mov lr, r0, lsl #31
- orrs r1, lr, r1, lsr #1 // r1 = lower part >> 1 bit
- mov r0, r0, lsr #1 // r0 = higher part >> 1 bit
-
- and lr, r2, #1 // save LSB of divisor
- movs r2, r2, lsr #1 // r2 = floor(divisor / 2)
- adc r2, r2, #0 // r2 = ceil(divisor / 2)
-
-loop2: adcs r1, r1, r1 // handle each bit
- adc r0, r0, r0
- cmp r0, r2
- subcs r0, r0, r2
- sub r12, r12, #1
- teq r12, #0
- bne loop2
-
- adc r1, r1, r1 // shift and add last carry
- add r0, r8, r0, lsl #1 // shift in remaining dividend LSB
- tst lr, lr
- beq evendiv
-
- rsb r2, lr, r2, lsl #1 // restore divisor value
- adds r0, r0, r1 // adjust for omitted divisor LSB
- addcs r1, r1, #1 // adjust quotient if a carry results
- subcs r0, r0, r2 // adjust remainder, if carry
- cmp r0, r2
- subcs r0, r0, #1 // adjust remainder
- addcs r1, r1, #1 // adjust quotient
-
-evendiv:
- mov r3, r0 // stash the remainder for a tic
- mov r0, r1 // quotient
- mov r1, r3 // remainder
-
- ldmfd sp!, { r8, pc } // restore the registers used
-
-ENDPROC(__arm_acpi_div_64_by_32)
-
-#else /* ! __ARM_ARCH_7A__ */
-#error __arm_acpi_div_64_by_32 not defined for this architecture
-#endif
-
--
1.7.10.4
Hi Robert,
I am doing APEI implementation of ACPI specification. That is, ACPI
kernel side of RAS work. I am manage to test some of APEI functionality
now. I would like to ask about status of LEG-389 since I want to avoid
of doing work that may be actually already done.
Regards,
Tomasz Nowicki
Sorry I did not send this out sooner -- I rewrote it a several
different times over the last week to play with some ideas...
Nonetheless, here's the simple bit of ASL I'm using for GPIO right
now:
Scope (\_SB)
{
// Base Address: 0x11400000
Device (GPA0) // GPIO controller GPA0
{
Name (_HID, "LINA0002")
Name (_UID, 0x00)
Method (_CRS, 0x0, Serialized)
{
Name(RBUF, ResourceTemplate ()
{
Memory32Fixed (ReadWrite,
0x11400000,
0x18)
GpioIo (Exclusive,
PullDefault,
, // debounce timeout
, // drive strength
, // IO restriction
"GPA0")
{ // pin numbers
0x00,
0x01,
0x02,
0x03,
0x04,
0x05,
0x06,
0x07
}
})
Return(RBUF)
}
}
}
This is still not quite working in the Samsung gpiolib code just yet.
They never really used FDT before (or at least, not in a way I would
consider proper) so I'm having to unwind some partial movement to FDT
and their specific data structures.
GPIO interrupts are not going to be much different but I don't have a
good example to send out just yet.
You should be able to figure out the address from the current FDT.
The pin numbers are much better hidden in
mach-exynos/include/mach/gpio.h. Sometimes it's easier just to read
them from /sys :).
I put this in an SSDT just for grins, but it can also go in the DSDT.
--
ciao,
al
-----------------------------------
Al Stone
Software Engineer
Linaro Enterprise Group
al.stone(a)linaro.org
-----------------------------------
Hi Everyone,
I have combined our work on armv7 and armv8 into one branch based on 3.10rc6
mainline kernel. This is newer than our previous base which was 3.9 based.
This kernel boots on both of our main test platforms
1) Arndale
2) armv8 Foundation Model
The branch is available here.
https://git.linaro.org/gitweb?p=arm/acpi/acpi.git;a=shortlog;h=refs/heads/a…
I have attached to the email the two configs I used.
I would suggest that we use this is a base for ongoing work so its easy to
switch between model and hardware for tests.
Thanks
Graeme
Hi,
I think the upstreaming session I was talking about at standup is this one.
http://lce-13.zerista.com/event/member/81058
I suggest that even though this clashes with hacking sessions most of the
team should go to this to prevent Greg KH using you as an example at future
connects.
For those who were not at last connect here is the video of Gregs talk
https://www.youtube.com/watch?v=iiED1K98lnw
Thanks
Graeme
Hi Guys,
I have just pushed this series of patches to the official repo.
Branch is acpi-armv8
This brings us to the same state in armv8 as we are in for armv7. Without
the prototype stuff like i2c drivers. But is a base to start work on
for armv8.
I have tried to get these patches as checkpatch clean as possible.
I want to try and merge armv7 and armv8 changes into one and maintain that
together as I think there is very little different in the two platforms
from the point of initialisation or drivers.
Thanks
Graeme