Linaro-acpi June 2013

linaro-acpi@lists.linaro.org

9 participants
33 discussions

[PATCH 0/5] ARM:ACPI: CPU topology support for ACPI processor driver

by Hanjun Guo

This patch set is about to implement the CPU topology support for ACPI processor driver, which includes the os lever code and the ASL code. both are compiled ok, but not tested on the hardware; For the ACPI processor driver, when cpu is hot added, arch_fix_phys_package_id(), acpi_map_lsapic() and arch_register_cpu() are arch specific; When cpu is hot removed, arch_unregister_cpu()/acpi_unmap_lsapic() is arch specific. arch_register_cpu() will register the logic cpu on sysfs, create topology information interface, and create online/offline interface for cpu hotplug. unregister is doing the reverse. For the ASL part, I implement the proto code for the CPU topology with one physical CPU and two cpu cores. Hanjun Guo (5): ARM:ACPI: introduce arch_fix_phys_package_id() for armv7 ARM:ACPI: move topology_init() to arch/arm/kernel/topology.c ARM:ACPI: introduce arch_register_cpu() and arch_unregister_cpu() ARM:ACPI: remove CONFIG_X86 in processor_driver.c ASL code for CPU topology support for ACPI processor driver arch/arm/boot/asl/exynos5250-arndale.acpi/dsdt.asl | 106 +++++++++++++++++++- arch/arm/include/asm/cpu.h | 6 ++ arch/arm/include/asm/topology.h | 1 + arch/arm/kernel/setup.c | 21 ---- arch/arm/kernel/topology.c | 54 ++++++++++ drivers/acpi/processor_driver.c | 9 -- 6 files changed, 165 insertions(+), 32 deletions(-) -- 1.7.9.5

10 years, 11 months

[PATCH 0/5] Prototype i2c bus probe from ACPI

by Graeme Gregory

This patch series implements probing the s3c24xx i2c bus device from ACPI tables. I have included an update to the DSDT for the correct information for I2C0 which is the port connected to the PMIC so is easy to test with i2c tools. On boot I can successfully communicate with the slave at 0x66 on this bus. root@arndale:~# i2cdump -f -y 0 0x66 No size specified (using byte-data access) 0 1 2 3 4 5 6 7 8 9 a b c d e f 0123456789abcdef 00: 03 00 00 00 c0 78 00 01 17 07 01 0e e5 85 4f de ?...?x.???????O? 10: 03 03 03 23 23 23 23 23 23 23 23 23 23 23 23 23 ???############# 20: 23 23 23 23 23 23 23 23 23 23 23 23 23 23 23 00 ###############. 30: 00 45 d9 38 fa 34 00 50 50 50 50 50 50 db 40 00 .E?8?4.PPPPPP?@. 40: 40 40 40 40 40 40 3a 40 00 40 40 40 40 40 40 d9 @@@@@@:@.@@@@@@? 50: 58 70 88 b8 18 58 d8 68 d8 30 98 a8 cc d0 16 1c Xp???X?h?0?????? 60: 28 d4 d4 d4 cc cc c8 2c d4 d4 ec d4 d4 c8 d4 e8 (??????,???????? 70: 28 2c 2c 2c 32 28 2c 08 14 14 14 00 00 00 00 00 (,,,2(,????..... 80: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................ 90: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................ a0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................ b0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................ c0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................ d0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................ e0: 01 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ?............... f0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................ can see the correct IRQ allocated root@arndale:~# cat /proc/interrupts CPU0 CPU1 29: 0 0 GIC arch_timer 30: 24177 6574 GIC arch_timer 66: 0 0 GIC dma-pl330.0 67: 0 0 GIC dma-pl330.1 85: 538 0 GIC exynos4210-uart.2 88: 1024 0 GIC LINA0001:00 97: 0 0 GIC exynos-tmu 103: 11813 0 GIC ehci_hcd:usb1, ohci_hcd:usb2 104: 0 0 GIC xhci-hcd:usb3 107: 432 0 GIC dw-mci 109: 67422 0 GIC dw-mci 126: 0 0 GIC drm_mixer 152: 0 0 GIC mct_tick0_irq 153: 0 0 GIC mct_tick1_irq 156: 0 0 GIC dma-pl330.2 347: 0 0 COMBINER mct_comp_irq IPI0: 0 1 CPU wakeup interrupts IPI1: 0 0 Timer broadcast interrupts IPI2: 5233 6766 Rescheduling interrupts IPI3: 0 0 Function call interrupts IPI4: 98 44 Single function call interrupts IPI5: 0 0 CPU stop interrupts IPI6: 0 0 CPU backtrace Err: 0 and can see the correct GPIO allocated. GPIOs 42-45, GPB3: gpio-42 (i2c-bus ) in hi gpio-43 (i2c-bus ) in hi The GPIO allocation is not how it would be in a final implementation as similar to FDT the GPIO providers (like GIC) can be hierachical so you would normally use the device name + offset to locate the correct GPIO. This is very similar to how it works in FDT as well. Thanks Graeme

10 years, 11 months

[PATCH 1/1] [RFC] ASL code for CPU topology support for ACPI processor driver

by Hanjun Guo

This is the proto ASL code for CPU topology support. In the code, I not sure about the parking_version, performance_interrupt, parked_address and base_address value of the _MAT Method return buffer. Comments are welcomed! Signed-off-by: Hanjun Guo <hanjun.guo(a)linaro.org> --- arch/arm/boot/asl/exynos5250-arndale.acpi/dsdt.asl | 106 +++++++++++++++++++- 1 file changed, 104 insertions(+), 2 deletions(-) diff --git a/arch/arm/boot/asl/exynos5250-arndale.acpi/dsdt.asl b/arch/arm/boot/asl/exynos5250-arndale.acpi/dsdt.asl index 0ae1b12..cab32db 100644 --- a/arch/arm/boot/asl/exynos5250-arndale.acpi/dsdt.asl +++ b/arch/arm/boot/asl/exynos5250-arndale.acpi/dsdt.asl @@ -14,14 +14,116 @@ DefinitionBlock ( "ARNDALE ", // table ID 0x00000001) // OEM revision { + /* Scope (\_PR) { Processor (CPU0, 0x01, 0x00000410, 0x06) {} Processor (CPU1, 0x02, 0x00000410, 0x06) {} } + */ Scope (\_SB) { - } -} + Device (SCK0) + { + Name (_HID, "ACPI0004") + Name (_UID, 0x00) + Method (_STA, 0, NotSerialized) + { + Return (0x0F) + } + + Device (PRC0) + { + Name (_HID, "ACPI0007") + Name (_UID, 0x00) + + /* CPU0 will be always present */ + Method (_STA, 0, NotSerialized) + { + Return (0x0F) + } + + Name (MAT0, Buffer (0x28) + { + /* 0000 */ 0x0B, 0x28, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, /* type, len, reserved, gic_id */ + /* 0008 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x01, /* uid, flags */ + /* 0010 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, /* parking_version, performance_interrupt */ + /* 0018 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, /* parked_address */ + /* 0020 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00 /* base_address */ + }) + + Name (MAT1, Buffer (0x28) + { + /* 0000 */ 0x0B, 0x28, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + /* 0008 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + /* 0010 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + /* 0018 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + /* 0020 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00 + }) + + Method (_MAT, 0, NotSerialized) + { + If (_STA()) + { + Return (MAT0) + } + Else + { + Return (MAT1) + } + } + } + + Device (PRC1) + { + Name (_HID, "ACPI0007") + Name (_UID, 0x01) + Name (STA1, 0x0F) + Method (_STA, 0, NotSerialized) + { + Return (STA1) + } + + Method (_EJ0, 1, NotSerialized) + { + If (LEqual (STA1, 0x0F)) + { + Store (0x00, STA1) + } + } + + Name (MAT0, Buffer (0x28) + { + /* 0000 */ 0x0B, 0x28, 0x00, 0x00, 0x00, 0x00, 0x00, 0x01, /* type, len, reserved, gic_id */ + /* 0008 */ 0x00, 0x00, 0x00, 0x01, 0x00, 0x00, 0x00, 0x01, /* uid, flags */ + /* 0010 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, /* parking_version, performance_interrupt */ + /* 0018 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, /* parked_address */ + /* 0020 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00 /* base_address */ + }) + + Name (MAT1, Buffer (0x28) + { + /* 0000 */ 0x0B, 0x28, 0x00, 0x00, 0x00, 0x00, 0x00, 0x01, + /* 0008 */ 0x00, 0x00, 0x00, 0x01, 0x00, 0x00, 0x00, 0x00, + /* 0010 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + /* 0018 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + /* 0020 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00 + }) + + Method (_CRS, 0, NotSerialized) + { + If (LEqual (STA1, 0x0F)) + { + Return (MAT0) + } + Else + { + Return (MAT1) + } + } + } + } +} +} -- 1.7.9.5

10 years, 11 months

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Linaro-acpi June 2013