Here is the first version of prototype for cpu-hotplug on ARM64.
The first part is patch 1~3 for MADT parse.
MADT is being parsed and the cpu possible map and cpu present map are
prefilled.
I kept the terminology consistent with x86 as Al and Andrea's advice.
CPU possible map is equal to the GIC entries in MADT no matter enabled or
disabled, and cpu present map limits to the enabled cpu in MADT. This is
the base for cpu hot-plug.
The second part is patch 4~10 for ACPI cpu hot-plug drivers.
ACPI driver for CPU hot-plug is implemented in this part, when the cpu
logical online/offline is ready, the cpu hot-plug can work on arm64.
Please give some comments, thanks.
Hanjun Guo (10):
ARM64 / ACPI: MADT for armv8 foundation model
ARM64 / ACPI: Core functions for MADT parse
ARM64 / ACPI: Prefill cpu possible and present maps and map logical cpu
id to APIC id
ARM64 / ACPI: Declare processors in ACPI namespace in the DSDT
ARM64 / ACPI: Introduce map_gic_id() to get apic id from MADT or _MAT
method
ARM64 / ACPI: Get logic cpu id to see if the cpu is a new added cpu
ARM64 / ACPI: Implement acpi_map/unmap_lsapic for cpu hot-plug
ARM64 / ACPI: Fix the variable declared but not defined
ARM64 / ACPI: Introduce arch_register/unregister_cpu() for arm64
ARM64 / CPU hot-plug: Skeleton logic cpu online/offline for cpu
hot-plug
arch/arm64/Kconfig | 7 +
arch/arm64/boot/asl/foundation-v8.acpi/apic.asl | 165 +++++++------
arch/arm64/boot/asl/foundation-v8.acpi/dsdt.asl | 205 +++++++++++++++-
arch/arm64/include/asm/acpi.h | 12 +
arch/arm64/include/asm/cpu.h | 5 +
arch/arm64/include/asm/smp.h | 3 +
arch/arm64/kernel/setup.c | 16 +-
arch/arm64/kernel/smp.c | 23 ++
arch/arm64/kernel/topology.c | 26 +++
drivers/acpi/plat/arm/boot.c | 286 +++++++++++++++++++++--
drivers/acpi/processor_core.c | 50 ++--
drivers/acpi/tables.c | 21 ++
12 files changed, 694 insertions(+), 125 deletions(-)
--
1.7.9.5
Hi Hanjun and others,
I have rebased these patches on the 3.10rcX based tree and done a quick
boot test and they don't cause any oopses. So I thought I would push them
to the tree.
Thanks
Graeme
We are able to inject GHES from userspace. Kernel can parse error status block
and print error message in a more descriptive way:
[...]
[ 0.744715] GHES: APEI firmware first mode is enabled by APEI bit.
[ 0.744749] EINJ: Error INJection is initialized.
[...]
# echo 0x20 > /sys/kernel/debug/apei/einj/error_inject
[ 149.010380] {1}[Hardware Error]: Hardware error from APEI Generic Hardware Error Source: 2
[ 149.017080] {1}[Hardware Error]: APEI generic hardware error status
[ 149.023217] {1}[Hardware Error]: severity: 1, fatal
[ 149.027998] {1}[Hardware Error]: section: 0, severity: 0, recoverable
[ 149.034317] {1}[Hardware Error]: flags: 0x00
[ 149.038501] {1}[Hardware Error]: section_type: memory error
where 0x20 can be random error ID because of the hack. Please see following
patches for more explanation.
Here is the first part of cpu topology and cpu-hotplug code for RFC.
In this part of code, MADT is being parsed and the cpu possible map and
cpu present map are prefilled.
CPU possible map is equal to the GIC entries in MADT no matter enabled or
disabled, and cpu present map limits to the enabled cpu in MADT.
Without this patch set, CPU possible map is equal to the cpus found in FDT,
and cpu possible map is the same as cpu present map with no hotplugble cpus.
Boot information with this patch (with --cores=4):
ACPI: GIC (acpi_id[0x0000] gic_id[0x0000] enabled) // MADT was parsed
ACPI: GIC (acpi_id[0x0001] gic_id[0x0001] enabled)
ACPI: GIC (acpi_id[0x0002] gic_id[0x0002] disabled)
ACPI: GIC (acpi_id[0x0003] gic_id[0x0003] disabled)
ACPI: GIC (acpi_id[0x0004] gic_id[0x0004] disabled)
ACPI: GIC (acpi_id[0x0005] gic_id[0x0005] disabled)
ACPI: GIC (acpi_id[0x0006] gic_id[0x0006] disabled)
ACPI: GIC (acpi_id[0x0007] gic_id[0x0007] disabled)
2 CPUs available, 8 CPUs total //find 2 enabled cpus which
// is the same as MADT described
ACPI: GIC Distributor (id[0x0000] address[0x2c001000] gsi_base[0]) // IOAPIC(GIC distributor is also parsed)
Using ACPI (MADT) for SMP configuration information
SMP: limits to 4 CPUs // the foundation model supports only 4 four cpus
SMP: Allowing 4 CPUs, 2 hotplug CPUs // so limits to 4 cpus, and 2 disabled in MADT can be hotpluged
PERCPU: Embedded 10 pages/cpu @ffffffc03ffa7000 s11520 r8192 d21248 u40960
[....]
CPU1: Booted secondary processor
Brought up 2 CPUs
SMP: Total of 2 processors activated (400.00 BogoMIPS).
Because only 2 cpus is enabled in MADT, so the system will up 2 cpus
in despite of --cores=4.
Next step will prototype cpu topology code for ACPI driver.
This is the RFC version only, will updated and rebased on the new acpi branch.
Hanjun Guo (3):
ARM / ACPI: MADT for armv8 foundation model
ARM / ACPI: Core functions for MADT parse
ARM / ACPI: Prefill cpu possible and present map when boot with MADT
arch/arm64/boot/asl/foundation-v8.acpi/apic.asl | 175 ++++++++-------
arch/arm64/include/asm/acpi.h | 3 +
arch/arm64/kernel/setup.c | 6 +
arch/arm64/kernel/smp.c | 2 +
drivers/acpi/plat/arm/boot.c | 261 ++++++++++++++++++++++-
drivers/acpi/tables.c | 21 ++
6 files changed, 374 insertions(+), 94 deletions(-)
--
1.7.9.5
Hi Guys,
Discussed this with Al and I think everyone is finished with 3.9 work
now! I am going to switch the acpi branch to be the contents of the
acpi-combined branch at 10AM tomorrow my local time!
The two branches will initially be :-
acpi - our work branch now based off 3.10-rcX kernel (and will track
mainline releases/rc releases)
acpi-ltfixes - is the acpi branch + some needed fixes from Samsung
landing team for Arndale prototyping.
We can of course create more short term branches for demos, prototyping
as needed.
Thanks
Graeme
From: Naresh Bhat <naresh.bhat(a)linaro.org>
CC drivers/acpi/fan.o
drivers/acpi/fan.c: In function ‘fan_get_cur_state’:
drivers/acpi/fan.c:96:9: warning: ‘acpi_state’ may be used uninitialized in this function [-Wuninitialized]
---
drivers/acpi/fan.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/acpi/fan.c b/drivers/acpi/fan.c
index f815da8..f61f7fd 100644
--- a/drivers/acpi/fan.c
+++ b/drivers/acpi/fan.c
@@ -84,7 +84,7 @@ static int fan_get_cur_state(struct thermal_cooling_device *cdev, unsigned long
{
struct acpi_device *device = cdev->devdata;
int result;
- int acpi_state;
+ int acpi_state = 0;
if (!device)
return -EINVAL;
--
1.7.9.5
From: Al Stone <ahs3(a)redhat.com>
There are a few places where the printk()s no longer serve
a useful purpose -- those printk()s are removed by the first
patch. The second and third patches remove printk() in favor
of proper use of pr_err() and pr_debug(), respectively.
Al Stone (3):
ARM: ACPI: remove some unneeded printk messages used for initial
debugging
ARM: ACPI: use pr_err() as one should and not printk()
ACPI: ARM: use pr_debug() as one should and not printk()
drivers/acpi/osl.c | 31 +++++++++++++++----------------
drivers/acpi/plat/arm/boot.c | 9 ---------
2 files changed, 15 insertions(+), 25 deletions(-)
--
1.8.1.4
Hi guys,
I have extracted the necessary fixes from Samsung Landing Team tree for
Arndale network (actually usb hack) and LPAE.
I have uploaded these on top of our acpi-combined branch as
acpi-combined-ltfixes. This should make it easier for people testing armv7.
I have attached my config file for this.
Thanks
Graeme
From: Graeme Gregory <graeme.gregory(a)linaro.org>
I some situations custom 64bit by 32bit divide was giving the wrong
values so replace it with the internal kernel do_div function instead.
Signed-off-by: Graeme Gregory <graeme.gregory(a)linaro.org>
---
arch/arm/include/asm/acpi.h | 18 ++---
drivers/acpi/plat/arm/Makefile | 1 -
drivers/acpi/plat/arm/acpi_div_64_by_32.S | 105 -----------------------------
3 files changed, 7 insertions(+), 117 deletions(-)
delete mode 100644 drivers/acpi/plat/arm/acpi_div_64_by_32.S
diff --git a/arch/arm/include/asm/acpi.h b/arch/arm/include/asm/acpi.h
index aafc276..e752c5c 100644
--- a/arch/arm/include/asm/acpi.h
+++ b/arch/arm/include/asm/acpi.h
@@ -31,6 +31,8 @@
#include <linux/init.h>
+#include <asm/div64.h>
+
#define COMPILER_DEPENDENT_INT64 long long
#define COMPILER_DEPENDENT_UINT64 unsigned long long
@@ -54,17 +56,11 @@
#define ACPI_ENABLE_IRQS() local_irq_enable()
#define ACPI_FLUSH_CPU_CACHE() flush_cache_all()
-#define ACPI_DIV_64_BY_32(n_hi, n_lo, d32, q32, r32) \
- asm ("mov r0, %2\n" \
- "mov r1, %3\n" \
- "mov r2, %4\n" \
- "bl __arm_acpi_div_64_by_32\n" \
- "mov %0, r0\n" \
- "mov %1, r1\n" \
- : "=r"(q32), "=r"(r32) /* output operands */ \
- : "r"(n_hi), "r"(n_lo), "r"(d32) /* input operands */ \
- : "r0", "r1", "r2" /* clobbered registers */ \
- )
+#define ACPI_DIV_64_BY_32(n_hi, n_lo, d32, q32, r32) { \
+ u64 value = (u64)n_hi << 32 | n_lo; \
+ r32 = do_div(value, d32); \
+ q32 = value; \
+ }
#define ACPI_SHIFT_RIGHT_64(n_hi, n_lo) \
asm ("mov r0, %2\n" \
diff --git a/drivers/acpi/plat/arm/Makefile b/drivers/acpi/plat/arm/Makefile
index aa9dd19..a1f056d 100644
--- a/drivers/acpi/plat/arm/Makefile
+++ b/drivers/acpi/plat/arm/Makefile
@@ -1,4 +1,3 @@
obj-y += boot.o
obj-y += sleep.o
-obj-$(CONFIG_ARM) += acpi_div_64_by_32.o
diff --git a/drivers/acpi/plat/arm/acpi_div_64_by_32.S b/drivers/acpi/plat/arm/acpi_div_64_by_32.S
deleted file mode 100644
index 573bce4..0000000
--- a/drivers/acpi/plat/arm/acpi_div_64_by_32.S
+++ /dev/null
@@ -1,105 +0,0 @@
-/*
- * Copyright (c) 2013, Al Stone <ahs3(a)redhat.com>
- *
- * __acpi_arm_div64_by_32: perform integer division of a 64-bit value
- * a 32-bit value
- *
- * The algorithm is borrowed from the GMP library, but has been redone
- * here in order to put this implementation under a GPLv2 license.
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; either version 2 of the License, or
- * (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
- */
-
-#ifdef __ARM_ARCH_7A__
-
-#include <linux/linkage.h>
-
-/*
- * This needs to be called in the following manner:
- * n_lo => r0 # these are the low 32 bits of the dividend
- * n_hi => r1 # the high 32 bits of the dividend
- * d32 => r2 # the 32-bit divisor
- *
- * The result is:
- * q32 <= r0 # the 32-bit quotient
- * r32 <= r1 # the 32-bit remainder
- *
- * This should be consistent with the normal ARMv7 calling conventions.
- *
- */
-
-ENTRY(__arm_acpi_div_64_by_32)
- mov r12, #32 // loop counter
- cmp r2, #0x80000000 // check divisor MSB and clear carry
- bcs bigdiv
-
-loop: adcs r1, r1, r1 // handle each bit
- adc r0, r0, r0
- cmp r0, r2
- subcs r0, r0, r2
- sub r12, r12, #1
- teq r12, #0
- bne loop
-
- mov r3, r0 // stash the remainder for a tic
- adc r0, r1, r1 // quotient: add in last carry
- mov r1, r3 // remainder (now in right register)
- mov pc, lr
-
-bigdiv: stmfd sp!, { r8, lr } // clear some scratch space
-
- and r8, r1, #1 // save LSB of dividend
- mov lr, r0, lsl #31
- orrs r1, lr, r1, lsr #1 // r1 = lower part >> 1 bit
- mov r0, r0, lsr #1 // r0 = higher part >> 1 bit
-
- and lr, r2, #1 // save LSB of divisor
- movs r2, r2, lsr #1 // r2 = floor(divisor / 2)
- adc r2, r2, #0 // r2 = ceil(divisor / 2)
-
-loop2: adcs r1, r1, r1 // handle each bit
- adc r0, r0, r0
- cmp r0, r2
- subcs r0, r0, r2
- sub r12, r12, #1
- teq r12, #0
- bne loop2
-
- adc r1, r1, r1 // shift and add last carry
- add r0, r8, r0, lsl #1 // shift in remaining dividend LSB
- tst lr, lr
- beq evendiv
-
- rsb r2, lr, r2, lsl #1 // restore divisor value
- adds r0, r0, r1 // adjust for omitted divisor LSB
- addcs r1, r1, #1 // adjust quotient if a carry results
- subcs r0, r0, r2 // adjust remainder, if carry
- cmp r0, r2
- subcs r0, r0, #1 // adjust remainder
- addcs r1, r1, #1 // adjust quotient
-
-evendiv:
- mov r3, r0 // stash the remainder for a tic
- mov r0, r1 // quotient
- mov r1, r3 // remainder
-
- ldmfd sp!, { r8, pc } // restore the registers used
-
-ENDPROC(__arm_acpi_div_64_by_32)
-
-#else /* ! __ARM_ARCH_7A__ */
-#error __arm_acpi_div_64_by_32 not defined for this architecture
-#endif
-
--
1.7.10.4
Hi Robert,
I am doing APEI implementation of ACPI specification. That is, ACPI
kernel side of RAS work. I am manage to test some of APEI functionality
now. I would like to ask about status of LEG-389 since I want to avoid
of doing work that may be actually already done.
Regards,
Tomasz Nowicki
Sorry I did not send this out sooner -- I rewrote it a several
different times over the last week to play with some ideas...
Nonetheless, here's the simple bit of ASL I'm using for GPIO right
now:
Scope (\_SB)
{
// Base Address: 0x11400000
Device (GPA0) // GPIO controller GPA0
{
Name (_HID, "LINA0002")
Name (_UID, 0x00)
Method (_CRS, 0x0, Serialized)
{
Name(RBUF, ResourceTemplate ()
{
Memory32Fixed (ReadWrite,
0x11400000,
0x18)
GpioIo (Exclusive,
PullDefault,
, // debounce timeout
, // drive strength
, // IO restriction
"GPA0")
{ // pin numbers
0x00,
0x01,
0x02,
0x03,
0x04,
0x05,
0x06,
0x07
}
})
Return(RBUF)
}
}
}
This is still not quite working in the Samsung gpiolib code just yet.
They never really used FDT before (or at least, not in a way I would
consider proper) so I'm having to unwind some partial movement to FDT
and their specific data structures.
GPIO interrupts are not going to be much different but I don't have a
good example to send out just yet.
You should be able to figure out the address from the current FDT.
The pin numbers are much better hidden in
mach-exynos/include/mach/gpio.h. Sometimes it's easier just to read
them from /sys :).
I put this in an SSDT just for grins, but it can also go in the DSDT.
--
ciao,
al
-----------------------------------
Al Stone
Software Engineer
Linaro Enterprise Group
al.stone(a)linaro.org
-----------------------------------
Hi Everyone,
I have combined our work on armv7 and armv8 into one branch based on 3.10rc6
mainline kernel. This is newer than our previous base which was 3.9 based.
This kernel boots on both of our main test platforms
1) Arndale
2) armv8 Foundation Model
The branch is available here.
https://git.linaro.org/gitweb?p=arm/acpi/acpi.git;a=shortlog;h=refs/heads/a…
I have attached to the email the two configs I used.
I would suggest that we use this is a base for ongoing work so its easy to
switch between model and hardware for tests.
Thanks
Graeme
Hi,
I think the upstreaming session I was talking about at standup is this one.
http://lce-13.zerista.com/event/member/81058
I suggest that even though this clashes with hacking sessions most of the
team should go to this to prevent Greg KH using you as an example at future
connects.
For those who were not at last connect here is the video of Gregs talk
https://www.youtube.com/watch?v=iiED1K98lnw
Thanks
Graeme
Hi Guys,
I have just pushed this series of patches to the official repo.
Branch is acpi-armv8
This brings us to the same state in armv8 as we are in for armv7. Without
the prototype stuff like i2c drivers. But is a base to start work on
for armv8.
I have tried to get these patches as checkpatch clean as possible.
I want to try and merge armv7 and armv8 changes into one and maintain that
together as I think there is very little different in the two platforms
from the point of initialisation or drivers.
Thanks
Graeme
Hi,
I have managed to get us to boot as far as the dreaded
> ACPI: Interpreter enabled
state on armv8 now.
For now ACPI tables cannot be bigger than 1MB in size (we are nowhere near
this size). And also FDT cannot be bigger than 1MB (still nowhere near).
>From the conversion which was mostly changing
u32 -> void *
u32 -> phys_addr_t
and adding the correct initialisation to the setup.c on armv8 it is becoming
clear that with the correct universal types used that the arch/arm/kernel/acpi
and arch/arm64/kernel/acpi are actually mostly generic to both platforms so we
will need to decide where to put them.
This genericness is nice to have as it means we should be able to switch
v7/v8 at will for testing!
There is still some code from armv7 that I have not yet brought over to v8
and someone fluent in v8 assembler needs to fix the two assembly bits.
I shall continue to bring code over and enable more ACPI features.
Graeme