- Linaro-acpi - lists.linaro.org

[RFC] Discussions about _DSD and device properties

by Al Stone

I thought I would pass on some of the discussion that's going on around the use and definition of _DSD device properties. There seems to be some basic agreement that (a) we should send things to a common forum for review and documentation, and that (b) the forum needs to be easily visible and usable by Linux folks, MS people, and firmware developers, and that (c) there is a dsd(a)acpica.org mailing list set up for that, but has not been used at all (nor has the ASWG process, for that matter). Darren Hart of Intel has proposed some of these, and has volunteered to try to get this going. And, I agree with him on where we need to go with all of this. So, I would encourage people to start submitting things to the dsd(a)acpica.org mailing list. But, that begs the question of *what* to submit. I haven't been very vocal about this just because I was fiddling around with the ideas but I think they're solid enough to get moving. Please see the git tree at https://github.com/ahs3/dsd. This may or may not be the right long term place to host it, but the README describes the idea -- I've written a tool that uses simple YAML to describe device properties. The tool can verify that all the right things are documented, and allows one to build a data base -- of plain human-readable ASCII YAML -- that anyone can visit, peruse, or offer updates to. The YAML is probably not complete; however, the key thing is that this is completely open source, under a very permissive license, and easily seen or used by developers of any OS or any bit of firmware -- the neutral location and open license means equal use and access for Microsoft, Linux, and the firmware writers. Patches are of course welcome -- to the tool, or even the data base of device property descriptions. So, if one sends the type of YAML expected to dsd(a)acpica.org, I can easily pull it in, verify it, and push it back out to github, assuming it's reasonably correct and usable. If we can agree that all discussions about the acceptability of any particular device property occurs on dsd(a)acpica.org, we can get this process moving and documented, and change the discussion to be about specific device properties instead. I'm attaching the README from https://github.com/ahs3/dsd for those that are as lazy as I am about following links :)..... README ------ dsd -- a command line tool for _DSD device property registrations ----------------------------------------------------------------- A simple 'make' will produce a command line tool to help in the collection, registration and maintenance of entries describing the device properties allowed via the _DSD method in ACPI [0] -- and in Device Tree (DT). The issue is that there is a desire to share device properties not only across devices (e.g., is more than one "mac-address" really needed?), but between the users of ACPI via _DSD, and possibly the users of Device Tree (DT), where the key-value model is used extensively. While DT documentation seems to be reasonably well cared for (at least in the Linux kernel documentation) and there is a process for maintaining the device property definitions, the same is not true of ACPI. In fact, device properties as used by _DSD are maintained completely outside of the specification, and there is no history of maintaining -- or registering -- them as there is for DT, since this is all relatively new to ACPI. However, regardless of its quality, keeping documentatation in the Linux kernel does present some problems. For one, firmware developers are not likely to look at the Linux source for information on the device properties they might want to use or need to define. The OS is not really where their focus lies. For two, sharing device properties with the Windows OS becomes very difficult; asking Microsoft engineers to go use the Linux source code as reference material puts them in an untenable position. What this tool -- dsd -- is attempting to do is provide a standard, neutral location and format for the definition of these properties, so that anyone that needs to can easily get to them, register new ones, or share existing properties. Each device property is described in YAML (examples below, with details in the file called YAML). At present, a directory contains the YAML, with one file per device property, one file per device using those properties, and acts as a very crude "data base" for all of the entries. The dsd command provides several functions for dealing with this "data base" of device properties: -- initialize the data base -- verify the YAML is correct -- add the device property to the data base in a consistent format -- remove a device property from the data base -- list all known device property names -- output the info from a given device property -- output a basic text description of the property for use in Linux documentation (or elsewhere) Additional functions can be added (all the source is provided), and should this project work out, more will be -- for example, summaries of all of the properties for a given device, or analysis indicating whether or not a property is needed and by what devices, or perhaps even more clever things. Building the tool ----------------- The dsd command requires that libyaml for C be installed [1]. Then, just do: % make There is no install target at present. Run the command: % ./dsd help to show what options are available. YAML ---- The dsd command uses basic YAML formatting (so, spaces for indentation, then indentation for indicating structure) and currently recognizes the following keywords: property: <name> owner: <string> type: integer | hexadecimal-integer | hexadecimal-address-package | string | <type> <value-list> description: <free text> example: <free text> For example: property: phy-mode owner: Al Stone <ahs3(a)redhat.com> type: string values: - token: na description: none available - token: mii description: media independent interface (MII) - token: gmii description: gigabit MII - token: sgmii description: serial gigabit MII - token: tbi description: ten bit interface - token: revmii description: reverse MII - token: rmii description: reduced MII - token: rgmii description: reduced gigabit MII (RGMII) - token: rgmii-id description: RGMII with internal delay - token: rgmii-rxid description: RGMII with receive delay only - token: rgmii-txid description: RGMII with transmit delay only - token: rtbi description: reduced ten bit interface - token: smii description: serial MII - token: xgmii description: 10 gigabit MII - token: moca description: multimedia over coax - token: qsgmii description: quad serial gigabit MII description: | Defines the PHY mode to be used for this device. example: | Package (2) { "phy-mode", "xgmii" } Please use '---' to separate device property definitions if several are included in a single file of text (dsd will separate them into unique entries in the "data base"). References ---------- [0] For a description of _DSD, see: http://www.uefi.org/sites/default/files/resources/_DSD-implementation-guide… For the device properties UUID of _DSD, see: http://www.uefi.org/sites/default/files/resources/_DSD-device-properties-UU… [1] On Debian: apt-get install libyaml-dev On Fedora: dnf install libyaml-devel -- ciao, al ----------------------------------- Al Stone Software Engineer Linaro Enterprise Group al.stone(a)linaro.org -----------------------------------

10 years, 10 months

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leg-kernel tag leg-20150821.0 released

by Graeme Gregory

The leg-kernel release has been made and tagged as leg-20150821.0 This is based on mainline kernel v4.2-rc7 Repository : http://git.linaro.org/leg/acpi/leg-kernel.git Direct Link: http://git.linaro.org/leg/acpi/leg-kernel.git/commit/f54108bb7b07c9ce7100d4… Topic Branches :- http://git.linaro.org/leg/acpi/acpi.git - acpi-topic-arm64-apei - acpi-topic-juno-fvp - acpi-topic-nodevmem - acpi-topic-sbsa-watchdog - acpi-topic-seattle - acpi-topic-spcr - acpi-topic-bad-madt - topic-gic-self-probe http://git.linaro.org/people/graeme.gregory/linux.git - topic-capsule http://git.linaro.org/people/leif.lindholm/linux.git - arm64-pcihost-generic Mainline Based -------------- Repository: http://git.linaro.org/leg/acpi/acpi.git Branch: leg-kernel Tag: leg-mainline-20150820.0

10 years, 10 months

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[PATCH] acpi, apei, arm64: APEI initial support for aarch64.

by fu.wei＠linaro.org

From: Tomasz Nowicki <tomasz.nowicki(a)linaro.org> This commit provides APEI arch-specific bits for aarch64 Changelog: Fu Wei: Move arch_apei_flush_tlb_one() to arch/arm64/include/asm/apci.h. Delete arch/arm64/kernel/apei.c. Add "#ifdef CONFIG_ACPI_APEI" for "acpi_disable_cmcff". Signed-off-by: Tomasz Nowicki <tomasz.nowicki(a)linaro.org> Signed-off-by: Fu Wei <fu.wei(a)linaro.org> --- arch/arm64/Kconfig | 1 + arch/arm64/include/asm/acpi.h | 11 +++++++++++ arch/arm64/kernel/acpi.c | 4 ++++ 3 files changed, 16 insertions(+) diff --git a/arch/arm64/Kconfig b/arch/arm64/Kconfig index 318175f..6144c9d 100644 --- a/arch/arm64/Kconfig +++ b/arch/arm64/Kconfig @@ -3,6 +3,7 @@ config ARM64 select ACPI_CCA_REQUIRED if ACPI select ACPI_GENERIC_GSI if ACPI select ACPI_REDUCED_HARDWARE_ONLY if ACPI + select HAVE_ACPI_APEI if ACPI select ARCH_HAS_ATOMIC64_DEC_IF_POSITIVE select ARCH_HAS_ELF_RANDOMIZE select ARCH_HAS_GCOV_PROFILE_ALL diff --git a/arch/arm64/include/asm/acpi.h b/arch/arm64/include/asm/acpi.h index a17b623..ced6e25 100644 --- a/arch/arm64/include/asm/acpi.h +++ b/arch/arm64/include/asm/acpi.h @@ -22,6 +22,7 @@ #ifdef CONFIG_ACPI_APEI #include <linux/efi.h> #include <asm/pgtable.h> +#include <asm/tlbflush.h> #endif /* Macros for consistency checks of the GICC subtable of MADT */ @@ -52,6 +53,9 @@ typedef u64 phys_cpuid_t; extern int acpi_disabled; extern int acpi_noirq; extern int acpi_pci_disabled; +#ifdef CONFIG_ACPI_APEI +extern int acpi_disable_cmcff; +#endif static inline void disable_acpi(void) { @@ -89,6 +93,13 @@ static inline bool acpi_has_cpu_in_madt(void) static inline void arch_fix_phys_package_id(int num, u32 slot) { } void __init acpi_init_cpus(void); +#ifdef CONFIG_ACPI_APEI +static inline void arch_apei_flush_tlb_one(unsigned long addr) +{ + flush_tlb_kernel_range(addr, addr + PAGE_SIZE); +} +#endif + #else static inline void acpi_init_cpus(void) { } #endif /* CONFIG_ACPI */ diff --git a/arch/arm64/kernel/acpi.c b/arch/arm64/kernel/acpi.c index 19de753..bd1be9a 100644 --- a/arch/arm64/kernel/acpi.c +++ b/arch/arm64/kernel/acpi.c @@ -36,6 +36,10 @@ EXPORT_SYMBOL(acpi_disabled); int acpi_pci_disabled = 1; /* skip ACPI PCI scan and IRQ initialization */ EXPORT_SYMBOL(acpi_pci_disabled); +#ifdef CONFIG_ACPI_APEI +int acpi_disable_cmcff; +#endif + static bool param_acpi_off __initdata; static bool param_acpi_force __initdata; -- 1.9.1

10 years, 10 months

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Mustang branch boot issue

by Itaru Kitayama

Hi, I have been trying to boot the Mustang branch with acpi=force, but it stalls during the process I need to powercycle every time I enter that state. Checking setup_arch(), acpi_boot_table_init() seems to be ok, but it can not continue booting if disable_acpi() is not called before the block below: if (acpi_disabled) { unflatten_device_tree(); psci_dt_init(); } else { psci_acpi_init(); } Instead, calling disable_acpi() right after the block above ends up stalling. psci_acpi_init() does nothing on Mustang as it does not support the interface. Has anyone has an idea as to what's blocking the acpi=force boot process? Itaru

10 years, 10 months

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[PATCH 0/5] ACPI: Provide better MADT subtable sanity checks

by Al Stone

Currently, the BAD_MADT_ENTRY macro is used to do a very simple sanity check on the various subtables that are defined for the MADT. The check compares the size of the subtable data structure as defined by ACPICA to the length entry in the subtable. If they are not the same, the assumption is that the subtable is incorrect. Over time, the ACPI spec has allowed for MADT subtables where this can never be true (the local SAPIC subtable, for example). Or, more recently, the spec has accumulated some minor flaws where there are three possible sizes for a subtable, all of which are valid, but only for specific versions of the spec (the GICC subtable). In both cases, BAD_MADT_ENTRY reports these subtables as bad when they are not. In order to retain some sanity check on the MADT subtables, we now have to special case these subtables. Of necessity, these special cases have ended up in arch-dependent code (arm64) or an arch has simply decided to forgo the check (ia64). This patch set replaces the BAD_MADT_ENTRY macro with a function called bad_madt_entry(). This function uses a data set of details about the subtables to provide more sanity checking than before: -- is the subtable legal for the version given in the FADT? -- is the subtable legal for the revision of the MADT in use? -- is the subtable of the proper length (including checking on the one variable length subtable that is currently ignored), given the FADT version and the MADT revision? Further, this patch set adds in the call to bad_madt_entry() from the acpi_table_parse_madt() function, allowing it to be used consistently by all architectures, for all subtables, and removing the need for each of the subtable traversal callback functions to use BAD_MADT_ENTRY. In theory, as the ACPI specification changes, we would only have to add additional information to the data set describing the MADT subtables in order to continue providing sanity checks, even when new subtables are added. These patches have been tested on an APM Mustang (arm64) and are known to work there. They have also been cross-compiled for x86 and ia64 with no known failures. Al Stone (5): ACPI: add in a bad_madt_entry() function to eventually replace the macro ACPI / ARM64: remove usage of BAD_MADT_ENTRY/BAD_MADT_GICC_ENTRY ACPI / IA64: remove usage of BAD_MADT_ENTRY ACPI / X86: remove usage of BAD_MADT_ENTRY ACPI: remove definition of BAD_MADT_ENTRY macro arch/arm64/include/asm/acpi.h | 8 -- arch/arm64/kernel/smp.c | 2 - arch/ia64/kernel/acpi.c | 20 ---- arch/x86/kernel/acpi/boot.c | 27 ----- drivers/acpi/tables.c | 241 ++++++++++++++++++++++++++++++++++++++++++ drivers/irqchip/irq-gic.c | 6 -- include/linux/acpi.h | 4 - 7 files changed, 241 insertions(+), 67 deletions(-) -- 2.4.3

10 years, 10 months

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[PATCH v4 00/10] ACPI GIC Self-probing, GICv2m and GICv3 support

by Hanjun Guo

When ACPI core patches were merged into mainline, there were two TODOs for ACPI based GIC init, one is the Self-probing for GIC, the other one is to support stacked irq domain, also the feature of GICv2m and GICv3 is missing in that patch set. For ACPI Self-probing for GIC, thanks to the GIC version which is introduced in ACPI 6.0, we can match the GIC version and GIC driver, based on that, we introduce the self-probe infrastructure similar as IRQCHIP_DECLARE(), please see patch 1~3. The stacked domain thing is more complicated, Marc introduced a patchset to slove this problem (great thanks!) - Making the generic ACPI GSI layer irqdomain aware, which is avaiable at: git://git.kernel.org/pub/scm/linux/kernel/git/maz/arm-platforms.git irq/gsi-irq-domain-v2 so we reworked the GICv2m and GICv3 support on top of it, and combined them as a single patch set for review. Note: this patchset has no ITS support for GICv3/4, it will be implmented in the IORT patchset, which had a draft version but needs to rework it on top of Marc's Per-device MSI domain & platform MSI patchset. Tested on GICv2 based FVP base model and AMD Seattle platform, both wired interrupt and MSI (with some PCI patches) work fine. Patches are on top of Marc's branch irq/gsi-irq-domain-v2, and available at: git://git.linaro.org/leg/acpi/acpi.git gsi-irqdomain Comments are warmly welcomed. >From v3: - Rework GICv3 patches on top of Marc's tree - Add gicV2m support Hanjun Guo (5): irqchip / GIC: Add GIC version support in ACPI MADT ACPI / irqchip: Add self-probe infrastructure to initialize IRQ controller irqchip / GIC / ACPI: Use IRQCHIP_ACPI_DECLARE to simplify GICv2 init code irqchip / GICv3: remove the useless comparision of device node in xlate irqchip / GICv3 / ACPI: Add GICR support via GICC structures Suravee Suthikulpanit (3): ACPI: GIC: Add ACPI helper functions to query irq-domain tokens for for GIC MSI and ITS PCI: ACPI: Bind GIC MSI frame to PCI host bridge irqchip / gicv2m: Introducing gicv2m_acpi_init() Tomasz Nowicki (2): irqchip / GICv3: Refactor gic_of_init() for GICv3 driver irqchip / GICv3: Add ACPI support for GICv3+ initialization arch/arm64/Kconfig | 1 + arch/arm64/include/asm/irq.h | 13 -- arch/arm64/kernel/acpi.c | 25 -- drivers/acpi/Makefile | 1 + drivers/acpi/acpi_gic.c | 234 +++++++++++++++++++ drivers/irqchip/Kconfig | 3 + drivers/irqchip/Makefile | 1 + drivers/irqchip/irq-gic-acpi.c | 175 ++++++++++++++ drivers/irqchip/irq-gic-v2m.c | 111 +++++++-- drivers/irqchip/irq-gic-v3.c | 438 +++++++++++++++++++++++++++++++---- drivers/irqchip/irq-gic.c | 6 +- drivers/pci/pci-acpi.c | 18 ++ drivers/pci/probe.c | 3 + include/acpi/acpi_gic.h | 23 ++ include/asm-generic/vmlinux.lds.h | 13 ++ include/linux/acpi.h | 17 ++ include/linux/acpi_irq.h | 4 +- include/linux/irqchip.h | 13 ++ include/linux/irqchip/arm-gic-acpi.h | 10 +- include/linux/irqchip/arm-gic.h | 7 + include/linux/mod_devicetable.h | 8 + include/linux/pci-acpi.h | 4 + 22 files changed, 1009 insertions(+), 119 deletions(-) create mode 100644 drivers/acpi/acpi_gic.c create mode 100644 drivers/irqchip/irq-gic-acpi.c create mode 100644 include/acpi/acpi_gic.h -- 1.9.1

10 years, 10 months

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[PATCH V11 0/5] map GHES memory region according to EFI memory map

by Jonathan (Zhixiong) Zhang

From: "Jonathan (Zhixiong) Zhang" <zjzhang(a)codeaurora.org> On a platform with APEI (ACPI Platform Error Interface) enabled, firmware updates a memory region with hardware error record using nocache attribute. When OS reads the region, since it maps the region with cacahed attribute even though EFI memory map defines this region as uncached, OS gets stale data and errorneously reports there is no new HW error. When ghes driver maps the memory region, it uses the cache attribute according to EFI memory map, if EFI memory map feature is enabled at runtime. Since both arch/x86 and arch/ia64 implemented architecture agnostic EFI memory map attribue lookup function efi_memattributes(), the code is moved from arch/x86 into EFI subsystem and is declared as __weak; archs other than ia64 should not override the default implementation. V11: 1. Changed how we deal with superimposed memory region attributes as provided in UEFI memory map, on arm64. V10: 1. Fixed compilation issue on x86. V9: 1. Rebased to arm64-upstream-14543 of arm64/master. 2. Match strict MM type in arch_apei_get_mem_attribute(). V8: 1. For x86, always return PAGE_KERNEL for arch_apei_get_mem_attribute(). The rational is explained in comment. 2. Rebased to arm64-upstream-14201 of arm64/master, next-20150724 of linux-next/master. V7: 1. Added PROT_DEVICE_nGnRnE and PROT_NORMAL_WT to support all possible UEFI memory types for arm64. V6: 1. Implemented arch_apei_get_mem_attributes() for arm64 as inline function. 2. Rebased to efi-next-14364 of efi/next, pm+acpi-4.2-rc3 of linux-pm/master, arm64-upstream-13521 of arm64/master, next-20150720 of linux-next/master. V5: 1. Rebased to next-20150713 of linux-next/master, efi-next-14359 of efi/next, pm+acpi-4.2-rc2 of linux-pm/master, arm64-fixes-1215 of arm64/master. 2. Added comment for efi_mem_attributes(), explained why it is marked as __weak at the function definition site. V4: 1. Introduced arch_apei_get_mem_attributes() to allow arch specific implementation of getting pgprot_t appropriate for a physical address. 2. Implemented arch_apei_get_mem_attributes() for x86 and for arm64. V3: 1. Rebased to v4.1-rc7. 2. Moved efi_mem_attributes() from arch/x86 to drivers/firmware/efi and declared it as __weak. 3. Introduced ARCH_APEI_PAGE_KERNEL_UC to allow arch specific page protection type for UC. 4. Removed efi_ioremap(). It can not be used for GHES memory region mapping purpose since ioremap can not be used in atomic context. V2: 1. Rebased to v4.1-rc5. 2. Split removal of efi_mem_attributes() and creation of efi_ioremap() into two patches. Jonathan (Zhixiong) Zhang (5): efi: x86: rearrange efi_mem_attributes() x86: acpi: implement arch_apei_get_mem_attributes() arm64: mm: add PROT_DEVICE_nGnRnE and PROT_NORMAL_WT arm64: apei: implement arch_apei_get_mem_attributes() acpi, apei: use appropriate pgprot_t to map GHES memory arch/arm64/include/asm/acpi.h | 30 ++++++++++++++++++++++++++++++ arch/arm64/include/asm/memory.h | 1 + arch/arm64/include/asm/pgtable.h | 2 ++ arch/arm64/mm/proc.S | 4 +++- arch/x86/include/asm/acpi.h | 24 ++++++++++++++++++++++++ arch/x86/platform/efi/efi.c | 18 ------------------ drivers/acpi/apei/ghes.c | 6 ++++-- drivers/firmware/efi/efi.c | 31 +++++++++++++++++++++++++++++++ 8 files changed, 95 insertions(+), 21 deletions(-) -- The Qualcomm Innovation Center, Inc. is a member of the Code Aurora Forum, a Linux Foundation Collaborative Project

10 years, 10 months

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Boot issue with the mustang topic branch

by Itaru Kitayama

Hi Al, The current HEAD of acpi topic branch boot process stops right after: EFI stub: Booting Linux Kernel... EFI stub: Using DTB from configuration table EFI stub: Exiting boot services and installing virtual address map... XhcClearBiosOwnership: called to clear BIOS ownership XhcClearBiosOwnership: called to clear BIOS ownership L3c Cache: 8MB I've been testing the topic branch on one of the Mustangs in the Linaro Server lab. The firmware version is: version 1.1.0-rh-0.15 built at 14:20:32 on Mar 13 2015. Can I have your .config you are using for ACPI testing? Itaru

10 years, 11 months

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Tenemos los mejores títulos para ver en xtop

by paula

Tenemos los mejores títulos para ver en xtop Encontranos con la palabra xtop en todos los buscadores Estrenos y preestrenos: 8 APELLIDOS VASCOS AGUA ANTMAN (EL HOMBRE HORMIGA) CENIZAS DEL PASADO CERCANA OBSESION (THE BOY NEXT DOOR) CHAPPIE CIUDADES DE PAPEL (PAPER TOWNS) CON DERECHO A ROCE DE CABALLOS Y DE HOMBRES DONDE SE ESCONDE EL DIABLO (WHERE THE DEVIL HIDES) DOS DIAS UNA NOCHE (DEUX JOURS UNE NUIT) DOS LOCAS EN FUGA (HOT PURSUIT) DRAGON BALL Z RESURRECTION F (LA RESURRECCION DE FREEZER) EL AÑO MAS VIOLENTO (A MOST VIOLENT YEAR) EL GRAN PEQUEÑO (LITTLE BOY) EL GRAN SECUESTRO DE MR HEINEKEN EL GURU DE LAS BODAS (THE WEDDING RINGER) EL NUEVO EXOTICO HOTEL MARIGOLD EL PAYASO DEL MAL (CLOWN) EL SECRETO DE ADALINE EL SEPTIMO ENANITO (THE 7TH DWARF) EL ULTIMO NARUTO LA PELICULA (THE LAST NARUTO THE MOVIE) ELIMINADO (UNFRIENDED) ESCRIBIENDO DE AMOR INTENSAMENTE JESSABELLE JURASSIC WORLD (JURASSIC PARK IV) LA CASA DEL DEMONIO (DEMONIC) LA DAMA DE ORO (WOMAN IN GOLD) LA MECANICA DEL CORAZON (JACK ET LA MECANIQUE DU COEUR) LA NOCHE DEL DEMONIO 3 (INSIDIOUS) LA OVEJA SHAUN LA PELICULA LOS 33 DE SAN JOSE (33) LUGARES OSCUROS (DARK PLACES) MAD MAX 4 FURIA EN LA CARRETERA MAGIC MIKE XXL MAN ON WIRE (EL ALAMBRISTA) MIENTRAS SEAMOS JOVENES (WHILE WERE YOUNG) MIL VECES BUENAS NOCHES (A THOU SAND TIMES GOODNIGHT) MINIONS MISION IMPOSIBLE 5 NACION SECRETA NOTAS PERFECTAS 2 (PITCH PERFECT 2) PIXELES POLTERGEIST (JUEGOS DIABOLICOS) PUERTAS ADENTRO (MUSARAÑAS) RAPIDOS Y FURIOSOS 7 RESUCITADOS SHOWROOM SPY UNA ESPIA DESPISTADA TE SIGUE (IT FOLLOWS) TED 2 TERAPIA DE BROADWAY (SHES FUNNY THAT WAY) TERMINATOR 5 GENESIS TERREMOTO LA FALLA DE SAN ANDRES TOMORROWLAND EL MUNDO DEL MAÑANA TRASH (LADRONES DE ESPERANZA) TRUENO Y LA CASA MAGICA UN CASTILLO EN ITALIA (UN CHATEAU EN ITALIE) UN NUEVO DESPERTAR (THE HUMBLING) UNA NOCHE PARA SOBREVIVIR (RUN ALL NIGHT) VOLEY series DE TV : A TOUCH OF CLOTH ANTMAN (EL HOMBRE HORMIGA) COMBATE DARK MATTER DEVIOUS MAIDS DOWNTON ABBEY DR HOUSE DRAGON BALL SUPE FEAR THE WALKING DEAD GAME OF THRONES GYM TONY HEROES HUMANS INFIELES (MISTRESSES) JONATHAN STRANGE AND MR NORRELL LOS CABALLEROS DEL ZODIACO ALMA DORADA MAJOR CRIMES ORANGE IS THE NEW BLACK OUTLANDER PATITO FEO STITCHERS TEEN WOLF THE BLACKLIST THE BRINK THE FOSTERS THE MESSENGERS WAYWARD PINES ZUMBA SCULPT

10 years, 11 months

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[PATCH V10 0/5] map GHES memory region according to EFI memory map

by Jonathan (Zhixiong) Zhang

From: "Jonathan (Zhixiong) Zhang" <zjzhang(a)codeaurora.org> On a platform with APEI (ACPI Platform Error Interface) enabled, firmware updates a memory region with hardware error record using nocache attribute. When OS reads the region, since it maps the region with cacahed attribute even though EFI memory map defines this region as uncached, OS gets stale data and errorneously reports there is no new HW error. When ghes driver maps the memory region, it uses the cache attribute according to EFI memory map, if EFI memory map feature is enabled at runtime. Since both arch/x86 and arch/ia64 implemented architecture agnostic EFI memory map attribue lookup function efi_memattributes(), the code is moved from arch/x86 into EFI subsystem and is declared as __weak; archs other than ia64 should not override the default implementation. V10: 1. Fixed compilation issue on x86. V9: 1. Rebased to arm64-upstream-14543 of arm64/master. 2. Match strict MM type in arch_apei_get_mem_attribute(). V8: 1. For x86, always return PAGE_KERNEL for arch_apei_get_mem_attribute(). The rational is explained in comment. 2. Rebased to arm64-upstream-14201 of arm64/master, next-20150724 of linux-next/master. V7: 1. Added PROT_DEVICE_nGnRnE and PROT_NORMAL_WT to support all possible UEFI memory types for arm64. V6: 1. Implemented arch_apei_get_mem_attributes() for arm64 as inline function. 2. Rebased to efi-next-14364 of efi/next, pm+acpi-4.2-rc3 of linux-pm/master, arm64-upstream-13521 of arm64/master, next-20150720 of linux-next/master. V5: 1. Rebased to next-20150713 of linux-next/master, efi-next-14359 of efi/next, pm+acpi-4.2-rc2 of linux-pm/master, arm64-fixes-1215 of arm64/master. 2. Added comment for efi_mem_attributes(), explained why it is marked as __weak at the function definition site. V4: 1. Introduced arch_apei_get_mem_attributes() to allow arch specific implementation of getting pgprot_t appropriate for a physical address. 2. Implemented arch_apei_get_mem_attributes() for x86 and for arm64. V3: 1. Rebased to v4.1-rc7. 2. Moved efi_mem_attributes() from arch/x86 to drivers/firmware/efi and declared it as __weak. 3. Introduced ARCH_APEI_PAGE_KERNEL_UC to allow arch specific page protection type for UC. 4. Removed efi_ioremap(). It can not be used for GHES memory region mapping purpose since ioremap can not be used in atomic context. V2: 1. Rebased to v4.1-rc5. 2. Split removal of efi_mem_attributes() and creation of efi_ioremap() into two patches. Jonathan (Zhixiong) Zhang (5): efi: x86: rearrange efi_mem_attributes() x86: acpi: implement arch_apei_get_mem_attributes() arm64: mm: add PROT_DEVICE_nGnRnE and PROT_NORMAL_WT arm64: apei: implement arch_apei_get_mem_attributes() acpi, apei: use appropriate pgprot_t to map GHES memory arch/arm64/include/asm/acpi.h | 27 +++++++++++++++++++++++++++ arch/arm64/include/asm/memory.h | 1 + arch/arm64/include/asm/pgtable.h | 2 ++ arch/arm64/mm/proc.S | 4 +++- arch/x86/include/asm/acpi.h | 24 ++++++++++++++++++++++++ arch/x86/platform/efi/efi.c | 18 ------------------ drivers/acpi/apei/ghes.c | 6 ++++-- drivers/firmware/efi/efi.c | 31 +++++++++++++++++++++++++++++++ 8 files changed, 92 insertions(+), 21 deletions(-) -- The Qualcomm Innovation Center, Inc. is a member of the Code Aurora Forum, a Linux Foundation Collaborative Project

10 years, 11 months

4
14
0 0

[PATCH V9 0/5] map GHES memory region according to EFI memory map

by Jonathan (Zhixiong) Zhang

From: "Jonathan (Zhixiong) Zhang" <zjzhang(a)codeaurora.org> On a platform with APEI (ACPI Platform Error Interface) enabled, firmware updates a memory region with hardware error record using nocache attribute. When OS reads the region, since it maps the region with cacahed attribute even though EFI memory map defines this region as uncached, OS gets stale data and errorneously reports there is no new HW error. When ghes driver maps the memory region, it uses the cache attribute according to EFI memory map, if EFI memory map feature is enabled at runtime. Since both arch/x86 and arch/ia64 implemented architecture agnostic EFI memory map attribue lookup function efi_memattributes(), the code is moved from arch/x86 into EFI subsystem and is declared as __weak; archs other than ia64 should not override the default implementation. V9: 1. Rebased to arm64-upstream-14543 of arm64/master. 2. Match strict MM type in arch_apei_get_mem_attribute(). V8: 1. For x86, always return PAGE_KERNEL for arch_apei_get_mem_attribute(). The rational is explained in comment. 2. Rebased to arm64-upstream-14201 of arm64/master, next-20150724 of linux-next/master. V7: 1. Added PROT_DEVICE_nGnRnE and PROT_NORMAL_WT to support all possible UEFI memory types for arm64. V6: 1. Implemented arch_apei_get_mem_attributes() for arm64 as inline function. 2. Rebased to efi-next-14364 of efi/next, pm+acpi-4.2-rc3 of linux-pm/master, arm64-upstream-13521 of arm64/master, next-20150720 of linux-next/master. V5: 1. Rebased to next-20150713 of linux-next/master, efi-next-14359 of efi/next, pm+acpi-4.2-rc2 of linux-pm/master, arm64-fixes-1215 of arm64/master. 2. Added comment for efi_mem_attributes(), explained why it is marked as __weak at the function definition site. V4: 1. Introduced arch_apei_get_mem_attributes() to allow arch specific implementation of getting pgprot_t appropriate for a physical address. 2. Implemented arch_apei_get_mem_attributes() for x86 and for arm64. V3: 1. Rebased to v4.1-rc7. 2. Moved efi_mem_attributes() from arch/x86 to drivers/firmware/efi and declared it as __weak. 3. Introduced ARCH_APEI_PAGE_KERNEL_UC to allow arch specific page protection type for UC. 4. Removed efi_ioremap(). It can not be used for GHES memory region mapping purpose since ioremap can not be used in atomic context. V2: 1. Rebased to v4.1-rc5. 2. Split removal of efi_mem_attributes() and creation of efi_ioremap() into two patches. Jonathan (Zhixiong) Zhang (5): efi: x86: rearrange efi_mem_attributes() x86: acpi: implement arch_apei_get_mem_attributes() arm64: mm: add PROT_DEVICE_nGnRnE and PROT_NORMAL_WT arm64: apei: implement arch_apei_get_mem_attributes() acpi, apei: use appropriate pgprot_t to map GHES memory arch/arm64/include/asm/acpi.h | 26 ++++++++++++++++++++++++++ arch/arm64/include/asm/memory.h | 1 + arch/arm64/include/asm/pgtable.h | 2 ++ arch/arm64/mm/proc.S | 4 +++- arch/x86/kernel/acpi/apei.c | 19 +++++++++++++++++++ arch/x86/platform/efi/efi.c | 18 ------------------ drivers/acpi/apei/ghes.c | 6 ++++-- drivers/firmware/efi/efi.c | 31 +++++++++++++++++++++++++++++++ include/acpi/apei.h | 1 + 9 files changed, 87 insertions(+), 21 deletions(-) -- The Qualcomm Innovation Center, Inc. is a member of the Code Aurora Forum, a Linux Foundation Collaborative Project

10 years, 11 months

5
16
0 0

Tenemos los mejores títulos para ver en xtop

by paula

Tenemos los mejores títulos para ver en xtop Encontranos con la palabra xtop en todos los buscadores Estrenos y preestrenos: 8 APELLIDOS VASCOS AGUA ANTMAN (EL HOMBRE HORMIGA) CENIZAS DEL PASADO CERCANA OBSESION (THE BOY NEXT DOOR) CHAPPIE CIUDADES DE PAPEL (PAPER TOWNS) CON DERECHO A ROCE DE CABALLOS Y DE HOMBRES DONDE SE ESCONDE EL DIABLO (WHERE THE DEVIL HIDES) DOS DIAS UNA NOCHE (DEUX JOURS UNE NUIT) DOS LOCAS EN FUGA (HOT PURSUIT) DRAGON BALL Z RESURRECTION F (LA RESURRECCION DE FREEZER) EL AÑO MAS VIOLENTO (A MOST VIOLENT YEAR) EL GRAN PEQUEÑO (LITTLE BOY) EL GRAN SECUESTRO DE MR HEINEKEN EL GURU DE LAS BODAS (THE WEDDING RINGER) EL NUEVO EXOTICO HOTEL MARIGOLD EL PAYASO DEL MAL (CLOWN) EL SECRETO DE ADALINE EL SEPTIMO ENANITO (THE 7TH DWARF) EL ULTIMO NARUTO LA PELICULA (THE LAST NARUTO THE MOVIE) ELIMINADO (UNFRIENDED) ESCRIBIENDO DE AMOR INTENSAMENTE JESSABELLE JURASSIC WORLD (JURASSIC PARK IV) LA CASA DEL DEMONIO (DEMONIC) LA DAMA DE ORO (WOMAN IN GOLD) LA MECANICA DEL CORAZON (JACK ET LA MECANIQUE DU COEUR) LA NOCHE DEL DEMONIO 3 (INSIDIOUS) LA OVEJA SHAUN LA PELICULA LOS 33 DE SAN JOSE (33) LUGARES OSCUROS (DARK PLACES) MAD MAX 4 FURIA EN LA CARRETERA MAGIC MIKE XXL MAN ON WIRE (EL ALAMBRISTA) MIENTRAS SEAMOS JOVENES (WHILE WERE YOUNG) MIL VECES BUENAS NOCHES (A THOU SAND TIMES GOODNIGHT) MINIONS MISION IMPOSIBLE 5 NACION SECRETA NOTAS PERFECTAS 2 (PITCH PERFECT 2) PIXELES POLTERGEIST (JUEGOS DIABOLICOS) PUERTAS ADENTRO (MUSARAÑAS) RAPIDOS Y FURIOSOS 7 RESUCITADOS SHOWROOM SPY UNA ESPIA DESPISTADA TE SIGUE (IT FOLLOWS) TED 2 TERAPIA DE BROADWAY (SHES FUNNY THAT WAY) TERMINATOR 5 GENESIS TERREMOTO LA FALLA DE SAN ANDRES TOMORROWLAND EL MUNDO DEL MAÑANA TRASH (LADRONES DE ESPERANZA) TRUENO Y LA CASA MAGICA UN CASTILLO EN ITALIA (UN CHATEAU EN ITALIE) UN NUEVO DESPERTAR (THE HUMBLING) UNA NOCHE PARA SOBREVIVIR (RUN ALL NIGHT) VOLEY series DE TV : A TOUCH OF CLOTH ANTMAN (EL HOMBRE HORMIGA) COMBATE DARK MATTER DEVIOUS MAIDS DOWNTON ABBEY DR HOUSE DRAGON BALL SUPE FEAR THE WALKING DEAD GAME OF THRONES GYM TONY HEROES HUMANS INFIELES (MISTRESSES) JONATHAN STRANGE AND MR NORRELL LOS CABALLEROS DEL ZODIACO ALMA DORADA MAJOR CRIMES ORANGE IS THE NEW BLACK OUTLANDER PATITO FEO STITCHERS TEEN WOLF THE BLACKLIST THE BRINK THE FOSTERS THE MESSENGERS WAYWARD PINES ZUMBA SCULPT

10 years, 11 months

1
0
0 0

[PATCH v7 0/8] CPUFreq driver using CPPC methods

by Ashwin Chaugule

CPPC: ==== CPPC (Collaborative Processor Performance Control) is a new way to control CPU performance using an abstract continous scale as against a discretized P-state scale which is tied to CPU frequency only. It is defined in the ACPI 5.0+ spec. In brief, the basic operation involves: - OS makes a CPU performance request. (Can provide min and max tolerable bounds) - Platform (such as BMC) is free to optimize request within requested bounds depending on power/thermal budgets etc. - Platform conveys its decision back to OS The communication between OS and platform occurs through another medium called (PCC) Platform communication Channel. This is a generic mailbox like mechanism which includes doorbell semantics to indicate register updates. See drivers/mailbox/pcc.c This patchset introduces a CPPC based CPUFreq driver that works with existing governors such as ondemand. The CPPC table parsing and the CPPC communication semantics are abstracted into separate files to allow future CPPC based drivers to implement their own governors if required. Initial patchsets included an adaptation of the PID governor from intel_pstate.c. However recent experiments led to extensive modifications of the algorithm to calculate CPU busyness. Until it is verified that these changes are worthwhile, the existing governors should provide for a good enough starting point for ARM64 servers. Finer details about the PCC and CPPC spec are available in the latest ACPI 5.1 specification.[2] Testing: ======= This was tested on an SBSA compatible ARMv8 server with CPPCv2 firmware running on a remote processor. I verified that each CPUs performance limits were detected and that new performance requests were made by the on-demand governor proportional to the load on each CPU. I also verified that using the acpi_processor driver correctly maps the physical CPU ids to logical CPU ids, which helps in picking up the proper _CPC details from a processor object, in the case where CPU physical ids may not be contiguous. Changes since V6: - Separated PSS and CST from ACPI processor driver in two patches. - Made new Kconfig symbols auto selectable from Arch Kconfigs. Changes since V5: - Checkpatch cleanups. - Change pss_init to pss_perf_init. Rec by Srinivas Pandruvada. - Explicit comment explaining why postcore_initcall to pcc mailbox. - Fold acpi_processor_syscore_init/exit into CONFIG_ACPI_CST. - Added patch with dummy functions used by ACPI_HOTPLUG_CPU. Changes since V4: - Misc cleanups. Addressed feedback from Rafael. - Made acpi_processor.c independent of C-states, P-states and others. - Per CPU scanning for _CPC is now made from acpi_processor.c - Added new Kconfig options for legacy C states and P states to enable future support for newer alternatives as defined in the ACPI spec 6.0. Changes since V3: - Split CPPC backend methods into separate files. - Add frontend driver which plugs into existing CPUfreq governors. - Simplify PCC driver by moving communication space mapping and read/write into client drivers. Changes since V2: - Select driver if !X86, since intel_pstate will use HWP extensions instead. - Added more comments. - Added Freq domain awareness and PSD parsing. Changes since V1: - Create a new driver based on Dirks suggestion. - Fold in CPPC backend hooks into main driver. Changes since V0: [1] - Split intel_pstate.c into a generic PID governor and platform specific backend. - Add CPPC accessors as PID backend. [1] - http://lwn.net/Articles/608715/ [2] - http://www.uefi.org/sites/default/files/resources/ACPI_5_1release.pdf [3] - https://patches.linaro.org/40705/ Ashwin Chaugule (8): PCC: Initialize PCC Mailbox earlier at boot ACPI: Split out ACPI PSS from ACPI Processor driver ACPI: Decouple ACPI idle and ACPI processor drivers ACPI: Introduce CPU performance controls using CPPC CPPC: Add a CPUFreq driver for use with CPPC ACPI: Add weak routines for ACPI CPU Hotplug CPPC: Probe for CPPC tables for each ACPI Processor object PCC: Enable PCC only when needed arch/arm64/Kconfig | 1 + arch/x86/Kconfig | 1 + drivers/acpi/Kconfig | 41 +- drivers/acpi/Makefile | 8 +- drivers/acpi/acpi_processor.c | 18 + drivers/acpi/cppc_acpi.c | 812 ++++++++++++++++++++++++++++++++++++++++ drivers/acpi/processor_driver.c | 90 +++-- drivers/cpufreq/Kconfig | 2 +- drivers/cpufreq/Kconfig.arm | 16 + drivers/cpufreq/Kconfig.x86 | 2 + drivers/cpufreq/Makefile | 2 + drivers/cpufreq/cppc_cpufreq.c | 197 ++++++++++ drivers/mailbox/Kconfig | 2 +- drivers/mailbox/pcc.c | 8 +- include/acpi/cppc_acpi.h | 137 +++++++ include/acpi/processor.h | 129 +++++-- 16 files changed, 1392 insertions(+), 74 deletions(-) create mode 100644 drivers/acpi/cppc_acpi.c create mode 100644 drivers/cpufreq/cppc_cpufreq.c create mode 100644 include/acpi/cppc_acpi.h -- 1.9.1

10 years, 11 months

4
45
0 0

leg-kernel tag leg-20150804.0 released

by Graeme Gregory

The leg-kernel release has been made and tagged as leg-20150804.0 This is based on mainline kernel v4.2-rc5 Repository : http://git.linaro.org/leg/acpi/leg-kernel.git Direct Link: http://git.linaro.org/leg/acpi/leg-kernel.git/commit/8ceb073a662c26983126e5… Notes :- 1) SPCR updated with patch from Leif Lindholm to match devices using _CRS not _ADR which not all devices have (it is not mandated in ACPI, SPCR or SBSA/SBBR specs).

10 years, 11 months

1
0
0 0

[PATCH] arm64: acpi: identify SPCR device by _CRS instead of _ADR

by Leif Lindholm

The first version of SPCR handling code identified the correct device by comparing the address in SPCR with _ADR objects, through walking the namespace. Instead, use the required _CRS object for this matching, making the functionality more portable. Signed-off-by: Leif Lindholm <leif.lindholm(a)linaro.org> --- By my interpretation of the spec, the use of _ADR for this purpose is incorrect. Regardless, this patch makes automatic SPCR console identification work on Juno and FVP. arch/arm64/kernel/acpi.c | 32 +++++++++++++++++++------------- 1 file changed, 19 insertions(+), 13 deletions(-) diff --git a/arch/arm64/kernel/acpi.c b/arch/arm64/kernel/acpi.c index c5c6e49..64129b8 100644 --- a/arch/arm64/kernel/acpi.c +++ b/arch/arm64/kernel/acpi.c @@ -313,31 +313,37 @@ static int __init acpi_parse_spcr(struct acpi_table_header *table) static acpi_status acpi_spcr_device_scan(acpi_handle handle, u32 level, void *context, void **retv) { - unsigned long long adr; + unsigned long long adr = 0; struct acpi_buffer name_buffer = { ACPI_ALLOCATE_BUFFER, NULL }; acpi_status status = AE_OK; struct acpi_device *adev; + struct list_head resource_list; + struct resource_entry *rentry; status = acpi_get_name(handle, ACPI_FULL_PATHNAME, &name_buffer); if (ACPI_FAILURE(status)) return status; + adev = acpi_bus_get_acpi_device(handle); + if (!adev) { + pr_err("Err locating SPCR device from ACPI handle\n"); + return AE_OK; /* skip this one */ + } + /* - * does thie APCI entry have an associated Address? + * Read device address from _CRS. */ - status = acpi_evaluate_integer(handle, "_ADR", NULL, &adr); - if (ACPI_FAILURE(status)) - return AE_OK; /* not device we are interested in... */ - - if (adr == spcr_serial_addr) { - - adev = acpi_bus_get_acpi_device(handle); + INIT_LIST_HEAD(&resource_list); + if (acpi_dev_get_resources(adev, &resource_list, NULL, NULL) <= 0) + return AE_OK; - if (!adev) { - pr_err("Err locating SPCR device from ACPI handle\n"); - return AE_OK; /* skip this one */ - } + list_for_each_entry(rentry, &resource_list, node) { + if (resource_type(rentry->res) == IORESOURCE_MEM) + adr = rentry->res->start; + } + acpi_dev_free_resource_list(&resource_list); + if (adr == spcr_serial_addr) { acpi_spcr_serial_device = adev; pr_info("SPCR serial console: %s (0x%llx)\n", -- 2.1.4

10 years, 11 months

2
2
0 0

leg-kernel tag leg-20150731.0 released

by Graeme Gregory

The leg-kernel release has been made and tagged as leg-20150731.0 This is based on mainline kernel v4.2-rc4 Repository : http://git.linaro.org/leg/acpi/leg-kernel.git Direct Link: http://git.linaro.org/leg/acpi/leg-kernel.git/commit/8ceceb6b2d134c11d9884f… Notes :- 1) Fixes a problem with SPCR support

10 years, 11 months

1
0
0 0

leg-kernel tag leg-20150730.0 released

by Graeme Gregory

The leg-kernel release has been made and tagged as leg-20150730.0 This is based on mainline kernel v4.2-rc4 Repository : http://git.linaro.org/leg/acpi/leg-kernel.git Direct Link: http://git.linaro.org/leg/acpi/leg-kernel.git/commit/3d2e8b224ff7ab03ed88cf… Notes :- 1)

10 years, 11 months

1
0
0 0

[PATCH V7 0/5] map GHES memory region according to EFI memory map

by Jonathan (Zhixiong) Zhang

From: "Jonathan (Zhixiong) Zhang" <zjzhang(a)codeaurora.org> On a platform with APEI (ACPI Platform Error Interface) enabled, firmware updates a memory region with hardware error record using nocache attribute. When OS reads the region, since it maps the region with cacahed attribute even though EFI memory map defines this region as uncached, OS gets stale data and errorneously reports there is no new HW error. When ghes driver maps the memory region, it uses the cache attribute according to EFI memory map, if EFI memory map feature is enabled at runtime. Since both arch/x86 and arch/ia64 implemented architecture agnostic EFI memory map attribue lookup function efi_memattributes(), the code is moved from arch/x86 into EFI subsystem and is declared as __weak; archs other than ia64 should not override the default implementation. V7: 1. Added PROT_DEVICE_nGnRnE and PROT_NORMAL_WT to support all possible UEFI memory types for arm64. V6: 1. Implemented arch_apei_get_mem_attributes() for arm64 as inline function. 2. Rebased to efi-next-14364 of efi/next, pm+acpi-4.2-rc3 of linux-pm/master, arm64-upstream-13521 of arm64/master, next-20150720 of linux-next/master. V5: 1. Rebased to next-20150713 of linux-next/master, efi-next-14359 of efi/next, pm+acpi-4.2-rc2 of linux-pm/master, arm64-fixes-1215 of arm64/master. 2. Added comment for efi_mem_attributes(), explained why it is marked as __weak at the function definition site. V4: 1. Introduced arch_apei_get_mem_attributes() to allow arch specific implementation of getting pgprot_t appropriate for a physical address. 2. Implemented arch_apei_get_mem_attributes() for x86 and for arm64. V3: 1. Rebased to v4.1-rc7. 2. Moved efi_mem_attributes() from arch/x86 to drivers/firmware/efi and declared it as __weak. 3. Introduced ARCH_APEI_PAGE_KERNEL_UC to allow arch specific page protection type for UC. 4. Removed efi_ioremap(). It can not be used for GHES memory region mapping purpose since ioremap can not be used in atomic context. V2: 1. Rebased to v4.1-rc5. 2. Split removal of efi_mem_attributes() and creation of efi_ioremap() into two patches. Jonathan (Zhixiong) Zhang (5): efi: x86: rearrange efi_mem_attributes() x86: acpi: implement arch_apei_get_mem_attributes() arm64: mm: add PROT_DEVICE_nGnRnE and PROT_NORMAL_WT arm64: apei: implement arch_apei_get_mem_attributes() acpi, apei: use appropriate pgprot_t to map GHES memory arch/arm64/include/asm/acpi.h | 26 ++++++++++++++++++++++++++ arch/arm64/include/asm/memory.h | 1 + arch/arm64/include/asm/pgtable.h | 2 ++ arch/arm64/mm/proc.S | 6 ++++-- arch/x86/kernel/acpi/apei.c | 10 ++++++++++ arch/x86/platform/efi/efi.c | 18 ------------------ drivers/acpi/apei/ghes.c | 6 ++++-- drivers/firmware/efi/efi.c | 31 +++++++++++++++++++++++++++++++ include/acpi/apei.h | 1 + 9 files changed, 79 insertions(+), 22 deletions(-) -- The Qualcomm Innovation Center, Inc. is a member of the Code Aurora Forum, a Linux Foundation Collaborative Project

10 years, 11 months

6
21
0 0

[PATCH V8 0/5] map GHES memory region according to EFI memory map

by Jonathan (Zhixiong) Zhang

From: "Jonathan (Zhixiong) Zhang" <zjzhang(a)codeaurora.org> On a platform with APEI (ACPI Platform Error Interface) enabled, firmware updates a memory region with hardware error record using nocache attribute. When OS reads the region, since it maps the region with cacahed attribute even though EFI memory map defines this region as uncached, OS gets stale data and errorneously reports there is no new HW error. When ghes driver maps the memory region, it uses the cache attribute according to EFI memory map, if EFI memory map feature is enabled at runtime. Since both arch/x86 and arch/ia64 implemented architecture agnostic EFI memory map attribue lookup function efi_memattributes(), the code is moved from arch/x86 into EFI subsystem and is declared as __weak; archs other than ia64 should not override the default implementation. V8: 1. For x86, always return PAGE_KERNEL for arch_apei_get_mem_attribute(). The rational is explained in comment. 2. Rebased to arm64-upstream-14201 of arm64/master, next-20150724 of linux-next/master. V7: 1. Added PROT_DEVICE_nGnRnE and PROT_NORMAL_WT to support all possible UEFI memory types for arm64. V6: 1. Implemented arch_apei_get_mem_attributes() for arm64 as inline function. 2. Rebased to efi-next-14364 of efi/next, pm+acpi-4.2-rc3 of linux-pm/master, arm64-upstream-13521 of arm64/master, next-20150720 of linux-next/master. V5: 1. Rebased to next-20150713 of linux-next/master, efi-next-14359 of efi/next, pm+acpi-4.2-rc2 of linux-pm/master, arm64-fixes-1215 of arm64/master. 2. Added comment for efi_mem_attributes(), explained why it is marked as __weak at the function definition site. V4: 1. Introduced arch_apei_get_mem_attributes() to allow arch specific implementation of getting pgprot_t appropriate for a physical address. 2. Implemented arch_apei_get_mem_attributes() for x86 and for arm64. V3: 1. Rebased to v4.1-rc7. 2. Moved efi_mem_attributes() from arch/x86 to drivers/firmware/efi and declared it as __weak. 3. Introduced ARCH_APEI_PAGE_KERNEL_UC to allow arch specific page protection type for UC. 4. Removed efi_ioremap(). It can not be used for GHES memory region mapping purpose since ioremap can not be used in atomic context. V2: 1. Rebased to v4.1-rc5. 2. Split removal of efi_mem_attributes() and creation of efi_ioremap() into two patches. Jonathan (Zhixiong) Zhang (5): efi: x86: rearrange efi_mem_attributes() x86: acpi: implement arch_apei_get_mem_attributes() arm64: mm: add PROT_DEVICE_nGnRnE and PROT_NORMAL_WT arm64: apei: implement arch_apei_get_mem_attributes() acpi, apei: use appropriate pgprot_t to map GHES memory arch/arm64/include/asm/acpi.h | 26 ++++++++++++++++++++++++++ arch/arm64/include/asm/memory.h | 1 + arch/arm64/include/asm/pgtable.h | 2 ++ arch/arm64/mm/proc.S | 4 +++- arch/x86/kernel/acpi/apei.c | 19 +++++++++++++++++++ arch/x86/platform/efi/efi.c | 18 ------------------ drivers/acpi/apei/ghes.c | 6 ++++-- drivers/firmware/efi/efi.c | 31 +++++++++++++++++++++++++++++++ include/acpi/apei.h | 1 + 9 files changed, 87 insertions(+), 21 deletions(-) -- The Qualcomm Innovation Center, Inc. is a member of the Code Aurora Forum, a Linux Foundation Collaborative Project

10 years, 11 months

3
9
0 0

acpi-topic-mustang

by Itaru Kitayama

Hi Graeme, This is just to let you know that the current Mustang topic branch is able to boot the machine available in Austin the server lab. Attached is the config I used, last time I tried to build the branch I wasn't setting ACPI to y. This time some of ACPI related messages in demsg. Itaru

10 years, 11 months

1
0
0 0

[RFCv1 PATCH 0/7] Introducing ACPI support for GICv2m

by Suravee Suthikulpanit

ACPI core patches for ARM64 are now upstreamed in 4.1. Also PCI support patches for ARM64 ACPI are in progress, I am sending out this RFC to introduce ACPI support for GICv2m. This would allow MSI to work when booting ACPI. This patch series modify existing IRQ domain and ACPI GSI code to better support ACPI on ARM64. Summary: * Patch 1,2 introduce the new irq_domain_ops.init_alloc_info(). * Patch 3,4 modify the existing irq_domain_ops.match() to support ACPI. * Patch 5,6 introduce IRQ domain for ARM64 ACPI. * Patch 7 introduces ACPI support for GICv2m. Due to a large number of prerequisite patches, I have put together a branch on GitHub for review and testing: https://github.com/ssuthiku/linux.git acpi-pci-msi-rfc1 This branch has been tested on AMD Seattle Platform. Any feedback and comments are appreciated. Thank you in advance, Suravee Suravee Suthikulpanit (7): irqdomain: Introduce irq_domain_ops.init_alloc_info gic: Add gic_init_irq_alloc_info() irqdomain: Introduce irqdomain matching by reference Adopting the new irq_domain_ops.match() function prototype acpi: gsi: Adding irqdomain for ACPI acpi: gsi: Adding ARM64-specific acpi_register_gsi() gicv2m: Introducing ACPI support for GICv2m arch/arm64/kernel/acpi.c | 62 ++++++++- arch/powerpc/platforms/512x/mpc5121_ads_cpld.c | 4 +- arch/powerpc/platforms/cell/interrupt.c | 4 +- arch/powerpc/platforms/powermac/pic.c | 4 +- arch/powerpc/platforms/ps3/interrupt.c | 4 +- arch/powerpc/sysdev/ehv_pic.c | 4 +- arch/powerpc/sysdev/i8259.c | 4 +- arch/powerpc/sysdev/ipic.c | 4 +- arch/powerpc/sysdev/mpic.c | 4 +- arch/powerpc/sysdev/qe_lib/qe_ic.c | 4 +- arch/powerpc/sysdev/xics/xics-common.c | 4 +- drivers/acpi/gsi.c | 23 +++- drivers/irqchip/irq-gic-v2m.c | 172 ++++++++++++++++++++----- drivers/irqchip/irq-gic.c | 98 ++++++++++++-- drivers/pci/pci-acpi.c | 52 ++++++++ drivers/pci/probe.c | 2 + include/linux/acpi.h | 4 + include/linux/irqchip/arm-gic-acpi.h | 5 +- include/linux/irqchip/arm-gic.h | 11 ++ include/linux/irqdomain.h | 17 ++- include/linux/pci-acpi.h | 2 + kernel/irq/irqdomain.c | 41 ++++-- 22 files changed, 453 insertions(+), 76 deletions(-) -- 2.1.0

10 years, 11 months

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[PATCH v6 5/8] Watchdog: introduce ARM SBSA watchdog driver

by fu.wei＠linaro.org

From: Fu Wei <fu.wei(a)linaro.org> This driver bases on linux kernel watchdog framework, and use "pretimeout" in the framework. It supports getting timeout and pretimeout from parameter and FDT at the driver init stage. In first timeout, the interrupt routine run panic to save system context. Signed-off-by: Fu Wei <fu.wei(a)linaro.org> --- drivers/watchdog/Kconfig | 14 ++ drivers/watchdog/Makefile | 1 + drivers/watchdog/sbsa_gwdt.c | 455 +++++++++++++++++++++++++++++++++++++++++++ 3 files changed, 470 insertions(+) create mode 100644 drivers/watchdog/sbsa_gwdt.c diff --git a/drivers/watchdog/Kconfig b/drivers/watchdog/Kconfig index e5e7c55..e059850 100644 --- a/drivers/watchdog/Kconfig +++ b/drivers/watchdog/Kconfig @@ -152,6 +152,20 @@ config ARM_SP805_WATCHDOG ARM Primecell SP805 Watchdog timer. This will reboot your system when the timeout is reached. +config ARM_SBSA_WATCHDOG + tristate "ARM SBSA Generic Watchdog" + depends on ARM64 + depends on ARM_ARCH_TIMER + select WATCHDOG_CORE + help + ARM SBSA Generic Watchdog. This watchdog has two Watchdog timeouts. + The first timeout will trigger a panic; the second timeout will + trigger a system reset. + More details: ARM DEN0029B - Server Base System Architecture (SBSA) + + To compile this driver as module, choose M here: The module + will be called sbsa_gwdt. + config AT91RM9200_WATCHDOG tristate "AT91RM9200 watchdog" depends on SOC_AT91RM9200 && MFD_SYSCON diff --git a/drivers/watchdog/Makefile b/drivers/watchdog/Makefile index 5c19294..471f1b7c 100644 --- a/drivers/watchdog/Makefile +++ b/drivers/watchdog/Makefile @@ -30,6 +30,7 @@ obj-$(CONFIG_USBPCWATCHDOG) += pcwd_usb.o # ARM Architecture obj-$(CONFIG_ARM_SP805_WATCHDOG) += sp805_wdt.o +obj-$(CONFIG_ARM_SBSA_WATCHDOG) += sbsa_gwdt.o obj-$(CONFIG_AT91RM9200_WATCHDOG) += at91rm9200_wdt.o obj-$(CONFIG_AT91SAM9X_WATCHDOG) += at91sam9_wdt.o obj-$(CONFIG_CADENCE_WATCHDOG) += cadence_wdt.o diff --git a/drivers/watchdog/sbsa_gwdt.c b/drivers/watchdog/sbsa_gwdt.c new file mode 100644 index 0000000..2de5899 --- /dev/null +++ b/drivers/watchdog/sbsa_gwdt.c @@ -0,0 +1,455 @@ +/* + * SBSA(Server Base System Architecture) Generic Watchdog driver + * + * Copyright (c) 2015, Linaro Ltd. + * Author: Fu Wei <fu.wei(a)linaro.org> + * Suravee Suthikulpanit <Suravee.Suthikulpanit(a)amd.com> + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License 2 as published + * by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * The SBSA Generic watchdog driver is compatible with the pretimeout + * concept of Linux kernel. + * The timeout and pretimeout are determined by WCV or WOR. + * The first watch period is set by writing WCV directly, that can + * support more than 10s timeout at the maximum system counter + * frequency (400MHz). + * When WS0 is triggered, the second watch period (pretimeout) is + * determined by one of these registers: + * (1)WOR: 32bit register, this gives a maximum watch period of + * around 10s at the maximum system counter frequency. It's loaded + * automatically by hardware. + * (2)WCV: If the pretimeout value is greater then "max_wor_timeout", + * it will be loaded in WS0 interrupt routine. If system is in + * ws0_mode (reboot by kexec/kdump in panic with watchdog enabled + * and WS0 == true), the ping operation will only reload WCV. + * More details about the hardware specification of this device: + * ARM DEN0029B - Server Base System Architecture (SBSA) + * + * Kernel/API: P------------------| pretimeout + * |----------------------------------------T timeout + * SBSA GWDT: P---WOR (or WCV)---WS1 pretimeout + * |-------WCV----------WS0~~~(ws0_mode)~~~~T timeout + */ + +#include <linux/io.h> +#include <linux/interrupt.h> +#include <linux/module.h> +#include <linux/moduleparam.h> +#include <linux/of.h> +#include <linux/of_device.h> +#include <linux/platform_device.h> +#include <linux/uaccess.h> +#include <linux/watchdog.h> +#include <asm/arch_timer.h> + +/* SBSA Generic Watchdog register definitions */ +/* refresh frame */ +#define SBSA_GWDT_WRR 0x000 + +/* control frame */ +#define SBSA_GWDT_WCS 0x000 +#define SBSA_GWDT_WOR 0x008 +#define SBSA_GWDT_WCV_LO 0x010 +#define SBSA_GWDT_WCV_HI 0x014 + +/* refresh/control frame */ +#define SBSA_GWDT_W_IIDR 0xfcc +#define SBSA_GWDT_IDR 0xfd0 + +/* Watchdog Control and Status Register */ +#define SBSA_GWDT_WCS_EN BIT(0) +#define SBSA_GWDT_WCS_WS0 BIT(1) +#define SBSA_GWDT_WCS_WS1 BIT(2) + +/** + * struct sbsa_gwdt - Internal representation of the SBSA GWDT + * @wdd: kernel watchdog_device structure + * @clk: store the System Counter clock frequency, in Hz. + * @ws0_mode: indicate the system boot in the second stage timeout. + * @max_wor_timeout: the maximum timeout value for WOR (in seconds). + * @refresh_base: Virtual address of the watchdog refresh frame + * @control_base: Virtual address of the watchdog control frame + */ +struct sbsa_gwdt { + struct watchdog_device wdd; + u32 clk; + bool ws0_mode; + int max_wor_timeout; + void __iomem *refresh_base; + void __iomem *control_base; +}; + +#define to_sbsa_gwdt(e) container_of(e, struct sbsa_gwdt, wdd) + +#define DEFAULT_TIMEOUT 30 /* seconds, the 1st + 2nd watch periods*/ +#define DEFAULT_PRETIMEOUT 10 /* seconds, the 2nd watch period*/ + +static unsigned int timeout; +module_param(timeout, uint, 0); +MODULE_PARM_DESC(timeout, + "Watchdog timeout in seconds. (>=0, default=" + __MODULE_STRING(DEFAULT_TIMEOUT) ")"); + +static unsigned int pretimeout; +module_param(pretimeout, uint, 0); +MODULE_PARM_DESC(pretimeout, + "Watchdog pretimeout in seconds. (>=0, default=" + __MODULE_STRING(DEFAULT_PRETIMEOUT) ")"); + +static bool nowayout = WATCHDOG_NOWAYOUT; +module_param(nowayout, bool, S_IRUGO); +MODULE_PARM_DESC(nowayout, + "Watchdog cannot be stopped once started (default=" + __MODULE_STRING(WATCHDOG_NOWAYOUT) ")"); + +/* + * help functions for accessing 64bit WCV register + */ +static u64 sbsa_gwdt_get_wcv(struct watchdog_device *wdd) +{ + u32 wcv_lo, wcv_hi; + struct sbsa_gwdt *gwdt = to_sbsa_gwdt(wdd); + + do { + wcv_hi = readl_relaxed(gwdt->control_base + SBSA_GWDT_WCV_HI); + wcv_lo = readl_relaxed(gwdt->control_base + SBSA_GWDT_WCV_LO); + } while (wcv_hi != readl_relaxed(gwdt->control_base + + SBSA_GWDT_WCV_HI)); + + return (((u64)wcv_hi << 32) | wcv_lo); +} + +static void sbsa_gwdt_set_wcv(struct watchdog_device *wdd, unsigned int t) +{ + struct sbsa_gwdt *gwdt = to_sbsa_gwdt(wdd); + u64 wcv; + + wcv = arch_counter_get_cntvct() + (u64)t * gwdt->clk; + + writel_relaxed(upper_32_bits(wcv), + gwdt->control_base + SBSA_GWDT_WCV_HI); + writel_relaxed(lower_32_bits(wcv), + gwdt->control_base + SBSA_GWDT_WCV_LO); +} + +/* + * inline functions for reloading 64bit WCV register + */ +static inline void reload_pretimeout_to_wcv(struct watchdog_device *wdd) +{ + sbsa_gwdt_set_wcv(wdd, wdd->pretimeout); +} + +static inline void reload_first_stage_to_wcv(struct watchdog_device *wdd) +{ + sbsa_gwdt_set_wcv(wdd, wdd->timeout - wdd->pretimeout); +} + +/* + * watchdog operation functions + */ +static int sbsa_gwdt_set_timeout(struct watchdog_device *wdd, + unsigned int timeout) +{ + wdd->timeout = timeout; + + return 0; +} + +static int sbsa_gwdt_set_pretimeout(struct watchdog_device *wdd, + unsigned int pretimeout) +{ + struct sbsa_gwdt *gwdt = to_sbsa_gwdt(wdd); + u32 wor; + + wdd->pretimeout = pretimeout; + + /* If ws0_mode == true, we won't touch WOR */ + if (!gwdt->ws0_mode) { + if (!pretimeout) + /* + * If pretimeout is 0, it gives driver a timeslot (1s) + * to update WCV after an explicit refresh + * (sbsa_gwdt_start) + */ + wor = gwdt->clk; + else + if (pretimeout > gwdt->max_wor_timeout) + wor = U32_MAX; + else + wor = pretimeout * gwdt->clk; + + /* wtite WOR, that will cause an explicit watchdog refresh */ + writel_relaxed(wor, gwdt->control_base + SBSA_GWDT_WOR); + } + + return 0; +} + +static unsigned int sbsa_gwdt_get_timeleft(struct watchdog_device *wdd) +{ + struct sbsa_gwdt *gwdt = to_sbsa_gwdt(wdd); + u64 timeleft = sbsa_gwdt_get_wcv(wdd) - arch_counter_get_cntvct(); + + do_div(timeleft, gwdt->clk); + + return timeleft; +} + +static int sbsa_gwdt_keepalive(struct watchdog_device *wdd) +{ + struct sbsa_gwdt *gwdt = to_sbsa_gwdt(wdd); + + if (gwdt->ws0_mode) + reload_pretimeout_to_wcv(wdd); + else + reload_first_stage_to_wcv(wdd); + + return 0; +} + +static int sbsa_gwdt_start(struct watchdog_device *wdd) +{ + struct sbsa_gwdt *gwdt = to_sbsa_gwdt(wdd); + + /* If ws0_mode == true, the watchdog is enabled */ + if (!gwdt->ws0_mode) + /* writing WCS will cause an explicit watchdog refresh */ + writel_relaxed(SBSA_GWDT_WCS_EN, + gwdt->control_base + SBSA_GWDT_WCS); + + return sbsa_gwdt_keepalive(wdd); +} + +static int sbsa_gwdt_stop(struct watchdog_device *wdd) +{ + struct sbsa_gwdt *gwdt = to_sbsa_gwdt(wdd); + + writel_relaxed(0, gwdt->control_base + SBSA_GWDT_WCS); + /* + * Writing WCS has caused an explicit watchdog refresh. + * Both watchdog signals are deasserted, so clean ws0_mode flag. + */ + gwdt->ws0_mode = false; + + return 0; +} + +static irqreturn_t sbsa_gwdt_interrupt(int irq, void *dev_id) +{ + struct sbsa_gwdt *gwdt = (struct sbsa_gwdt *)dev_id; + struct watchdog_device *wdd = &gwdt->wdd; + + /* We don't use pretimeout, trigger WS1 now */ + if (!wdd->pretimeout) + sbsa_gwdt_set_wcv(wdd, 0); + + /* + * The pretimeout is valid, go panic + * If pretimeout is greater then "max_wor_timeout", + * reload the right value to WCV, then panic + */ + if (wdd->pretimeout > gwdt->max_wor_timeout) + reload_pretimeout_to_wcv(wdd); + panic("SBSA Watchdog pre-timeout"); + + return IRQ_HANDLED; +} + +static struct watchdog_info sbsa_gwdt_info = { + .identity = "SBSA Generic Watchdog", + .options = WDIOF_SETTIMEOUT | + WDIOF_KEEPALIVEPING | + WDIOF_MAGICCLOSE | + WDIOF_PRETIMEOUT | + WDIOF_CARDRESET, +}; + +static struct watchdog_ops sbsa_gwdt_ops = { + .owner = THIS_MODULE, + .start = sbsa_gwdt_start, + .stop = sbsa_gwdt_stop, + .ping = sbsa_gwdt_keepalive, + .set_timeout = sbsa_gwdt_set_timeout, + .set_pretimeout = sbsa_gwdt_set_pretimeout, + .get_timeleft = sbsa_gwdt_get_timeleft, +}; + +static int sbsa_gwdt_probe(struct platform_device *pdev) +{ + struct device *dev = &pdev->dev; + struct watchdog_device *wdd; + struct sbsa_gwdt *gwdt; + struct resource *res; + u64 max_wcv_timeout = U64_MAX; + void *rf_base, *cf_base; + int ret, irq; + u32 status; + + gwdt = devm_kzalloc(dev, sizeof(*gwdt), GFP_KERNEL); + if (!gwdt) + return -ENOMEM; + platform_set_drvdata(pdev, gwdt); + + res = platform_get_resource_byname(pdev, IORESOURCE_MEM, "refresh"); + rf_base = devm_ioremap_resource(dev, res); + if (IS_ERR(rf_base)) + return PTR_ERR(rf_base); + + res = platform_get_resource_byname(pdev, IORESOURCE_MEM, "control"); + cf_base = devm_ioremap_resource(dev, res); + if (IS_ERR(cf_base)) + return PTR_ERR(cf_base); + + irq = platform_get_irq_byname(pdev, "ws0"); + if (irq < 0) { + dev_err(dev, "unable to get ws0 interrupt.\n"); + return irq; + } + + /* + * Get the frequency of system counter from the cp15 interface of ARM + * Generic timer. We don't need to check it, because if it returns "0", + * system would panic in very early stage. + */ + gwdt->clk = arch_timer_get_cntfrq(); + gwdt->refresh_base = rf_base; + gwdt->control_base = cf_base; + gwdt->max_wor_timeout = U32_MAX / gwdt->clk; + gwdt->ws0_mode = false; + + wdd = &gwdt->wdd; + wdd->parent = dev; + wdd->info = &sbsa_gwdt_info; + wdd->ops = &sbsa_gwdt_ops; + watchdog_set_drvdata(wdd, gwdt); + watchdog_set_nowayout(wdd, nowayout); + + wdd->min_pretimeout = 0; + wdd->min_timeout = 1; + do_div(max_wcv_timeout, gwdt->clk); + wdd->max_pretimeout = max_wcv_timeout; + wdd->max_timeout = max_wcv_timeout * 2; + + wdd->pretimeout = DEFAULT_PRETIMEOUT; + wdd->timeout = DEFAULT_TIMEOUT; + watchdog_init_timeouts(wdd, pretimeout, timeout, dev); + + status = readl_relaxed(gwdt->control_base + SBSA_GWDT_WCS); + if (status & SBSA_GWDT_WCS_WS1) { + dev_warn(dev, "System reset by WDT(WCV: %llx)\n", + sbsa_gwdt_get_wcv(wdd)); + wdd->bootstatus |= WDIOF_CARDRESET; + } else if (status == (SBSA_GWDT_WCS_WS0 | SBSA_GWDT_WCS_EN)) { + gwdt->ws0_mode = true; + } + + ret = devm_request_irq(dev, irq, sbsa_gwdt_interrupt, 0, + pdev->name, gwdt); + if (ret) { + dev_err(dev, "unable to request IRQ %d\n", irq); + return ret; + } + + ret = watchdog_register_device(wdd); + if (ret) + return ret; + + /* If ws0_mode == true, the line won't update WOR */ + sbsa_gwdt_set_pretimeout(wdd, wdd->pretimeout); + + /* + * If watchdog is already enabled, do a ping operation + * to keep system running + */ + if (status & SBSA_GWDT_WCS_EN) + sbsa_gwdt_keepalive(wdd); + + dev_info(dev, "Initialized with %ds timeout, %ds pretimeout @ %u Hz%s\n", + wdd->timeout, wdd->pretimeout, gwdt->clk, + status & SBSA_GWDT_WCS_EN ? + gwdt->ws0_mode ? " [second stage]" : " [enabled]" : + ""); + + return 0; +} + +static void sbsa_gwdt_shutdown(struct platform_device *pdev) +{ + struct sbsa_gwdt *gwdt = platform_get_drvdata(pdev); + + sbsa_gwdt_stop(&gwdt->wdd); +} + +static int sbsa_gwdt_remove(struct platform_device *pdev) +{ + struct sbsa_gwdt *gwdt = platform_get_drvdata(pdev); + + watchdog_unregister_device(&gwdt->wdd); + + return 0; +} + +/* Disable watchdog if it is active during suspend */ +static int __maybe_unused sbsa_gwdt_suspend(struct device *dev) +{ + struct sbsa_gwdt *gwdt = dev_get_drvdata(dev); + + if (watchdog_active(&gwdt->wdd)) + sbsa_gwdt_stop(&gwdt->wdd); + + return 0; +} + +/* Enable watchdog and configure it if necessary */ +static int __maybe_unused sbsa_gwdt_resume(struct device *dev) +{ + struct sbsa_gwdt *gwdt = dev_get_drvdata(dev); + + if (watchdog_active(&gwdt->wdd)) + sbsa_gwdt_start(&gwdt->wdd); + + return 0; +} + +static const struct dev_pm_ops sbsa_gwdt_pm_ops = { + SET_SYSTEM_SLEEP_PM_OPS(sbsa_gwdt_suspend, sbsa_gwdt_resume) +}; + +static const struct of_device_id sbsa_gwdt_of_match[] = { + { .compatible = "arm,sbsa-gwdt", }, + {}, +}; +MODULE_DEVICE_TABLE(of, sbsa_gwdt_of_match); + +static const struct platform_device_id sbsa_gwdt_pdev_match[] = { + { .name = "sbsa-gwdt", }, + {}, +}; +MODULE_DEVICE_TABLE(platform, sbsa_gwdt_pdev_match); + +static struct platform_driver sbsa_gwdt_driver = { + .driver = { + .name = "sbsa-gwdt", + .pm = &sbsa_gwdt_pm_ops, + .of_match_table = sbsa_gwdt_of_match, + }, + .probe = sbsa_gwdt_probe, + .remove = sbsa_gwdt_remove, + .shutdown = sbsa_gwdt_shutdown, + .id_table = sbsa_gwdt_pdev_match, +}; + +module_platform_driver(sbsa_gwdt_driver); + +MODULE_DESCRIPTION("SBSA Generic Watchdog Driver"); +MODULE_AUTHOR("Fu Wei <fu.wei(a)linaro.org>"); +MODULE_AUTHOR("Suravee Suthikulpanit <Suravee.Suthikulpanit(a)amd.com>"); +MODULE_LICENSE("GPL v2"); -- 1.9.1

10 years, 11 months

2
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[PATCH 0/2] process vendor proprietary CPER error section

by Jonathan (Zhixiong) Zhang

From: "Jonathan (Zhixiong) Zhang" <zjzhang(a)codeaurora.org> UEFI spec allows for non-standard (eg. vendor proprietary) error section in CPER (COmmon Platform Error Record), as defined in section N2.3 of UEFI version 2.5. If section Type field of Generic Error Data Entry matches with one of the GUID as defined in include/linux/cper.h, print out the raw data in dmesg buffer, and also add a tracepoint for reporting such error. Jonathan (Zhixiong) Zhang (2): efi: parse vendor proprietary CPER section ras: acpi/apei: trace event for vendor proprietary CPER section drivers/firmware/efi/cper.c | 61 +++++++++++++++++++++++++++++++++++++++++++-- include/linux/cper.h | 4 +++ drivers/acpi/apei/ghes.c | 29 +++++++++++++++++++++++++++-- drivers/ras/ras.c | 1 + include/ras/ras_event.h | 30 ++++++++++++++++++++++++++++++ 5 files changed, 121 insertions(+), 4 deletions(-) -- The Qualcomm Innovation Center, Inc. is a member of the Code Aurora Forum, a Linux Foundation Collaborative Project

10 years, 11 months

3
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[PATCH V6 0/4] map GHES memory region according to EFI memory map

by Jonathan (Zhixiong) Zhang

From: "Jonathan (Zhixiong) Zhang" <zjzhang(a)codeaurora.org> On a platform with APEI (ACPI Platform Error Interface) enabled, firmware updates a memory region with hardware error record using nocache attribute. When OS reads the region, since it maps the region with cacahed attribute even though EFI memory map defines this region as uncached, OS gets stale data and errorneously reports there is no new HW error. When ghes driver maps the memory region, it uses the cache attribute according to EFI memory map, if EFI memory map feature is enabled at runtime. Since both arch/x86 and arch/ia64 implemented architecture agnostic EFI memory map attribue lookup function efi_memattributes(), the code is moved from arch/x86 into EFI subsystem and is declared as __weak; archs other than ia64 should not override the default implementation. V6: 1. Implemented arch_apei_get_mem_attributes() for arm64 as inline function. 2. Rebased to efi-next-14364 of efi/next, pm+acpi-4.2-rc3 of linux-pm/master, arm64-upstream-13521 of arm64/master, next-20150720 of linux-next/master. V5: 1. Rebased to next-20150713 of linux-next/master, efi-next-14359 of efi/next, pm+acpi-4.2-rc2 of linux-pm/master, arm64-fixes-1215 of arm64/master. 2. Added comment for efi_mem_attributes(), explained why it is marked as __weak at the function definition site. V4: 1. Introduced arch_apei_get_mem_attributes() to allow arch specific implementation of getting pgprot_t appropriate for a physical address. 2. Implemented arch_apei_get_mem_attributes() for x86 and for arm64. V3: 1. Rebased to v4.1-rc7. 2. Moved efi_mem_attributes() from arch/x86 to drivers/firmware/efi and declared it as __weak. 3. Introduced ARCH_APEI_PAGE_KERNEL_UC to allow arch specific page protection type for UC. 4. Removed efi_ioremap(). It can not be used for GHES memory region mapping purpose since ioremap can not be used in atomic context. V2: 1. Rebased to v4.1-rc5. 2. Split removal of efi_mem_attributes() and creation of efi_ioremap() into two patches. Jonathan (Zhixiong) Zhang (4): efi: x86: rearrange efi_mem_attributes() x86: acpi: implement arch_apei_get_mem_attributes() arm64: apei: implement arch_apei_get_mem_attributes() acpi, apei: use appropriate pgprot_t to map GHES memory arch/arm64/include/asm/acpi.h | 15 +++++++++++++++ arch/x86/kernel/acpi/apei.c | 10 ++++++++++ arch/x86/platform/efi/efi.c | 18 ------------------ drivers/acpi/apei/ghes.c | 6 ++++-- drivers/firmware/efi/efi.c | 31 +++++++++++++++++++++++++++++++ include/acpi/apei.h | 1 + 6 files changed, 61 insertions(+), 20 deletions(-) -- The Qualcomm Innovation Center, Inc. is a member of the Code Aurora Forum, a Linux Foundation Collaborative Project

10 years, 11 months

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Re: [Linaro-acpi] [PATCH V3 4/4] acpi, apei: use EFI memmap to map GHES memory

by Zhang, Jonathan Zhixiong

Hi Matt/Borislav, thanks for the discussion. I am sorry that somehow I did not see this message in my inbox. I found it by surprise through an internet search. > On Mon, 22 Jun, at 06:11:31AM, Matt Fleming wrote: >> >> Right, but see my previous comment about x86 discarding a bunch of >> attributes for memory regions because the kernel "knows better". >> >> And in most places, yes, the kernel really does know better. But this >> APEI case is special because irrespective of what the kernel says we >> want to be compatible with the firmware's memory map. >> >> And we don't have an API for that. > > Maybe what we want is a new PAGE_* protection that is compatible with > any firmware mappings? That'd be nice because we wouldn't have to > introduce a whole new API for this GHES case and ioremap_* could do > whatever it wanted under the hood. > > Thougts? > Agree. That being said, I do not know if this GHES case is the only user case that will benefit from such framework. If it is, then it may be controversial to introduce a framework for only one use case. To me, there are two ways that will help GHES case: a. Define ioremap_page_range_[no]cache() functions for archs, similar like the case for ioremap_[no]cache. b. Define a set of PAGE_* protection types (in particular PAGE_KERNEL_NOCACHE). Right now it seems like only a few protection types (such as PAGE_KERNEL) are defined across the archs. -- Jonathan (Zhixiong) Zhang The Qualcomm Innovation Center, Inc. is a member of the Code Aurora Forum, a Linux Foundation Collaborative Project

10 years, 11 months

1
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[PATCH V5 0/4] map GHES memory region according to EFI memory map

by Jonathan (Zhixiong) Zhang

From: "Jonathan (Zhixiong) Zhang" <zjzhang(a)codeaurora.org> On a platform with APEI (ACPI Platform Error Interface) enabled, firmware updates a memory region with hardware error record using nocache attribute. When OS reads the region, since it maps the region with cacahed attribute even though EFI memory map defines this region as uncached, OS gets stale data and errorneously reports there is no new HW error. When ghes driver maps the memory region, it uses the cache attribute according to EFI memory map, if EFI memory map feature is enabled at runtime. Since both arch/x86 and arch/ia64 implemented architecture agnostic EFI memory map attribue lookup function efi_memattributes(), the code is moved from arch/x86 into EFI subsystem and is declared as __weak; archs other than ia64 should not override the default implementation. V5: 1. Rebased to next-20150713 of linux-next/master, efi-next-14359 of efi/next, pm+acpi-4.2-rc2 of linux-pm/master, arm64-fixes-1215 of arm64/master. 2. Added comment for efi_mem_attributes(), explained why it is marked as __weak at the function definition site. V4: 1. Introduced arch_apei_get_mem_attributes() to allow arch specific implementation of getting pgprot_t appropriate for a physical address. 2. Implemented arch_apei_get_mem_attributes() for x86 and for arm64. V3: 1. Rebased to v4.1-rc7. 2. Moved efi_mem_attributes() from arch/x86 to drivers/firmware/efi and declared it as __weak. 3. Introduced ARCH_APEI_PAGE_KERNEL_UC to allow arch specific page protection type for UC. 4. Removed efi_ioremap(). It can not be used for GHES memory region mapping purpose since ioremap can not be used in atomic context. V2: 1. Rebased to v4.1-rc5. 2. Split removal of efi_mem_attributes() and creation of efi_ioremap() into two patches. Jonathan (Zhixiong) Zhang (4): efi: x86: rearrange efi_mem_attributes() x86: acpi: implement arch_apei_get_mem_attributes() arm64: apei: implement arch_apei_get_mem_attributes() acpi, apei: use appropriate pgprot_t to map GHES memory arch/arm64/kernel/apei.c | 11 +++++++++++ arch/x86/kernel/acpi/apei.c | 10 ++++++++++ arch/x86/platform/efi/efi.c | 18 ------------------ drivers/acpi/apei/ghes.c | 6 ++++-- drivers/firmware/efi/efi.c | 31 +++++++++++++++++++++++++++++++ include/acpi/apei.h | 1 + 6 files changed, 57 insertions(+), 20 deletions(-) -- The Qualcomm Innovation Center, Inc. is a member of the Code Aurora Forum, a Linux Foundation Collaborative Project

10 years, 11 months

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[PATCH v3 0/8] Add self-probe infrastructure and stacked irqdomain support for ACPI based GICv2/3 init

by Hanjun Guo

This patch set introduce self-probe infrastructure to init IRQ controllers and stacked irqdomain support for ACPI based GICv2/3 init. This patch set add its support for GIC verion which is introduced in ACPI 6.0, based on that, we introduce the self-probe infrastructure, the self-probe infrastructure for ACPI GIC init is similar as IRQCHIP_DECLARE() and based on the GIC version support in ACPI MADT table. we match the GIC version and GIC driver and load it. After the self-probe infrastructure is ready, I cleanuped the GICv2 code to use the framework. Patch 4 implement the stacked irqdomain support for GICv2 based on the model of mapping interrupt and device in ACPI. Patch 5~8 are ACPI based GICv3 init. Any comments are warmly welcomed. v2->v3: - Introduced a mechanism to match the GSI with its irqdomain instead of referring to the acpi_irq_domain in previous version - Add finding GICR base address in GICC structures in GICv3 code. - Address the comments from Lorenzo and Marc - Rebased on top of 4.2-rc1, since ACPICA patches were pushed to 4.2 by Rafael, I removed ACPICA patches in previous version. v1->v2: - Remove the gicv2/v3 related driver code in drivers/irqchip/irq-gic-acpi.c which I was trying to consolidate them in one file, then arm-gic.h and arm-gic-v3.h will be used separately within parent driver only - Drop the gsi_mutex patch - Use the GIC version to match the GIC driver, then no need to test for the version in each driver - Move acpi_irq_init() to drivers/irqchip/irq-gic-acpi.c instead of in drivers/acpi/irq.c. maybe we need to rename acpi_irq_init() as acpi_gic_init() but I keep that name to accommodate of_irq_init(), any objections please let me know. update from RFC version: - Consolidate all the GIC init code into drivers/irqchip/irq-gic-acpi.c Hanjun Guo (6): irqchip / GIC: Add GIC version support in ACPI MADT ACPI / irqchip: Add self-probe infrastructure to initialize IRQ controller irqchip / GIC / ACPI: Use IRQCHIP_ACPI_DECLARE to simplify GICv2 init code irqchip / gic: Add stacked irqdomain support for ACPI based GICv2 init irqchip / GICv3: Add stacked irqdomain support for ACPI based init irqchip / gicv3 / ACPI: Add GICR support via GICC structures Tomasz Nowicki (2): irqchip / GICv3: Refactor gic_of_init() for GICv3 driver irqchip / GICv3: Add ACPI support for GICv3+ initialization arch/arm64/Kconfig | 1 + arch/arm64/include/asm/acpi.h | 1 - arch/arm64/include/asm/irq.h | 13 -- arch/arm64/kernel/acpi.c | 25 -- drivers/acpi/gsi.c | 78 +++++-- drivers/irqchip/Kconfig | 3 + drivers/irqchip/Makefile | 1 + drivers/irqchip/irq-gic-acpi.c | 171 ++++++++++++++ drivers/irqchip/irq-gic-v3.c | 427 ++++++++++++++++++++++++++++++----- drivers/irqchip/irq-gic.c | 40 ++-- include/asm-generic/vmlinux.lds.h | 13 ++ include/linux/acpi.h | 21 ++ include/linux/acpi_irq.h | 4 +- include/linux/irqchip.h | 13 ++ include/linux/irqchip/arm-gic-acpi.h | 10 +- include/linux/mod_devicetable.h | 8 + 16 files changed, 695 insertions(+), 134 deletions(-) create mode 100644 drivers/irqchip/irq-gic-acpi.c -- 1.9.1

10 years, 11 months

3
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[RFC PATCH 0/7] ACPI IORT (connections of PCI, devices, ITS and SMMU)

by Hanjun Guo

IORT, IO remapping tables, which is a table to describe the connections of PCI root complex, devices, ITS (msi controller) and SMMU, for example, it presents the topology of which device under which SMMU and(or) ITS. This patch set first do some cleanup for the ITS dirver, then init the ITS with the information presented by MADT ITS entries, then follows the IORT spec, implementing: - PCI root complex using ITS as msi controller, mapping its domain (segemnt) number with the MSI controller; - init the SMMU and use the mapping of PCI and no-PCI device to SMMU to connect them - No-PCI devices using MSI (connect to ITS) is not covered by this patch set. please refer to the ARM documentation: http://infocenter.arm.com/help/topic/com.arm.doc.den0049a/DEN0049A_IO_Remap… This patch set is based on Tomasz Nowicki's work, but I rework some of the patches significantly, more work is needed for this patch set and I'm still not satisfy with the some of implementation, anyway, I will continue working on that, and at the same time, sending them out for review to see if there are some major problems. you can get them form git://git.linaro.org/leg/acpi/acpi.git devel Comments and test are warmly welcomed. Hanjun Guo (5): irqchip / GICv3: remove gic root node in ITS irqchip / GICv3 / ITS: mark its_init() as __init irqchip/GICv3/ITS: refator ITS dt init code to prepare for ACPI irqchip: gicv3: its: probe ITS in ACPI way ARM64, ACPI, PCI, MSI: I/O Remapping Table (IORT) initial support. Tomasz Nowicki (2): arm, smmu: Use more generic structure for SMMU master list. ARM64, ACPI, IORT: Bind SMMU driver via IORT table drivers/acpi/Kconfig | 3 + drivers/acpi/Makefile | 1 + drivers/acpi/iort.c | 536 +++++++++++++++++++++++++++++++++++++++ drivers/acpi/pci_root.c | 2 + drivers/iommu/arm-smmu.c | 290 ++++++++++++++++----- drivers/irqchip/Kconfig | 1 + drivers/irqchip/irq-gic-v3-its.c | 188 ++++++++++---- include/linux/iort.h | 63 +++++ 8 files changed, 966 insertions(+), 118 deletions(-) create mode 100644 drivers/acpi/iort.c create mode 100644 include/linux/iort.h -- 1.9.1

10 years, 11 months

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[RFC PATCH 0/5] Provide better MADT subtable sanity checks

by Al Stone

Currently, the BAD_MADT_ENTRY macro is used to do a very simple sanity check on the various subtables that are defined for the MADT. The check compares the size of the subtable data structure as defined by ACPICA to the length entry in the subtable. If they are not the same, the assumption is that the subtable is incorrect. Over time, the ACPI spec has allowed for MADT subtables where this can never be true (the local SAPIC subtable). Or, more recently, the spec has accumulated some minor flaws where there are three possible sizes for a subtable, all of which are valid, but only for specific versions of the spec (the GICC subtable). In both cases, BAD_MADT_ENTRY reports these subtables as bad when they are not. In order to retain some sanity check on the MADT subtables, we now have to special case these subtables. Of necessity, these special cases have ended up in arch-dependent code (arm64) or an arch has simply decided to forgo the check (ia64). This patch set replaces the BAD_MADT_ENTRY macro with a function called bad_madt_entry(). This function uses a data set of details about the subtables to provide more sanity checking than before: -- is the subtable legal for the version given in the FADT? -- is the subtable legal for the revision of the MADT in use? -- is the subtable of the proper length (including checking on the one variable length subtable), given the FADT version and the MADT revision? Further, this patch set adds in the call to bad_madt_entry() from the acpi_table_parse_madt() function, allowing it to be used consistently by all architectures, for all subtables, and removing the need for each of the subtable traversal callback functions to use BAD_MADT_ENTRY. In theory, as the ACPI specification changes, we would only have to add additional information to the data set describing the MADT subtables in order to continue providing sanity checks, even when new subtables are added. These patches have been tested on an APM Mustang (arm64) and are known to work there. They have NOT been tested anywhere else yet. Al Stone (5): ACPI: add in a bad_madt_entry() function to eventually replace the macro ACPI / ARM64: remove usage of BAD_MADT_ENTRY/BAD_MADT_GICC_ENTRY ACPI / IA64: remove usage of BAD_MADT_ENTRY ACPI / X86: remove usage of BAD_MADT_ENTRY ACPI: remove definition of BAD_MADT_ENTRY macro arch/arm64/include/asm/acpi.h | 8 -- arch/arm64/kernel/perf_event.c | 3 - arch/arm64/kernel/smp.c | 2 - arch/ia64/kernel/acpi.c | 20 ---- arch/x86/kernel/acpi/boot.c | 27 ----- drivers/acpi/tables.c | 241 +++++++++++++++++++++++++++++++++++++++++ drivers/irqchip/irq-gic-v2m.c | 2 - drivers/irqchip/irq-gic.c | 6 - include/linux/acpi.h | 4 - 9 files changed, 241 insertions(+), 72 deletions(-) -- 2.4.3

10 years, 11 months

2
8
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leg-kernel tag leg-20150716.0 released

by Graeme Gregory

The leg-kernel release has been made and tagged as leg-20150716.0 This is based on mainline kernel v4.2-rc2 Repository : http://git.linaro.org/leg/acpi/leg-kernel.git Direct Link: http://git.linaro.org/leg/acpi/leg-kernel.git/commit/d5bb60a53ff133e8d6feec… Notes :- 1) This release has re-introduces APM Mustang support from Redhat!

10 years, 11 months

1
0
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APM Mustang topic branch

by Itaru Kitayama

Hi, Build of the topic branch fails with an error: CHK include/config/kernel.release CHK include/generated/uapi/linux/version.h CHK include/generated/utsrelease.h CHK include/generated/bounds.h CHK include/generated/timeconst.h CHK include/generated/asm-offsets.h CALL scripts/checksyscalls.sh CHK include/generated/compile.h CC arch/arm64/kernel/setup.o arch/arm64/kernel/setup.c: In function ‘arm64_spcr_setup’: arch/arm64/kernel/setup.c:603:3: error: implicit declaration of function ‘acpi_setup_spcr’ [-Werror=implicit-function-declaration] acpi_setup_spcr(); ^ cc1: some warnings being treated as errors scripts/Makefile.build:258: recipe for target 'arch/arm64/kernel/setup.o' failed make[1]: *** [arch/arm64/kernel/setup.o] Error 1 Makefile:943: recipe for target 'arch/arm64/kernel' failed make: *** [arch/arm64/kernel] Error 2

10 years, 11 months

3
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[PATCH v6 0/8] Watchdog: introduce ARM SBSA watchdog driver

by fu.wei＠linaro.org

From: Fu Wei <fu.wei(a)linaro.org> This patchset: (1)Introduce Documentation/devicetree/bindings/watchdog/sbsa-gwdt.txt for FDT info of SBSA Generic Watchdog, and give two examples of adding SBSA Generic Watchdog device node into the dts files: foundation-v8.dts and amd-seattle-soc.dtsi. (2)Introduce "pretimeout" into the watchdog framework, and update Documentation/watchdog/watchdog-kernel-api.txt to introduce: (1)the new elements in the watchdog_device and watchdog_ops struct; (2)the new API "watchdog_init_timeouts". (3)Introduce ARM SBSA watchdog driver: a.Use linux kernel watchdog framework; b.Work with FDT on ARM64; c.Use "pretimeout" in watchdog framework; d.Support getting timeout and pretimeout from parameter and FDT at the driver init stage. e.In the first timeout, do panic to save system context; f.In the second stage, user can still feed the dog without cleaning WS0. By this feature, we can avoid the panic infinite loops, while backing up a large system context in a server. g.In the second stage, can trigger WS1 by setting pretimeout = 0 if necessary. (4)Introduce ACPI GTDT parser: drivers/acpi/gtdt.c Parse SBSA Generic Watchdog Structure in GTDT table of ACPI, and create a platform device with that information. This platform device can be used by This Watchdog driver. drivers/clocksource/arm_arch_timer.c is simplified by this GTDT support. This patchset has been tested with watchdog daemon (ACPI/FDT, module/build-in) on the following platforms: (1)ARM Foundation v8 model Changelog: v6: Improve the dtb example files: reduce the register frame size to 4K. Improve pretimeout support: (1) improve watchdog_init_timeouts function (2) rename watchdog_check_min_max_timeouts back to the original name (1) improve watchdog_timeout_invalid/watchdog_pretimeout_invalid Add the new features in the sbsa_gwdt driver: (1) In the second stage, user can feed the dog without cleaning WS0. (2) In the second stage, user can trigger WS1 by setting pretimeout = 0. (3) expand the max value of pretimeout, in case 10 second is not enough for a kdump kernel reboot in panic. v5: Improve pretimeout support: (1)fix typo in documentation and comments. (2)fix the timeout limits validation bug. Simplify sbsa_gwdt driver: (1)integrate all the registers access functions into caller. v4: Refactor GTDT support code: remove it from arch/arm64/kernel/acpi.c, put it into drivers/acpi/gtdt.c file. Integrate the GTDT code of drivers/clocksource/arm_arch_timer.c into drivers/acpi/gtdt.c. Improve pretimeout support, fix "pretimeout == 0" problem. Simplify sbsa_gwdt driver: (1)timeout/pretimeout limits setup; (2)keepalive function; (3)delete "clk == 0" check; (4)delete WS0 status bit check in interrupt routine; (5)sbsa_gwdt_set_wcv function. v3: Delete "export arch_timer_get_rate" patch. Driver back to use arch_timer_get_cntfrq. Improve watchdog_init_timeouts function and update relevant documentation. Improve watchdog_timeout_invalid and watchdog_pretimeout_invalid. Improve foundation-v8.dts: delete the unnecessary tag of device node. Remove "ARM64 || COMPILE_TEST" from Kconfig. Add comments in arch/arm64/kernel/acpi.c Fix typoes and incorrect comments. v2: Improve watchdog-kernel-api.txt documentation for pretimeout support. Export "arch_timer_get_rate" in arm_arch_timer.c. Add watchdog_init_timeouts API for pretimeout support in framework. Improve suspend and resume foundation in driver Improve timeout/pretimeout values init code in driver. Delete unnecessary items of the sbsa_gwdt struct and #define. Delete all unnecessary debug info in driver. Fix 64bit division bug. Use the arch_timer interface to get watchdog clock rate. Add MODULE_DEVICE_TABLE for platform device id. Fix typoes. v1: The first version upstream patchset to linux mailing list. Fu Wei (8): Documentation: add sbsa-gwdt.txt documentation ARM64: add SBSA Generic Watchdog device node in foundation-v8.dts ARM64: add SBSA Generic Watchdog device node in amd-seattle-soc.dtsi Watchdog: introdouce "pretimeout" into framework Watchdog: introduce ARM SBSA watchdog driver ACPI: add GTDT table parse driver into ACPI driver Watchdog: enable ACPI GTDT support for ARM SBSA watchdog driver clocksource: simplify ACPI code in arm_arch_timer.c .../devicetree/bindings/watchdog/sbsa-gwdt.txt | 36 ++ Documentation/watchdog/watchdog-kernel-api.txt | 47 ++- arch/arm64/boot/dts/amd/amd-seattle-soc.dtsi | 11 + arch/arm64/boot/dts/arm/foundation-v8.dts | 10 + arch/arm64/kernel/time.c | 4 +- drivers/acpi/Kconfig | 9 + drivers/acpi/Makefile | 1 + drivers/acpi/gtdt.c | 180 ++++++++ drivers/clocksource/Kconfig | 1 + drivers/clocksource/arm_arch_timer.c | 60 +-- drivers/watchdog/Kconfig | 15 + drivers/watchdog/Makefile | 1 + drivers/watchdog/sbsa_gwdt.c | 455 +++++++++++++++++++++ drivers/watchdog/watchdog_core.c | 98 +++-- drivers/watchdog/watchdog_dev.c | 53 +++ include/clocksource/arm_arch_timer.h | 8 + include/linux/acpi.h | 5 + include/linux/clocksource.h | 4 +- include/linux/watchdog.h | 39 +- 19 files changed, 947 insertions(+), 90 deletions(-) create mode 100644 Documentation/devicetree/bindings/watchdog/sbsa-gwdt.txt create mode 100644 drivers/acpi/gtdt.c create mode 100644 drivers/watchdog/sbsa_gwdt.c -- 1.9.1

10 years, 11 months

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[PATCH 0/2]

by Graeme Gregory

Hi Al, Please take these as bug reports to Redhat maintained patches. I am unsure of the correct fixes in these cases. I have pushed these to the mustang topic branch and will push the SPCR one to the other topics as well. Thanks Graeme

10 years, 11 months

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Garantizamos las mejores vacaciones de invierno!

by paula

Garantizamos las mejores vacaciones de invierno! Llegan las vacaciones y comienza el frío, pero en xtop te preparamos la mejor variedad en Juegos X-box360 – Ps3 – Series – Peliculas – Programas – Musica en MP3 Y DVD´S "Invierno 2015" Los mejores juegos.. 2015 todo lo nuevo. METAL GEAR SOLID V GROUND ZEROES Juego en Ps3 y X-box 360 MORTAL KOMBAT X juego de PC BATTLEFIELD HARDLINE Juego en Ps3 - X-box 360- PC DRAGON BALL XENOVERSE Juego en Ps3 - X-box 360 RESIDENT EVIL REVELATIONS 2 Juego en Ps3 - X-box 360 CALL OF DUTY BLACK OPS Juego en Ps3 - X-box 360 - PC y WII PRO EVOLUTION SOCCER 2016 Lo mejor de Cartelera de cine de la semana! CENICIENTA (2015) Tambien disponible en BLU-RAY CHAPPIE disponible también en BLU-RAY HOME (HOGAR DULCE HOGAR) INSURGENTE INTENSAMENTE JURASSIC WORLD (JURASSIC PARK IV) LOS JUEGOS DEL HAMBRE 2: EN LLAMAS LOS VENGADORES 2 (AVENGERS ERA DE ULTRON) (THE AVENGERS AGE OF ULTRON) MINIONS POLTERGEIST (JUEGOS DIABOLICOS) RAPIDOS Y FURIOSOS 7 SPY UNA ESPIA DESPISTADA TED 2 TERMINATOR 5 GENESIS TERREMOTO LA FALLA DE SAN ANDRES TOMORROWLAND EL MUNDO DEL MAÑANA Las mejores series para disfrutar estas vacaciones GAME OF THRONES FEAR THE WALKING DEAD ORANGE IS THE NEW BLACK WAYWARD PINES TEEN WOLF DRAGON BALL SUPE LOS CABALLEROS DEL ZODIACO ALMA DORADA En vacaciones de invierno, diversión asegurada con Xtop

10 years, 11 months

1
0
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leg-kernel tag leg-20150710.2 released

by Graeme Gregory

The leg-kernel release has been made and tagged as leg-20150710.2 This is based on mainline kernel v4.2-rc1 Repository : http://git.linaro.org/leg/acpi/leg-kernel.git Direct Link: http://git.linaro.org/leg/acpi/leg-kernel.git/commit/d8a87deca34b7542853511… Notes :-

10 years, 12 months

1
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[PATCH v2 0/9] Add self-probe infrastructure and stacked irqdomain support for ACPI based GICv2/3 init

by Hanjun Guo

This patch set introduce self-probe infrastructure to init IRQ controllers and stacked irqdomain support for ACPI based GICv2/3 init. The self-probe infrastructure for ACPI GIC init is similar as IRQCHIP_DECLARE() and based on the GIC version support in ACPI MADT table. we match the GIC version and GIC driver and load it. We introduce acpi_irq_domain for GICv2/3 core domain to support stacked irqdomain, and pass the gsi (global system interrupt) as the agument (void *arg) for gic_irq_domain_alloc(), then we can alloc virqs via acpi_register_gsi() with stacked irqdomain. The stacked irq domain will be: acpi_irq_domain == gicv2 or gicv3 core domain ^ | (parent) | ITS domain or GIv2m domain ^ | | MSI chip irq domain Since there is one GICD supported for now, so there will be only one irqdomain created when GICv2/3 initialized, for all the wired hardware irqs for PPI, SGI and SPI, they will have unique hardware irq number (GSI), so we can match the device to the acpi_irq_domain with unique GSI and it will work. If there will be multi GICD in the future, this will still works to follow the solution for x86 of ACPI (mutil IOAPICs). Note: patch 1~2 already merged in ACPICA core, I just send them out for helping of better understanding later 7 patches. Any comments are warmly welcomed. update from RFC version: - Consolidate all the GIC init code into drivers/irqchip/irq-gic-acpi.c v1->v2: - Remove the gicv2/v3 related driver code in drivers/irqchip/irq-gic-acpi.c which I was trying to consolidate them in one file, then arm-gic.h and arm-gic-v3.h will be used separately within parent driver only - Drop the gsi_mutex patch - Use the GIC version to match the GIC driver, then no need to test for the version in each driver - Move acpi_irq_init() to drivers/irqchip/irq-gic-acpi.c instead of in drivers/acpi/irq.c. maybe we need to rename acpi_irq_init() as acpi_gic_init() but I keep that name to accommodate of_irq_init(), any objections please let me know. Bob Moore (1): ACPICA: ACPI 6.0: Add changes for MADT table. Hanjun Guo (6): ACPICA: ACPI 6.0: Add values for MADT GIC version field. irqchip / GIC: Add GIC version support in ACPI MADT ACPI / irqchip: Add self-probe infrastructure to initialize IRQ controller irqchip / GIC / ACPI: Use IRQCHIP_ACPI_DECLARE to simplify GICv2 init code irqchip / gic: Add stacked irqdomain support for ACPI based GICv2 init irqchip / GICv3: Add stacked irqdomain support for ACPI based init Tomasz Nowicki (2): irqchip / GICv3: Refactor gic_of_init() for GICv3 driver irqchip / GICv3: Add ACPI support for GICv3+ initialization arch/arm64/Kconfig | 1 + arch/arm64/include/asm/acpi.h | 1 - arch/arm64/include/asm/irq.h | 13 -- arch/arm64/kernel/acpi.c | 25 ---- drivers/acpi/gsi.c | 28 ++-- drivers/irqchip/Kconfig | 3 + drivers/irqchip/Makefile | 1 + drivers/irqchip/irq-gic-acpi.c | 141 +++++++++++++++++++ drivers/irqchip/irq-gic-v3.c | 264 ++++++++++++++++++++++++++++------- drivers/irqchip/irq-gic.c | 35 ++--- drivers/irqchip/irqchip.h | 12 ++ include/acpi/actbl1.h | 33 ++++- include/asm-generic/vmlinux.lds.h | 13 ++ include/linux/acpi.h | 16 +++ include/linux/acpi_irq.h | 4 +- include/linux/irqchip/arm-gic-acpi.h | 10 +- include/linux/mod_devicetable.h | 8 ++ 17 files changed, 473 insertions(+), 135 deletions(-) create mode 100644 drivers/irqchip/irq-gic-acpi.c -- 1.9.1

10 years, 12 months

4
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[PATCH v6 0/7] CPUFreq driver using CPPC methods

by Ashwin Chaugule

CPPC: ==== CPPC (Collaborative Processor Performance Control) is a new way to control CPU performance using an abstract continous scale as against a discretized P-state scale which is tied to CPU frequency only. It is defined in the ACPI 5.0+ spec. In brief, the basic operation involves: - OS makes a CPU performance request. (Can provide min and max tolerable bounds) - Platform (such as BMC) is free to optimize request within requested bounds depending on power/thermal budgets etc. - Platform conveys its decision back to OS The communication between OS and platform occurs through another medium called (PCC) Platform communication Channel. This is a generic mailbox like mechanism which includes doorbell semantics to indicate register updates. See drivers/mailbox/pcc.c This patchset introduces a CPPC based CPUFreq driver that works with existing governors such as ondemand. The CPPC table parsing and the CPPC communication semantics are abstracted into separate files to allow future CPPC based drivers to implement their own governors if required. Initial patchsets included an adaptation of the PID governor from intel_pstate.c. However recent experiments led to extensive modifications of the algorithm to calculate CPU busyness. Until it is verified that these changes are worthwhile, the existing governors should provide for a good enough starting point for ARM64 servers. Finer details about the PCC and CPPC spec are available in the latest ACPI 5.1 specification.[2] Testing: ======= This was tested on an SBSA compatible ARMv8 server with CPPCv2 firmware running on a remote processor. I verified that each CPUs performance limits were detected and that new performance requests were made by the on-demand governor proportional to the load on each CPU. I also verified that using the acpi_processor driver correctly maps the physical CPU ids to logical CPU ids, which helps in picking up the proper _CPC details from a processor object, in the case where CPU physical ids may not be contiguous. Changes since V5: - Checkpatch cleanups. - Change pss_init to pss_perf_init. Rec by Srinivas Pandruvada. - Explicit comment explaining why postcore_initcall to pcc mailbox. - Fold acpi_processor_syscore_init/exit into CONFIG_ACPI_CST. - Added patch with dummy functions used by ACPI_HOTPLUG_CPU. Changes since V4: - Misc cleanups. Addressed feedback from Rafael. - Made acpi_processor.c independent of C-states, P-states and others. - Per CPU scanning for _CPC is now made from acpi_processor.c - Added new Kconfig options for legacy C states and P states to enable future support for newer alternatives as defined in the ACPI spec 6.0. Changes since V3: - Split CPPC backend methods into separate files. - Add frontend driver which plugs into existing CPUfreq governors. - Simplify PCC driver by moving communication space mapping and read/write into client drivers. Changes since V2: - Select driver if !X86, since intel_pstate will use HWP extensions instead. - Added more comments. - Added Freq domain awareness and PSD parsing. Changes since V1: - Create a new driver based on Dirks suggestion. - Fold in CPPC backend hooks into main driver. Changes since V0: [1] - Split intel_pstate.c into a generic PID governor and platform specific backend. - Add CPPC accessors as PID backend. [1] - http://lwn.net/Articles/608715/ [2] - http://www.uefi.org/sites/default/files/resources/ACPI_5_1release.pdf [3] - https://patches.linaro.org/40705/ Ashwin Chaugule (7): PCC: Initialize PCC Mailbox earlier at boot ACPI: Make ACPI processor driver more extensible ACPI: Introduce CPU performance controls using CPPC CPPC: Add a CPUFreq driver for use with CPPC CPPC: Probe for CPPC tables for each ACPI Processor object PCC: Enable PCC only when needed ACPI: Add weak routines for ACPI CPU Hotplug drivers/acpi/Kconfig | 48 ++- drivers/acpi/Makefile | 8 +- drivers/acpi/acpi_processor.c | 18 + drivers/acpi/cppc_acpi.c | 812 ++++++++++++++++++++++++++++++++++++++++ drivers/acpi/processor_driver.c | 90 +++-- drivers/cpufreq/Kconfig | 2 +- drivers/cpufreq/Kconfig.arm | 16 + drivers/cpufreq/Kconfig.x86 | 2 + drivers/cpufreq/Makefile | 2 + drivers/cpufreq/cppc_cpufreq.c | 197 ++++++++++ drivers/mailbox/Kconfig | 2 +- drivers/mailbox/pcc.c | 8 +- include/acpi/cppc_acpi.h | 137 +++++++ include/acpi/processor.h | 129 +++++-- 14 files changed, 1397 insertions(+), 74 deletions(-) create mode 100644 drivers/acpi/cppc_acpi.c create mode 100644 drivers/cpufreq/cppc_cpufreq.c create mode 100644 include/acpi/cppc_acpi.h -- 1.9.1

10 years, 12 months

4
29
0 0

[RFC PATCH 0/7] ACPI IORT (connections of PCI, devices, ITS and SMMU)

by Itaru Kitayama

Hi, My test of your tree (HEAD as of today) on Mustang fails; see below. Any ideas? Welcome to Fedora 22 (Twenty Two)! [ 7.456756] systemd-sysv-generator[296]: Overwriting existing symlink /run/systemd/generator.late/netconsole.service with real service [ 7.469266] systemd-sysv-generator[296]: Overwriting existing symlink /run/systemd/generator.late/network.service with real service [ 8.494106] audit_printk_skb: 66 callbacks suppressed [ 8.499153] audit: type=1130 audit(1436005219.430:33): pid=1 uid=0 auid=4294967295 ses=4294967295 msg='unit=systemd-journald comm="systemd" exe="/usr/lib/systemd/systemd" hostname=? addr=? terminal=? res=success' [ 8.518089] audit: type=1131 audit(1436005219.450:34): pid=1 uid=0 auid=4294967295 ses=4294967295 msg='unit=systemd-journald comm="systemd" exe="/usr/lib/systemd/systemd" hostname=? addr=? terminal=? res=success' [ OK [ 8.538985] audit: type=1130 audit(1436005219.470:35): pid=1 uid=0 auid=4294967295 ses=4294967295 msg='unit=initrd-switch-root comm="systemd" exe="/usr/lib/systemd/systemd" hostname=? addr=? terminal=? res=success' ] Stopped Switch[ 8.559297] audit: type=1131 audit(1436005219.490:36): pid=1 uid=0 auid=4294967295 ses=4294967295 msg='unit=initrd-switch-root comm="systemd" exe="/usr/lib/systemd/systemd" hostname=? addr=? terminal=? res=success' Root. Starting Create list of required st... nodes for the current kernel... [ OK ] Stopped target Switch Root. Mounting POSIX Message Queue File System... Mounting Temporary Directory... Starting Apply Kernel V[ 8.881520] audit: type=1130 audit(1436005219.820:37): pid=1 uid=0 auid=4294967295 ses=4294967295 msg='unit=systemd-fsck@dev-disk-by\x2duuid-3e3fef70\x2d40b1\x2d4079\x2d8611\x2d0e0fc2de0eea comm="systemd" exe="/usr/lib/systemd/systemd" hostname=? addr=? terminal=? res=success' ariables... [ audit: type=1131 audit(1436005219.840:38): pid=1 uid=0 auid=4294967295 ses=4294967295 msg='unit=systemd-fsck@dev-disk-by\x2duuid-3e3fef70\x2d40b1\x2d4079\x2d8611\x2d0e0fc2de0eea comm="systemd" exe="/usr/lib/systemd/systemd" hostname=? addr=? terminal=? res=success' [32m OK ] Listening on udev Kernel Socket. [ OK ] Listening on udev Control Socket. [ OK ] Stopped File System Check on /dev/d...f70-40b1-4079-8611-0e0fc2de0eea. Stopping File System Check on /dev/...0-40b1-4079-8611-0e0fc2de0eea... Starting File System Check on Root Device... [ OK ] Created slice User and Session Slice. [ OK ] Created slice system-getty.slice. Mounting NFSD configuration filesystem... [ OK ] Created slice system-serial\x2dgetty.slice. [ OK ] Stopped target Initrd File Systems. [ OK ] Reached target Encrypted Volumes. Mounting Debug File System... [ OK ] Reached target Slices. [ OK ] Listening on Delayed Shutdown Socket. [ OK ] Stopped target Initrd Root File System. Mounting Huge Pages File System... [ OK ] Listening on LVM2 metadata daemon socket. [ OK ] Reached target Paths. [ OK ] Listening on /dev/initctl Compatibility Named Pipe. [ OK[ 9.039605] audit: type=1130 audit(1436005219.970:39): pid=1 uid=0 auid=4294967295 ses=4294967295 msg='unit=systemd-journald comm="systemd" exe="/usr/lib/systemd/systemd" hostname=? addr=? terminal=? res=success' ] Listenin[ 9.058875] audit: type=1131 audit(1436005219.990:40): pid=1 uid=0 auid=4294967295 ses=4294967295 msg='unit=systemd-journald comm="systemd" exe="/usr/lib/systemd/systemd" hostname=? addr=? terminal=? res=success' g on Device-mapper event daemon FIFOs. Starting Monitoring of LVM2 mirrors... dmeventd or progress polling... [ OK ] Set up automount Arbitrary Executab...ats File System Automount Point. Starting Set Up Additional Binary Formats... [ OK ] Stopped Flush Jo[ 9.104997] audit: type=1130 audit(1436005220.040:41): pid=1 uid=0 auid=4294967295 ses=4294967295 msg='unit=kmod-static-nodes comm="systemd" exe="/usr/lib/systemd/systemd" hostname=? addr=? terminal=? res=success' urnal to Persistent Storage. [ OK ] Stopped Journal Service. Starting Journal Service... [ OK ] Mounted Huge Pages File System. [ OK ] Mounted POSIX Message Queue File System. [ OK ] Mounted Debug File System. [ OK ] Mounted Temporary Directory. [ OK ] Started Create list of required sta...ce nodes for the current kernel. [ OK [ 9.189881] audit: type=1130 audit(1436005220.120:42): pid=1 uid=0 auid=4294967295 ses=4294967295 msg='unit=systemd-sysctl comm="systemd" exe="/usr/lib/systemd/systemd" hostname=? addr=? terminal=? res=success' ] Started Apply Kernel Variables. Mounting Arbitrary Executable File Formats File System... [ OK ] Started LVM2 metadata daemon. Starting LVM2 metadata daemon... [ OK ] Started Journal Service. [ 10.062717] Unable to handle kernel paging request at virtual address 42494ea5 [ 10.070036] pgd = fffffe03db4e0000 [ OK [ 10.073524] [42494ea5] *pgd=0000000000000000] Mounted Arbitr, *pud=0000000000000000ary Executable F, *pmd=0000000000000000ile Formats File System. [ 10.087340] Internal error: Oops: 96000006 [#1] SMP [ 10.093122] Modules linked in: binfmt_misc xhci_plat_hcd [ 10.098474] CPU: 0 PID: 317 Comm: systemd-binfmt Not tainted 4.1.0+ #1 [ 10.104977] Hardware name: AppliedMicro Mustang/Mustang, BIOS 1.1.0 Apr 22 2015 [ 10.112261] task: fffffe03db938140 ti: fffffe03dbaac000 task.ti: fffffe03dbaac000 [ 10.119724] PC is at lockref_get+0xc/0xa0 [ 10.123732] LR is at bm_status_write+0x98/0x100 [binfmt_misc] [ 10.129460] pc : [<fffffe0000408e44>] lr : [<fffffdfffc080a08>] pstate: 60000145 [ 10.136826] sp : fffffe03dbaafd70 [ 10.140131] x29: fffffe03dbaafd70 x28: fffffe03dbaac000 [ 10.145453] x27: fffffe00007c2000 x26: 0000000000000040 [ 10.150774] x25: 000000000000011a x24: 0000000000000015 [ 10.156095] x23: 0000000020000000 x22: 000003ff9f500000 [ 10.161415] x21: 0000000042494e4d x20: 0000000000000003 [ 10.166734] x19: 000003ff9f500000 x18: 000003ff9f331ce8 [ 10.172054] x17: 000003ff9f397990 x16: fffffe000021b640 [ 10.177373] x15: 0000000000000008 x14: 000002aacc7ea220 [ 10.182691] x13: 000002aacc7ea3b0 x12: 0000000000000008 [ 10.188011] x11: 0101010101010101 x10: 7f7f7f7f7f7f7f7f [ 10.193330] x9 : fefeff6671646c64 x8 : 0000000000000040 [ 10.198650] x7 : fefefefefefeff09 x6 : 0080808080808080 [ 10.203969] x5 : 8080808080808000 x4 : 000003ff9f500003 [ 10.209287] x3 : 000000000000000a x2 : 0000000000000000 [ 10.214607] x1 : 0000000000000031 x0 : 0000000042494ea5 [ 10.219925] [ 10.221420] Process systemd-binfmt (pid: 317, stack limit = 0xfffffe03dbaac020) [ 10.228704] Stack: (0xfffffe03dbaafd70 to 0xfffffe03dbab0000) [ 10.234437] fd60: dbaafd90 fffffe03 fc080a08 fffffdff [ 10.242590] fd80: 9f500000 000003ff ec0a312d fffffe03 dbaafdc0 fffffe03 0021a570 fffffe00 [ 10.250741] fda0: d4a1e400 fffffe03 00000003 00000000 dbaafec8 fffffe03 0021cdbc fffffe00 [ 10.258892] fdc0: dbaafe50 fffffe03 0021ad5c fffffe00 00000003 00000000 d4a1e400 fffffe03 [ 10.267042] fde0: 9f500000 000003ff dbaafec8 fffffe03 00000003 00000000 d4a1e400 fffffe03 [ 10.275192] fe00: 9f500000 000003ff dbaafec8 fffffe03 20000000 00000000 dbaac000 fffffe03 [ 10.283341] fe20: dbaafe50 fffffe03 0021ad2c fffffe00 00000003 00000000 d4a1e400 fffffe03 [ 10.291492] fe40: 9f500000 000003ff dbaafec8 fffffe03 dbaafe90 fffffe03 0021b694 fffffe00 [ 10.299641] fe60: d4a1e400 fffffe03 d4a1e400 fffffe03 9f500000 000003ff 00000003 00000000 [ 10.307791] fe80: 20000000 00000000 00000015 00000000 dddfa1c0 000003ff 00093a0c fffffe00 [ 10.315941] fea0: 00000200 00000000 9f500000 000003ff ffffffff ffffffff 9f401f38 000003ff [ 10.324091] fec0: ffffffff ffffffff 00000000 00000000 00000004 00000000 9f500000 000003ff [ 10.332241] fee0: 00000003 00000000 00000040 00000000 0000000a 00000000 80808000 80808080 [ 10.340391] ff00: 80808080 00808080 fefeff09 fefefefe 00000040 00000000 71646c64 fefeff66 [ 10.348542] ff20: 7f7f7f7f 7f7f7f7f 01010101 01010101 00000008 00000000 cc7ea3b0 000002aa [ 10.356692] ff40: cc7ea220 000002aa 00000008 00000000 00000000 00000000 9f397990 000003ff [ 10.364842] ff60: 9f331ce8 000003ff 00000003 00000000 9f500000 000003ff cc7d00c0 000002aa [ 10.372991] ff80: 00000003 00000000 cc7e20f0 000002aa cc7d0090 000002aa dddfa310 000003ff [ 10.381141] ffa0: 9f5640e8 000003ff ca777ba8 000002aa 00000000 00000000 dddfa1c0 000003ff [ 10.389291] ffc0: 9f3a2cb0 000003ff dddfa1c0 000003ff 9f401f38 000003ff 20000000 00000000 [ 10.397441] ffe0: 00000004 00000000 00000040 00000000 63616e69 65766974 0000000a 00000000 [ 10.405583] Call trace: [ 10.408030] [<fffffe0000408e44>] lockref_get+0xc/0xa0 [ 10.413075] [<fffffdfffc080a04>] bm_status_write+0x94/0x100 [binfmt_misc] [ 10.419847] [<fffffe000021a56c>] __vfs_write+0x44/0x128 [ 10.425061] [<fffffe000021ad58>] vfs_write+0x98/0x1c8 [ 10.430101] [<fffffe000021b690>] SyS_write+0x50/0xb0 [ 10.435055] Code: d65f03c0 a9be7bfd 910003fd f9000bf3 (f9400001) [ 10.441205] ---[ end trace adb124cde588416e ]--- [FAILED] Failed to start Set Up Additional Binary Formats. See "systemctl status systemd-binfmt.service" for details. [ 10.353640] systemd-fsck[306]: rootfs: clean, 456489/30367744 files, 9706217/121456384 blocks [ OK ] Started File System Check on Root Device. Starting Remount Root and Kernel File Systems... [ 10.747231] random: nonblocking pool is initialized [ 10.950592] nfsd: Unknown symbol boot_tvec_bases (err 0) [FAILED] Failed to mount NFSD configuration filesystem. See "systemctl status proc-fs-nfsd.mount" for details. [DEPEND] Dependency failed for GSSAPI Proxy Daemon. [ 10.997174] EXT4-fs (sda4): re-mounted. Opts: (null) [ OK ] Started Remount Root and Kernel File Systems. Starting udev Coldplug all Devices... Starting Create Static Device Nodes in /dev... Starting Flush Journal to Persistent Storage... Starting Configure read-only root support... [ OK ] Started Monitoring of LVM2 mirrors,...ng dmeventd or progress polling. [ 11.265517] systemd-journald[318]: Received request to flush runtime journal from PID 1 [ OK ] Started udev Coldplug all Devices. [ OK ] Started Create Static Device Nodes in /dev. [ OK ] Reached target Local File Systems (Pre). Starting udev Kernel Device Manager... [ OK ] Started Configure read-only root support. Starting Load/Save Random Seed... [ OK ] Started Load/Save Random Seed. [ OK ] Started udev Kernel Device Manager. [ OK ] Found device /dev/ttyS0. G[ OK ] Found device ST500DM002-1BD142 EFI\x20System\x20Partition. [ OK ] Found device ST500DM002-1BD142 3. [ OK ] Found device ST500DM002-1BD142 3. Activating swap Swap Partition... [ OK ] Found device ST500DM002-1BD142 2. Starting File System Check on /dev/...0-66ce-4e1b-bdb0-e0739f97503e... [ 13.925960] Adding 2047936k swap on /dev/sda3. Priority:-1 extents:1 across:2047936k FS [ OK ] Activated swap Swap Partition. [ OK ] Activated swap /dev/disk/by-uuid/681241d1-7f1f-45db-967c-4d7ee16d3b16. [ OK ] Reached target Swap. [ OK [ 14.332241] audit_printk_skb: 36 callbacks suppressed ] Started File S[ 14.337409] audit: type=1130 audit(1436005225.270:55): pid=1 uid=0 auid=4294967295 ses=4294967295 msg='unit=systemd-fsck@dev-disk-by\x2duuid-e12dcd60\x2d66ce\x2d4e1b\x2dbdb0\x2de0739f97503e comm="systemd" exe="/usr/lib/systemd/systemd" hostname=? addr=? terminal=? res=success' ystem Check on /dev/d...d60-66ce-4e1b-bdb0-e0739f97503e. Mounting /boot... [ OK ] Started Flush Journal to Persistent Storage. [ 14.412127] audit: type=1130 audit(1436005225.350:56): pid=1 uid=0 auid=4294967295 ses=4294967295 msg='unit=systemd-journal-flush comm="systemd" exe="/usr/lib/systemd/systemd" hostname=? addr=? terminal=? res=success' [ 14.402377] systemd-fsck[390]: /dev/sda2: Superblock last write time is in the future. [ 14.403179] systemd-fsck[390]: (by less than a day, probably due to the hardware clock being incorrectly set) [ 14.403815] systemd-fsck[390]: /dev/sda2: clean, 71/102400 files, 200975/409600 blocks [ 14.585717] EXT4-fs (sda2): mounted filesystem with ordered data mode. Opts: (null) [ OK ] Mounted /boot. Mounting /boot/efi...

10 years, 12 months

3
7
0 0

APM Mustang topic branch

by Al Stone

Howdy. I've updated the acpi-topic-mustang branch so that it now works properly again (mostly because I needed it to run some experiments and tests). It's basically our acpi.git master plus ports of patches scavenged mostly from the Fedora kernel, some of which may or may not end up in mainline in their present form. Use these patches wisely. They should not be considered final since they have not been accepted upstream. Pretty much everything on the box works. -- ciao, al ----------------------------------- Al Stone Software Engineer Linaro Enterprise Group al.stone(a)linaro.org -----------------------------------

10 years, 12 months

1
0
0 0

[PATCH v4 0/2] Correct for ACPI 5.1->6.0 spec changes in MADT GICC entries

by Al Stone

In the ACPI 5.1 version of the spec, the struct for the GICC subtable (struct acpi_madt_generic_interrupt) of the MADT is 76 bytes long; in ACPI 6.0, the struct is 80 bytes long. But, there is only one definition in ACPICA for this struct -- and that is the 6.0 version. Hence, when BAD_MADT_ENTRY() compares the struct size to the length in the GICC subtable, it fails if 5.1 structs are in use, and there are systems in the wild that have them. Note that this was found in linux-next and these patches apply against that tree and the arm64 kernel tree; 4.1 does not appear to have this problem since it still has the 5.1 struct definition. Though there is precedent in ia64 code for ignoring the changes in size, this patch set instead verifies correctness. The first patch adds the BAD_MADT_GICC_ENTRY() macro to check the GICC subtable only, accounting for the difference in specification versions that are possible. The second patch replaces BAD_MADT_ENTRY usage with the BAD_MADT_GICC_ENTRY macro in arm64 code, which is currently the only architecture affected. The BAD_MADT_ENTRY() will continue to work as is for all other MADT subtables. I have tested these patches on an APM Mustang with version 1.15 firmware, where the problem was found, and they fix the problem -- i.e., the system will boot with either Linux 4.1 or linux-next kernels using the same ACPI 5.1 compatible firmware. Changes for v4: -- Reword the cover letter to reflect smaller patch set -- Simplify BAD_MADT_GICC_ENTRY to the minimum needed; this removed the need for the first patch containing version number macros (Rafael) -- Simplify determining the GICC subtable length (Catalin) Changes for v3: -- Modified the macros for using spec version numbers in order to make them clearer (Rafael, Hanjun) -- Moved the definition of the BAD_MADT_GICC_ENTRY macro to an arm64-specific header file since only this architecture uses the GICC subtable (Rafael) -- Added Reviewed-by (Hanjun) and Acked-by (Will) tags to 3/3, the only unchanged patch; other tags could be applied but the patches have changed. -- Added Fixes: tag to patches Changes for v2: -- Replace magic constants with proper defines (Lorenzo) -- Minor syntax clean-up noted by checkpatch -- Send out CCs properly this time -- Minor clean-up of the paragraphs in this cover letter Al Stone (2): ACPI / ARM64: add BAD_MADT_GICC_ENTRY() macro ACPI / ARM64 : use the new BAD_MADT_GICC_ENTRY macro arch/arm64/include/asm/acpi.h | 8 ++++++++ arch/arm64/kernel/smp.c | 2 +- drivers/irqchip/irq-gic.c | 2 +- 3 files changed, 10 insertions(+), 2 deletions(-) -- 2.4.3

10 years, 12 months

6
9
0 0

[RFC PATCH] ACPI / gsi: use gsi to find its irqdomain

by Hanjun Guo

As we use the acpi_irq_domain as the global pointer to the acpi core irq domain, which lead to multi places referring it and the way is not scalable, so introduce a struct gsi_cfg_data to abstract the gsi data for the irqchips then match the irq domain with the gsi. For a ACPI based irqchip for example a GICD, it defines System Vector Base in the GICD entry, which means the global system interrupt number where this GIC Distributor’s interrupt inputs start, then we can get the irq number supported by reading the register for this GICD, so we can explictly get the gsi's associated irqdomain if the gsi is within the range of gsi supported by this GICD. For ACPI device in DSDT, it using another mapping of device and hwirq number than DT, in DT, we using the interrupt parent property to get the device node of irqchip, that's why we need the matching function that match the device node with the one associated with the irqdomain. For ACPI, we only can get the gsi which the device is using, no interrupt parent will be used, that because gsi is a flat hwirq number which is unique in the system, then we can get its associated irq domain as I said above, which can be without the token pointer matching the interrupt controller. the code is arch independent, it also can be expanted for x86 for multi ioapics. Signed-off-by: Hanjun Guo <hanjun.guo(a)linaro.org> --- drivers/acpi/gsi.c | 51 ++++++++++++++++++++++++++++++++++++++------ drivers/irqchip/irq-gic-v3.c | 4 +++- drivers/irqchip/irq-gic.c | 7 +++++- include/linux/acpi.h | 10 ++++++++- 4 files changed, 62 insertions(+), 10 deletions(-) diff --git a/drivers/acpi/gsi.c b/drivers/acpi/gsi.c index 02c8408..7867ec2 100644 --- a/drivers/acpi/gsi.c +++ b/drivers/acpi/gsi.c @@ -15,11 +15,44 @@ enum acpi_irq_model_id acpi_irq_model; -static struct irq_domain *acpi_irq_domain __read_mostly; +static LIST_HEAD(gsi_cfg_data_list); +static DEFINE_MUTEX(gsi_mutex); -void set_acpi_irq_domain(struct irq_domain *domain) +int gsi_cfg_data_add(struct irq_domain *domain, u32 gsi_base, u32 gsi_end) { - acpi_irq_domain = domain; + struct gsi_cfg_data *data; + + data = kzalloc(sizeof(*data), GFP_KERNEL); + if (!data) + return -ENOMEM; + + data->domain = domain; + data->gsi_base = gsi_base; + data->gsi_base = gsi_base; + + mutex_lock(&gsi_mutex); + list_add(&data->list, &gsi_cfg_data_list); + mutex_unlock(&gsi_mutex); + + return 0; +} + +/* Find irqdomain with GSI (hwirq number) */ +static struct irq_domain *acpi_find_irqdomain(u32 gsi) +{ + struct gsi_cfg_data *data; + struct irq_domain *domain = NULL; + + mutex_lock(&gsi_mutex); + list_for_each_entry(data, &gsi_cfg_data_list, list) { + if (gsi >= data->gsi_base && gsi <= data->gsi_end) { + domain = data->domain; + break; + } + } + mutex_unlock(&gsi_mutex); + + return domain; } static unsigned int acpi_gsi_get_irq_type(int trigger, int polarity) @@ -53,7 +86,9 @@ static unsigned int acpi_gsi_get_irq_type(int trigger, int polarity) */ int acpi_gsi_to_irq(u32 gsi, unsigned int *irq) { - *irq = irq_find_mapping(acpi_irq_domain, gsi); + struct irq_domain *domain = acpi_find_irqdomain(gsi); + + *irq = irq_find_mapping(domain, gsi); /* * *irq == 0 means no mapping, that should * be reported as a failure @@ -77,12 +112,13 @@ int acpi_register_gsi(struct device *dev, u32 gsi, int trigger, { int irq; unsigned int irq_type = acpi_gsi_get_irq_type(trigger, polarity); + struct irq_domain *domain = acpi_find_irqdomain(gsi); - irq = irq_find_mapping(acpi_irq_domain, gsi); + irq = irq_find_mapping(domain, gsi); if (irq > 0) return irq; - irq = irq_domain_alloc_irqs(acpi_irq_domain, 1, dev_to_node(dev), + irq = irq_domain_alloc_irqs(domain, 1, dev_to_node(dev), &gsi); if (irq <= 0) return -EINVAL; @@ -101,7 +137,8 @@ EXPORT_SYMBOL_GPL(acpi_register_gsi); */ void acpi_unregister_gsi(u32 gsi) { - int irq = irq_find_mapping(acpi_irq_domain, gsi); + struct irq_domain *domain = acpi_find_irqdomain(gsi); + int irq = irq_find_mapping(domain, gsi); irq_dispose_mapping(irq); } diff --git a/drivers/irqchip/irq-gic-v3.c b/drivers/irqchip/irq-gic-v3.c index a11c020..5c53af6 100644 --- a/drivers/irqchip/irq-gic-v3.c +++ b/drivers/irqchip/irq-gic-v3.c @@ -947,6 +947,7 @@ static LIST_HEAD(redist_list); static struct redist_region *redist_regs __initdata; static u32 nr_redist_regions __initdata; static phys_addr_t dist_phy_base __initdata; +u32 gsi_base __initdata; static int __init gic_acpi_register_redist(u64 phys_base, u64 size) @@ -1014,6 +1015,7 @@ gic_acpi_parse_madt_distributor(struct acpi_subtable_header *header, if (BAD_MADT_ENTRY(dist, end)) return -EINVAL; + gsi_base = dist->global_irq_base; dist_phy_base = dist->base_address; return 0; } @@ -1168,7 +1170,7 @@ init_base: if (err) goto out_release_redist; - set_acpi_irq_domain(gic_data.domain); + gsi_cfg_data_add(gic_data.domain, gsi_base, gsi_base + gic_data.irq_nr); return 0; out_release_redist: diff --git a/drivers/irqchip/irq-gic.c b/drivers/irqchip/irq-gic.c index 7f943ef..62e0640 100644 --- a/drivers/irqchip/irq-gic.c +++ b/drivers/irqchip/irq-gic.c @@ -1051,6 +1051,7 @@ IRQCHIP_DECLARE(msm_qgic2, "qcom,msm-qgic2", gic_of_init); #ifdef CONFIG_ACPI static phys_addr_t dist_phy_base, cpu_phy_base __initdata; +u32 gsi_base __initdata; static int __init gic_acpi_parse_madt_cpu(struct acpi_subtable_header *header, @@ -1089,6 +1090,7 @@ gic_acpi_parse_madt_distributor(struct acpi_subtable_header *header, if (BAD_MADT_ENTRY(dist, end)) return -EINVAL; + gsi_base = dist->global_irq_base; dist_phy_base = dist->base_address; return 0; } @@ -1139,7 +1141,10 @@ gic_v2_acpi_init(struct acpi_table_header *table) } gic_init_bases(0, -1, dist_base, cpu_base, 0, NULL); - set_acpi_irq_domain(gic_data[0].domain); + + /* since we have only one GICD, we can safely use gic_data[0] here */ + gsi_cfg_data_add(gic_data[0].domain, gsi_base, + gsi_base + gic_data[0].gic_irqs); acpi_irq_model = ACPI_IRQ_MODEL_GIC; return 0; diff --git a/include/linux/acpi.h b/include/linux/acpi.h index 6de4b0e..093d60e 100644 --- a/include/linux/acpi.h +++ b/include/linux/acpi.h @@ -223,7 +223,15 @@ void acpi_unregister_gsi (u32 gsi); #ifdef CONFIG_ACPI_GENERIC_GSI struct irq_domain; -void set_acpi_irq_domain(struct irq_domain *domain); + +struct gsi_cfg_data { + struct list_head list; + u32 gsi_base; + u32 gsi_end; + struct irq_domain *domain; +}; + +int gsi_cfg_data_add(struct irq_domain *domain, u32 gsi_base, u32 gsi_end); #endif struct pci_dev; -- 1.9.1

10 years, 12 months

1
0
0 0

[PATCH v3 0/3] Correct for ACPI 5.1->6.0 spec changes in MADT GICC entries

by Al Stone

In the ACPI 5.1 version of the spec, the struct for the GICC subtable (struct acpi_madt_generic_interrupt) of the MADT is 76 bytes long; in ACPI 6.0, the struct is 80 bytes long. But, there is only one definition in ACPICA for this struct -- and that is the 6.0 version. Hence, when BAD_MADT_ENTRY() compares the struct size to the length in the GICC subtable, it fails if 5.1 structs are in use, and there are systems in the wild that have them. Note that this was found in linux-next and these patches apply against that tree and the arm64 kernel tree; 4.1-rc8 does not appear to have this problem since it still has the 5.1 struct definition. Even though there is precendent in ia64 code for ignoring the changes in size, this patch set instead tries to verify correctness. The first patch in the set adds macros for easily using the ACPI spec version. The second patch adds the BAD_MADT_GICC_ENTRY() macro that uses the version macros to check the GICC subtable only, accounting for the difference in specification versions that are possible. The final patch replaces BAD_MADT_ENTRY usage with the BAD_MADT_GICC_ENTRY macro in arm64 code, which is currently the only architecture affected. The BAD_MADT_ENTRY() will continue to work as is for all other MADT subtables. I have tested these patches on an APM Mustang with version 1.15 firmware, where the problem was found, and they fix the problem. Changes for v3: -- Modified the macros for using spec version numbers in order to make them clearer (Rafael, Hanjun) -- Moved the definition of the BAD_MADT_GICC_ENTRY macro to an arm64-specific header file since only this architecture uses the GICC subtable (Rafael) -- Added Reviewed-by (Hanjun) and Acked-by (Will) tags to 3/3, the only unchanged patch; other tags could be applied but the patches have changed. -- Added Fixes: tag to patches Changes for v2: -- Replace magic constants with proper defines (Lorenzo) -- Minor syntax clean-up noted by checkpatch -- Send out CCs properly this time -- Minor clean-up of the paragraphs in this cover letter Al Stone (3): ACPI : introduce macros for using the ACPI specification version ACPI / ARM64: add BAD_MADT_GICC_ENTRY() macro ACPI / ARM64 : use the new BAD_MADT_GICC_ENTRY macro arch/arm64/include/asm/acpi.h | 11 +++++++++++ arch/arm64/kernel/smp.c | 2 +- drivers/irqchip/irq-gic.c | 2 +- include/linux/acpi.h | 10 ++++++++++ 4 files changed, 23 insertions(+), 2 deletions(-) -- 2.4.3

11 years

5
16
0 0

Exposing RSDP, RSDT, XSDT in /sys/

by G Gregory

Hi Guys, I guess its time to put this to bed now that Roys patch has made it into acpica-tools and FWTS has been fixed to work without /dev/mem. I produced the patch to expose these three tables from the kernel. BUT, is there actually a user for this? My gut feeling is no and they really contain little of interest anyway. Does anyone actually have a use for the patch that makes it worth sending upstream? Graeme

11 years

2
1
0 0

[PATCH v2 0/3] Correct for ACPI 5.1->6.0 spec changes in MADT GICC entries

by Al Stone

In the ACPI 5.1 version of the spec, the struct for the GICC subtable (struct acpi_madt_generic_interrupt) of the MADT is 76 bytes long; in ACPI 6.0, the struct is 80 bytes long. But, there is only one definition in ACPICA for this struct -- and that is the 6.0 version. Hence, when BAD_MADT_ENTRY() compares the struct size to the length in the GICC subtable, it fails if 5.1 structs are in use, and there are systems in the wild that have them. Note that this was found in linux-next and these patches apply against that tree and the arm64 kernel tree; 4.1-rc8 does not appear to have this problem since it still has the 5.1 struct definition. Even though there is precendent in ia64 code for ignoring the changes in size, this patch set instead tries to verify correctness. The first patch in the set adds macros for easily using the ACPI spec version. The second patch adds the BAD_MADT_GICC_ENTRY() macro that uses the version macros to check the GICC subtable only, accounting for the difference in specification versions that are possible. The final patch replaces BAD_MADT_ENTRY usage with the BAD_MADT_GICC_ENTRY macro in arm64 code, which is currently the only architecture affected. The BAD_MADT_ENTRY() will continue to work as is for all other MADT subtables. I have tested these patches on an APM Mustang with version 1.15 firmware, where the problem was found, and they fix the problem. Changes for v2: -- Replace magic constants with proper defines (Lorenzo) -- Minor syntax clean-up noted by checkpatch -- Send out CCs properly this time -- Minor clean-up of the paragraphs in this cover letter Al Stone (3): ACPI : introduce macros for using the ACPI specification version ACPI: add BAD_MADT_GICC_ENTRY() macro ACPI / ARM64 : use the new BAD_MADT_GICC_ENTRY macro arch/arm64/kernel/smp.c | 2 +- drivers/irqchip/irq-gic.c | 2 +- include/linux/acpi.h | 15 +++++++++++++++ 3 files changed, 17 insertions(+), 2 deletions(-) -- 2.4.0

11 years

7
26
0 0

[RFC PATCH] irqchip / gicv3 / ACPI: Add GICR support via GICC structures

by Hanjun Guo

On systems supporting GICv3 and above, the field of GICR Base Address holds the 64-bit physical address of the associated Redistributor if the GIC Redistributors are not in the always-on power domain, so instead of init GICR regions via GIC redistributor stricture, init it with GICR base address in GICC structures. Signed-off-by: Hanjun Guo <hanjun.guo(a)linaro.org> --- drivers/irqchip/irq-gic-acpi.c | 34 ++++++- drivers/irqchip/irq-gic-v3.c | 181 ++++++++++++++++++++++++++++++++--- include/linux/irqchip/arm-gic-acpi.h | 2 + 3 files changed, 200 insertions(+), 17 deletions(-) diff --git a/drivers/irqchip/irq-gic-acpi.c b/drivers/irqchip/irq-gic-acpi.c index 236bba5..732efa0 100644 --- a/drivers/irqchip/irq-gic-acpi.c +++ b/drivers/irqchip/irq-gic-acpi.c @@ -21,6 +21,11 @@ static u8 gic_version __initdata = ACPI_MADT_GIC_VERSION_NONE; static phys_addr_t dist_phy_base __initdata; +u8 __init acpi_gic_version(void) +{ + return gic_version; +} + static int __init acpi_gic_parse_distributor(struct acpi_subtable_header *header, const unsigned long end) @@ -38,6 +43,27 @@ acpi_gic_parse_distributor(struct acpi_subtable_header *header, } static int __init +gic_acpi_parse_madt_gicc(struct acpi_subtable_header *header, + const unsigned long end) +{ + struct acpi_madt_generic_interrupt *gicc; + + gicc = (struct acpi_madt_generic_interrupt *)header; + + if (BAD_MADT_ENTRY(gicc, end)) + return -EINVAL; + + /* + *If GICC is enabled but no gicr base address, which means GICR is + * not presented via GICC + */ + if ((gicc->flags & ACPI_MADT_ENABLED) && !gicc->gicr_base_address) + return -ENODEV; + + return 0; +} + +static int __init match_gic_redist(struct acpi_subtable_header *header, const unsigned long end) { return 0; @@ -54,8 +80,12 @@ static bool __init acpi_gic_redist_is_present(void) /* has at least one GIC redistributor entry */ if (count > 0) return true; - else - return false; + + /* else try to find GICR base in GICC entries */ + count = acpi_table_parse_madt(ACPI_MADT_TYPE_GENERIC_INTERRUPT, + gic_acpi_parse_madt_gicc, 0); + + return count > 0; } static int __init acpi_gic_version_init(void) diff --git a/drivers/irqchip/irq-gic-v3.c b/drivers/irqchip/irq-gic-v3.c index a1c4c74..755c940 100644 --- a/drivers/irqchip/irq-gic-v3.c +++ b/drivers/irqchip/irq-gic-v3.c @@ -389,9 +389,8 @@ static void __init gic_dist_init(void) writeq_relaxed(affinity, base + GICD_IROUTER + i * 8); } -static int gic_populate_rdist(void) +static int gic_populate_rdist_with_regions(u64 mpidr) { - u64 mpidr = cpu_logical_map(smp_processor_id()); u64 typer; u32 aff; int i; @@ -439,6 +438,33 @@ static int gic_populate_rdist(void) } while (!(typer & GICR_TYPER_LAST)); } + return -ENODEV; +} + +#ifdef CONFIG_ACPI +/* + * Populate redist when GIC redistributor address is presented in ACPI + * MADT GICC entries + */ +static int gic_populate_rdist_with_gicr_base(u64 mpidr); +#else +static inline int gic_populate_rdist_with_gicr_base(u64 mpidr) +{ + return -ENODEV; +} +#endif +static int gic_populate_rdist(void) +{ + u64 mpidr = cpu_logical_map(smp_processor_id()); + + if (!gic_data.nr_redist_regions) { + if (!gic_populate_rdist_with_gicr_base(mpidr)) + return 0; + } else { + if (!gic_populate_rdist_with_regions(mpidr)) + return 0; + } + /* We couldn't even deal with ourselves... */ WARN(true, "CPU%d: mpidr %llx has no re-distributor!\n", smp_processor_id(), (unsigned long long)mpidr); @@ -906,6 +932,16 @@ IRQCHIP_DECLARE(gic_v3, "arm,gic-v3", gic_of_init); #endif #ifdef CONFIG_ACPI + +struct acpi_gicc_redist { + struct list_head list; + u64 mpidr; + phys_addr_t phys_base; + void __iomem *redist_base; +}; + +static LIST_HEAD(redist_list); + static struct redist_region *redist_regs __initdata; static u32 nr_redist_regions __initdata; static phys_addr_t dist_phy_base __initdata; @@ -938,6 +974,17 @@ gic_acpi_register_redist(u64 phys_base, u64 size) return 0; } +static void __init +gic_acpi_release_redist_regions(void) +{ + int i; + + for (i = 0; i < nr_redist_regions; i++) + if (redist_regs[i].redist_base) + iounmap(redist_regs[i].redist_base); + kfree(redist_regs); +} + static int __init gic_acpi_parse_madt_redist(struct acpi_subtable_header *header, const unsigned long end) @@ -970,10 +1017,98 @@ gic_acpi_parse_madt_distributor(struct acpi_subtable_header *header, } static int __init -gic_v3_acpi_init(struct acpi_table_header *table) +gic_acpi_add_gicc_redist(phys_addr_t phys_base, u64 mpidr) { - int count, i, err = 0; + struct acpi_gicc_redist *redist; + + redist = kzalloc(sizeof(*redist), GFP_KERNEL); + if (!redist) + return -ENOMEM; + + redist->mpidr = mpidr; + redist->phys_base = phys_base; + + if (acpi_gic_version() == ACPI_MADT_GIC_VERSION_V3) + /* RD_base + SGI_base */ + redist->redist_base = ioremap(phys_base, 2 * SZ_64K); + else + /* + * RD_base + SGI_base + VLPI_base, + * we don't map reserved page as it's buggy to access it + */ + redist->redist_base = ioremap(phys_base, 3 * SZ_64K); + + if (!redist->redist_base) { + kfree(redist); + return -ENOMEM; + } + + list_add(&redist->list, &redist_list); + return 0; +} + +static void __init +gic_acpi_release_gicc_redist(void) +{ + struct acpi_gicc_redist *redist, *t; + + list_for_each_entry_safe(redist, t, &redist_list, list) { + list_del(&redist->list); + iounmap(redist->redist_base); + kfree(redist); + } +} + +static int __init +gic_acpi_parse_madt_gicc(struct acpi_subtable_header *header, + const unsigned long end) +{ + struct acpi_madt_generic_interrupt *gicc; + + gicc = (struct acpi_madt_generic_interrupt *)header; + + if (BAD_MADT_ENTRY(gicc, end)) + return -EINVAL; + + return gic_acpi_add_gicc_redist(gicc->gicr_base_address, + gicc->arm_mpidr); +} + +static int gic_populate_rdist_with_gicr_base(u64 mpidr) +{ + struct acpi_gicc_redist *redist; + void __iomem *ptr; + u32 reg; + + list_for_each_entry(redist, &redist_list, list) { + if (redist->mpidr != mpidr) + continue; + + ptr = redist->redist_base; + reg = readl_relaxed(ptr + GICR_PIDR2) & GIC_PIDR2_ARCH_MASK; + if (reg != GIC_PIDR2_ARCH_GICv3 && reg != GIC_PIDR2_ARCH_GICv4) { + pr_warn("No redistributor present @%p\n", ptr); + return -ENODEV; + } + + gic_data_rdist_rd_base() = ptr; + gic_data_rdist()->phys_base = redist->phys_base; + pr_info("CPU%d: found redistributor %llx phys base:%pa\n", + smp_processor_id(), + (unsigned long long)mpidr, + &gic_data_rdist()->phys_base); + return 0; + } + + return -ENODEV; +} + +static int __init +gic_acpi_init(struct acpi_table_header *table) +{ + int count, err = 0; void __iomem *dist_base; + bool no_gicr_entries = false; /* Get distributor base address */ count = acpi_parse_entries(ACPI_SIG_MADT, @@ -1000,32 +1135,48 @@ gic_v3_acpi_init(struct acpi_table_header *table) goto out_dist_unmap; } - /* Collect redistributor base addresses */ + /* Collect redistributor base addresses in GICR entries */ count = acpi_parse_entries(ACPI_SIG_MADT, sizeof(struct acpi_table_madt), gic_acpi_parse_madt_redist, table, ACPI_MADT_TYPE_GENERIC_REDISTRIBUTOR, 0); if (count <= 0) { - pr_info("No valid GICR entries exist\n"); - err = -EINVAL; - goto out_redist_unmap; + pr_info("No valid GICR entries exist, try GICC entries\n"); + gic_acpi_release_redist_regions(); + no_gicr_entries = true; + } else { + goto init_base; + } + + /* Collect redistributor base addresses in GICC entries */ + count = acpi_parse_entries(ACPI_SIG_MADT, + sizeof(struct acpi_table_madt), + gic_acpi_parse_madt_gicc, table, + ACPI_MADT_TYPE_GENERIC_INTERRUPT, 0); + if (count <= 0) { + pr_info("No valid GICC entries exist\n"); + goto out_release_redist; } +init_base: err = gic_init_bases(dist_base, redist_regs, nr_redist_regions, 0, NULL); if (err) - goto out_redist_unmap; + goto out_release_redist; acpi_irq_domain = gic_data.domain; return 0; -out_redist_unmap: - for (i = 0; i < nr_redist_regions; i++) - if (redist_regs[i].redist_base) - iounmap(redist_regs[i].redist_base); - kfree(redist_regs); +out_release_redist: + if (no_gicr_entries) { + if (!list_empty(&redist_list)) + gic_acpi_release_gicc_redist(); + } else { + gic_acpi_release_redist_regions(); + } out_dist_unmap: iounmap(dist_base); return err; } -IRQCHIP_ACPI_DECLARE(gic_v3, ACPI_MADT_GIC_VERSION_V3, gic_v3_acpi_init); +IRQCHIP_ACPI_DECLARE(gic_v3, ACPI_MADT_GIC_VERSION_V3, gic_acpi_init); +IRQCHIP_ACPI_DECLARE(gic_v4, ACPI_MADT_GIC_VERSION_V4, gic_acpi_init); #endif diff --git a/include/linux/irqchip/arm-gic-acpi.h b/include/linux/irqchip/arm-gic-acpi.h index a4a5edb..d54fe95 100644 --- a/include/linux/irqchip/arm-gic-acpi.h +++ b/include/linux/irqchip/arm-gic-acpi.h @@ -23,5 +23,7 @@ extern struct irq_domain *acpi_irq_domain; +u8 acpi_gic_version(void); + #endif /* CONFIG_ACPI */ #endif /* ARM_GIC_ACPI_H_ */ -- 1.9.1

11 years

2
4
0 0

Películas y series 2015 estrenos Junio y Julio estan en xtop

by paula

Películas y series 2015 estrenos Junio y Julio estan en xtop Todas estas peliculas series y completas las podras ver en xtop Encontranos con la palabra xtop con cualquiera de los buscadores. Peliculas mas vistas: CENICIENTA (2015) Disponible en BLU-RAY DOS LOCAS EN FUGA (HOT PURSUIT) EL NUEVO EXOTICO HOTEL MARIGOLD EL PAYASO DEL MAL (CLOWN) EL VIAJE MAS LARGO (THE LONGEST RIDE) ELIMINADO (UNFRIENDED) ESCRIBIENDO DE AMOR EX MACHINA Tambien disponible en BLU-RAY HEROE DE CENTRO COMERCIAL 2 (SUPERPOLI EN LAS VEGAS) HOME (HOGAR DULCE HOGAR) INSURGENTE (Actualizada DVD INTENSAMENTE ¡Nueva! JURASSIC WORLD (JURASSIC PARK IV) LA DAMA DE ORO (WOMAN IN GOLD) Disponible en BLU-RAY LA NOCHE DEL DEMONIO 3 (INSIDIOUS) LOS VENGADORES 2 (AVENGERS ERA DE ULTRON) (THE AVENGERS AGE OF ULTRON) MAD MAX 4 FURIA EN LA CARRETERA MAS NOTAS PERFECTAS 2 (WE RE BACK PITCHES) MIENTRAS SEAMOS JOVENES (WHILE WERE YOUNG) Tambien disponible en BLU-RAY POLTERGEIST (JUEGOS DIABOLICOS) PUERTAS ADENTRO (MUSARAÑAS) RAPIDOS Y FURIOSOS 7 SPY UNA ESPIA DESPISTADA TERAPIA DE BROADWAY (SHES FUNNY THAT WAY) TERREMOTO LA FALLA DE SAN ANDRES TOMORROWLAND EL MUNDO DEL MAÑANA Series : Mas vistas MR ROBOT 01* TEMP DVD 01 AQUARIUS 01* TEMP DVD 03 BALLERS 01* TEMP DVD 01 CLIPPED 01* TEMP DVD 01 DARK MATTER 01*TEMP DVD 01 KILLJOYS 01* TEMP DVD 01 SENSE8 STITCHERS 01* TEMP DVD 01 THE BRINK 01* TEMP DVD 01 THE SECRET LIFE OF MARILYN MOROE 01* TEMP DVD 01 THE WHISPERS 01* TEMP DVD 01 UNREAL 01* TEMP DVD 01 ESPERANZA MIA LAS MIL Y UNA NOCHES NOCHE Y DIA JUNTO A VOS GUAPAS AVENIDA BRASIL CASADOS CON HIJOS ENTRE CANÍBALES ER EMERGENCIAS EZEL

11 years

1
0
0 0

leg-kernel tag leg-20150629.0 released

by Graeme Gregory

The leg-kernel release has been made and tagged as leg-20150629.0 This is based on mainline kernel v4.1 Repository : http://git.linaro.org/leg/acpi/leg-kernel.git Direct Link: http://git.linaro.org/leg/acpi/leg-kernel.git/commit/73e5e02ec7f7824b0415df… Notes :-

11 years

1
0
0 0

Re: [Linaro-acpi] compatability with older versions of UEFI

by Zhang, Jonathan Zhixiong

On 6/24/2015 12:14 PM, Luck, Tony wrote: >> Another option would be to have 2 structs, the first one >> "struct cper_sec_mem_err" holds the structure as defined by UEFI >> 2.1, the 2nd one "struct cper_sec_mem_err_24_ext" holds the 4 >> elements added in UEFI 2.3.1. > > Reading some more of the UEFI 2.5 spec ... I see we are in for a world of pain > here. > > 2.5 adds some small tweaks to the memory structure (adding a couple of extra > bits to the "row" entry that can be grabbed from the formerly reserved byte > at offset 73). I think this can be dealt with easily as long as all platforms observe the rule that if a bit is reserved, the bit should be set a '0' instead of being set randomly. Is this a fair assumption on all platforms? > But then there is a whole new GUID for a "Memory Error Section 2" > which has doubled the width of the device, row, column, rank, and bit_pos fields > together with adding two new fields for chip_id and status. This will be painful > because we hardwired the old sizes into extlog_mem_event in <ras/ras_event.h> The old size is encoded in "stuct cper_mem_err_compact", other members of the trace data are the same between "Memory Error Section" and "Memory Error Section 2". One option we have without having to disturb user space handler of memory error trace data would be to change "struct cper_mem_err_compact" so the affected elements are of __u32 instead of __u16. Drawback of this option is that the trace buffer will be unnecessarily bigger if a platform generates "Memory Error Section" data instead of "Memory Error Section 2" data. Such drawback is not a big issue given that uncorrected memory error happens infrequently and corrected memory error should be grouped by platform. -- Jonathan (Zhixiong) Zhang The Qualcomm Innovation Center, Inc. is a member of the Code Aurora Forum, a Linux Foundation Collaborative Project

11 years

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[PATCH non-pretimeout 0/7] Watchdog: introduce ARM SBSA watchdog driver

by fu.wei＠linaro.org

From: Fu Wei <fu.wei(a)linaro.org> This patchset: (1)Introduce Documentation/devicetree/bindings/watchdog/sbsa-gwdt.txt for FDT info of SBSA Generic Watchdog, and give two examples of adding SBSA Generic Watchdog device node into the dts files: foundation-v8.dts and amd-seattle-soc.dtsi. (2)Introduce ACPI GTDT parser: drivers/acpi/gtdt.c Parse SBSA Generic Watchdog Structure in GTDT table of ACPI, and create a platform device with that information. This platform device can be used by This Watchdog driver. drivers/clocksource/arm_arch_timer.c is simplified by this GTDT support. (3)Introduce ARM SBSA watchdog driver: a.Use linux kernel watchdog framework; b.Work with FDT on ARM64; c.In first timeout, do panic to save system context; d.Support getting timeout from parameter and FDT at the driver init stage. This patchset has been tested with watchdog daemon (ACPI/FDT, module/build-in) on the following platforms: (1)ARM Foundation v8 model Changelog: non_pretimeout: Delete all pretimeout code The time from enabling watchdog to WS0 is the same with the time from WS0 to WS1, they are both timeout value. v5: Improve pretimeout support: (1)fix typo in documentation and comments. (2)fix the timeout limits validation bug. Simplify sbsa_gwdt driver: (1)integrate all the registers access functions into caller. v4: Refactor GTDT support code: remove it from arch/arm64/kernel/acpi.c, put it into drivers/acpi/gtdt.c file. Integrate the GTDT code of drivers/clocksource/arm_arch_timer.c into drivers/acpi/gtdt.c. Improve pretimeout support, fix "pretimeout == 0" problem. Simplify sbsa_gwdt driver: (1)timeout/pretimeout limits setup; (2)keepalive function; (3)delete "clk == 0" check; (4)delete WS0 status bit check in interrupt routine; (5)sbsa_gwdt_set_wcv function. v3: Delete "export arch_timer_get_rate" patch. Driver back to use arch_timer_get_cntfrq. Improve watchdog_init_timeouts function and update relevant documentation. Improve watchdog_timeout_invalid and watchdog_pretimeout_invalid. Improve foundation-v8.dts: delete the unnecessary tag of device node. Remove "ARM64 || COMPILE_TEST" from Kconfig. Add comments in arch/arm64/kernel/acpi.c Fix typoes and incorrect comments. v2: Improve watchdog-kernel-api.txt documentation for pretimeout support. Export "arch_timer_get_rate" in arm_arch_timer.c. Add watchdog_init_timeouts API for pretimeout support in framework. Improve suspend and resume foundation in driver Improve timeout/pretimeout values init code in driver. Delete unnecessary items of the sbsa_gwdt struct and #define. Delete all unnecessary debug info in driver. Fix 64bit division bug. Use the arch_timer interface to get watchdog clock rate. Add MODULE_DEVICE_TABLE for platform device id. Fix typoes. v1: The first version upstream patchset to linux mailing list. Fu Wei (7): Documentation: add sbsa-gwdt.txt documentation ARM64: add SBSA Generic Watchdog device node in foundation-v8.dts ARM64: add SBSA Generic Watchdog device node in amd-seattle-soc.dtsi Watchdog: introduce ARM SBSA watchdog driver ACPI: add GTDT table parse driver into ACPI driver Watchdog: enable ACPI GTDT support for ARM SBSA watchdog driver clocksource: simplify ACPI code in arm_arch_timer.c .../devicetree/bindings/watchdog/sbsa-gwdt.txt | 35 ++ arch/arm64/boot/dts/amd/amd-seattle-soc.dtsi | 11 + arch/arm64/boot/dts/arm/foundation-v8.dts | 10 + arch/arm64/kernel/time.c | 4 +- drivers/acpi/Kconfig | 9 + drivers/acpi/Makefile | 1 + drivers/acpi/gtdt.c | 180 ++++++++++ drivers/clocksource/Kconfig | 1 + drivers/clocksource/arm_arch_timer.c | 60 +--- drivers/watchdog/Kconfig | 12 + drivers/watchdog/Makefile | 1 + drivers/watchdog/sbsa_gwdt.c | 383 +++++++++++++++++++++ include/clocksource/arm_arch_timer.h | 8 + include/linux/acpi.h | 5 + include/linux/clocksource.h | 4 +- 15 files changed, 671 insertions(+), 53 deletions(-) create mode 100644 Documentation/devicetree/bindings/watchdog/sbsa-gwdt.txt create mode 100644 drivers/acpi/gtdt.c create mode 100644 drivers/watchdog/sbsa_gwdt.c -- 1.9.1

11 years

5
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[PATCH 00/11] Add self-probe infrastructure and stacked irqdomain support for ACPI based GICv2/3 init

by Hanjun Guo

This patch set introduce self-probe infrastructure to init IRQ controllers and stacked irqdomain support for ACPI based GICv2/3 init. The self-probe infrastructure for ACPI GIC init is similar as IRQCHIP_DECLARE() and based on the GIC version support in ACPI MADT table. We introduce acpi_irq_domain for GICv2/3 core domain to support stacked irqdomain, and pass the gsi (global system interrupt) as the agument (void *arg) for gic_irq_domain_alloc(), then we can alloc virqs via acpi_register_gsi() with stacked irqdomain. In order to make ACPI related GIC init code slef-contained, I consolidated all the GIC init code into drivers/irqchip/irq-gic-acpi.c. update from RFC version: - Consolidate all the GIC init code into drivers/irqchip/irq-gic-acpi.c Hanjun Guo (8): irqchip / GIC: Add GIC version support in ACPI MADT irqchip / GIC / ACPI: Use IRQCHIP_ACPI_DECLARE to simplify GICv2 init code irqchip / gic: Add stacked irqdomain support for ACPI based GICv2 init ACPI / gsi: Add gsi_mutex to synchronize acpi_register_gsi()/acpi_unregister_gsi() irqchip / GICv3: Add ACPI support for GICv3+ initialization irqchip / GICv3: Add stacked irqdomain support for ACPI based init irqchip / GICv2 / ACPI: Consolidate GICv2 ACPI related init code irqchip / GICv3 / ACPI: Consolidate GICv3 ACPI related init code Tomasz Nowicki (3): ACPICA: Introduce GIC version for arm based system ACPI / irqchip: Add self-probe infrastructure to initialize IRQ controller irqchip / GICv3: Refactor gic_of_init() for GICv3 driver arch/arm64/Kconfig | 1 + arch/arm64/include/asm/irq.h | 13 -- arch/arm64/kernel/acpi.c | 25 --- drivers/acpi/Makefile | 1 + drivers/acpi/gsi.c | 41 +++-- drivers/acpi/irq.c | 40 +++++ drivers/irqchip/Kconfig | 3 + drivers/irqchip/Makefile | 1 + drivers/irqchip/irq-gic-acpi.c | 318 +++++++++++++++++++++++++++++++++++ drivers/irqchip/irq-gic-v3.c | 149 +++++++++------- drivers/irqchip/irq-gic.c | 129 ++------------ drivers/irqchip/irqchip.h | 12 ++ include/acpi/actbl1.h | 17 +- include/asm-generic/vmlinux.lds.h | 13 ++ include/linux/acpi.h | 14 ++ include/linux/acpi_irq.h | 4 +- include/linux/irqchip/arm-gic-acpi.h | 13 +- include/linux/irqchip/arm-gic-v3.h | 10 ++ include/linux/mod_devicetable.h | 7 + 19 files changed, 577 insertions(+), 234 deletions(-) create mode 100644 drivers/acpi/irq.c create mode 100644 drivers/irqchip/irq-gic-acpi.c -- 1.9.1

11 years

4
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