On 2013-9-17 14:05, Amit Daniel Kachhap wrote:
This code changes uses GTDT ACPI table to gather IRQ number. Clock frequency is not a member of GTDT table so it is harcoded.
Signed-off-by: Amit Daniel Kachhap amit.daniel@samsung.com
drivers/clocksource/arm_arch_timer.c | 58 ++++++++++++++++++++++++++++++++++ 1 files changed, 58 insertions(+), 0 deletions(-)
Do you have related ASL code? send them out please.
diff --git a/drivers/clocksource/arm_arch_timer.c b/drivers/clocksource/arm_arch_timer.c index ffadd83..36cc6a5 100644 --- a/drivers/clocksource/arm_arch_timer.c +++ b/drivers/clocksource/arm_arch_timer.c @@ -23,6 +23,10 @@ #include <clocksource/arm_arch_timer.h> +#ifdef CONFIG_ACPI +#include <linux/acpi.h> +#endif
static u32 arch_timer_rate; enum ppi_nr { @@ -341,6 +345,59 @@ static void __init arch_timer_init(struct device_node *np) return; } +#ifdef CONFIG_ACPI
- struct acpi_table_gtdt *gtdt;
- int trigger, polarity;
- u32 irq;
- if (ACPI_FAILURE(acpi_get_table(ACPI_SIG_GTDT, 0,
(struct acpi_table_header **)>dt))) {
pr_err("arch_timer: GTDT table not defined\n");
return;
- }
- /* HACK: Hardcoding the timer clock rate as this is not provided in
* the GTDT table */
- arch_timer_rate = 50000000;
- if (gtdt->secure_pl1_interrupt) {
trigger = (gtdt->secure_pl1_flags & ACPI_GTDT_INTERRUPT_MODE) ?
ACPI_EDGE_SENSITIVE : ACPI_LEVEL_SENSITIVE;
polarity =
(gtdt->secure_pl1_flags & ACPI_GTDT_INTERRUPT_POLARITY)
? ACPI_ACTIVE_LOW : ACPI_ACTIVE_HIGH;
arch_timer_ppi[0] = acpi_register_gsi(NULL,
gtdt->secure_pl1_interrupt, trigger, polarity);
- }
- if (gtdt->non_secure_pl1_interrupt) {
trigger =
(gtdt->non_secure_pl1_flags & ACPI_GTDT_INTERRUPT_MODE)
? ACPI_EDGE_SENSITIVE : ACPI_LEVEL_SENSITIVE;
polarity =
(gtdt->non_secure_pl1_flags & ACPI_GTDT_INTERRUPT_POLARITY)
? ACPI_ACTIVE_LOW : ACPI_ACTIVE_HIGH;
arch_timer_ppi[1] = acpi_register_gsi(NULL,
gtdt->non_secure_pl1_interrupt, trigger, polarity);
- }
- if (gtdt->virtual_timer_interrupt) {
trigger = (gtdt->virtual_timer_flags & ACPI_GTDT_INTERRUPT_MODE)
? ACPI_EDGE_SENSITIVE : ACPI_LEVEL_SENSITIVE;
polarity =
(gtdt->virtual_timer_flags & ACPI_GTDT_INTERRUPT_POLARITY)
? ACPI_ACTIVE_LOW : ACPI_ACTIVE_HIGH;
arch_timer_ppi[2] = acpi_register_gsi(NULL,
gtdt->virtual_timer_interrupt, trigger, polarity);
- }
- if (gtdt->non_secure_pl2_interrupt) {
trigger =
(gtdt->non_secure_pl2_flags & ACPI_GTDT_INTERRUPT_MODE)
? ACPI_EDGE_SENSITIVE : ACPI_LEVEL_SENSITIVE;
polarity =
(gtdt->non_secure_pl2_flags & ACPI_GTDT_INTERRUPT_POLARITY)
? ACPI_ACTIVE_LOW : ACPI_ACTIVE_HIGH;
arch_timer_ppi[3] = acpi_register_gsi(NULL,
gtdt->non_secure_pl2_interrupt, trigger, polarity);
- }
+#else /* Try to determine the frequency from the device tree or CNTFRQ */ if (!of_property_read_u32(np, "clock-frequency", &freq)) arch_timer_rate = freq; @@ -349,6 +406,7 @@ static void __init arch_timer_init(struct device_node *np) arch_timer_ppi[i] = irq_of_parse_and_map(np, i); of_node_put(np); +#endif /* * If HYP mode is available, we know that the physical timer