Yep, touching the whole irq subsystem is indeed... "touchy" business :-)
What if we start by setting one single interrupt as high prio to start with? This would leave all other interrupts untouched?
The main concern would be in changing the irq handler to look into priorities... With one single high prio irq only, the changes would be hopefully minimal
/Andrea
On 26/ago/2013, at 13:00, Graeme Gregory graeme.gregory@linaro.org wrote:
Hi Tomasz,
The patches look good to me, but I can only really analyse them at the base level. I think for proper review you will need to send them as a RFC on arm-linux list and put on your asbestos jacket.
Graeme
On Mon, Aug 26, 2013 at 12:17:12PM +0200, Tomasz Nowicki wrote:
ACPI spec is x86 oriented thus it use NMI for error reporting as low latency error signalling way. Fast response to error occurrance is what ARM trying to satisfy using interrupt prioritization since there is no NMI direct equivalent for ARM architecture.
Patch set are divided into three step:
- Create generic code responsible for setting interrupt priority.
- Use it in interrupt setup.
- Example of interrupt controller priority mapping for GIC platform dependent
code.
Patch set tries to meet requirements like:
- not breaking existing code
- easy to expand to new priority levels
- easy to map generic priority levels to platform dependent priority values
See commit logs for more detailed explanation.
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