Hi Hanjun,
I just checked and I have pushed the patches
https://git.linaro.org/gitweb?p=arm/acpi/acpi.git%3Ba=shortlog%3Bh=refs/head...
I am unsure why you do not see them, the above is the correct repo please let me know if you got an incorrect address from somewhere so I can correct it.
Thanks
Graeme
On Mon, Jun 03, 2013 at 08:39:07PM +0800, Hanjun Guo wrote:
Hi Graeme,
Have you push this patch set to the acpi-proto tree? The latest commit I got is "Enable the D12-D15 LEDs next to the SATA port to show how to enable them via DT", did I get the right git repo?
Thanks Hanjun
On 2013-5-27 23:40, Graeme Gregory wrote:
This patch series implements probing the s3c24xx i2c bus device from ACPI tables.
I have included an update to the DSDT for the correct information for I2C0 which is the port connected to the PMIC so is easy to test with i2c tools.
On boot I can successfully communicate with the slave at 0x66 on this bus.
root@arndale:~# i2cdump -f -y 0 0x66 No size specified (using byte-data access) 0 1 2 3 4 5 6 7 8 9 a b c d e f 0123456789abcdef 00: 03 00 00 00 c0 78 00 01 17 07 01 0e e5 85 4f de ?...?x.???????O? 10: 03 03 03 23 23 23 23 23 23 23 23 23 23 23 23 23 ???############# 20: 23 23 23 23 23 23 23 23 23 23 23 23 23 23 23 00 ###############. 30: 00 45 d9 38 fa 34 00 50 50 50 50 50 50 db 40 00 .E?8?4.PPPPPP?@. 40: 40 40 40 40 40 40 3a 40 00 40 40 40 40 40 40 d9 @@@@@@:@.@@@@@@? 50: 58 70 88 b8 18 58 d8 68 d8 30 98 a8 cc d0 16 1c Xp???X?h?0?????? 60: 28 d4 d4 d4 cc cc c8 2c d4 d4 ec d4 d4 c8 d4 e8 (??????,???????? 70: 28 2c 2c 2c 32 28 2c 08 14 14 14 00 00 00 00 00 (,,,2(,????..... 80: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................ 90: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................ a0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................ b0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................ c0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................ d0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................ e0: 01 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ?............... f0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
can see the correct IRQ allocated
root@arndale:~# cat /proc/interrupts CPU0 CPU1 29: 0 0 GIC arch_timer 30: 24177 6574 GIC arch_timer 66: 0 0 GIC dma-pl330.0 67: 0 0 GIC dma-pl330.1 85: 538 0 GIC exynos4210-uart.2 88: 1024 0 GIC LINA0001:00 97: 0 0 GIC exynos-tmu 103: 11813 0 GIC ehci_hcd:usb1, ohci_hcd:usb2 104: 0 0 GIC xhci-hcd:usb3 107: 432 0 GIC dw-mci 109: 67422 0 GIC dw-mci 126: 0 0 GIC drm_mixer 152: 0 0 GIC mct_tick0_irq 153: 0 0 GIC mct_tick1_irq 156: 0 0 GIC dma-pl330.2 347: 0 0 COMBINER mct_comp_irq IPI0: 0 1 CPU wakeup interrupts IPI1: 0 0 Timer broadcast interrupts IPI2: 5233 6766 Rescheduling interrupts IPI3: 0 0 Function call interrupts IPI4: 98 44 Single function call interrupts IPI5: 0 0 CPU stop interrupts IPI6: 0 0 CPU backtrace Err: 0
and can see the correct GPIO allocated.
GPIOs 42-45, GPB3: gpio-42 (i2c-bus ) in hi gpio-43 (i2c-bus ) in hi
The GPIO allocation is not how it would be in a final implementation as similar to FDT the GPIO providers (like GIC) can be hierachical so you would normally use the device name + offset to locate the correct GPIO. This is very similar to how it works in FDT as well.
Thanks
Graeme
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