From: Fu Wei fu.wei@linaro.org
This patchset: (1)Preparation for adding GTDT support in arm_arch_timer: 1. Move some enums and marcos to header file; 2. Add a new enum for spi type; 3. Improve printk relevant code.
(2)Introduce ACPI GTDT parser: drivers/acpi/arm64/acpi_gtdt.c Parse all kinds of timer in GTDT table of ACPI:arch timer, memory-mapped timer and SBSA Generic Watchdog timer. This driver can help to simplify all the relevant timer drivers, and separate all the ACPI GTDT knowledge from them.
(3)Simplify ACPI code for arm_arch_timer
(4)Add GTDT support for ARM memory-mapped timer, also refactor original memory-mapped timer dt support for reusing some common code.
This patchset depends on the following patchset: [UPDATE PATCH V11 1/8] ACPI: I/O Remapping Table (IORT) initial support https://lkml.org/lkml/2016/9/12/949
This patchset has been tested on the following platforms: (1)ARM Foundation v8 model
Changelog: v14: https://lkml.org/lkml/2016/9/28/ Separate memory-mapped timer GTDT support into two patches 1. Refactor the timer init code to prepare for GTDT 2. Add GTDT support for memory-mapped timer
v13: http://www.mail-archive.com/linux-kernel@vger.kernel.org/msg1231717.html Improve arm_arch_timer code for memory-mapped timer GTDT support, refactor original memory-mapped timer dt support for reusing some common code.
v12: https://lkml.org/lkml/2016/9/13/250 Rebase to latest Linux 4.8-rc6 Delete the confusing "skipping" in the error message.
V11: https://lkml.org/lkml/2016/9/6/354 Rebase to latest Linux 4.8-rc5 Delete typedef (suggested by checkpatch.pl)
V10: https://lkml.org/lkml/2016/7/26/215 Drop the "readq" patch. Rebase to latest Linux 4.7.
V9: https://lkml.org/lkml/2016/7/25/345 Improve pr_err message in acpi gtdt driver. Update Commit message for 7/9 shorten the irq mapping function name Improve GTDT driver for memory-mapped timer
v8: https://lkml.org/lkml/2016/7/19/660 Improve "pr_fmt(fmt)" definition: add "ACPI" in front of "GTDT", and also improve printk message. Simplify is_timer_block and is_watchdog. Merge acpi_gtdt_desc_init and gtdt_arch_timer_init into acpi_gtdt_init(); Delete __init in include/linux/acpi.h for GTDT API Make ARM64 select GTDT. Delete "#include <linux/module.h>" from acpi_gtdt.c Simplify GT block parse code.
v7: https://lkml.org/lkml/2016/7/13/769 Move the GTDT driver to drivers/acpi/arm64 Add add the ARM64-specific ACPI Support maintainers in MAINTAINERS Merge 3 patches of GTDT parser driver. Fix the for_each_platform_timer bug.
v6: https://lkml.org/lkml/2016/6/29/580 split the GTDT driver to 4 parts: basic, arch_timer, memory-mapped timer, and SBSA Generic Watchdog timer Improve driver by suggestions and example code from Daniel Lezcano
v5: https://lkml.org/lkml/2016/5/24/356 Sorting out all patches, simplify the API of GTDT driver: GTDT driver just fills the data struct for arm_arch_timer driver.
v4: https://lists.linaro.org/pipermail/linaro-acpi/2016-March/006667.html Delete the kvm relevant patches Separate two patches for sorting out the code for arm_arch_timer. Improve irq info export code to allow missing irq info in GTDT table.
v3: https://lkml.org/lkml/2016/2/1/658 Improve GTDT driver code: (1)improve pr_* by defining pr_fmt(fmt) (2)simplify gtdt_sbsa_gwdt_init (3)improve gtdt_arch_timer_data_init, if table is NULL, it will try to get GTDT table. Move enum ppi_nr to arm_arch_timer.h, and add enum spi_nr. Add arm_arch_timer get ppi from DT and GTDT support for kvm.
v2: https://lkml.org/lkml/2015/12/2/10 Rebase to latest kernel version(4.4-rc3). Fix the bug about the config problem, use CONFIG_ACPI_GTDT instead of CONFIG_ACPI in arm_arch_timer.c
v1: The first upstreaming version: https://lkml.org/lkml/2015/10/28/553
Fu Wei (9): clocksource/drivers/arm_arch_timer: Move enums and defines to header file clocksource/drivers/arm_arch_timer: Add a new enum for spi type clocksource/drivers/arm_arch_timer: Improve printk relevant code acpi/arm64: Add GTDT table parse driver clocksource/drivers/arm_arch_timer: Simplify ACPI support code. acpi/arm64: Add memory-mapped timer support in GTDT driver clocksource/drivers/arm_arch_timer: Refactor the timer init code to prepare for GTDT clocksource/drivers/arm_arch_timer: Add GTDT support for memory-mapped timer acpi/arm64: Add SBSA Generic Watchdog support in GTDT driver
arch/arm64/Kconfig | 1 + drivers/acpi/arm64/Kconfig | 3 + drivers/acpi/arm64/Makefile | 1 + drivers/acpi/arm64/gtdt.c | 309 ++++++++++++++++++++++++++++++++ drivers/clocksource/Kconfig | 2 +- drivers/clocksource/arm_arch_timer.c | 331 +++++++++++++++++++++-------------- drivers/watchdog/Kconfig | 1 + include/clocksource/arm_arch_timer.h | 32 ++++ include/linux/acpi.h | 7 + 9 files changed, 558 insertions(+), 129 deletions(-) create mode 100644 drivers/acpi/arm64/gtdt.c
From: Fu Wei fu.wei@linaro.org
To support the arm_arch_timer via ACPI we need to share defines and enums between the driver and the ACPI parser code.
Split out the relevant defines and enums into arm_arch_timer.h. No functional change.
Signed-off-by: Fu Wei fu.wei@linaro.org --- drivers/clocksource/arm_arch_timer.c | 11 ----------- include/clocksource/arm_arch_timer.h | 11 +++++++++++ 2 files changed, 11 insertions(+), 11 deletions(-)
diff --git a/drivers/clocksource/arm_arch_timer.c b/drivers/clocksource/arm_arch_timer.c index 5770054..aea6c10 100644 --- a/drivers/clocksource/arm_arch_timer.c +++ b/drivers/clocksource/arm_arch_timer.c @@ -51,8 +51,6 @@ #define CNTV_TVAL 0x38 #define CNTV_CTL 0x3c
-#define ARCH_CP15_TIMER BIT(0) -#define ARCH_MEM_TIMER BIT(1) static unsigned arch_timers_present __initdata;
static void __iomem *arch_counter_base; @@ -65,15 +63,6 @@ struct arch_timer { #define to_arch_timer(e) container_of(e, struct arch_timer, evt)
static u32 arch_timer_rate; - -enum ppi_nr { - PHYS_SECURE_PPI, - PHYS_NONSECURE_PPI, - VIRT_PPI, - HYP_PPI, - MAX_TIMER_PPI -}; - static int arch_timer_ppi[MAX_TIMER_PPI];
static struct clock_event_device __percpu *arch_timer_evt; diff --git a/include/clocksource/arm_arch_timer.h b/include/clocksource/arm_arch_timer.h index caedb74..6f06481 100644 --- a/include/clocksource/arm_arch_timer.h +++ b/include/clocksource/arm_arch_timer.h @@ -19,6 +19,9 @@ #include <linux/timecounter.h> #include <linux/types.h>
+#define ARCH_CP15_TIMER BIT(0) +#define ARCH_MEM_TIMER BIT(1) + #define ARCH_TIMER_CTRL_ENABLE (1 << 0) #define ARCH_TIMER_CTRL_IT_MASK (1 << 1) #define ARCH_TIMER_CTRL_IT_STAT (1 << 2) @@ -34,6 +37,14 @@ enum arch_timer_reg { ARCH_TIMER_REG_TVAL, };
+enum ppi_nr { + PHYS_SECURE_PPI, + PHYS_NONSECURE_PPI, + VIRT_PPI, + HYP_PPI, + MAX_TIMER_PPI +}; + #define ARCH_TIMER_PHYS_ACCESS 0 #define ARCH_TIMER_VIRT_ACCESS 1 #define ARCH_TIMER_MEM_PHYS_ACCESS 2
Hi,
On Thu, Sep 29, 2016 at 02:17:09AM +0800, fu.wei@linaro.org wrote:
diff --git a/include/clocksource/arm_arch_timer.h b/include/clocksource/arm_arch_timer.h index caedb74..6f06481 100644 --- a/include/clocksource/arm_arch_timer.h +++ b/include/clocksource/arm_arch_timer.h @@ -19,6 +19,9 @@
Please add:
#include <linux/bitops.h>
... immediately before the includes below; it's needed to ensure that BIT() is defined in all cases. Previously we were relying on implicit header includes, which is not good practice.
#include <linux/timecounter.h> #include <linux/types.h> +#define ARCH_CP15_TIMER BIT(0) +#define ARCH_MEM_TIMER BIT(1)
If we're going to expose these in a header, it would be better to rename them to something that makes their usage/meaning clear. These should probably be ARCH_TIMER_TYPE_{CP15,MEM}.
I guess this can wait for subsequent cleanup.
+enum ppi_nr {
- PHYS_SECURE_PPI,
- PHYS_NONSECURE_PPI,
- VIRT_PPI,
- HYP_PPI,
- MAX_TIMER_PPI
+};
Please rename this to arch_timer_ppi_nr (updating the single user in drivers/clocksource/arm_arch_timer.c). That'll avoid the potential for name clashes in files this happens to get included in (potentially transitively via other headers).
With those changes (regardless of the ARCH_TIMER_TYPE_* bits):
Acked-by: Mark Rutland mark.rutland@arm.com
Thanks, Mark.
#define ARCH_TIMER_PHYS_ACCESS 0 #define ARCH_TIMER_VIRT_ACCESS 1
#define ARCH_TIMER_MEM_PHYS_ACCESS 2
2.7.4
Hi Mark
On 20 October 2016 at 22:45, Mark Rutland mark.rutland@arm.com wrote:
Hi,
On Thu, Sep 29, 2016 at 02:17:09AM +0800, fu.wei@linaro.org wrote:
diff --git a/include/clocksource/arm_arch_timer.h b/include/clocksource/arm_arch_timer.h index caedb74..6f06481 100644 --- a/include/clocksource/arm_arch_timer.h +++ b/include/clocksource/arm_arch_timer.h @@ -19,6 +19,9 @@
Please add:
#include <linux/bitops.h>
... immediately before the includes below; it's needed to ensure that BIT() is defined in all cases. Previously we were relying on implicit header includes, which is not good practice.
yes, you are right! added this, thanks !
#include <linux/timecounter.h> #include <linux/types.h>
+#define ARCH_CP15_TIMER BIT(0) +#define ARCH_MEM_TIMER BIT(1)
If we're going to expose these in a header, it would be better to rename them to something that makes their usage/meaning clear. These should probably be ARCH_TIMER_TYPE_{CP15,MEM}.
I guess this can wait for subsequent cleanup.
+enum ppi_nr {
PHYS_SECURE_PPI,PHYS_NONSECURE_PPI,VIRT_PPI,HYP_PPI,MAX_TIMER_PPI+};
Please rename this to arch_timer_ppi_nr (updating the single user in drivers/clocksource/arm_arch_timer.c). That'll avoid the potential for name clashes in files this happens to get included in (potentially transitively via other headers).
OK, NP, I have fixed this.
With those changes (regardless of the ARCH_TIMER_TYPE_* bits):
Acked-by: Mark Rutland mark.rutland@arm.com
For ARCH_TIMER_TYPE_*, maybe I should add a patch at the end of this patchset to fix it, OK ?
Thanks for ACK :-)
Thanks, Mark.
#define ARCH_TIMER_PHYS_ACCESS 0 #define ARCH_TIMER_VIRT_ACCESS 1
#define ARCH_TIMER_MEM_PHYS_ACCESS 2
2.7.4
On Wed, Oct 26, 2016 at 04:31:55PM +0800, Fu Wei wrote:
On 20 October 2016 at 22:45, Mark Rutland mark.rutland@arm.com wrote:
On Thu, Sep 29, 2016 at 02:17:09AM +0800, fu.wei@linaro.org wrote:
#include <linux/timecounter.h> #include <linux/types.h>
+#define ARCH_CP15_TIMER BIT(0) +#define ARCH_MEM_TIMER BIT(1)
If we're going to expose these in a header, it would be better to rename them to something that makes their usage/meaning clear. These should probably be ARCH_TIMER_TYPE_{CP15,MEM}.
With those changes (regardless of the ARCH_TIMER_TYPE_* bits):
Acked-by: Mark Rutland mark.rutland@arm.com
For ARCH_TIMER_TYPE_*, maybe I should add a patch at the end of this patchset to fix it, OK ?
Sure. If you could put that *earlier* in the patchset it would be preferable so as to minimize churn.
Thanks, Mark.
Hi Mark
On 26 October 2016 at 18:51, Mark Rutland mark.rutland@arm.com wrote:
On Wed, Oct 26, 2016 at 04:31:55PM +0800, Fu Wei wrote:
On 20 October 2016 at 22:45, Mark Rutland mark.rutland@arm.com wrote:
On Thu, Sep 29, 2016 at 02:17:09AM +0800, fu.wei@linaro.org wrote:
#include <linux/timecounter.h> #include <linux/types.h>
+#define ARCH_CP15_TIMER BIT(0) +#define ARCH_MEM_TIMER BIT(1)
If we're going to expose these in a header, it would be better to rename them to something that makes their usage/meaning clear. These should probably be ARCH_TIMER_TYPE_{CP15,MEM}.
With those changes (regardless of the ARCH_TIMER_TYPE_* bits):
Acked-by: Mark Rutland mark.rutland@arm.com
For ARCH_TIMER_TYPE_*, maybe I should add a patch at the end of this patchset to fix it, OK ?
Sure. If you could put that *earlier* in the patchset it would be preferable so as to minimize churn.
OK, NP, will do
Thanks, Mark.
From: Fu Wei fu.wei@linaro.org
This patch add a new enum "spi_nr" and use it in the driver. Just for code's readability, no functional change.
Signed-off-by: Fu Wei fu.wei@linaro.org --- drivers/clocksource/arm_arch_timer.c | 4 ++-- include/clocksource/arm_arch_timer.h | 6 ++++++ 2 files changed, 8 insertions(+), 2 deletions(-)
diff --git a/drivers/clocksource/arm_arch_timer.c b/drivers/clocksource/arm_arch_timer.c index aea6c10..059f7fb 100644 --- a/drivers/clocksource/arm_arch_timer.c +++ b/drivers/clocksource/arm_arch_timer.c @@ -861,9 +861,9 @@ static int __init arch_timer_mem_init(struct device_node *np) }
if (arch_timer_mem_use_virtual) - irq = irq_of_parse_and_map(best_frame, 1); + irq = irq_of_parse_and_map(best_frame, VIRT_SPI); else - irq = irq_of_parse_and_map(best_frame, 0); + irq = irq_of_parse_and_map(best_frame, PHYS_SPI);
ret = -EINVAL; if (!irq) { diff --git a/include/clocksource/arm_arch_timer.h b/include/clocksource/arm_arch_timer.h index 6f06481..16dcd10 100644 --- a/include/clocksource/arm_arch_timer.h +++ b/include/clocksource/arm_arch_timer.h @@ -45,6 +45,12 @@ enum ppi_nr { MAX_TIMER_PPI };
+enum spi_nr { + PHYS_SPI, + VIRT_SPI, + MAX_TIMER_SPI +}; + #define ARCH_TIMER_PHYS_ACCESS 0 #define ARCH_TIMER_VIRT_ACCESS 1 #define ARCH_TIMER_MEM_PHYS_ACCESS 2
On Thu, Sep 29, 2016 at 02:17:10AM +0800, fu.wei@linaro.org wrote:
diff --git a/include/clocksource/arm_arch_timer.h b/include/clocksource/arm_arch_timer.h index 6f06481..16dcd10 100644 --- a/include/clocksource/arm_arch_timer.h +++ b/include/clocksource/arm_arch_timer.h @@ -45,6 +45,12 @@ enum ppi_nr { MAX_TIMER_PPI }; +enum spi_nr {
- PHYS_SPI,
- VIRT_SPI,
- MAX_TIMER_SPI
+};
Please rename this to arch_timer_spi_nr (as with patch 1 for s/ppi_nr/arch_timer_ppi_nr/). With that:
Acked-by: Mark Rutland mark.rutland@arm.com
Thanks, Mark.
Hi Mark,
On 20 October 2016 at 23:09, Mark Rutland mark.rutland@arm.com wrote:
On Thu, Sep 29, 2016 at 02:17:10AM +0800, fu.wei@linaro.org wrote:
diff --git a/include/clocksource/arm_arch_timer.h b/include/clocksource/arm_arch_timer.h index 6f06481..16dcd10 100644 --- a/include/clocksource/arm_arch_timer.h +++ b/include/clocksource/arm_arch_timer.h @@ -45,6 +45,12 @@ enum ppi_nr { MAX_TIMER_PPI };
+enum spi_nr {
PHYS_SPI,VIRT_SPI,MAX_TIMER_SPI+};
Please rename this to arch_timer_spi_nr (as with patch 1 for s/ppi_nr/arch_timer_ppi_nr/). With that:
Acked-by: Mark Rutland mark.rutland@arm.com
OK, NP, done :-)
Great thanks!
Thanks, Mark.
From: Fu Wei fu.wei@linaro.org
This patch defines pr_fmt(fmt) for all pr_* functions, then the pr_* doesn't need to add "arch_timer:" everytime.
Also delete some Blank Spaces in arch_timer_banner, according to the suggestion from checkpatch.pl.
No functional change.
Signed-off-by: Fu Wei fu.wei@linaro.org --- drivers/clocksource/arm_arch_timer.c | 55 ++++++++++++++++++------------------ 1 file changed, 28 insertions(+), 27 deletions(-)
diff --git a/drivers/clocksource/arm_arch_timer.c b/drivers/clocksource/arm_arch_timer.c index 059f7fb..84be023 100644 --- a/drivers/clocksource/arm_arch_timer.c +++ b/drivers/clocksource/arm_arch_timer.c @@ -32,6 +32,9 @@
#include <clocksource/arm_arch_timer.h>
+#undef pr_fmt +#define pr_fmt(fmt) "arch_timer: " fmt + #define CNTTIDR 0x08 #define CNTTIDR_VIRT(n) (BIT(1) << ((n) * 4))
@@ -418,24 +421,24 @@ arch_timer_detect_rate(void __iomem *cntbase, struct device_node *np)
/* Check the timer frequency. */ if (arch_timer_rate == 0) - pr_warn("Architected timer frequency not available\n"); + pr_warn("frequency not available\n"); }
static void arch_timer_banner(unsigned type) { - pr_info("Architected %s%s%s timer(s) running at %lu.%02luMHz (%s%s%s).\n", - type & ARCH_CP15_TIMER ? "cp15" : "", - type == (ARCH_CP15_TIMER | ARCH_MEM_TIMER) ? " and " : "", - type & ARCH_MEM_TIMER ? "mmio" : "", - (unsigned long)arch_timer_rate / 1000000, - (unsigned long)(arch_timer_rate / 10000) % 100, - type & ARCH_CP15_TIMER ? - (arch_timer_uses_ppi == VIRT_PPI) ? "virt" : "phys" : - "", - type == (ARCH_CP15_TIMER | ARCH_MEM_TIMER) ? "/" : "", - type & ARCH_MEM_TIMER ? - arch_timer_mem_use_virtual ? "virt" : "phys" : - ""); + pr_info("%s%s%s timer(s) running at %lu.%02luMHz (%s%s%s).\n", + type & ARCH_CP15_TIMER ? "cp15" : "", + type == (ARCH_CP15_TIMER | ARCH_MEM_TIMER) ? " and " : "", + type & ARCH_MEM_TIMER ? "mmio" : "", + (unsigned long)arch_timer_rate / 1000000, + (unsigned long)(arch_timer_rate / 10000) % 100, + type & ARCH_CP15_TIMER ? + (arch_timer_uses_ppi == VIRT_PPI) ? "virt" : "phys" : + "", + type == (ARCH_CP15_TIMER | ARCH_MEM_TIMER) ? "/" : "", + type & ARCH_MEM_TIMER ? + arch_timer_mem_use_virtual ? "virt" : "phys" : + ""); }
u32 arch_timer_get_rate(void) @@ -528,8 +531,7 @@ static void __init arch_counter_register(unsigned type)
static void arch_timer_stop(struct clock_event_device *clk) { - pr_debug("arch_timer_teardown disable IRQ%d cpu #%d\n", - clk->irq, smp_processor_id()); + pr_debug("disable IRQ%d cpu #%d\n", clk->irq, smp_processor_id());
disable_percpu_irq(arch_timer_ppi[arch_timer_uses_ppi]); if (arch_timer_has_nonsecure_ppi()) @@ -622,8 +624,7 @@ static int __init arch_timer_register(void) }
if (err) { - pr_err("arch_timer: can't register interrupt %d (%d)\n", - ppi, err); + pr_err("can't register interrupt %d (%d)\n", ppi, err); goto out_free; }
@@ -676,7 +677,7 @@ static int __init arch_timer_mem_register(void __iomem *base, unsigned int irq)
ret = request_irq(irq, func, IRQF_TIMER, "arch_mem_timer", &t->evt); if (ret) { - pr_err("arch_timer: Failed to request mem timer irq\n"); + pr_err("Failed to request mem timer irq\n"); kfree(t); }
@@ -754,7 +755,7 @@ static int __init arch_timer_init(void) }
if (!has_ppi) { - pr_warn("arch_timer: No interrupt available, giving up\n"); + pr_warn("No interrupt available, giving up\n"); return -EINVAL; } } @@ -768,7 +769,7 @@ static int __init arch_timer_init(void) return ret;
arch_timer_kvm_info.virtual_irq = arch_timer_ppi[VIRT_PPI]; - + return 0; }
@@ -777,7 +778,7 @@ static int __init arch_timer_of_init(struct device_node *np) int i;
if (arch_timers_present & ARCH_CP15_TIMER) { - pr_warn("arch_timer: multiple nodes in dt, skipping\n"); + pr_warn("multiple nodes in dt, skipping\n"); return 0; }
@@ -812,7 +813,7 @@ static int __init arch_timer_mem_init(struct device_node *np) arch_timers_present |= ARCH_MEM_TIMER; cntctlbase = of_iomap(np, 0); if (!cntctlbase) { - pr_err("arch_timer: Can't find CNTCTLBase\n"); + pr_err("Can't find CNTCTLBase\n"); return -ENXIO; }
@@ -827,7 +828,7 @@ static int __init arch_timer_mem_init(struct device_node *np) u32 cntacr;
if (of_property_read_u32(frame, "frame-number", &n)) { - pr_err("arch_timer: Missing frame-number\n"); + pr_err("Missing frame-number\n"); of_node_put(frame); goto out; } @@ -856,7 +857,7 @@ static int __init arch_timer_mem_init(struct device_node *np) ret= -ENXIO; base = arch_counter_base = of_iomap(best_frame, 0); if (!base) { - pr_err("arch_timer: Can't map frame's registers\n"); + pr_err("Can't map frame's registers\n"); goto out; }
@@ -867,7 +868,7 @@ static int __init arch_timer_mem_init(struct device_node *np)
ret = -EINVAL; if (!irq) { - pr_err("arch_timer: Frame missing %s irq", + pr_err("Frame missing %s irq", arch_timer_mem_use_virtual ? "virt" : "phys"); goto out; } @@ -909,7 +910,7 @@ static int __init arch_timer_acpi_init(struct acpi_table_header *table) struct acpi_table_gtdt *gtdt;
if (arch_timers_present & ARCH_CP15_TIMER) { - pr_warn("arch_timer: already initialized, skipping\n"); + pr_warn("already initialized, skipping\n"); return -EINVAL; }
On Thu, Sep 29, 2016 at 02:17:11AM +0800, fu.wei@linaro.org wrote:
static void arch_timer_banner(unsigned type) {
- pr_info("Architected %s%s%s timer(s) running at %lu.%02luMHz (%s%s%s).\n",
type & ARCH_CP15_TIMER ? "cp15" : "",type == (ARCH_CP15_TIMER | ARCH_MEM_TIMER) ? " and " : "",type & ARCH_MEM_TIMER ? "mmio" : "",(unsigned long)arch_timer_rate / 1000000,(unsigned long)(arch_timer_rate / 10000) % 100,type & ARCH_CP15_TIMER ?(arch_timer_uses_ppi == VIRT_PPI) ? "virt" : "phys" :"",type == (ARCH_CP15_TIMER | ARCH_MEM_TIMER) ? "/" : "",type & ARCH_MEM_TIMER ?arch_timer_mem_use_virtual ? "virt" : "phys" :"");
- pr_info("%s%s%s timer(s) running at %lu.%02luMHz (%s%s%s).\n",
type & ARCH_CP15_TIMER ? "cp15" : "",type == (ARCH_CP15_TIMER | ARCH_MEM_TIMER) ? " and " : "",type & ARCH_MEM_TIMER ? "mmio" : "",(unsigned long)arch_timer_rate / 1000000,(unsigned long)(arch_timer_rate / 10000) % 100,type & ARCH_CP15_TIMER ?(arch_timer_uses_ppi == VIRT_PPI) ? "virt" : "phys" :"",
Please restore the additional indent on this line...
type == (ARCH_CP15_TIMER | ARCH_MEM_TIMER) ? "/" : "",type & ARCH_MEM_TIMER ?arch_timer_mem_use_virtual ? "virt" : "phys" :"");
... and these two.
No matter what checkpatch says, I prefer the code that way so as to keep the ternary clear.
[...]
@@ -768,7 +769,7 @@ static int __init arch_timer_init(void) return ret; arch_timer_kvm_info.virtual_irq = arch_timer_ppi[VIRT_PPI];
Please mention the whitespace fixup in the commit message. It's surprising otherwise.
With all that:
Acked-by: Mark Rutland mark.rutland@arm.com
Thanks, Mark.
Hi Mark,
On 20 October 2016 at 23:32, Mark Rutland mark.rutland@arm.com wrote:
On Thu, Sep 29, 2016 at 02:17:11AM +0800, fu.wei@linaro.org wrote:
static void arch_timer_banner(unsigned type) {
pr_info("Architected %s%s%s timer(s) running at %lu.%02luMHz (%s%s%s).\n",type & ARCH_CP15_TIMER ? "cp15" : "",type == (ARCH_CP15_TIMER | ARCH_MEM_TIMER) ? " and " : "",type & ARCH_MEM_TIMER ? "mmio" : "",(unsigned long)arch_timer_rate / 1000000,(unsigned long)(arch_timer_rate / 10000) % 100,type & ARCH_CP15_TIMER ?(arch_timer_uses_ppi == VIRT_PPI) ? "virt" : "phys" :"",type == (ARCH_CP15_TIMER | ARCH_MEM_TIMER) ? "/" : "",type & ARCH_MEM_TIMER ?arch_timer_mem_use_virtual ? "virt" : "phys" :"");
pr_info("%s%s%s timer(s) running at %lu.%02luMHz (%s%s%s).\n",type & ARCH_CP15_TIMER ? "cp15" : "",type == (ARCH_CP15_TIMER | ARCH_MEM_TIMER) ? " and " : "",type & ARCH_MEM_TIMER ? "mmio" : "",(unsigned long)arch_timer_rate / 1000000,(unsigned long)(arch_timer_rate / 10000) % 100,type & ARCH_CP15_TIMER ?(arch_timer_uses_ppi == VIRT_PPI) ? "virt" : "phys" :"",Please restore the additional indent on this line...
type == (ARCH_CP15_TIMER | ARCH_MEM_TIMER) ? "/" : "",type & ARCH_MEM_TIMER ?arch_timer_mem_use_virtual ? "virt" : "phys" :"");... and these two.
No matter what checkpatch says, I prefer the code that way so as to keep the ternary clear.
yes, NP, I have fixed it :-)
[...]
@@ -768,7 +769,7 @@ static int __init arch_timer_init(void) return ret;
arch_timer_kvm_info.virtual_irq = arch_timer_ppi[VIRT_PPI];
Please mention the whitespace fixup in the commit message. It's surprising otherwise.
OK, added this message.
With all that:
Acked-by: Mark Rutland mark.rutland@arm.com
Great thanks :-)
Thanks, Mark.
From: Fu Wei fu.wei@linaro.org
This patch adds support for parsing arch timer in GTDT, provides some kernel APIs to parse all the PPIs and always-on info in GTDT and export them.
By this driver, we can simplify arm_arch_timer drivers, and separate the ACPI GTDT knowledge from it.
Signed-off-by: Fu Wei fu.wei@linaro.org Signed-off-by: Hanjun Guo hanjun.guo@linaro.org Acked-by: Rafael J. Wysocki rafael.j.wysocki@intel.com --- arch/arm64/Kconfig | 1 + drivers/acpi/arm64/Kconfig | 3 + drivers/acpi/arm64/Makefile | 1 + drivers/acpi/arm64/gtdt.c | 152 ++++++++++++++++++++++++++++++++++++++++++++ drivers/clocksource/Kconfig | 1 - include/linux/acpi.h | 6 ++ 6 files changed, 163 insertions(+), 1 deletion(-)
diff --git a/arch/arm64/Kconfig b/arch/arm64/Kconfig index bc3f00f..0607728 100644 --- a/arch/arm64/Kconfig +++ b/arch/arm64/Kconfig @@ -2,6 +2,7 @@ config ARM64 def_bool y select ACPI_CCA_REQUIRED if ACPI select ACPI_GENERIC_GSI if ACPI + select ACPI_GTDT if ACPI select ACPI_REDUCED_HARDWARE_ONLY if ACPI select ACPI_MCFG if ACPI select ARCH_HAS_DEVMEM_IS_ALLOWED diff --git a/drivers/acpi/arm64/Kconfig b/drivers/acpi/arm64/Kconfig index 4616da4..5a6f80f 100644 --- a/drivers/acpi/arm64/Kconfig +++ b/drivers/acpi/arm64/Kconfig @@ -4,3 +4,6 @@
config ACPI_IORT bool + +config ACPI_GTDT + bool diff --git a/drivers/acpi/arm64/Makefile b/drivers/acpi/arm64/Makefile index 72331f2..1017def 100644 --- a/drivers/acpi/arm64/Makefile +++ b/drivers/acpi/arm64/Makefile @@ -1 +1,2 @@ obj-$(CONFIG_ACPI_IORT) += iort.o +obj-$(CONFIG_ACPI_GTDT) += gtdt.o diff --git a/drivers/acpi/arm64/gtdt.c b/drivers/acpi/arm64/gtdt.c new file mode 100644 index 0000000..b24844d --- /dev/null +++ b/drivers/acpi/arm64/gtdt.c @@ -0,0 +1,152 @@ +/* + * ARM Specific GTDT table Support + * + * Copyright (C) 2016, Linaro Ltd. + * Author: Daniel Lezcano daniel.lezcano@linaro.org + * Fu Wei fu.wei@linaro.org + * Hanjun Guo hanjun.guo@linaro.org + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. + */ + +#include <linux/acpi.h> +#include <linux/init.h> +#include <linux/kernel.h> + +#include <clocksource/arm_arch_timer.h> + +#undef pr_fmt +#define pr_fmt(fmt) "ACPI GTDT: " fmt + +struct acpi_gtdt_descriptor { + struct acpi_table_gtdt *gtdt; + void *platform_timer_start; + void *gtdt_end; +}; + +static struct acpi_gtdt_descriptor acpi_gtdt_desc __initdata; + +static inline void *next_platform_timer(void *platform_timer) +{ + struct acpi_gtdt_header *gh = platform_timer; + + platform_timer += gh->length; + if (platform_timer < acpi_gtdt_desc.gtdt_end) + return platform_timer; + + return NULL; +} + +#define for_each_platform_timer(_g) \ + for (_g = acpi_gtdt_desc.platform_timer_start; _g; \ + _g = next_platform_timer(_g)) + +static inline bool is_timer_block(void *platform_timer) +{ + struct acpi_gtdt_header *gh = platform_timer; + + return gh->type == ACPI_GTDT_TYPE_TIMER_BLOCK; +} + +static inline bool is_watchdog(void *platform_timer) +{ + struct acpi_gtdt_header *gh = platform_timer; + + return gh->type == ACPI_GTDT_TYPE_WATCHDOG; +} + +static int __init map_gt_gsi(u32 interrupt, u32 flags) +{ + int trigger, polarity; + + if (!interrupt) + return 0; + + trigger = (flags & ACPI_GTDT_INTERRUPT_MODE) ? ACPI_EDGE_SENSITIVE + : ACPI_LEVEL_SENSITIVE; + + polarity = (flags & ACPI_GTDT_INTERRUPT_POLARITY) ? ACPI_ACTIVE_LOW + : ACPI_ACTIVE_HIGH; + + return acpi_register_gsi(NULL, interrupt, trigger, polarity); +} + +/* + * Map the PPIs of per-cpu arch_timer. + * @type: the type of PPI + * Returns 0 if error. + */ +int __init acpi_gtdt_map_ppi(int type) +{ + struct acpi_table_gtdt *gtdt = acpi_gtdt_desc.gtdt; + + switch (type) { + case PHYS_SECURE_PPI: + return map_gt_gsi(gtdt->secure_el1_interrupt, + gtdt->secure_el1_flags); + case PHYS_NONSECURE_PPI: + return map_gt_gsi(gtdt->non_secure_el1_interrupt, + gtdt->non_secure_el1_flags); + case VIRT_PPI: + return map_gt_gsi(gtdt->virtual_timer_interrupt, + gtdt->virtual_timer_flags); + + case HYP_PPI: + return map_gt_gsi(gtdt->non_secure_el2_interrupt, + gtdt->non_secure_el2_flags); + default: + pr_err("Failed to map timer interrupt: invalid type.\n"); + } + + return 0; +} + +/* + * acpi_gtdt_c3stop - got c3stop info from GTDT + * + * Returns 1 if the timer is powered in deep idle state, 0 otherwise. + */ +bool __init acpi_gtdt_c3stop(void) +{ + struct acpi_table_gtdt *gtdt = acpi_gtdt_desc.gtdt; + + return !(gtdt->non_secure_el1_flags & ACPI_GTDT_ALWAYS_ON); +} + +/* + * Get some basic info from GTDT table, and init the global variables above + * for all timers initialization of Generic Timer. + * This function does some validation on GTDT table. + */ +int __init acpi_gtdt_init(struct acpi_table_header *table) +{ + void *start; + struct acpi_table_gtdt *gtdt; + + gtdt = container_of(table, struct acpi_table_gtdt, header); + + acpi_gtdt_desc.gtdt = gtdt; + acpi_gtdt_desc.gtdt_end = (void *)table + table->length; + + if (table->revision < 2) { + pr_debug("Revision:%d doesn't support Platform Timers.\n", + table->revision); + return 0; + } + + if (!gtdt->platform_timer_count) { + pr_debug("No Platform Timer.\n"); + return 0; + } + + start = (void *)gtdt + gtdt->platform_timer_offset; + if (start < (void *)table + sizeof(struct acpi_table_gtdt)) { + pr_err(FW_BUG "Failed to retrieve timer info from firmware: invalid data.\n"); + return -EINVAL; + } + acpi_gtdt_desc.platform_timer_start = start; + + return gtdt->platform_timer_count; +} diff --git a/drivers/clocksource/Kconfig b/drivers/clocksource/Kconfig index 5677886..b58d259 100644 --- a/drivers/clocksource/Kconfig +++ b/drivers/clocksource/Kconfig @@ -285,7 +285,6 @@ config CLKSRC_MPS2 config ARM_ARCH_TIMER bool select CLKSRC_OF if OF - select CLKSRC_ACPI if ACPI
config ARM_ARCH_TIMER_EVTSTREAM bool "Enable ARM architected timer event stream generation by default" diff --git a/include/linux/acpi.h b/include/linux/acpi.h index c5eaf2f..e2f9841 100644 --- a/include/linux/acpi.h +++ b/include/linux/acpi.h @@ -567,6 +567,12 @@ enum acpi_reconfig_event { int acpi_reconfig_notifier_register(struct notifier_block *nb); int acpi_reconfig_notifier_unregister(struct notifier_block *nb);
+#ifdef CONFIG_ACPI_GTDT +int acpi_gtdt_init(struct acpi_table_header *table); +int acpi_gtdt_map_ppi(int type); +bool acpi_gtdt_c3stop(void); +#endif + #else /* !CONFIG_ACPI */
#define acpi_disabled 1
Hi,
As a heads-up, on v4.9-rc1 I see conflicts at least against arch/arm64/Kconfig. Luckily git am -3 seems to be able to fix that up automatically, but this will need to be rebased before the next posting and/or merging.
On Thu, Sep 29, 2016 at 02:17:12AM +0800, fu.wei@linaro.org wrote:
+static int __init map_gt_gsi(u32 interrupt, u32 flags) +{
- int trigger, polarity;
- if (!interrupt)
return 0;
Urgh.
Only the secure interrupt (which we do not need) is optional in this manner, and (hilariously), zero appears to also be a valid GSIV, per figure 5-24 in the ACPI 6.1 spec.
So, I think that:
(a) we should not bother parsing the secure interrupt (b) we should drop the check above (c) we should report the spec issue to the ASWG
+/*
- acpi_gtdt_c3stop - got c3stop info from GTDT
- Returns 1 if the timer is powered in deep idle state, 0 otherwise.
- */
+bool __init acpi_gtdt_c3stop(void) +{
- struct acpi_table_gtdt *gtdt = acpi_gtdt_desc.gtdt;
- return !(gtdt->non_secure_el1_flags & ACPI_GTDT_ALWAYS_ON);
+}
It looks like this can differ per interrupt. Shouldn't we check the appropriate one?
+int __init acpi_gtdt_init(struct acpi_table_header *table) +{
- void *start;
- struct acpi_table_gtdt *gtdt;
- gtdt = container_of(table, struct acpi_table_gtdt, header);
- acpi_gtdt_desc.gtdt = gtdt;
- acpi_gtdt_desc.gtdt_end = (void *)table + table->length;
- if (table->revision < 2) {
pr_debug("Revision:%d doesn't support Platform Timers.\n",table->revision);return 0;- }
- if (!gtdt->platform_timer_count) {
pr_debug("No Platform Timer.\n");return 0;- }
- start = (void *)gtdt + gtdt->platform_timer_offset;
- if (start < (void *)table + sizeof(struct acpi_table_gtdt)) {
pr_err(FW_BUG "Failed to retrieve timer info from firmware: invalid data.\n");return -EINVAL;- }
- acpi_gtdt_desc.platform_timer_start = start;
- return gtdt->platform_timer_count;
+}
This is never used as anything other than a status code.
Just return zero; we haven't parsed the platform timers themselves at this point anyway.
Thanks, Mark.
Hi Mark,
On 21 October 2016 at 00:37, Mark Rutland mark.rutland@arm.com wrote:
Hi,
As a heads-up, on v4.9-rc1 I see conflicts at least against arch/arm64/Kconfig. Luckily git am -3 seems to be able to fix that up automatically, but this will need to be rebased before the next posting and/or merging.
On Thu, Sep 29, 2016 at 02:17:12AM +0800, fu.wei@linaro.org wrote:
+static int __init map_gt_gsi(u32 interrupt, u32 flags) +{
int trigger, polarity;if (!interrupt)return 0;Urgh.
Only the secure interrupt (which we do not need) is optional in this manner, and (hilariously), zero appears to also be a valid GSIV, per figure 5-24 in the ACPI 6.1 spec.
So, I think that:
(a) we should not bother parsing the secure interrupt
If I understand correctly, from this point of view, kernel don't handle the secure interrupt. But the current arm_arch_timer driver still enable/disable/request PHYS_SECURE_PPI with PHYS_NONSECURE_PPI. That means we still need to parse the secure interrupt. Please correct me, if I misunderstand something? :-)
(b) we should drop the check above
yes, if zero is a valid GSIV, this makes sense.
(c) we should report the spec issue to the ASWG
+/*
- acpi_gtdt_c3stop - got c3stop info from GTDT
- Returns 1 if the timer is powered in deep idle state, 0 otherwise.
- */
+bool __init acpi_gtdt_c3stop(void) +{
struct acpi_table_gtdt *gtdt = acpi_gtdt_desc.gtdt;return !(gtdt->non_secure_el1_flags & ACPI_GTDT_ALWAYS_ON);+}
It looks like this can differ per interrupt. Shouldn't we check the appropriate one?
yes, I think you are right.
+int __init acpi_gtdt_init(struct acpi_table_header *table) +{
void *start;struct acpi_table_gtdt *gtdt;gtdt = container_of(table, struct acpi_table_gtdt, header);acpi_gtdt_desc.gtdt = gtdt;acpi_gtdt_desc.gtdt_end = (void *)table + table->length;if (table->revision < 2) {pr_debug("Revision:%d doesn't support Platform Timers.\n",table->revision);return 0;}if (!gtdt->platform_timer_count) {pr_debug("No Platform Timer.\n");return 0;}start = (void *)gtdt + gtdt->platform_timer_offset;if (start < (void *)table + sizeof(struct acpi_table_gtdt)) {pr_err(FW_BUG "Failed to retrieve timer info from firmware: invalid data.\n");return -EINVAL;}acpi_gtdt_desc.platform_timer_start = start;return gtdt->platform_timer_count;+}
This is never used as anything other than a status code.
Just return zero; we haven't parsed the platform timers themselves at this point anyway.
Sorry, in my driver, I use this return value to inform driver
negative number : error 0 : we don't have platform timer in GTDT table. positive number: the number of platform timer we have in GTDT table.
please correct me, if I am doing it in wrong way. Thanks :-)
Thanks, Mark.
On 26/10/16 12:10, Fu Wei wrote:
Hi Mark,
On 21 October 2016 at 00:37, Mark Rutland mark.rutland@arm.com wrote:
Hi,
As a heads-up, on v4.9-rc1 I see conflicts at least against arch/arm64/Kconfig. Luckily git am -3 seems to be able to fix that up automatically, but this will need to be rebased before the next posting and/or merging.
On Thu, Sep 29, 2016 at 02:17:12AM +0800, fu.wei@linaro.org wrote:
+static int __init map_gt_gsi(u32 interrupt, u32 flags) +{
int trigger, polarity;if (!interrupt)return 0;Urgh.
Only the secure interrupt (which we do not need) is optional in this manner, and (hilariously), zero appears to also be a valid GSIV, per figure 5-24 in the ACPI 6.1 spec.
So, I think that:
(a) we should not bother parsing the secure interrupt
If I understand correctly, from this point of view, kernel don't handle the secure interrupt. But the current arm_arch_timer driver still enable/disable/request PHYS_SECURE_PPI with PHYS_NONSECURE_PPI. That means we still need to parse the secure interrupt. Please correct me, if I misunderstand something? :-)
That's because we can use the per-cpu timer when 32bit Linux is running on the secure side (and we cannot distinguish between secure and non-secure at runtime). ACPI is 64bit only, and Linux on 64bit isn't supported on the secure side, so only registering the non-secure timer is perfectly acceptable.
Thanks,
M.
Hi Marc,
On 26 October 2016 at 20:11, Marc Zyngier marc.zyngier@arm.com wrote:
On 26/10/16 12:10, Fu Wei wrote:
Hi Mark,
On 21 October 2016 at 00:37, Mark Rutland mark.rutland@arm.com wrote:
Hi,
As a heads-up, on v4.9-rc1 I see conflicts at least against arch/arm64/Kconfig. Luckily git am -3 seems to be able to fix that up automatically, but this will need to be rebased before the next posting and/or merging.
On Thu, Sep 29, 2016 at 02:17:12AM +0800, fu.wei@linaro.org wrote:
+static int __init map_gt_gsi(u32 interrupt, u32 flags) +{
int trigger, polarity;if (!interrupt)return 0;Urgh.
Only the secure interrupt (which we do not need) is optional in this manner, and (hilariously), zero appears to also be a valid GSIV, per figure 5-24 in the ACPI 6.1 spec.
So, I think that:
(a) we should not bother parsing the secure interrupt
If I understand correctly, from this point of view, kernel don't handle the secure interrupt. But the current arm_arch_timer driver still enable/disable/request PHYS_SECURE_PPI with PHYS_NONSECURE_PPI. That means we still need to parse the secure interrupt. Please correct me, if I misunderstand something? :-)
That's because we can use the per-cpu timer when 32bit Linux is running on the secure side (and we cannot distinguish between secure and non-secure at runtime). ACPI is 64bit only, and Linux on 64bit isn't supported on the secure side, so only registering the non-secure timer is perfectly acceptable.
Great thanks for your explanation :-) So we just don't need to fill arch_timer_ppi[PHYS_SECURE_PPI] , just skip it.
Thanks,
M.-- Jazz is not dead. It just smells funny...
On 10/26/2016 07:10 PM, Fu Wei wrote:
Hi Mark,
On 21 October 2016 at 00:37, Mark Rutland mark.rutland@arm.com wrote:
Hi,
As a heads-up, on v4.9-rc1 I see conflicts at least against arch/arm64/Kconfig. Luckily git am -3 seems to be able to fix that up automatically, but this will need to be rebased before the next posting and/or merging.
On Thu, Sep 29, 2016 at 02:17:12AM +0800, fu.wei@linaro.org wrote:
+static int __init map_gt_gsi(u32 interrupt, u32 flags) +{
int trigger, polarity;if (!interrupt)return 0;Urgh.
Only the secure interrupt (which we do not need) is optional in this manner, and (hilariously), zero appears to also be a valid GSIV, per figure 5-24 in the ACPI 6.1 spec.
So, I think that:
(a) we should not bother parsing the secure interrupt
If I understand correctly, from this point of view, kernel don't handle the secure interrupt. But the current arm_arch_timer driver still enable/disable/request PHYS_SECURE_PPI with PHYS_NONSECURE_PPI. That means we still need to parse the secure interrupt. Please correct me, if I misunderstand something? :-)
(b) we should drop the check above
yes, if zero is a valid GSIV, this makes sense.
(c) we should report the spec issue to the ASWG
+/*
- acpi_gtdt_c3stop - got c3stop info from GTDT
- Returns 1 if the timer is powered in deep idle state, 0 otherwise.
- */
+bool __init acpi_gtdt_c3stop(void) +{
struct acpi_table_gtdt *gtdt = acpi_gtdt_desc.gtdt;return !(gtdt->non_secure_el1_flags & ACPI_GTDT_ALWAYS_ON);+}
It looks like this can differ per interrupt. Shouldn't we check the appropriate one?
yes, I think you are right.
I think Mark already clarified this it's a global flag which defined in the spec, and we don't need to update it.
Thanks Hanjun
Hi Mark,
Sorry for the late reply.
On 10/21/2016 12:37 AM, Mark Rutland wrote:
Hi,
As a heads-up, on v4.9-rc1 I see conflicts at least against arch/arm64/Kconfig. Luckily git am -3 seems to be able to fix that up automatically, but this will need to be rebased before the next posting and/or merging.
On Thu, Sep 29, 2016 at 02:17:12AM +0800, fu.wei@linaro.org wrote:
+static int __init map_gt_gsi(u32 interrupt, u32 flags) +{
- int trigger, polarity;
- if (!interrupt)
return 0;Urgh.
Only the secure interrupt (which we do not need) is optional in this manner, and (hilariously), zero appears to also be a valid GSIV, per figure 5-24 in the ACPI 6.1 spec.
So, I think that:
(a) we should not bother parsing the secure interrupt (b) we should drop the check above (c) we should report the spec issue to the ASWG
Sorry, I willing to do that, but I need to figure out the issue here. What kind of issue in detail? do you mean that zero should not be valid for arch timer interrupts?
Thanks Hanjun
On 11/11/2016 09:46 PM, Hanjun Guo wrote:
Hi Mark,
Sorry for the late reply.
On 10/21/2016 12:37 AM, Mark Rutland wrote:
Hi,
As a heads-up, on v4.9-rc1 I see conflicts at least against arch/arm64/Kconfig. Luckily git am -3 seems to be able to fix that up automatically, but this will need to be rebased before the next posting and/or merging.
On Thu, Sep 29, 2016 at 02:17:12AM +0800, fu.wei@linaro.org wrote:
+static int __init map_gt_gsi(u32 interrupt, u32 flags) +{
- int trigger, polarity;
- if (!interrupt)
return 0;Urgh.
Only the secure interrupt (which we do not need) is optional in this manner, and (hilariously), zero appears to also be a valid GSIV, per figure 5-24 in the ACPI 6.1 spec.
So, I think that:
(a) we should not bother parsing the secure interrupt (b) we should drop the check above (c) we should report the spec issue to the ASWG
Sorry, I willing to do that, but I need to figure out the issue here. What kind of issue in detail? do you mean that zero should not be valid for arch timer interrupts?
OK, I think you are referring to "we don't need the secure interrupt", correct me if I'm wrong (still in jet lag...).
Thanks Hanjun
On Fri, Nov 11, 2016 at 09:46:29PM +0800, Hanjun Guo wrote:
On 10/21/2016 12:37 AM, Mark Rutland wrote:
On Thu, Sep 29, 2016 at 02:17:12AM +0800, fu.wei@linaro.org wrote:
+static int __init map_gt_gsi(u32 interrupt, u32 flags) +{
- int trigger, polarity;
- if (!interrupt)
return 0;Urgh.
Only the secure interrupt (which we do not need) is optional in this manner, and (hilariously), zero appears to also be a valid GSIV, per figure 5-24 in the ACPI 6.1 spec.
So, I think that:
(a) we should not bother parsing the secure interrupt (b) we should drop the check above (c) we should report the spec issue to the ASWG
Sorry, I willing to do that, but I need to figure out the issue here. What kind of issue in detail? do you mean that zero should not be valid for arch timer interrupts?
As above, zero is a valid GSIV, and is valid for the non-secure timer interrupts. The check is wrong for non-secure interrupts.
We can ignore the secure timer interrupt since it's irrelevant to us, and remove the check.
Regardless, the spec is inconsistent w.r.t. the secure interrupt being zero if not present, since zero is a valid GSIV. That should be reported to the ASWG.
Thanks, Mark.
From: Fu Wei fu.wei@linaro.org
The patch update arm_arch_timer driver to use the function provided by the new GTDT driver of ACPI. By this way, arm_arch_timer.c can be simplified, and separate all the ACPI GTDT knowledge from this timer driver.
Signed-off-by: Fu Wei fu.wei@linaro.org Signed-off-by: Hanjun Guo hanjun.guo@linaro.org --- drivers/clocksource/Kconfig | 1 + drivers/clocksource/arm_arch_timer.c | 50 +++++++++--------------------------- 2 files changed, 13 insertions(+), 38 deletions(-)
diff --git a/drivers/clocksource/Kconfig b/drivers/clocksource/Kconfig index b58d259..a63bf12 100644 --- a/drivers/clocksource/Kconfig +++ b/drivers/clocksource/Kconfig @@ -8,6 +8,7 @@ config CLKSRC_OF config CLKSRC_ACPI bool select CLKSRC_PROBE + select ACPI_GTDT if ARM64
config CLKSRC_PROBE bool diff --git a/drivers/clocksource/arm_arch_timer.c b/drivers/clocksource/arm_arch_timer.c index 84be023..c7b0040 100644 --- a/drivers/clocksource/arm_arch_timer.c +++ b/drivers/clocksource/arm_arch_timer.c @@ -887,61 +887,35 @@ out: CLOCKSOURCE_OF_DECLARE(armv7_arch_timer_mem, "arm,armv7-timer-mem", arch_timer_mem_init);
-#ifdef CONFIG_ACPI -static int __init map_generic_timer_interrupt(u32 interrupt, u32 flags) -{ - int trigger, polarity; - - if (!interrupt) - return 0; - - trigger = (flags & ACPI_GTDT_INTERRUPT_MODE) ? ACPI_EDGE_SENSITIVE - : ACPI_LEVEL_SENSITIVE; - - polarity = (flags & ACPI_GTDT_INTERRUPT_POLARITY) ? ACPI_ACTIVE_LOW - : ACPI_ACTIVE_HIGH; - - return acpi_register_gsi(NULL, interrupt, trigger, polarity); -} - +#ifdef CONFIG_ACPI_GTDT /* Initialize per-processor generic timer */ static int __init arch_timer_acpi_init(struct acpi_table_header *table) { - struct acpi_table_gtdt *gtdt; + int timer_count;
if (arch_timers_present & ARCH_CP15_TIMER) { pr_warn("already initialized, skipping\n"); return -EINVAL; }
- gtdt = container_of(table, struct acpi_table_gtdt, header); - arch_timers_present |= ARCH_CP15_TIMER;
- arch_timer_ppi[PHYS_SECURE_PPI] = - map_generic_timer_interrupt(gtdt->secure_el1_interrupt, - gtdt->secure_el1_flags); - - arch_timer_ppi[PHYS_NONSECURE_PPI] = - map_generic_timer_interrupt(gtdt->non_secure_el1_interrupt, - gtdt->non_secure_el1_flags); + timer_count = acpi_gtdt_init(table);
- arch_timer_ppi[VIRT_PPI] = - map_generic_timer_interrupt(gtdt->virtual_timer_interrupt, - gtdt->virtual_timer_flags); - - arch_timer_ppi[HYP_PPI] = - map_generic_timer_interrupt(gtdt->non_secure_el2_interrupt, - gtdt->non_secure_el2_flags); + arch_timer_ppi[PHYS_SECURE_PPI] = acpi_gtdt_map_ppi(PHYS_SECURE_PPI); + arch_timer_ppi[PHYS_NONSECURE_PPI] = acpi_gtdt_map_ppi(PHYS_NONSECURE_PPI); + arch_timer_ppi[VIRT_PPI] = acpi_gtdt_map_ppi(VIRT_PPI); + arch_timer_ppi[HYP_PPI] = acpi_gtdt_map_ppi(HYP_PPI); + /* Always-on capability */ + arch_timer_c3stop = acpi_gtdt_c3stop();
/* Get the frequency from CNTFRQ */ arch_timer_detect_rate(NULL, NULL);
- /* Always-on capability */ - arch_timer_c3stop = !(gtdt->non_secure_el1_flags & ACPI_GTDT_ALWAYS_ON); + if (timer_count < 0) + pr_err("Failed to get platform timer info.\n");
- arch_timer_init(); - return 0; + return arch_timer_init(); } CLOCKSOURCE_ACPI_DECLARE(arch_timer, ACPI_SIG_GTDT, arch_timer_acpi_init); #endif
On Thu, Sep 29, 2016 at 02:17:13AM +0800, fu.wei@linaro.org wrote:
From: Fu Wei fu.wei@linaro.org
The patch update arm_arch_timer driver to use the function provided by the new GTDT driver of ACPI. By this way, arm_arch_timer.c can be simplified, and separate all the ACPI GTDT knowledge from this timer driver.
Signed-off-by: Fu Wei fu.wei@linaro.org Signed-off-by: Hanjun Guo hanjun.guo@linaro.org
This generally looks fine, but:
- arch_timer_ppi[PHYS_SECURE_PPI] = acpi_gtdt_map_ppi(PHYS_SECURE_PPI);
As mentioned on the prior patch, I think we shouldn't bother parsing the secure interrupt, given the problem with the GSIV, and the fact that we shouldn't need it in Linux.
- arch_timer_ppi[PHYS_NONSECURE_PPI] = acpi_gtdt_map_ppi(PHYS_NONSECURE_PPI);
- arch_timer_ppi[VIRT_PPI] = acpi_gtdt_map_ppi(VIRT_PPI);
- arch_timer_ppi[HYP_PPI] = acpi_gtdt_map_ppi(HYP_PPI);
- /* Always-on capability */
- arch_timer_c3stop = acpi_gtdt_c3stop();
... I think we should check the flag on the relevant interrupt, though that's worth clarifying.
- /* Always-on capability */
- arch_timer_c3stop = !(gtdt->non_secure_el1_flags & ACPI_GTDT_ALWAYS_ON);
- if (timer_count < 0)
pr_err("Failed to get platform timer info.\n");
Why don't we log this in the code that would try to initialise the MMIO timer? We can still fail after this.
Thanks, Mark.
On Thu, Oct 20, 2016 at 05:58:17PM +0100, Mark Rutland wrote:
On Thu, Sep 29, 2016 at 02:17:13AM +0800, fu.wei@linaro.org wrote:
- arch_timer_ppi[PHYS_NONSECURE_PPI] = acpi_gtdt_map_ppi(PHYS_NONSECURE_PPI);
- arch_timer_ppi[VIRT_PPI] = acpi_gtdt_map_ppi(VIRT_PPI);
- arch_timer_ppi[HYP_PPI] = acpi_gtdt_map_ppi(HYP_PPI);
- /* Always-on capability */
- arch_timer_c3stop = acpi_gtdt_c3stop();
... I think we should check the flag on the relevant interrupt, though that's worth clarifying.
I see I misread the spec; this is part of the common flags.
Please ignore this point; sorry for the noise.
Thanks, Mark.
On Fri, Oct 21, 2016 at 12:14:01PM +0100, Mark Rutland wrote:
On Thu, Oct 20, 2016 at 05:58:17PM +0100, Mark Rutland wrote:
On Thu, Sep 29, 2016 at 02:17:13AM +0800, fu.wei@linaro.org wrote:
- arch_timer_ppi[PHYS_NONSECURE_PPI] = acpi_gtdt_map_ppi(PHYS_NONSECURE_PPI);
- arch_timer_ppi[VIRT_PPI] = acpi_gtdt_map_ppi(VIRT_PPI);
- arch_timer_ppi[HYP_PPI] = acpi_gtdt_map_ppi(HYP_PPI);
- /* Always-on capability */
- arch_timer_c3stop = acpi_gtdt_c3stop();
... I think we should check the flag on the relevant interrupt, though that's worth clarifying.
I see I misread the spec; this is part of the common flags.
Please ignore this point; sorry for the noise.
Actually, I misread the spec this time around; the flag *can* differ per interrupt for the sysreg/cp15 timer, but not for the MMIO timers where the flag is in a common field.
So please *do* consider the above.
Thanks, Mark.
Hi Mark,
On 21 October 2016 at 19:21, Mark Rutland mark.rutland@arm.com wrote:
On Fri, Oct 21, 2016 at 12:14:01PM +0100, Mark Rutland wrote:
On Thu, Oct 20, 2016 at 05:58:17PM +0100, Mark Rutland wrote:
On Thu, Sep 29, 2016 at 02:17:13AM +0800, fu.wei@linaro.org wrote:
- arch_timer_ppi[PHYS_NONSECURE_PPI] = acpi_gtdt_map_ppi(PHYS_NONSECURE_PPI);
- arch_timer_ppi[VIRT_PPI] = acpi_gtdt_map_ppi(VIRT_PPI);
- arch_timer_ppi[HYP_PPI] = acpi_gtdt_map_ppi(HYP_PPI);
- /* Always-on capability */
- arch_timer_c3stop = acpi_gtdt_c3stop();
... I think we should check the flag on the relevant interrupt, though that's worth clarifying.
I see I misread the spec; this is part of the common flags.
Please ignore this point; sorry for the noise.
Actually, I misread the spec this time around; the flag *can* differ per interrupt for the sysreg/cp15 timer, but not for the MMIO timers where the flag is in a common field.
So please *do* consider the above.
yes , you are right , will do Thanks :-)
Thanks, Mark.
On 10/21/2016 07:21 PM, Mark Rutland wrote:
On Fri, Oct 21, 2016 at 12:14:01PM +0100, Mark Rutland wrote:
On Thu, Oct 20, 2016 at 05:58:17PM +0100, Mark Rutland wrote:
On Thu, Sep 29, 2016 at 02:17:13AM +0800, fu.wei@linaro.org wrote:
- arch_timer_ppi[PHYS_NONSECURE_PPI] = acpi_gtdt_map_ppi(PHYS_NONSECURE_PPI);
- arch_timer_ppi[VIRT_PPI] = acpi_gtdt_map_ppi(VIRT_PPI);
- arch_timer_ppi[HYP_PPI] = acpi_gtdt_map_ppi(HYP_PPI);
- /* Always-on capability */
- arch_timer_c3stop = acpi_gtdt_c3stop();
... I think we should check the flag on the relevant interrupt, though that's worth clarifying.
I see I misread the spec; this is part of the common flags.
Please ignore this point; sorry for the noise.
Actually, I misread the spec this time around; the flag *can* differ per interrupt for the sysreg/cp15 timer, but not for the MMIO timers where the flag is in a common field.
So please *do* consider the above.
Sorry, misread the email as well...
Check the spec again and it's per interrupt flag.
Thanks Hanjun
From: Fu Wei fu.wei@linaro.org
On platforms booting with ACPI, architected memory-mapped timers' configuration data is provided by firmware through the ACPI GTDT static table.
The clocksource architected timer kernel driver requires a firmware interface to collect timer configuration and configure its driver. this infrastructure is present for device tree systems, but it is missing on systems booting with ACPI.
Implement the kernel infrastructure required to parse the static ACPI GTDT table so that the architected timer clocksource driver can make use of it on systems booting with ACPI, therefore enabling the corresponding timers configuration.
Signed-off-by: Fu Wei fu.wei@linaro.org Signed-off-by: Hanjun Guo hanjun.guo@linaro.org --- drivers/acpi/arm64/gtdt.c | 70 ++++++++++++++++++++++++++++++++++++ include/clocksource/arm_arch_timer.h | 15 ++++++++ include/linux/acpi.h | 1 + 3 files changed, 86 insertions(+)
diff --git a/drivers/acpi/arm64/gtdt.c b/drivers/acpi/arm64/gtdt.c index b24844d..b6021db 100644 --- a/drivers/acpi/arm64/gtdt.c +++ b/drivers/acpi/arm64/gtdt.c @@ -150,3 +150,73 @@ int __init acpi_gtdt_init(struct acpi_table_header *table)
return gtdt->platform_timer_count; } + +static int __init gtdt_parse_gt_block(struct acpi_gtdt_timer_block *block, + struct gt_block_data *data) +{ + struct acpi_gtdt_timer_entry *frame; + int i; + + if (!block || !data) + return -EINVAL; + + if (!block->block_address || !block->timer_count) + return -EINVAL; + + data->cntctlbase_phy = (phys_addr_t)block->block_address; + data->timer_count = block->timer_count; + + frame = (void *)block + block->timer_offset; + if (frame + block->timer_count != (void *)block + block->header.length) + return -EINVAL; + + /* + * Get the GT timer Frame data for every GT Block Timer + */ + for (i = 0; i < block->timer_count; i++, frame++) { + if (!frame->base_address || !frame->timer_interrupt) + return -EINVAL; + + data->timer[i].irq = map_gt_gsi(frame->timer_interrupt, + frame->timer_flags); + if (data->timer[i].irq <= 0) + return -EINVAL; + + if (frame->virtual_timer_interrupt) { + data->timer[i].virtual_irq = + map_gt_gsi(frame->virtual_timer_interrupt, + frame->virtual_timer_flags); + if (data->timer[i].virtual_irq <= 0) + return -EINVAL; + } + + data->timer[i].frame_nr = frame->frame_number; + data->timer[i].cntbase_phy = frame->base_address; + } + + return 0; +} + +/* + * Get the GT block info for memory-mapped timer from GTDT table. + */ +int __init gtdt_arch_timer_mem_init(struct gt_block_data *data) +{ + void *platform_timer; + int index = 0; + int ret; + + for_each_platform_timer(platform_timer) { + if (!is_timer_block(platform_timer)) + continue; + ret = gtdt_parse_gt_block(platform_timer, data + index); + if (ret) + return ret; + index++; + } + + if (index) + pr_info("found %d memory-mapped timer block(s).\n", index); + + return index; +} diff --git a/include/clocksource/arm_arch_timer.h b/include/clocksource/arm_arch_timer.h index 16dcd10..94a5d14 100644 --- a/include/clocksource/arm_arch_timer.h +++ b/include/clocksource/arm_arch_timer.h @@ -56,6 +56,8 @@ enum spi_nr { #define ARCH_TIMER_MEM_PHYS_ACCESS 2 #define ARCH_TIMER_MEM_VIRT_ACCESS 3
+#define ARCH_TIMER_MEM_MAX_FRAME 8 + #define ARCH_TIMER_USR_PCT_ACCESS_EN (1 << 0) /* physical counter */ #define ARCH_TIMER_USR_VCT_ACCESS_EN (1 << 1) /* virtual counter */ #define ARCH_TIMER_VIRT_EVT_EN (1 << 2) @@ -71,6 +73,19 @@ struct arch_timer_kvm_info { int virtual_irq; };
+struct gt_timer_data { + int frame_nr; + phys_addr_t cntbase_phy; + int irq; + int virtual_irq; +}; + +struct gt_block_data { + phys_addr_t cntctlbase_phy; + int timer_count; + struct gt_timer_data timer[ARCH_TIMER_MEM_MAX_FRAME]; +}; + #ifdef CONFIG_ARM_ARCH_TIMER
extern u32 arch_timer_get_rate(void); diff --git a/include/linux/acpi.h b/include/linux/acpi.h index e2f9841..5dc0b85 100644 --- a/include/linux/acpi.h +++ b/include/linux/acpi.h @@ -571,6 +571,7 @@ int acpi_reconfig_notifier_unregister(struct notifier_block *nb); int acpi_gtdt_init(struct acpi_table_header *table); int acpi_gtdt_map_ppi(int type); bool acpi_gtdt_c3stop(void); +int gtdt_arch_timer_mem_init(struct gt_block_data *data); #endif
#else /* !CONFIG_ACPI */
On Thu, Sep 29, 2016 at 02:17:14AM +0800, fu.wei@linaro.org wrote:
From: Fu Wei fu.wei@linaro.org
On platforms booting with ACPI, architected memory-mapped timers' configuration data is provided by firmware through the ACPI GTDT static table.
The clocksource architected timer kernel driver requires a firmware interface to collect timer configuration and configure its driver. this infrastructure is present for device tree systems, but it is missing on systems booting with ACPI.
Implement the kernel infrastructure required to parse the static ACPI GTDT table so that the architected timer clocksource driver can make use of it on systems booting with ACPI, therefore enabling the corresponding timers configuration.
Signed-off-by: Fu Wei fu.wei@linaro.org Signed-off-by: Hanjun Guo hanjun.guo@linaro.org
drivers/acpi/arm64/gtdt.c | 70 ++++++++++++++++++++++++++++++++++++ include/clocksource/arm_arch_timer.h | 15 ++++++++ include/linux/acpi.h | 1 + 3 files changed, 86 insertions(+)
diff --git a/drivers/acpi/arm64/gtdt.c b/drivers/acpi/arm64/gtdt.c index b24844d..b6021db 100644 --- a/drivers/acpi/arm64/gtdt.c +++ b/drivers/acpi/arm64/gtdt.c @@ -150,3 +150,73 @@ int __init acpi_gtdt_init(struct acpi_table_header *table) return gtdt->platform_timer_count; }
+static int __init gtdt_parse_gt_block(struct acpi_gtdt_timer_block *block,
struct gt_block_data *data)+{
- struct acpi_gtdt_timer_entry *frame;
- int i;
- if (!block || !data)
return -EINVAL;
As far as I can see, the !block case cannot happen; if it can, we'd already have derferenced it with the is_timer_block() check in gtdt_arch_timer_mem_init().
Why do we not handle the !data check in gtdt_arch_timer_mem_init()? It seems fragile, given we add an index there...
- if (!block->block_address || !block->timer_count)
return -EINVAL;
Looking at Table 5-120 in the ACPI 6.1 spec, zero is not called out as an invalid physical address for the block...
Surely if you don't have an MMIO timer, you don't have a GT Block Structure, rather than an invalid one!?
The block->timer_count check should be more thorough, e.g.
if (!block->timer_count) { pr_warn("GTDT present, but frame count is zero"); return -ENODEV: }
if (block->timer_count > 8) { pr_warn(FW_BUG "GTDT lists %d frames, ACPI spec only allows 8\n", block->timer_count); }
... note that without the latter we could go off the end of the array...
- data->cntctlbase_phy = (phys_addr_t)block->block_address;
- data->timer_count = block->timer_count;
- frame = (void *)block + block->timer_offset;
- if (frame + block->timer_count != (void *)block + block->header.length)
return -EINVAL;- /*
* Get the GT timer Frame data for every GT Block Timer*/- for (i = 0; i < block->timer_count; i++, frame++) {
if (!frame->base_address || !frame->timer_interrupt)return -EINVAL;data->timer[i].irq = map_gt_gsi(frame->timer_interrupt,frame->timer_flags);if (data->timer[i].irq <= 0)return -EINVAL;
Can we please print something describing the failure, e.g.
pr_warn("failed to map GTDT frame %d, physical timer interrupt\n", i);
if (frame->virtual_timer_interrupt) {
Same comment as previously about GSIV zero being valid; this is arguably a spec bug that should be reported...
data->timer[i].virtual_irq =map_gt_gsi(frame->virtual_timer_interrupt,frame->virtual_timer_flags);if (data->timer[i].virtual_irq <= 0)return -EINVAL;
Likewise, a message here would be useful, e.g.
pr_warn("failed to map GTDT frame %d, virtual timer interrupt\n", i);
}data->timer[i].frame_nr = frame->frame_number;data->timer[i].cntbase_phy = frame->base_address;
What about CntEL0BaseX?
- }
- return 0;
+}
+/*
- Get the GT block info for memory-mapped timer from GTDT table.
- */
+int __init gtdt_arch_timer_mem_init(struct gt_block_data *data) +{
- void *platform_timer;
- int index = 0;
- int ret;
- for_each_platform_timer(platform_timer) {
if (!is_timer_block(platform_timer))continue;ret = gtdt_parse_gt_block(platform_timer, data + index);if (ret)return ret;index++;- }
- if (index)
pr_info("found %d memory-mapped timer block(s).\n", index);- return index;
+} diff --git a/include/clocksource/arm_arch_timer.h b/include/clocksource/arm_arch_timer.h index 16dcd10..94a5d14 100644 --- a/include/clocksource/arm_arch_timer.h +++ b/include/clocksource/arm_arch_timer.h @@ -56,6 +56,8 @@ enum spi_nr { #define ARCH_TIMER_MEM_PHYS_ACCESS 2 #define ARCH_TIMER_MEM_VIRT_ACCESS 3 +#define ARCH_TIMER_MEM_MAX_FRAME 8
Nit: please call this ARCH_TIMER_MEM_MAX_FRAMES, so it's clear that the maximum index is 7.
#define ARCH_TIMER_USR_PCT_ACCESS_EN (1 << 0) /* physical counter */ #define ARCH_TIMER_USR_VCT_ACCESS_EN (1 << 1) /* virtual counter */ #define ARCH_TIMER_VIRT_EVT_EN (1 << 2) @@ -71,6 +73,19 @@ struct arch_timer_kvm_info { int virtual_irq; }; +struct gt_timer_data {
s/gt_timer_data/arch_timer_mem_frame/
- int frame_nr;
- phys_addr_t cntbase_phy;
Please get rid of the '_phy' suffix; it clashes with other terminology, 'phys' is generally preferable, and given the name and type it's obvious that it's a physical address anyhow.
Just call this 'cntbase'.
- int irq;
- int virtual_irq;
Call these phys_irq and virt_irq.
+};
+struct gt_block_data {
s/gt_block_data/arch_timer_mem/
- phys_addr_t cntctlbase_phy;
Same comment w.r.t. the '_phy' suffix. Likewise, just call this 'cntctlbase_phy'
- int timer_count;
s/timer_count/num_frames/
- struct gt_timer_data timer[ARCH_TIMER_MEM_MAX_FRAME];
+};
Please split this part out into a patch which moves the existing driver over to this new abstraction, *then* introduce the ACPI parser for it in a subsequent patch.
Thanks, Mark.
From: Fu Wei fu.wei@linaro.org
The patch refactor original memory-mapped timer init code: (1) extract some subfunction for reusing some common code a. get_cnttidr b. is_best_frame (2) move base address and irq code for arch_timer_mem to arch_timer_mem_register
Signed-off-by: Fu Wei fu.wei@linaro.org --- drivers/clocksource/arm_arch_timer.c | 159 +++++++++++++++++++++-------------- 1 file changed, 96 insertions(+), 63 deletions(-)
diff --git a/drivers/clocksource/arm_arch_timer.c b/drivers/clocksource/arm_arch_timer.c index c7b0040..e78095f 100644 --- a/drivers/clocksource/arm_arch_timer.c +++ b/drivers/clocksource/arm_arch_timer.c @@ -57,6 +57,7 @@ static unsigned arch_timers_present __initdata;
static void __iomem *arch_counter_base; +static void __iomem *cntctlbase __initdata;
struct arch_timer { void __iomem *base; @@ -656,15 +657,49 @@ out: return err; }
-static int __init arch_timer_mem_register(void __iomem *base, unsigned int irq) +static int __init arch_timer_mem_register(struct device_node *np, void *frame) { - int ret; - irq_handler_t func; + struct device_node *frame_node = NULL; struct arch_timer *t; + void __iomem *base; + irq_handler_t func; + unsigned int irq; + int ret; + + if (!frame) + return -EINVAL; + + if (np) { + frame_node = (struct device_node *)frame; + base = of_iomap(frame_node, 0); + arch_timer_detect_rate(base, np); + if (arch_timer_mem_use_virtual) + irq = irq_of_parse_and_map(frame_node, VIRT_SPI); + else + irq = irq_of_parse_and_map(frame_node, PHYS_SPI); + } else { + pr_err("Device node is missing.\n"); + return -EINVAL; + } + + if (!base) { + pr_err("Can't map frame's registers\n"); + return -ENXIO; + } + if (!irq) { + pr_err("Frame missing %s irq", + arch_timer_mem_use_virtual ? "virt" : "phys"); + ret = -EINVAL; + goto out; + } + + arch_counter_base = base;
t = kzalloc(sizeof(*t), GFP_KERNEL); - if (!t) - return -ENOMEM; + if (!t) { + ret = -ENOMEM; + goto out; + }
t->base = base; t->evt.irq = irq; @@ -676,11 +711,13 @@ static int __init arch_timer_mem_register(void __iomem *base, unsigned int irq) func = arch_timer_handler_phys_mem;
ret = request_irq(irq, func, IRQF_TIMER, "arch_mem_timer", &t->evt); - if (ret) { - pr_err("Failed to request mem timer irq\n"); - kfree(t); - } + if (!ret) + return 0;
+ pr_err("Failed to request mem timer irq\n"); + kfree(t); +out: + iounmap(base); return ret; }
@@ -803,21 +840,54 @@ static int __init arch_timer_of_init(struct device_node *np) CLOCKSOURCE_OF_DECLARE(armv7_arch_timer, "arm,armv7-timer", arch_timer_of_init); CLOCKSOURCE_OF_DECLARE(armv8_arch_timer, "arm,armv8-timer", arch_timer_of_init);
-static int __init arch_timer_mem_init(struct device_node *np) +static int __init get_cnttidr(struct device_node *np, u32 *cnttidr) { - struct device_node *frame, *best_frame = NULL; - void __iomem *cntctlbase, *base; - unsigned int irq, ret = -EINVAL; - u32 cnttidr; + if (!cnttidr) + return -EINVAL; + + if (np) + cntctlbase = of_iomap(np, 0); + else + return -EINVAL;
- arch_timers_present |= ARCH_MEM_TIMER; - cntctlbase = of_iomap(np, 0); if (!cntctlbase) { pr_err("Can't find CNTCTLBase\n"); return -ENXIO; }
- cnttidr = readl_relaxed(cntctlbase + CNTTIDR); + *cnttidr = readl_relaxed(cntctlbase + CNTTIDR); + return 0; +} + +static bool __init is_best_frame(u32 cnttidr, int n) +{ + u32 cntacr = CNTACR_RFRQ | CNTACR_RWPT | CNTACR_RPCT | CNTACR_RWVT | + CNTACR_RVOFF | CNTACR_RVCT; + + /* Try enabling everything, and see what sticks */ + writel_relaxed(cntacr, cntctlbase + CNTACR(n)); + cntacr = readl_relaxed(cntctlbase + CNTACR(n)); + + if ((cnttidr & CNTTIDR_VIRT(n)) && + !(~cntacr & (CNTACR_RWVT | CNTACR_RVCT))) + arch_timer_mem_use_virtual = true; + else if (~cntacr & (CNTACR_RWPT | CNTACR_RPCT)) + return false; + + return true; +} + +static int __init arch_timer_mem_init(struct device_node *np) +{ + struct device_node *frame, *best_frame = NULL; + unsigned int ret; + u32 cnttidr; + + arch_timers_present |= ARCH_MEM_TIMER; + + ret = get_cnttidr(np, &cnttidr); + if (ret) + return ret;
/* * Try to find a virtual capable frame. Otherwise fall back to a @@ -825,60 +895,23 @@ static int __init arch_timer_mem_init(struct device_node *np) */ for_each_available_child_of_node(np, frame) { int n; - u32 cntacr; - if (of_property_read_u32(frame, "frame-number", &n)) { - pr_err("Missing frame-number\n"); + pr_err("Missing frame-number.\n"); of_node_put(frame); + ret = -EINVAL; goto out; } - - /* Try enabling everything, and see what sticks */ - cntacr = CNTACR_RFRQ | CNTACR_RWPT | CNTACR_RPCT | - CNTACR_RWVT | CNTACR_RVOFF | CNTACR_RVCT; - writel_relaxed(cntacr, cntctlbase + CNTACR(n)); - cntacr = readl_relaxed(cntctlbase + CNTACR(n)); - - if ((cnttidr & CNTTIDR_VIRT(n)) && - !(~cntacr & (CNTACR_RWVT | CNTACR_RVCT))) { + if (is_best_frame(cnttidr, n)) { of_node_put(best_frame); - best_frame = frame; - arch_timer_mem_use_virtual = true; - break; + best_frame = of_node_get(frame); + if (arch_timer_mem_use_virtual) + break; } - - if (~cntacr & (CNTACR_RWPT | CNTACR_RPCT)) - continue; - - of_node_put(best_frame); - best_frame = of_node_get(frame); - } - - ret= -ENXIO; - base = arch_counter_base = of_iomap(best_frame, 0); - if (!base) { - pr_err("Can't map frame's registers\n"); - goto out; }
- if (arch_timer_mem_use_virtual) - irq = irq_of_parse_and_map(best_frame, VIRT_SPI); - else - irq = irq_of_parse_and_map(best_frame, PHYS_SPI); - - ret = -EINVAL; - if (!irq) { - pr_err("Frame missing %s irq", - arch_timer_mem_use_virtual ? "virt" : "phys"); - goto out; - } - - arch_timer_detect_rate(base, np); - ret = arch_timer_mem_register(base, irq); - if (ret) - goto out; - - return arch_timer_common_init(); + ret = arch_timer_mem_register(np, best_frame); + if (!ret) + ret = arch_timer_common_init(); out: iounmap(cntctlbase); of_node_put(best_frame);
On Thu, Sep 29, 2016 at 02:17:15AM +0800, fu.wei@linaro.org wrote:
From: Fu Wei fu.wei@linaro.org
The patch refactor original memory-mapped timer init code: (1) extract some subfunction for reusing some common code a. get_cnttidr b. is_best_frame (2) move base address and irq code for arch_timer_mem to arch_timer_mem_register
Signed-off-by: Fu Wei fu.wei@linaro.org
drivers/clocksource/arm_arch_timer.c | 159 +++++++++++++++++++++-------------- 1 file changed, 96 insertions(+), 63 deletions(-)
diff --git a/drivers/clocksource/arm_arch_timer.c b/drivers/clocksource/arm_arch_timer.c index c7b0040..e78095f 100644 --- a/drivers/clocksource/arm_arch_timer.c +++ b/drivers/clocksource/arm_arch_timer.c @@ -57,6 +57,7 @@ static unsigned arch_timers_present __initdata; static void __iomem *arch_counter_base; +static void __iomem *cntctlbase __initdata; struct arch_timer { void __iomem *base; @@ -656,15 +657,49 @@ out: return err; } -static int __init arch_timer_mem_register(void __iomem *base, unsigned int irq) +static int __init arch_timer_mem_register(struct device_node *np, void *frame) {
- int ret;
- irq_handler_t func;
- struct device_node *frame_node = NULL; struct arch_timer *t;
- void __iomem *base;
- irq_handler_t func;
- unsigned int irq;
- int ret;
- if (!frame)
return -EINVAL;
Why would we call this without a frame?
- if (np) {
... or without a node?
frame_node = (struct device_node *)frame;base = of_iomap(frame_node, 0);arch_timer_detect_rate(base, np);
... BANG! (we check base too late, below).
Please as Marc requested several versions ago: split the FW parsing (ACPI and DT) so that happens first, *then* once we have the data in a common format, use that to drive poking the HW, requesting IRQs, etc, completely independent of the source.
In patches, do this by:
(1) adding the data structures (2) splitting the existing DT probing to use them (3) Adding ACPI functionality atop
-static int __init arch_timer_mem_init(struct device_node *np) +static int __init get_cnttidr(struct device_node *np, u32 *cnttidr) {
- struct device_node *frame, *best_frame = NULL;
- void __iomem *cntctlbase, *base;
- unsigned int irq, ret = -EINVAL;
- u32 cnttidr;
- if (!cnttidr)
return -EINVAL;- if (np)
cntctlbase = of_iomap(np, 0);- else
return -EINVAL;
We want to check this for ACPI too, no?
Thanks, Mark.
Hi Mark,
On 21 October 2016 at 19:32, Mark Rutland mark.rutland@arm.com wrote:
On Thu, Sep 29, 2016 at 02:17:15AM +0800, fu.wei@linaro.org wrote:
From: Fu Wei fu.wei@linaro.org
The patch refactor original memory-mapped timer init code: (1) extract some subfunction for reusing some common code a. get_cnttidr b. is_best_frame (2) move base address and irq code for arch_timer_mem to arch_timer_mem_register
Signed-off-by: Fu Wei fu.wei@linaro.org
drivers/clocksource/arm_arch_timer.c | 159 +++++++++++++++++++++-------------- 1 file changed, 96 insertions(+), 63 deletions(-)
diff --git a/drivers/clocksource/arm_arch_timer.c b/drivers/clocksource/arm_arch_timer.c index c7b0040..e78095f 100644 --- a/drivers/clocksource/arm_arch_timer.c +++ b/drivers/clocksource/arm_arch_timer.c @@ -57,6 +57,7 @@ static unsigned arch_timers_present __initdata;
static void __iomem *arch_counter_base; +static void __iomem *cntctlbase __initdata;
struct arch_timer { void __iomem *base; @@ -656,15 +657,49 @@ out: return err; }
-static int __init arch_timer_mem_register(void __iomem *base, unsigned int irq) +static int __init arch_timer_mem_register(struct device_node *np, void *frame) {
int ret;irq_handler_t func;
struct device_node *frame_node = NULL; struct arch_timer *t;void __iomem *base;irq_handler_t func;unsigned int irq;int ret;if (!frame)return -EINVAL;Why would we call this without a frame?
Sorry, I just verify it , make sure frame is not NULL, Because it is a "static" function, so we do need this check?
if (np) {... or without a node?
For "np", for now, we just just verify it, but it is just paperation for GTDT support, Because in next patch, if np == NULL, that means we call this function from GTDT, but not DT.
frame_node = (struct device_node *)frame;base = of_iomap(frame_node, 0);arch_timer_detect_rate(base, np);... BANG! (we check base too late, below).
Please as Marc requested several versions ago: split the FW parsing (ACPI and DT) so that happens first, *then* once we have the data in a common format, use that to drive poking the HW, requesting IRQs, etc, completely independent of the source.
In patches, do this by:
(1) adding the data structures (2) splitting the existing DT probing to use them (3) Adding ACPI functionality atop
this patch is a preparation for GTDT support, I have splitted some functions for reusing them in next patch(GTDT support)
if np == NULL, that means we call this function from GTDT, but if np != NULL, that means we call this function from DT
-static int __init arch_timer_mem_init(struct device_node *np) +static int __init get_cnttidr(struct device_node *np, u32 *cnttidr) {
struct device_node *frame, *best_frame = NULL;void __iomem *cntctlbase, *base;unsigned int irq, ret = -EINVAL;u32 cnttidr;
if (!cnttidr)return -EINVAL;if (np)cntctlbase = of_iomap(np, 0);elsereturn -EINVAL;We want to check this for ACPI too, no?
just like I said above, this is a preparation for GTDT support,
So please correct me if I am doing this in the wrong way, thanks :-)
Thanks, Mark.
On Wed, Oct 26, 2016 at 11:24:32PM +0800, Fu Wei wrote:
On 21 October 2016 at 19:32, Mark Rutland mark.rutland@arm.com wrote:
On Thu, Sep 29, 2016 at 02:17:15AM +0800, fu.wei@linaro.org wrote:
+static int __init arch_timer_mem_register(struct device_node *np, void *frame) {
int ret;irq_handler_t func;
struct device_node *frame_node = NULL; struct arch_timer *t;void __iomem *base;irq_handler_t func;unsigned int irq;int ret;if (!frame)return -EINVAL;Why would we call this without a frame?
Sorry, I just verify it , make sure frame is not NULL, Because it is a "static" function, so we do need this check?
I'd rather we simply don't call the function rather than passing a NULL frame in.
if (np) {... or without a node?
For "np", for now, we just just verify it, but it is just paperation for GTDT support, Because in next patch, if np == NULL, that means we call this function from GTDT, but not DT.
Please don't do that. More on that below.
Please as Marc requested several versions ago: split the FW parsing (ACPI and DT) so that happens first, *then* once we have the data in a common format, use that to drive poking the HW, requesting IRQs, etc, completely independent of the source.
In patches, do this by:
(1) adding the data structures (2) splitting the existing DT probing to use them (3) Adding ACPI functionality atop
this patch is a preparation for GTDT support, I have splitted some functions for reusing them in next patch(GTDT support)
if np == NULL, that means we call this function from GTDT, but if np != NULL, that means we call this function from DT
As above, please structure the patches such that that never happens.
We currently have:
+--------------------------+ | DT Parsing + Common code | +--------------------------+
Per (1 and 2) make this:
+------------+ +-------------+ | DT parsing |--(common structure)-->| Common code | +------------+ +-------------+
Then per (3) make this:
+------------+ | DT parsing |--(common structure)------+ +------------+ | v +-------------+ | Common code | +-------------+ ^ +--------------+ | | ACPI parsing |--(common structure)----+ +--------------+
Thanks, Mark.
Hi Mark,
On 26 October 2016 at 23:46, Mark Rutland mark.rutland@arm.com wrote:
On Wed, Oct 26, 2016 at 11:24:32PM +0800, Fu Wei wrote:
On 21 October 2016 at 19:32, Mark Rutland mark.rutland@arm.com wrote:
On Thu, Sep 29, 2016 at 02:17:15AM +0800, fu.wei@linaro.org wrote:
+static int __init arch_timer_mem_register(struct device_node *np, void *frame) {
int ret;irq_handler_t func;
struct device_node *frame_node = NULL; struct arch_timer *t;void __iomem *base;irq_handler_t func;unsigned int irq;int ret;if (!frame)return -EINVAL;Why would we call this without a frame?
Sorry, I just verify it , make sure frame is not NULL, Because it is a "static" function, so we do need this check?
I'd rather we simply don't call the function rather than passing a NULL frame in.
OK, NP, will do
if (np) {... or without a node?
For "np", for now, we just just verify it, but it is just paperation for GTDT support, Because in next patch, if np == NULL, that means we call this function from GTDT, but not DT.
Please don't do that. More on that below.
Please as Marc requested several versions ago: split the FW parsing (ACPI and DT) so that happens first, *then* once we have the data in a common format, use that to drive poking the HW, requesting IRQs, etc, completely independent of the source.
In patches, do this by:
(1) adding the data structures (2) splitting the existing DT probing to use them (3) Adding ACPI functionality atop
this patch is a preparation for GTDT support, I have splitted some functions for reusing them in next patch(GTDT support)
if np == NULL, that means we call this function from GTDT, but if np != NULL, that means we call this function from DT
As above, please structure the patches such that that never happens.
We currently have:
+--------------------------+ | DT Parsing + Common code | +--------------------------+
Per (1 and 2) make this:
+------------+ +-------------+ | DT parsing |--(common structure)-->| Common code | +------------+ +-------------+
Then per (3) make this:
+------------+ | DT parsing |--(common structure)------+ +------------+ | v +-------------+ | Common code | +-------------+ ^ +--------------+ | | ACPI parsing |--(common structure)----+
Thanks for your suggestion , I will do this way in my next patchset
Thanks :-)
+--------------+
Thanks, Mark.
From: Fu Wei fu.wei@linaro.org
The patch add memory-mapped timer register support by using the information provided by the new GTDT driver of ACPI.
Signed-off-by: Fu Wei fu.wei@linaro.org --- drivers/clocksource/arm_arch_timer.c | 92 +++++++++++++++++++++++++++++++++--- 1 file changed, 85 insertions(+), 7 deletions(-)
diff --git a/drivers/clocksource/arm_arch_timer.c b/drivers/clocksource/arm_arch_timer.c index e78095f..8482fba 100644 --- a/drivers/clocksource/arm_arch_timer.c +++ b/drivers/clocksource/arm_arch_timer.c @@ -660,6 +660,7 @@ out: static int __init arch_timer_mem_register(struct device_node *np, void *frame) { struct device_node *frame_node = NULL; + struct gt_timer_data *frame_data = NULL; struct arch_timer *t; void __iomem *base; irq_handler_t func; @@ -678,8 +679,17 @@ static int __init arch_timer_mem_register(struct device_node *np, void *frame) else irq = irq_of_parse_and_map(frame_node, PHYS_SPI); } else { - pr_err("Device node is missing.\n"); - return -EINVAL; + frame_data = (struct gt_timer_data *)frame; + /* + * According to ARMv8 Architecture Reference Manual(ARM), + * the size of CNTBaseN frames of memory-mapped timer + * is SZ_4K(Offset 0x000 – 0xFFF). + */ + base = ioremap(frame_data->cntbase_phy, SZ_4K); + if (arch_timer_mem_use_virtual) + irq = frame_data->virtual_irq; + else + irq = frame_data->irq; }
if (!base) { @@ -840,13 +850,16 @@ static int __init arch_timer_of_init(struct device_node *np) CLOCKSOURCE_OF_DECLARE(armv7_arch_timer, "arm,armv7-timer", arch_timer_of_init); CLOCKSOURCE_OF_DECLARE(armv8_arch_timer, "arm,armv8-timer", arch_timer_of_init);
-static int __init get_cnttidr(struct device_node *np, u32 *cnttidr) +static int __init get_cnttidr(struct device_node *np, + struct gt_block_data *gt_block, u32 *cnttidr) { if (!cnttidr) return -EINVAL;
if (np) cntctlbase = of_iomap(np, 0); + else if (gt_block) + cntctlbase = ioremap(gt_block->cntctlbase_phy, SZ_4K); else return -EINVAL;
@@ -885,7 +898,7 @@ static int __init arch_timer_mem_init(struct device_node *np)
arch_timers_present |= ARCH_MEM_TIMER;
- ret = get_cnttidr(np, &cnttidr); + ret = get_cnttidr(np, NULL, &cnttidr); if (ret) return ret;
@@ -921,7 +934,72 @@ CLOCKSOURCE_OF_DECLARE(armv7_arch_timer_mem, "arm,armv7-timer-mem", arch_timer_mem_init);
#ifdef CONFIG_ACPI_GTDT -/* Initialize per-processor generic timer */ +static struct gt_timer_data __init *arch_timer_mem_get_timer( + struct gt_block_data *gt_blocks) +{ + struct gt_block_data *gt_block = gt_blocks; + struct gt_timer_data *best_frame = NULL; + u32 cnttidr; + int i; + + if (get_cnttidr(NULL, gt_block, &cnttidr)) + return NULL; + /* + * Try to find a virtual capable frame. Otherwise fall back to a + * physical capable frame. + */ + for (i = 0; i < gt_block->timer_count; i++) { + if (is_best_frame(cnttidr, gt_block->timer[i].frame_nr)) { + best_frame = >_block->timer[i]; + if (arch_timer_mem_use_virtual) + break; + } + } + iounmap(cntctlbase); + + return best_frame; +} + +static int __init arch_timer_mem_acpi_init(size_t timer_count) +{ + struct gt_block_data *gt_blocks; + struct gt_timer_data *gt_timer; + int ret = -EINVAL; + + /* + * If we don't have any Platform Timer Structures, just return. + */ + if (!timer_count) + return 0; + + /* + * before really check all the Platform Timer Structures, + * we assume they are GT block, and allocate memory for them. + * We will free these memory once we finish the initialization. + */ + gt_blocks = kcalloc(timer_count, sizeof(*gt_blocks), GFP_KERNEL); + if (!gt_blocks) + return -ENOMEM; + + if (gtdt_arch_timer_mem_init(gt_blocks) > 0) { + gt_timer = arch_timer_mem_get_timer(gt_blocks); + if (!gt_timer) { + pr_err("Failed to get mem timer info.\n"); + goto error; + } + ret = arch_timer_mem_register(NULL, gt_timer); + if (ret) { + pr_err("Failed to register mem timer.\n"); + goto error; + } + } + arch_timers_present |= ARCH_MEM_TIMER; +error: + kfree(gt_blocks); + return ret; +} + +/* Initialize per-processor generic timer and memory-mapped timer(if present) */ static int __init arch_timer_acpi_init(struct acpi_table_header *table) { int timer_count; @@ -945,8 +1023,8 @@ static int __init arch_timer_acpi_init(struct acpi_table_header *table) /* Get the frequency from CNTFRQ */ arch_timer_detect_rate(NULL, NULL);
- if (timer_count < 0) - pr_err("Failed to get platform timer info.\n"); + if (timer_count < 0 || arch_timer_mem_acpi_init((size_t)timer_count)) + pr_err("Failed to initialize memory-mapped timer.\n");
return arch_timer_init(); }
From: Fu Wei fu.wei@linaro.org
This driver adds support for parsing SBSA Generic Watchdog timer in GTDT, parse all info in SBSA Generic Watchdog Structure in GTDT, and creating a platform device with that information.
This allows the operating system to obtain device data from the resource of platform device. The platform device named "sbsa-gwdt" can be used by the ARM SBSA Generic Watchdog driver.
Signed-off-by: Fu Wei fu.wei@linaro.org Signed-off-by: Hanjun Guo hanjun.guo@linaro.org --- drivers/acpi/arm64/gtdt.c | 87 +++++++++++++++++++++++++++++++++++++++++++++++ drivers/watchdog/Kconfig | 1 + 2 files changed, 88 insertions(+)
diff --git a/drivers/acpi/arm64/gtdt.c b/drivers/acpi/arm64/gtdt.c index b6021db..6d9fdd3 100644 --- a/drivers/acpi/arm64/gtdt.c +++ b/drivers/acpi/arm64/gtdt.c @@ -14,6 +14,7 @@ #include <linux/acpi.h> #include <linux/init.h> #include <linux/kernel.h> +#include <linux/platform_device.h>
#include <clocksource/arm_arch_timer.h>
@@ -220,3 +221,89 @@ int __init gtdt_arch_timer_mem_init(struct gt_block_data *data)
return index; } + +/* + * Initialize a SBSA generic Watchdog platform device info from GTDT + */ +static int __init gtdt_import_sbsa_gwdt(struct acpi_gtdt_watchdog *wd, + int index) +{ + struct platform_device *pdev; + int irq = map_gt_gsi(wd->timer_interrupt, wd->timer_flags); + int no_irq = 1; + + /* + * According to SBSA specification the size of refresh and control + * frames of SBSA Generic Watchdog is SZ_4K(Offset 0x000 – 0xFFF). + */ + struct resource res[] = { + DEFINE_RES_MEM(wd->control_frame_address, SZ_4K), + DEFINE_RES_MEM(wd->refresh_frame_address, SZ_4K), + DEFINE_RES_IRQ(irq), + }; + + pr_debug("found a Watchdog (0x%llx/0x%llx gsi:%u flags:0x%x).\n", + wd->refresh_frame_address, wd->control_frame_address, + wd->timer_interrupt, wd->timer_flags); + + if (!(wd->refresh_frame_address && wd->control_frame_address)) { + pr_err(FW_BUG "failed to get the Watchdog base address.\n"); + return -EINVAL; + } + + if (!wd->timer_interrupt) + pr_warn(FW_BUG "failed to get the Watchdog interrupt.\n"); + else if (irq <= 0) + pr_warn("failed to map the Watchdog interrupt.\n"); + else + no_irq = 0; + + /* + * Add a platform device named "sbsa-gwdt" to match the platform driver. + * "sbsa-gwdt": SBSA(Server Base System Architecture) Generic Watchdog + * The platform driver (like drivers/watchdog/sbsa_gwdt.c)can get device + * info below by matching this name. + */ + pdev = platform_device_register_simple("sbsa-gwdt", index, res, + ARRAY_SIZE(res) - no_irq); + if (IS_ERR(pdev)) { + acpi_unregister_gsi(wd->timer_interrupt); + return PTR_ERR(pdev); + } + + return 0; +} + +static int __init gtdt_sbsa_gwdt_init(void) +{ + struct acpi_table_header *table; + void *platform_timer; + int index = 0; + int ret; + + if (acpi_disabled) + return 0; + + if (ACPI_FAILURE(acpi_get_table(ACPI_SIG_GTDT, 0, &table))) + return -EINVAL; + + ret = acpi_gtdt_init(table); + if (ret <= 0) + return ret; + + for_each_platform_timer(platform_timer) { + if (!is_watchdog(platform_timer)) + continue; + ret = gtdt_import_sbsa_gwdt(platform_timer, index); + if (ret) + break; + index++; + } + + if (index) + pr_info("found %d SBSA generic Watchdog(s).\n", index); + + return ret; +} + +device_initcall(gtdt_sbsa_gwdt_init); diff --git a/drivers/watchdog/Kconfig b/drivers/watchdog/Kconfig index 1bffe00..341964a 100644 --- a/drivers/watchdog/Kconfig +++ b/drivers/watchdog/Kconfig @@ -205,6 +205,7 @@ config ARM_SBSA_WATCHDOG tristate "ARM SBSA Generic Watchdog" depends on ARM64 depends on ARM_ARCH_TIMER + depends on ACPI_GTDT || !ACPI select WATCHDOG_CORE help ARM SBSA Generic Watchdog has two stage timeouts:
for sbsa watchdog part, Tested-by: wangxiongfeng2@huawei.com on D05 board.
On 2016/9/29 2:17, fu.wei@linaro.org wrote:
From: Fu Wei fu.wei@linaro.org
This patchset: (1)Preparation for adding GTDT support in arm_arch_timer: 1. Move some enums and marcos to header file; 2. Add a new enum for spi type; 3. Improve printk relevant code.
(2)Introduce ACPI GTDT parser: drivers/acpi/arm64/acpi_gtdt.c Parse all kinds of timer in GTDT table of ACPI:arch timer, memory-mapped timer and SBSA Generic Watchdog timer. This driver can help to simplify all the relevant timer drivers, and separate all the ACPI GTDT knowledge from them. (3)Simplify ACPI code for arm_arch_timer (4)Add GTDT support for ARM memory-mapped timer, also refactor original memory-mapped timer dt support for reusing some common code.This patchset depends on the following patchset: [UPDATE PATCH V11 1/8] ACPI: I/O Remapping Table (IORT) initial support https://lkml.org/lkml/2016/9/12/949
This patchset has been tested on the following platforms: (1)ARM Foundation v8 model
Changelog: v14: https://lkml.org/lkml/2016/9/28/ Separate memory-mapped timer GTDT support into two patches 1. Refactor the timer init code to prepare for GTDT 2. Add GTDT support for memory-mapped timer
v13: http://www.mail-archive.com/linux-kernel@vger.kernel.org/msg1231717.html Improve arm_arch_timer code for memory-mapped timer GTDT support, refactor original memory-mapped timer dt support for reusing some common code.
v12: https://lkml.org/lkml/2016/9/13/250 Rebase to latest Linux 4.8-rc6 Delete the confusing "skipping" in the error message.
V11: https://lkml.org/lkml/2016/9/6/354 Rebase to latest Linux 4.8-rc5 Delete typedef (suggested by checkpatch.pl)
V10: https://lkml.org/lkml/2016/7/26/215 Drop the "readq" patch. Rebase to latest Linux 4.7.
V9: https://lkml.org/lkml/2016/7/25/345 Improve pr_err message in acpi gtdt driver. Update Commit message for 7/9 shorten the irq mapping function name Improve GTDT driver for memory-mapped timer
v8: https://lkml.org/lkml/2016/7/19/660 Improve "pr_fmt(fmt)" definition: add "ACPI" in front of "GTDT", and also improve printk message. Simplify is_timer_block and is_watchdog. Merge acpi_gtdt_desc_init and gtdt_arch_timer_init into acpi_gtdt_init(); Delete __init in include/linux/acpi.h for GTDT API Make ARM64 select GTDT. Delete "#include <linux/module.h>" from acpi_gtdt.c Simplify GT block parse code.
v7: https://lkml.org/lkml/2016/7/13/769 Move the GTDT driver to drivers/acpi/arm64 Add add the ARM64-specific ACPI Support maintainers in MAINTAINERS Merge 3 patches of GTDT parser driver. Fix the for_each_platform_timer bug.
v6: https://lkml.org/lkml/2016/6/29/580 split the GTDT driver to 4 parts: basic, arch_timer, memory-mapped timer, and SBSA Generic Watchdog timer Improve driver by suggestions and example code from Daniel Lezcano
v5: https://lkml.org/lkml/2016/5/24/356 Sorting out all patches, simplify the API of GTDT driver: GTDT driver just fills the data struct for arm_arch_timer driver.
v4: https://lists.linaro.org/pipermail/linaro-acpi/2016-March/006667.html Delete the kvm relevant patches Separate two patches for sorting out the code for arm_arch_timer. Improve irq info export code to allow missing irq info in GTDT table.
v3: https://lkml.org/lkml/2016/2/1/658 Improve GTDT driver code: (1)improve pr_* by defining pr_fmt(fmt) (2)simplify gtdt_sbsa_gwdt_init (3)improve gtdt_arch_timer_data_init, if table is NULL, it will try to get GTDT table. Move enum ppi_nr to arm_arch_timer.h, and add enum spi_nr. Add arm_arch_timer get ppi from DT and GTDT support for kvm.
v2: https://lkml.org/lkml/2015/12/2/10 Rebase to latest kernel version(4.4-rc3). Fix the bug about the config problem, use CONFIG_ACPI_GTDT instead of CONFIG_ACPI in arm_arch_timer.c
v1: The first upstreaming version: https://lkml.org/lkml/2015/10/28/553
Fu Wei (9): clocksource/drivers/arm_arch_timer: Move enums and defines to header file clocksource/drivers/arm_arch_timer: Add a new enum for spi type clocksource/drivers/arm_arch_timer: Improve printk relevant code acpi/arm64: Add GTDT table parse driver clocksource/drivers/arm_arch_timer: Simplify ACPI support code. acpi/arm64: Add memory-mapped timer support in GTDT driver clocksource/drivers/arm_arch_timer: Refactor the timer init code to prepare for GTDT clocksource/drivers/arm_arch_timer: Add GTDT support for memory-mapped timer acpi/arm64: Add SBSA Generic Watchdog support in GTDT driver
arch/arm64/Kconfig | 1 + drivers/acpi/arm64/Kconfig | 3 + drivers/acpi/arm64/Makefile | 1 + drivers/acpi/arm64/gtdt.c | 309 ++++++++++++++++++++++++++++++++ drivers/clocksource/Kconfig | 2 +- drivers/clocksource/arm_arch_timer.c | 331 +++++++++++++++++++++-------------- drivers/watchdog/Kconfig | 1 + include/clocksource/arm_arch_timer.h | 32 ++++ include/linux/acpi.h | 7 + 9 files changed, 558 insertions(+), 129 deletions(-) create mode 100644 drivers/acpi/arm64/gtdt.c
Hi Xiongfeng Wang,
On 30 September 2016 at 08:40, Xiongfeng Wang wangxiongfeng2@huawei.com wrote:
for sbsa watchdog part, Tested-by: wangxiongfeng2@huawei.com on D05 board.
Got it, thanks again for your help
On 2016/9/29 2:17, fu.wei@linaro.org wrote:
From: Fu Wei fu.wei@linaro.org
This patchset: (1)Preparation for adding GTDT support in arm_arch_timer: 1. Move some enums and marcos to header file; 2. Add a new enum for spi type; 3. Improve printk relevant code.
(2)Introduce ACPI GTDT parser: drivers/acpi/arm64/acpi_gtdt.c Parse all kinds of timer in GTDT table of ACPI:arch timer, memory-mapped timer and SBSA Generic Watchdog timer. This driver can help to simplify all the relevant timer drivers, and separate all the ACPI GTDT knowledge from them. (3)Simplify ACPI code for arm_arch_timer (4)Add GTDT support for ARM memory-mapped timer, also refactor original memory-mapped timer dt support for reusing some common code.This patchset depends on the following patchset: [UPDATE PATCH V11 1/8] ACPI: I/O Remapping Table (IORT) initial support https://lkml.org/lkml/2016/9/12/949
This patchset has been tested on the following platforms: (1)ARM Foundation v8 model
Changelog: v14: https://lkml.org/lkml/2016/9/28/ Separate memory-mapped timer GTDT support into two patches 1. Refactor the timer init code to prepare for GTDT 2. Add GTDT support for memory-mapped timer
v13: http://www.mail-archive.com/linux-kernel@vger.kernel.org/msg1231717.html Improve arm_arch_timer code for memory-mapped timer GTDT support, refactor original memory-mapped timer dt support for reusing some common code.
v12: https://lkml.org/lkml/2016/9/13/250 Rebase to latest Linux 4.8-rc6 Delete the confusing "skipping" in the error message.
V11: https://lkml.org/lkml/2016/9/6/354 Rebase to latest Linux 4.8-rc5 Delete typedef (suggested by checkpatch.pl)
V10: https://lkml.org/lkml/2016/7/26/215 Drop the "readq" patch. Rebase to latest Linux 4.7.
V9: https://lkml.org/lkml/2016/7/25/345 Improve pr_err message in acpi gtdt driver. Update Commit message for 7/9 shorten the irq mapping function name Improve GTDT driver for memory-mapped timer
v8: https://lkml.org/lkml/2016/7/19/660 Improve "pr_fmt(fmt)" definition: add "ACPI" in front of "GTDT", and also improve printk message. Simplify is_timer_block and is_watchdog. Merge acpi_gtdt_desc_init and gtdt_arch_timer_init into acpi_gtdt_init(); Delete __init in include/linux/acpi.h for GTDT API Make ARM64 select GTDT. Delete "#include <linux/module.h>" from acpi_gtdt.c Simplify GT block parse code.
v7: https://lkml.org/lkml/2016/7/13/769 Move the GTDT driver to drivers/acpi/arm64 Add add the ARM64-specific ACPI Support maintainers in MAINTAINERS Merge 3 patches of GTDT parser driver. Fix the for_each_platform_timer bug.
v6: https://lkml.org/lkml/2016/6/29/580 split the GTDT driver to 4 parts: basic, arch_timer, memory-mapped timer, and SBSA Generic Watchdog timer Improve driver by suggestions and example code from Daniel Lezcano
v5: https://lkml.org/lkml/2016/5/24/356 Sorting out all patches, simplify the API of GTDT driver: GTDT driver just fills the data struct for arm_arch_timer driver.
v4: https://lists.linaro.org/pipermail/linaro-acpi/2016-March/006667.html Delete the kvm relevant patches Separate two patches for sorting out the code for arm_arch_timer. Improve irq info export code to allow missing irq info in GTDT table.
v3: https://lkml.org/lkml/2016/2/1/658 Improve GTDT driver code: (1)improve pr_* by defining pr_fmt(fmt) (2)simplify gtdt_sbsa_gwdt_init (3)improve gtdt_arch_timer_data_init, if table is NULL, it will try to get GTDT table. Move enum ppi_nr to arm_arch_timer.h, and add enum spi_nr. Add arm_arch_timer get ppi from DT and GTDT support for kvm.
v2: https://lkml.org/lkml/2015/12/2/10 Rebase to latest kernel version(4.4-rc3). Fix the bug about the config problem, use CONFIG_ACPI_GTDT instead of CONFIG_ACPI in arm_arch_timer.c
v1: The first upstreaming version: https://lkml.org/lkml/2015/10/28/553
Fu Wei (9): clocksource/drivers/arm_arch_timer: Move enums and defines to header file clocksource/drivers/arm_arch_timer: Add a new enum for spi type clocksource/drivers/arm_arch_timer: Improve printk relevant code acpi/arm64: Add GTDT table parse driver clocksource/drivers/arm_arch_timer: Simplify ACPI support code. acpi/arm64: Add memory-mapped timer support in GTDT driver clocksource/drivers/arm_arch_timer: Refactor the timer init code to prepare for GTDT clocksource/drivers/arm_arch_timer: Add GTDT support for memory-mapped timer acpi/arm64: Add SBSA Generic Watchdog support in GTDT driver
arch/arm64/Kconfig | 1 + drivers/acpi/arm64/Kconfig | 3 + drivers/acpi/arm64/Makefile | 1 + drivers/acpi/arm64/gtdt.c | 309 ++++++++++++++++++++++++++++++++ drivers/clocksource/Kconfig | 2 +- drivers/clocksource/arm_arch_timer.c | 331 +++++++++++++++++++++-------------- drivers/watchdog/Kconfig | 1 + include/clocksource/arm_arch_timer.h | 32 ++++ include/linux/acpi.h | 7 + 9 files changed, 558 insertions(+), 129 deletions(-) create mode 100644 drivers/acpi/arm64/gtdt.c
Hi,
On Thu, Sep 29, 2016 at 02:17:08AM +0800, fu.wei@linaro.org wrote:
From: Fu Wei fu.wei@linaro.org
This patchset depends on the following patchset: [UPDATE PATCH V11 1/8] ACPI: I/O Remapping Table (IORT) initial support https://lkml.org/lkml/2016/9/12/949
Is there a branch with these anywhere? I wasn't Cc'd on those and it's rather difficult to get at the series from an LKML link.
Thanks, Mark.
On Thu, Oct 20, 2016 at 03:31:01PM +0100, Mark Rutland wrote:
Hi,
On Thu, Sep 29, 2016 at 02:17:08AM +0800, fu.wei@linaro.org wrote:
From: Fu Wei fu.wei@linaro.org
This patchset depends on the following patchset: [UPDATE PATCH V11 1/8] ACPI: I/O Remapping Table (IORT) initial support https://lkml.org/lkml/2016/9/12/949
Is there a branch with these anywhere? I wasn't Cc'd on those and it's rather difficult to get at the series from an LKML link.
For the records, the dependency above has now been merged and it was just a directory creation dependency (drivers/acpi/arm64, where some of the code in this series will live). So basically this means that at present this series is self-contained, probably it would have been better to wait for -rc1 before posting it (so that dependencies were settled) but anyway I think it can be reviewed as-is.
Thanks for having a look, Lorenzo
On Thu, Oct 20, 2016 at 03:57:52PM +0100, Lorenzo Pieralisi wrote:
On Thu, Oct 20, 2016 at 03:31:01PM +0100, Mark Rutland wrote:
Hi,
On Thu, Sep 29, 2016 at 02:17:08AM +0800, fu.wei@linaro.org wrote:
From: Fu Wei fu.wei@linaro.org
This patchset depends on the following patchset: [UPDATE PATCH V11 1/8] ACPI: I/O Remapping Table (IORT) initial support https://lkml.org/lkml/2016/9/12/949
Is there a branch with these anywhere? I wasn't Cc'd on those and it's rather difficult to get at the series from an LKML link.
For the records, the dependency above has now been merged and it was just a directory creation dependency (drivers/acpi/arm64, where some of the code in this series will live).
Ah, I see. That saves us all some trouble, then. :)
Thanks, Mark.
Hi Mark
On 20 October 2016 at 23:17, Mark Rutland mark.rutland@arm.com wrote:
On Thu, Oct 20, 2016 at 03:57:52PM +0100, Lorenzo Pieralisi wrote:
On Thu, Oct 20, 2016 at 03:31:01PM +0100, Mark Rutland wrote:
Hi,
On Thu, Sep 29, 2016 at 02:17:08AM +0800, fu.wei@linaro.org wrote:
From: Fu Wei fu.wei@linaro.org
This patchset depends on the following patchset: [UPDATE PATCH V11 1/8] ACPI: I/O Remapping Table (IORT) initial support https://lkml.org/lkml/2016/9/12/949
Is there a branch with these anywhere? I wasn't Cc'd on those and it's rather difficult to get at the series from an LKML link.
For the records, the dependency above has now been merged and it was just a directory creation dependency (drivers/acpi/arm64, where some of the code in this series will live).
Ah, I see. That saves us all some trouble, then. :)
Sorry, I forgot to delete this in v14 cover letter. The IORT patchset has been merged in to the mainline, we don't need to mention this anymore. :-)
Thanks, Mark.
-
Fu Wei -
fu.wei＠linaro.org
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Hanjun Guo -
Lorenzo Pieralisi -
Marc Zyngier -
Mark Rutland -
Xiongfeng Wang