From: Fu Wei fu.wei@linaro.org
This patchset: (1)Preparation for adding GTDT support in arm_arch_timer: 1. Introduce two functions to get the frequency from mmio and sysreg. 2. separate out device-tree code from arch_timer_detect_rate 3. remove arch_timer_detect_rate use arch_timer_get_*_freq directly 4. split arch_timer_rate for different types of timer 5. Refactor arch_timer_needs_probing, and move it into DT init call 6. Introduce some new structs and refactor the MMIO timer init code for reusing some common code.
(2)Introduce ACPI GTDT parser: drivers/acpi/arm64/acpi_gtdt.c Parse all kinds of timer in GTDT table of ACPI:arch timer, memory-mapped timer and SBSA Generic Watchdog timer. This driver can help to simplify all the relevant timer drivers, and separate all the ACPI GTDT knowledge from them.
(3)Simplify ACPI code for arm_arch_timer
(4)Add GTDT support for ARM memory-mapped timer.
This patchset has been tested on the following platforms with ACPI enabled: (1)ARM Foundation v8 model
Changelog: v21: https://lkml.org/lkml/2017/2/6/ Introduce two functions to get the frequency from mmio and sysreg. Remove arch_timer_detect_rate use arch_timer_get_*_freq directly Split arch_timer_rate for different types of timer. Skip secure timer frame in GTDT driver. Rebase to git://git.kernel.org/pub/scm/linux/kernel/git/mark/linux.git arch-timer/cleanup (The first 6 patches in v20 have been merged into arch-timer/cleanup branch)
v20: https://lkml.org/lkml/2017/1/18/534 Reorder the first 4 patches and split the 4th patches. Leave CNTHCTL_* as they originally were. Fix the bug in arch_timer_select_ppi. Split "Rework counter frequency detection" patch. Rework the arch_timer_detect_rate function. Improve the commit message of "Refactor MMIO timer probing". Rebase to 4.10.0-rc4
v19: https://lkml.org/lkml/2016/12/21/25 Fix a '\n' missing in a error message in arch_timer_mem_init. Add "request_mem_region" for ioremapping cntbase, according to f947ee1 clocksource/drivers/arm_arch_timer: Map frame with of_io_request_and_map() Rebase to 4.9.0-gfb779ff
v18: https://lkml.org/lkml/2016/12/8/446 Fix 8/15 patch problem of "int ret;" in arch_timer_acpi_init. Rebase to 4.9.0-rc8-g9269898
v17: https://lkml.org/lkml/2016/11/25/140 Take out some cleanups from 4/15. Merge 5/15 and 6/15, improve PPI determination code, improve commit message. Rework counter frequency detection. Move arch_timer_needs_of_probing into DT init call. Move Platform Timer scan loop back to timer init call to avoid allocating and free memory. Improve all the exported functions' comment.
v16: https://lkml.org/lkml/2016/11/16/268 Fix patchset problem about static enum ppi_nr of 01/13 in v15. Refactor arch_timer_detect_rate. Refactor arch_timer_needs_probing.
v15: https://lkml.org/lkml/2016/11/15/366 Re-order patches Add arm_arch_timer refactoring patches to prepare for GTDT: 1. rename some enums and defines, and some cleanups 2. separate out arch_timer_uses_ppi init code and fix a potential bug 3. Improve some new structs, refactor the timer init code. Since the some structs have been changed, GTDT parser for memory-mapped timer and SBSA Generic Watchdog timer have been update.
v14: https://lkml.org/lkml/2016/9/28/573 Separate memory-mapped timer GTDT support into two patches 1. Refactor the timer init code to prepare for GTDT 2. Add GTDT support for memory-mapped timer
v13: http://www.mail-archive.com/linux-kernel@vger.kernel.org/msg1231717.html Improve arm_arch_timer code for memory-mapped timer GTDT support, refactor original memory-mapped timer dt support for reusing some common code.
v12: https://lkml.org/lkml/2016/9/13/250 Rebase to latest Linux 4.8-rc6 Delete the confusing "skipping" in the error message.
V11: https://lkml.org/lkml/2016/9/6/354 Rebase to latest Linux 4.8-rc5 Delete typedef (suggested by checkpatch.pl)
V10: https://lkml.org/lkml/2016/7/26/215 Drop the "readq" patch. Rebase to latest Linux 4.7.
V9: https://lkml.org/lkml/2016/7/25/345 Improve pr_err message in acpi gtdt driver. Update Commit message for 7/9 shorten the irq mapping function name Improve GTDT driver for memory-mapped timer
v8: https://lkml.org/lkml/2016/7/19/660 Improve "pr_fmt(fmt)" definition: add "ACPI" in front of "GTDT", and also improve printk message. Simplify is_timer_block and is_watchdog. Merge acpi_gtdt_desc_init and gtdt_arch_timer_init into acpi_gtdt_init(); Delete __init in include/linux/acpi.h for GTDT API Make ARM64 select GTDT. Delete "#include <linux/module.h>" from acpi_gtdt.c Simplify GT block parse code.
v7: https://lkml.org/lkml/2016/7/13/769 Move the GTDT driver to drivers/acpi/arm64 Add add the ARM64-specific ACPI Support maintainers in MAINTAINERS Merge 3 patches of GTDT parser driver. Fix the for_each_platform_timer bug.
v6: https://lkml.org/lkml/2016/6/29/580 split the GTDT driver to 4 parts: basic, arch_timer, memory-mapped timer, and SBSA Generic Watchdog timer Improve driver by suggestions and example code from Daniel Lezcano
v5: https://lkml.org/lkml/2016/5/24/356 Sorting out all patches, simplify the API of GTDT driver: GTDT driver just fills the data struct for arm_arch_timer driver.
v4: https://lists.linaro.org/pipermail/linaro-acpi/2016-March/006667.html Delete the kvm relevant patches Separate two patches for sorting out the code for arm_arch_timer. Improve irq info export code to allow missing irq info in GTDT table.
v3: https://lkml.org/lkml/2016/2/1/658 Improve GTDT driver code: (1)improve pr_* by defining pr_fmt(fmt) (2)simplify gtdt_sbsa_gwdt_init (3)improve gtdt_arch_timer_data_init, if table is NULL, it will try to get GTDT table. Move enum ppi_nr to arm_arch_timer.h, and add enum spi_nr. Add arm_arch_timer get ppi from DT and GTDT support for kvm.
v2: https://lkml.org/lkml/2015/12/2/10 Rebase to latest kernel version(4.4-rc3). Fix the bug about the config problem, use CONFIG_ACPI_GTDT instead of CONFIG_ACPI in arm_arch_timer.c
v1: The first upstreaming version: https://lkml.org/lkml/2015/10/28/553
Fu Wei (13): clocksource: arm_arch_timer: introduce two functions to get the frequency from mmio and sysreg. clocksource: arm_arch_timer: separate out device-tree code from arch_timer_detect_rate clocksource: arm_arch_timer: remove arch_timer_detect_rate clocksource: arm_arch_timer: split arch_timer_rate for different types of timer clocksource: arm_arch_timer: refactor arch_timer_needs_probing clocksource: arm_arch_timer: move arch_timer_needs_of_probing into DT init call clocksource: arm_arch_timer: introduce some new structs to prepare for GTDT clocksource: arm_arch_timer: refactor MMIO timer probing. acpi/arm64: Add GTDT table parse driver clocksource: arm_arch_timer: simplify ACPI support code. acpi/arm64: Add memory-mapped timer support in GTDT driver clocksource: arm_arch_timer: add GTDT support for memory-mapped timer acpi/arm64: Add SBSA Generic Watchdog support in GTDT driver
arch/arm64/Kconfig | 1 + drivers/acpi/arm64/Kconfig | 3 + drivers/acpi/arm64/Makefile | 1 + drivers/acpi/arm64/gtdt.c | 378 +++++++++++++++++++++++++++++++++++ drivers/clocksource/arm_arch_timer.c | 354 ++++++++++++++++++++------------ drivers/watchdog/Kconfig | 1 + include/clocksource/arm_arch_timer.h | 17 ++ include/linux/acpi.h | 7 + 8 files changed, 635 insertions(+), 127 deletions(-) create mode 100644 drivers/acpi/arm64/gtdt.c
From: Fu Wei fu.wei@linaro.org
The patch introduce two new functions: arch_timer_get_sysreg_freq and arch_timer_get_mmio_freq, and applys them in arch_timer_detect_rate. These will be used for getting the frequency from mmio and sysreg to prepare for reworking counter frequency detection.
Signed-off-by: Fu Wei fu.wei@linaro.org --- drivers/clocksource/arm_arch_timer.c | 21 +++++++++++++++++++-- 1 file changed, 19 insertions(+), 2 deletions(-)
diff --git a/drivers/clocksource/arm_arch_timer.c b/drivers/clocksource/arm_arch_timer.c index 46a1709..1d273d6 100644 --- a/drivers/clocksource/arm_arch_timer.c +++ b/drivers/clocksource/arm_arch_timer.c @@ -554,6 +554,23 @@ static int arch_timer_starting_cpu(unsigned int cpu) return 0; }
+static u32 arch_timer_get_sysreg_freq(void) +{ + /* + * Try to get the frequency from the CNTFRQ of sysreg. + */ + return arch_timer_get_cntfrq(); +} + +static u32 arch_timer_get_mmio_freq(void __iomem *cntbase) +{ + /* + * Try to get the frequency from the CNTFRQ of timer frame registers. + * Note: please verify cntbase in caller. + */ + return readl_relaxed(cntbase + CNTFRQ); +} + static void arch_timer_detect_rate(void __iomem *cntbase, struct device_node *np) { @@ -568,9 +585,9 @@ arch_timer_detect_rate(void __iomem *cntbase, struct device_node *np) if (!acpi_disabled || of_property_read_u32(np, "clock-frequency", &arch_timer_rate)) { if (cntbase) - arch_timer_rate = readl_relaxed(cntbase + CNTFRQ); + arch_timer_rate = arch_timer_get_mmio_freq(cntbase); else - arch_timer_rate = arch_timer_get_cntfrq(); + arch_timer_rate = arch_timer_get_sysreg_freq(); }
/* Check the timer frequency. */
On Tue, Feb 07, 2017 at 02:50:03AM +0800, fu.wei@linaro.org wrote:
+static u32 arch_timer_get_sysreg_freq(void) +{
- /*
* Try to get the frequency from the CNTFRQ of sysreg.*/- return arch_timer_get_cntfrq();
+}
We already have arch_timer_get_cntfrq(), so I don't see the point in this wrapper.
+static u32 arch_timer_get_mmio_freq(void __iomem *cntbase) +{
- /*
* Try to get the frequency from the CNTFRQ of timer frame registers.* Note: please verify cntbase in caller.*/- return readl_relaxed(cntbase + CNTFRQ);
+}
Wrapping the MMIO read makes sense if we're going to do this in more than one place, so I'm happy with this wrapper.
If you can s/arch_timer_get_mmio_freq/arch_timer_get_cntfrq/, and drop the comments, then this looks fine to me.
Thanks, Mark.
Hi Mark,
On 18 March 2017 at 02:05, Mark Rutland mark.rutland@arm.com wrote:
On Tue, Feb 07, 2017 at 02:50:03AM +0800, fu.wei@linaro.org wrote:
+static u32 arch_timer_get_sysreg_freq(void) +{
/** Try to get the frequency from the CNTFRQ of sysreg.*/return arch_timer_get_cntfrq();+}
We already have arch_timer_get_cntfrq(), so I don't see the point in this wrapper.
+static u32 arch_timer_get_mmio_freq(void __iomem *cntbase) +{
/** Try to get the frequency from the CNTFRQ of timer frame registers.* Note: please verify cntbase in caller.*/return readl_relaxed(cntbase + CNTFRQ);+}
Wrapping the MMIO read makes sense if we're going to do this in more than one place, so I'm happy with this wrapper.
If you can s/arch_timer_get_mmio_freq/arch_timer_get_cntfrq/, and drop
sorry, May I guess that is "s/arch_timer_get_mmio_freq/arch_timer_get_mmio_cntfrq/" or "s/arch_timer_get_mmio_freq/arch_timer_mem_get_cntfrq/"
which one do you prefer? :-)
the comments, then this looks fine to me.
Thanks, Mark.
Hi Mark,
On 20 March 2017 at 15:36, Fu Wei fu.wei@linaro.org wrote:
Hi Mark,
On 18 March 2017 at 02:05, Mark Rutland mark.rutland@arm.com wrote:
On Tue, Feb 07, 2017 at 02:50:03AM +0800, fu.wei@linaro.org wrote:
+static u32 arch_timer_get_sysreg_freq(void) +{
/** Try to get the frequency from the CNTFRQ of sysreg.*/return arch_timer_get_cntfrq();+}
We already have arch_timer_get_cntfrq(), so I don't see the point in this wrapper.
+static u32 arch_timer_get_mmio_freq(void __iomem *cntbase) +{
/** Try to get the frequency from the CNTFRQ of timer frame registers.* Note: please verify cntbase in caller.*/return readl_relaxed(cntbase + CNTFRQ);+}
Wrapping the MMIO read makes sense if we're going to do this in more than one place, so I'm happy with this wrapper.
If you can s/arch_timer_get_mmio_freq/arch_timer_get_cntfrq/, and drop
sorry, May I guess that is "s/arch_timer_get_mmio_freq/arch_timer_get_mmio_cntfrq/" or "s/arch_timer_get_mmio_freq/arch_timer_mem_get_cntfrq/"
which one do you prefer? :-)
keeping using arch_timer_get_cntfrq(); for per-CPU arch timer, then
+static u32 arch_timer_mem_get_cntfrq(void __iomem *cntbase) +{ + return readl_relaxed(cntbase + CNTFRQ); +} +
Is that OK for you?
the comments, then this looks fine to me.
Thanks, Mark.
-- Best regards,
Fu Wei Software Engineer Red Hat
On Mon, Mar 20, 2017 at 05:43:29PM +0800, Fu Wei wrote:
On 20 March 2017 at 15:36, Fu Wei fu.wei@linaro.org wrote:
On 18 March 2017 at 02:05, Mark Rutland mark.rutland@arm.com wrote:
On Tue, Feb 07, 2017 at 02:50:03AM +0800, fu.wei@linaro.org wrote:
+static u32 arch_timer_get_mmio_freq(void __iomem *cntbase) +{
/** Try to get the frequency from the CNTFRQ of timer frame registers.* Note: please verify cntbase in caller.*/return readl_relaxed(cntbase + CNTFRQ);+}
Wrapping the MMIO read makes sense if we're going to do this in more than one place, so I'm happy with this wrapper.
If you can s/arch_timer_get_mmio_freq/arch_timer_get_cntfrq/, and drop
sorry, May I guess that is "s/arch_timer_get_mmio_freq/arch_timer_get_mmio_cntfrq/" or "s/arch_timer_get_mmio_freq/arch_timer_mem_get_cntfrq/"
which one do you prefer? :-)
keeping using arch_timer_get_cntfrq(); for per-CPU arch timer, then
+static u32 arch_timer_mem_get_cntfrq(void __iomem *cntbase) +{
return readl_relaxed(cntbase + CNTFRQ);+}
That looks perfect to me.
Sorry for the confusion above!
Mark.
Hi Mark,
On 20 March 2017 at 18:41, Mark Rutland mark.rutland@arm.com wrote:
On Mon, Mar 20, 2017 at 05:43:29PM +0800, Fu Wei wrote:
On 20 March 2017 at 15:36, Fu Wei fu.wei@linaro.org wrote:
On 18 March 2017 at 02:05, Mark Rutland mark.rutland@arm.com wrote:
On Tue, Feb 07, 2017 at 02:50:03AM +0800, fu.wei@linaro.org wrote:
+static u32 arch_timer_get_mmio_freq(void __iomem *cntbase) +{
/** Try to get the frequency from the CNTFRQ of timer frame registers.* Note: please verify cntbase in caller.*/return readl_relaxed(cntbase + CNTFRQ);+}
Wrapping the MMIO read makes sense if we're going to do this in more than one place, so I'm happy with this wrapper.
If you can s/arch_timer_get_mmio_freq/arch_timer_get_cntfrq/, and drop
sorry, May I guess that is "s/arch_timer_get_mmio_freq/arch_timer_get_mmio_cntfrq/" or "s/arch_timer_get_mmio_freq/arch_timer_mem_get_cntfrq/"
which one do you prefer? :-)
keeping using arch_timer_get_cntfrq(); for per-CPU arch timer, then
+static u32 arch_timer_mem_get_cntfrq(void __iomem *cntbase) +{
return readl_relaxed(cntbase + CNTFRQ);+}
That looks perfect to me.
Sorry for the confusion above!
Great, thanks , doing this way :-)
Mark.
From: Fu Wei fu.wei@linaro.org
Currently, the counter frequency detection call(arch_timer_detect_rate) include getting the frequency from the device-tree property. But reading device-tree property will be needed only when system boot with device-tree.
This patch separate out device-tree code, keep them in device-tree init function.
Signed-off-by: Fu Wei fu.wei@linaro.org Reviewed-by: Hanjun Guo hanjun.guo@linaro.org Tested-by: Hanjun Guo hanjun.guo@linaro.org --- drivers/clocksource/arm_arch_timer.c | 38 ++++++++++++++++++++++-------------- 1 file changed, 23 insertions(+), 15 deletions(-)
diff --git a/drivers/clocksource/arm_arch_timer.c b/drivers/clocksource/arm_arch_timer.c index 1d273d6..aa14305 100644 --- a/drivers/clocksource/arm_arch_timer.c +++ b/drivers/clocksource/arm_arch_timer.c @@ -571,24 +571,19 @@ static u32 arch_timer_get_mmio_freq(void __iomem *cntbase) return readl_relaxed(cntbase + CNTFRQ); }
-static void -arch_timer_detect_rate(void __iomem *cntbase, struct device_node *np) +static void arch_timer_detect_rate(void __iomem *cntbase) { /* Who has more than one independent system counter? */ if (arch_timer_rate) return;
/* - * Try to determine the frequency from the device tree or CNTFRQ, - * if ACPI is enabled, get the frequency from CNTFRQ ONLY. + * Try to determine the frequency from the MMIO timer or the sysreg. */ - if (!acpi_disabled || - of_property_read_u32(np, "clock-frequency", &arch_timer_rate)) { - if (cntbase) - arch_timer_rate = arch_timer_get_mmio_freq(cntbase); - else - arch_timer_rate = arch_timer_get_sysreg_freq(); - } + if (cntbase) + arch_timer_rate = arch_timer_get_mmio_freq(cntbase); + else + arch_timer_rate = arch_timer_get_sysreg_freq();
/* Check the timer frequency. */ if (arch_timer_rate == 0) @@ -969,7 +964,13 @@ static int __init arch_timer_of_init(struct device_node *np) for (i = ARCH_TIMER_PHYS_SECURE_PPI; i < ARCH_TIMER_MAX_TIMER_PPI; i++) arch_timer_ppi[i] = irq_of_parse_and_map(np, i);
- arch_timer_detect_rate(NULL, np); + /* + * Try to determine the frequency from the device tree, + * if fail, get the frequency from the sysreg CNTFRQ. + */ + if (!arch_timer_rate && + of_property_read_u32(np, "clock-frequency", &arch_timer_rate)) + arch_timer_detect_rate(NULL);
arch_timer_c3stop = !of_property_read_bool(np, "always-on");
@@ -1080,7 +1081,14 @@ static int __init arch_timer_mem_init(struct device_node *np) goto out; }
- arch_timer_detect_rate(base, np); + /* + * Try to determine the frequency from the device tree, + * if fail, get the frequency from the CNTFRQ reg of MMIO timer. + */ + if (!arch_timer_rate && + of_property_read_u32(np, "clock-frequency", &arch_timer_rate)) + arch_timer_detect_rate(base); + ret = arch_timer_mem_register(base, irq); if (ret) goto out; @@ -1141,8 +1149,8 @@ static int __init arch_timer_acpi_init(struct acpi_table_header *table) map_generic_timer_interrupt(gtdt->non_secure_el2_interrupt, gtdt->non_secure_el2_flags);
- /* Get the frequency from CNTFRQ */ - arch_timer_detect_rate(NULL, NULL); + /* Get the frequency from the sysreg CNTFRQ */ + arch_timer_detect_rate(NULL);
arch_timer_uses_ppi = arch_timer_select_ppi(); if (!arch_timer_ppi[arch_timer_uses_ppi]) {
From: Fu Wei fu.wei@linaro.org
The original counter frequency detection call(arch_timer_detect_rate) include getting the frequency from the per-cpu arch-timer and the memory-mapped (MMIO) timer interfaces. But they will be needed only when the system initializes the relevant timer.
This patch remove arch_timer_detect_rate founction, and use the arch_timer_get_sysreg_freq and arch_timer_get_mmio_freq directly.
Signed-off-by: Fu Wei fu.wei@linaro.org --- drivers/clocksource/arm_arch_timer.c | 38 +++++++++++++++--------------------- 1 file changed, 16 insertions(+), 22 deletions(-)
diff --git a/drivers/clocksource/arm_arch_timer.c b/drivers/clocksource/arm_arch_timer.c index aa14305..63fb441 100644 --- a/drivers/clocksource/arm_arch_timer.c +++ b/drivers/clocksource/arm_arch_timer.c @@ -571,25 +571,6 @@ static u32 arch_timer_get_mmio_freq(void __iomem *cntbase) return readl_relaxed(cntbase + CNTFRQ); }
-static void arch_timer_detect_rate(void __iomem *cntbase) -{ - /* Who has more than one independent system counter? */ - if (arch_timer_rate) - return; - - /* - * Try to determine the frequency from the MMIO timer or the sysreg. - */ - if (cntbase) - arch_timer_rate = arch_timer_get_mmio_freq(cntbase); - else - arch_timer_rate = arch_timer_get_sysreg_freq(); - - /* Check the timer frequency. */ - if (arch_timer_rate == 0) - pr_warn("frequency not available\n"); -} - static void arch_timer_banner(unsigned type) { pr_info("%s%s%s timer(s) running at %lu.%02luMHz (%s%s%s).\n", @@ -970,7 +951,11 @@ static int __init arch_timer_of_init(struct device_node *np) */ if (!arch_timer_rate && of_property_read_u32(np, "clock-frequency", &arch_timer_rate)) - arch_timer_detect_rate(NULL); + arch_timer_rate = arch_timer_get_sysreg_freq(); + if (!arch_timer_rate) { + pr_err(FW_BUG "frequency not available.\n"); + return -EINVAL; + }
arch_timer_c3stop = !of_property_read_bool(np, "always-on");
@@ -1087,7 +1072,12 @@ static int __init arch_timer_mem_init(struct device_node *np) */ if (!arch_timer_rate && of_property_read_u32(np, "clock-frequency", &arch_timer_rate)) - arch_timer_detect_rate(base); + arch_timer_rate = arch_timer_get_mmio_freq(base); + if (!arch_timer_rate) { + pr_err(FW_BUG "frequency not available for MMIO timer.\n"); + ret = -EINVAL; + goto out; + }
ret = arch_timer_mem_register(base, irq); if (ret) @@ -1150,7 +1140,11 @@ static int __init arch_timer_acpi_init(struct acpi_table_header *table) gtdt->non_secure_el2_flags);
/* Get the frequency from the sysreg CNTFRQ */ - arch_timer_detect_rate(NULL); + arch_timer_rate = arch_timer_get_sysreg_freq(); + if (!arch_timer_rate) { + pr_err(FW_BUG "frequency not available.\n"); + return -EINVAL; + }
arch_timer_uses_ppi = arch_timer_select_ppi(); if (!arch_timer_ppi[arch_timer_uses_ppi]) {
On Tue, Feb 07, 2017 at 02:50:05AM +0800, fu.wei@linaro.org wrote:
From: Fu Wei fu.wei@linaro.org
The original counter frequency detection call(arch_timer_detect_rate) include getting the frequency from the per-cpu arch-timer and the memory-mapped (MMIO) timer interfaces. But they will be needed only when the system initializes the relevant timer.
This patch remove arch_timer_detect_rate founction, and use the arch_timer_get_sysreg_freq and arch_timer_get_mmio_freq directly.
Signed-off-by: Fu Wei fu.wei@linaro.org
Could you please fold this with the prior patch?
@@ -1087,7 +1072,12 @@ static int __init arch_timer_mem_init(struct device_node *np) */ if (!arch_timer_rate && of_property_read_u32(np, "clock-frequency", &arch_timer_rate))
arch_timer_detect_rate(base);
arch_timer_rate = arch_timer_get_mmio_freq(base);- if (!arch_timer_rate) {
pr_err(FW_BUG "frequency not available for MMIO timer.\n");
It would be better to say "MMIO frequency not available.\n" here.
Thanks, Mark.
Hi Mark,
On 18 March 2017 at 02:07, Mark Rutland mark.rutland@arm.com wrote:
On Tue, Feb 07, 2017 at 02:50:05AM +0800, fu.wei@linaro.org wrote:
From: Fu Wei fu.wei@linaro.org
The original counter frequency detection call(arch_timer_detect_rate) include getting the frequency from the per-cpu arch-timer and the memory-mapped (MMIO) timer interfaces. But they will be needed only when the system initializes the relevant timer.
This patch remove arch_timer_detect_rate founction, and use the arch_timer_get_sysreg_freq and arch_timer_get_mmio_freq directly.
Signed-off-by: Fu Wei fu.wei@linaro.org
Could you please fold this with the prior patch?
Sure, will do
@@ -1087,7 +1072,12 @@ static int __init arch_timer_mem_init(struct device_node *np) */ if (!arch_timer_rate && of_property_read_u32(np, "clock-frequency", &arch_timer_rate))
arch_timer_detect_rate(base);
arch_timer_rate = arch_timer_get_mmio_freq(base);if (!arch_timer_rate) {pr_err(FW_BUG "frequency not available for MMIO timer.\n");It would be better to say "MMIO frequency not available.\n" here.
thanks , will do
Thanks, Mark.
From: Fu Wei fu.wei@linaro.org
Currently, arch_timer_rate is used to store the frequency got from per-cpu arch-timer or the memory-mapped (MMIO) timers. But those values come from different registers which should all be initialized by firmware.
This patch remove arch_timer_rate, and use arch_timer_sysreg_freq and arch_timer_mmio_freq instead.
Signed-off-by: Fu Wei fu.wei@linaro.org --- drivers/clocksource/arm_arch_timer.c | 42 ++++++++++++++++++++---------------- 1 file changed, 24 insertions(+), 18 deletions(-)
diff --git a/drivers/clocksource/arm_arch_timer.c b/drivers/clocksource/arm_arch_timer.c index 63fb441..97a4e90 100644 --- a/drivers/clocksource/arm_arch_timer.c +++ b/drivers/clocksource/arm_arch_timer.c @@ -65,7 +65,8 @@ struct arch_timer {
#define to_arch_timer(e) container_of(e, struct arch_timer, evt)
-static u32 arch_timer_rate; +static u32 arch_timer_sysreg_freq; +static u32 arch_timer_mmio_freq; static int arch_timer_ppi[ARCH_TIMER_MAX_TIMER_PPI];
static struct clock_event_device __percpu *arch_timer_evt; @@ -417,6 +418,7 @@ static void erratum_workaround_set_sne(struct clock_event_device *clk) static void __arch_timer_setup(unsigned type, struct clock_event_device *clk) { + u32 freq; clk->features = CLOCK_EVT_FEAT_ONESHOT;
if (type == ARCH_TIMER_TYPE_CP15) { @@ -444,6 +446,7 @@ static void __arch_timer_setup(unsigned type, }
erratum_workaround_set_sne(clk); + freq = arch_timer_sysreg_freq; } else { clk->features |= CLOCK_EVT_FEAT_DYNIRQ; clk->name = "arch_mem_timer"; @@ -460,11 +463,12 @@ static void __arch_timer_setup(unsigned type, clk->set_next_event = arch_timer_set_next_event_phys_mem; } + freq = arch_timer_mmio_freq; }
clk->set_state_shutdown(clk);
- clockevents_config_and_register(clk, arch_timer_rate, 0xf, 0x7fffffff); + clockevents_config_and_register(clk, freq, 0xf, 0x7fffffff); }
static void arch_timer_evtstrm_enable(int divider) @@ -487,7 +491,7 @@ static void arch_timer_configure_evtstream(void) int evt_stream_div, pos;
/* Find the closest power of two to the divisor */ - evt_stream_div = arch_timer_rate / ARCH_TIMER_EVT_STREAM_FREQ; + evt_stream_div = arch_timer_sysreg_freq / ARCH_TIMER_EVT_STREAM_FREQ; pos = fls(evt_stream_div); if (pos > 1 && !(evt_stream_div & (1 << (pos - 2)))) pos--; @@ -578,8 +582,8 @@ static void arch_timer_banner(unsigned type) type == (ARCH_TIMER_TYPE_CP15 | ARCH_TIMER_TYPE_MEM) ? " and " : "", type & ARCH_TIMER_TYPE_MEM ? "mmio" : "", - (unsigned long)arch_timer_rate / 1000000, - (unsigned long)(arch_timer_rate / 10000) % 100, + (unsigned long)arch_timer_sysreg_freq / 1000000, + (unsigned long)(arch_timer_sysreg_freq / 10000) % 100, type & ARCH_TIMER_TYPE_CP15 ? (arch_timer_uses_ppi == ARCH_TIMER_VIRT_PPI) ? "virt" : "phys" : "", @@ -591,7 +595,7 @@ static void arch_timer_banner(unsigned type)
u32 arch_timer_get_rate(void) { - return arch_timer_rate; + return arch_timer_sysreg_freq; }
static u64 arch_counter_get_cntvct_mem(void) @@ -648,6 +652,7 @@ struct arch_timer_kvm_info *arch_timer_get_kvm_info(void) static void __init arch_counter_register(unsigned type) { u64 start_count; + u32 freq;
/* Register the CP15 based counter if we have one */ if (type & ARCH_TIMER_TYPE_CP15) { @@ -657,6 +662,8 @@ static void __init arch_counter_register(unsigned type) else arch_timer_read_counter = arch_counter_get_cntpct;
+ freq = arch_timer_sysreg_freq; + clocksource_counter.archdata.vdso_direct = true;
#ifdef CONFIG_ARM_ARCH_TIMER_OOL_WORKAROUND @@ -669,19 +676,20 @@ static void __init arch_counter_register(unsigned type) #endif } else { arch_timer_read_counter = arch_counter_get_cntvct_mem; + freq = arch_timer_mmio_freq; }
if (!arch_counter_suspend_stop) clocksource_counter.flags |= CLOCK_SOURCE_SUSPEND_NONSTOP; start_count = arch_timer_read_counter(); - clocksource_register_hz(&clocksource_counter, arch_timer_rate); + clocksource_register_hz(&clocksource_counter, freq); cyclecounter.mult = clocksource_counter.mult; cyclecounter.shift = clocksource_counter.shift; timecounter_init(&arch_timer_kvm_info.timecounter, &cyclecounter, start_count);
/* 56 bits minimum, so we assume worst case rollover */ - sched_clock_register(arch_timer_read_counter, 56, arch_timer_rate); + sched_clock_register(arch_timer_read_counter, 56, freq); }
static void arch_timer_stop(struct clock_event_device *clk) @@ -949,10 +957,9 @@ static int __init arch_timer_of_init(struct device_node *np) * Try to determine the frequency from the device tree, * if fail, get the frequency from the sysreg CNTFRQ. */ - if (!arch_timer_rate && - of_property_read_u32(np, "clock-frequency", &arch_timer_rate)) - arch_timer_rate = arch_timer_get_sysreg_freq(); - if (!arch_timer_rate) { + if (of_property_read_u32(np, "clock-frequency", &arch_timer_sysreg_freq)) + arch_timer_sysreg_freq = arch_timer_get_sysreg_freq(); + if (!arch_timer_sysreg_freq) { pr_err(FW_BUG "frequency not available.\n"); return -EINVAL; } @@ -1070,10 +1077,9 @@ static int __init arch_timer_mem_init(struct device_node *np) * Try to determine the frequency from the device tree, * if fail, get the frequency from the CNTFRQ reg of MMIO timer. */ - if (!arch_timer_rate && - of_property_read_u32(np, "clock-frequency", &arch_timer_rate)) - arch_timer_rate = arch_timer_get_mmio_freq(base); - if (!arch_timer_rate) { + if (of_property_read_u32(np, "clock-frequency", &arch_timer_mmio_freq)) + arch_timer_mmio_freq = arch_timer_get_mmio_freq(base); + if (!arch_timer_mmio_freq) { pr_err(FW_BUG "frequency not available for MMIO timer.\n"); ret = -EINVAL; goto out; @@ -1140,8 +1146,8 @@ static int __init arch_timer_acpi_init(struct acpi_table_header *table) gtdt->non_secure_el2_flags);
/* Get the frequency from the sysreg CNTFRQ */ - arch_timer_rate = arch_timer_get_sysreg_freq(); - if (!arch_timer_rate) { + arch_timer_sysreg_freq = arch_timer_get_sysreg_freq(); + if (!arch_timer_sysreg_freq) { pr_err(FW_BUG "frequency not available.\n"); return -EINVAL; }
On Tue, Feb 07, 2017 at 02:50:06AM +0800, fu.wei@linaro.org wrote:
From: Fu Wei fu.wei@linaro.org
Currently, arch_timer_rate is used to store the frequency got from per-cpu arch-timer or the memory-mapped (MMIO) timers. But those values come from different registers which should all be initialized by firmware.
This patch remove arch_timer_rate, and use arch_timer_sysreg_freq and arch_timer_mmio_freq instead.
Signed-off-by: Fu Wei fu.wei@linaro.org
Thanks for attacking this. Generally, I do think this is the right thing to do.
However...
@@ -1070,10 +1077,9 @@ static int __init arch_timer_mem_init(struct device_node *np) * Try to determine the frequency from the device tree, * if fail, get the frequency from the CNTFRQ reg of MMIO timer. */
- if (!arch_timer_rate &&
of_property_read_u32(np, "clock-frequency", &arch_timer_rate))arch_timer_rate = arch_timer_get_mmio_freq(base);- if (!arch_timer_rate) {
- if (of_property_read_u32(np, "clock-frequency", &arch_timer_mmio_freq))
arch_timer_mmio_freq = arch_timer_get_mmio_freq(base);- if (!arch_timer_mmio_freq) { pr_err(FW_BUG "frequency not available for MMIO timer.\n"); ret = -EINVAL; goto out;
... unfortunately, I believe that this will break some DT platforms that have been (unintentionally) relying on the way currently allow the frequency to be probed from either the MMIO timer or the sysreg timer.
So while the above was my suggestion, it was not my best.
For the timebeing, let's leave the single arch_timer_rate, but ensure that it doesn't get in the way fo the ACPI code, by making the ACPI probe path:
* Probe the sysreg timers first, using the sysreg cntfrq().
* Probe the MMIO timers second, verifying that each MMIO cntfrq matches the already-probed sysreg cntfrq.
... which is what I believe you suggested previously.
Thanks, Mark.
Hi Mark,
On 18 March 2017 at 03:05, Mark Rutland mark.rutland@arm.com wrote:
On Tue, Feb 07, 2017 at 02:50:06AM +0800, fu.wei@linaro.org wrote:
From: Fu Wei fu.wei@linaro.org
Currently, arch_timer_rate is used to store the frequency got from per-cpu arch-timer or the memory-mapped (MMIO) timers. But those values come from different registers which should all be initialized by firmware.
This patch remove arch_timer_rate, and use arch_timer_sysreg_freq and arch_timer_mmio_freq instead.
Signed-off-by: Fu Wei fu.wei@linaro.org
Thanks for attacking this. Generally, I do think this is the right thing to do.
However...
@@ -1070,10 +1077,9 @@ static int __init arch_timer_mem_init(struct device_node *np) * Try to determine the frequency from the device tree, * if fail, get the frequency from the CNTFRQ reg of MMIO timer. */
if (!arch_timer_rate &&of_property_read_u32(np, "clock-frequency", &arch_timer_rate))arch_timer_rate = arch_timer_get_mmio_freq(base);if (!arch_timer_rate) {
if (of_property_read_u32(np, "clock-frequency", &arch_timer_mmio_freq))arch_timer_mmio_freq = arch_timer_get_mmio_freq(base);if (!arch_timer_mmio_freq) { pr_err(FW_BUG "frequency not available for MMIO timer.\n"); ret = -EINVAL; goto out;... unfortunately, I believe that this will break some DT platforms that have been (unintentionally) relying on the way currently allow the frequency to be probed from either the MMIO timer or the sysreg timer.
Ah, I 'm really not aware of this. Thanks for pointing it out.
So while the above was my suggestion, it was not my best.
For the timebeing, let's leave the single arch_timer_rate, but ensure that it doesn't get in the way fo the ACPI code, by making the ACPI probe path:
Probe the sysreg timers first, using the sysreg cntfrq().
Probe the MMIO timers second, verifying that each MMIO cntfrq matches the already-probed sysreg cntfrq.
... which is what I believe you suggested previously.
OK, NP, will do this way.
Thanks, Mark.
From: Fu Wei fu.wei@linaro.org
When system init with device-tree, we don't know which node will be initialized first. And the code in arch_timer_common_init should wait until per-cpu timer and MMIO timer are both initialized. So we need arch_timer_needs_probing to detect the init status of system.
But currently the code is dispersed in arch_timer_needs_probing and arch_timer_common_init. And the function name doesn't specify that it's only for device-tree. This is somewhat confusing.
This patch move all related code from arch_timer_common_init to arch_timer_needs_probing, refactor it, and rename it to arch_timer_needs_of_probing. And make sure that it will be called only if acpi is disabled.
Signed-off-by: Fu Wei fu.wei@linaro.org Reviewed-by: Hanjun Guo hanjun.guo@linaro.org --- drivers/clocksource/arm_arch_timer.c | 34 +++++++++++++++++++--------------- 1 file changed, 19 insertions(+), 15 deletions(-)
diff --git a/drivers/clocksource/arm_arch_timer.c b/drivers/clocksource/arm_arch_timer.c index 97a4e90..97ed103 100644 --- a/drivers/clocksource/arm_arch_timer.c +++ b/drivers/clocksource/arm_arch_timer.c @@ -858,15 +858,28 @@ static const struct of_device_id arch_timer_mem_of_match[] __initconst = { {}, };
-static bool __init -arch_timer_needs_probing(int type, const struct of_device_id *matches) +static bool __init arch_timer_needs_of_probing(void) { struct device_node *dn; bool needs_probing = false; + unsigned int mask = ARCH_TIMER_TYPE_CP15 | ARCH_TIMER_TYPE_MEM;
- dn = of_find_matching_node(NULL, matches); - if (dn && of_device_is_available(dn) && !(arch_timers_present & type)) + /* We have two timers, and both device-tree nodes are probed. */ + if ((arch_timers_present & mask) == mask) + return false; + + /* + * Only one type of timer is probed, + * check if we have another type of timer node in device-tree. + */ + if (arch_timers_present & ARCH_TIMER_TYPE_CP15) + dn = of_find_matching_node(NULL, arch_timer_mem_of_match); + else + dn = of_find_matching_node(NULL, arch_timer_of_match); + + if (dn && of_device_is_available(dn)) needs_probing = true; + of_node_put(dn);
return needs_probing; @@ -874,17 +887,8 @@ arch_timer_needs_probing(int type, const struct of_device_id *matches)
static int __init arch_timer_common_init(void) { - unsigned mask = ARCH_TIMER_TYPE_CP15 | ARCH_TIMER_TYPE_MEM; - - /* Wait until both nodes are probed if we have two timers */ - if ((arch_timers_present & mask) != mask) { - if (arch_timer_needs_probing(ARCH_TIMER_TYPE_MEM, - arch_timer_mem_of_match)) - return 0; - if (arch_timer_needs_probing(ARCH_TIMER_TYPE_CP15, - arch_timer_of_match)) - return 0; - } + if (acpi_disabled && arch_timer_needs_of_probing()) + return 0;
arch_timer_banner(arch_timers_present); arch_counter_register(arch_timers_present);
From: Fu Wei fu.wei@linaro.org
Because arch_timer_needs_of_probing is only for booting with device-tree, but arch_timer_common_init is a generic init call which shouldn't include the FW-specific code. It's better to put arch_timer_needs_of_probing into DT init function.
But for per-cpu timer, the arch_timer_common_init is called from arch_timer_init. For reaching the goal above, this patch disassemble arch_timer_init and use arch_timer_register and arch_timer_common_init directly, just like arch_timer_mem init code is doing. By this way, all the DT relevant code are only called from DT init call.
Signed-off-by: Fu Wei fu.wei@linaro.org Reviewed-by: Hanjun Guo hanjun.guo@linaro.org --- drivers/clocksource/arm_arch_timer.c | 46 ++++++++++++++++-------------------- 1 file changed, 21 insertions(+), 25 deletions(-)
diff --git a/drivers/clocksource/arm_arch_timer.c b/drivers/clocksource/arm_arch_timer.c index 97ed103..f2b9ec4 100644 --- a/drivers/clocksource/arm_arch_timer.c +++ b/drivers/clocksource/arm_arch_timer.c @@ -887,9 +887,6 @@ static bool __init arch_timer_needs_of_probing(void)
static int __init arch_timer_common_init(void) { - if (acpi_disabled && arch_timer_needs_of_probing()) - return 0; - arch_timer_banner(arch_timers_present); arch_counter_register(arch_timers_present); return arch_timer_arch_init(); @@ -927,26 +924,9 @@ static enum arch_timer_ppi_nr __init arch_timer_select_ppi(void) return ARCH_TIMER_PHYS_SECURE_PPI; }
-static int __init arch_timer_init(void) -{ - int ret; - - ret = arch_timer_register(); - if (ret) - return ret; - - ret = arch_timer_common_init(); - if (ret) - return ret; - - arch_timer_kvm_info.virtual_irq = arch_timer_ppi[ARCH_TIMER_VIRT_PPI]; - - return 0; -} - static int __init arch_timer_of_init(struct device_node *np) { - int i; + int i, ret;
if (arch_timers_present & ARCH_TIMER_TYPE_CP15) { pr_warn("multiple nodes in dt, skipping\n"); @@ -957,6 +937,8 @@ static int __init arch_timer_of_init(struct device_node *np) for (i = ARCH_TIMER_PHYS_SECURE_PPI; i < ARCH_TIMER_MAX_TIMER_PPI; i++) arch_timer_ppi[i] = irq_of_parse_and_map(np, i);
+ arch_timer_kvm_info.virtual_irq = arch_timer_ppi[ARCH_TIMER_VIRT_PPI]; + /* * Try to determine the frequency from the device tree, * if fail, get the frequency from the sysreg CNTFRQ. @@ -1001,7 +983,14 @@ static int __init arch_timer_of_init(struct device_node *np) arch_counter_suspend_stop = of_property_read_bool(np, "arm,no-tick-in-suspend");
- return arch_timer_init(); + ret = arch_timer_register(); + if (ret) + return ret; + + if (arch_timer_needs_of_probing()) + return 0; + + return arch_timer_common_init(); } CLOCKSOURCE_OF_DECLARE(armv7_arch_timer, "arm,armv7-timer", arch_timer_of_init); CLOCKSOURCE_OF_DECLARE(armv8_arch_timer, "arm,armv8-timer", arch_timer_of_init); @@ -1093,7 +1082,8 @@ static int __init arch_timer_mem_init(struct device_node *np) if (ret) goto out;
- return arch_timer_common_init(); + if (!arch_timer_needs_of_probing()) + ret = arch_timer_common_init(); out: iounmap(cntctlbase); of_node_put(best_frame); @@ -1122,6 +1112,7 @@ static int __init map_generic_timer_interrupt(u32 interrupt, u32 flags) /* Initialize per-processor generic timer */ static int __init arch_timer_acpi_init(struct acpi_table_header *table) { + int ret; struct acpi_table_gtdt *gtdt;
if (arch_timers_present & ARCH_TIMER_TYPE_CP15) { @@ -1149,6 +1140,8 @@ static int __init arch_timer_acpi_init(struct acpi_table_header *table) map_generic_timer_interrupt(gtdt->non_secure_el2_interrupt, gtdt->non_secure_el2_flags);
+ arch_timer_kvm_info.virtual_irq = arch_timer_ppi[ARCH_TIMER_VIRT_PPI]; + /* Get the frequency from the sysreg CNTFRQ */ arch_timer_sysreg_freq = arch_timer_get_sysreg_freq(); if (!arch_timer_sysreg_freq) { @@ -1165,8 +1158,11 @@ static int __init arch_timer_acpi_init(struct acpi_table_header *table) /* Always-on capability */ arch_timer_c3stop = !(gtdt->non_secure_el1_flags & ACPI_GTDT_ALWAYS_ON);
- arch_timer_init(); - return 0; + ret = arch_timer_register(); + if (ret) + return ret; + + return arch_timer_common_init(); } CLOCKSOURCE_ACPI_DECLARE(arch_timer, ACPI_SIG_GTDT, arch_timer_acpi_init); #endif
From: Fu Wei fu.wei@linaro.org
The patch introduce two new structs: arch_timer_mem, arch_timer_mem_frame. And also introduce a new define: ARCH_TIMER_MEM_MAX_FRAMES
These will be used for refactoring the memory-mapped timer init code to prepare for GTDT
Signed-off-by: Fu Wei fu.wei@linaro.org Reviewed-by: Hanjun Guo hanjun.guo@linaro.org --- include/clocksource/arm_arch_timer.h | 17 +++++++++++++++++ 1 file changed, 17 insertions(+)
diff --git a/include/clocksource/arm_arch_timer.h b/include/clocksource/arm_arch_timer.h index 4a98c06..b7dd185 100644 --- a/include/clocksource/arm_arch_timer.h +++ b/include/clocksource/arm_arch_timer.h @@ -57,6 +57,8 @@ enum arch_timer_spi_nr { #define ARCH_TIMER_MEM_PHYS_ACCESS 2 #define ARCH_TIMER_MEM_VIRT_ACCESS 3
+#define ARCH_TIMER_MEM_MAX_FRAMES 8 + #define ARCH_TIMER_USR_PCT_ACCESS_EN (1 << 0) /* physical counter */ #define ARCH_TIMER_USR_VCT_ACCESS_EN (1 << 1) /* virtual counter */ #define ARCH_TIMER_VIRT_EVT_EN (1 << 2) @@ -72,6 +74,21 @@ struct arch_timer_kvm_info { int virtual_irq; };
+struct arch_timer_mem_frame { + int frame_nr; + phys_addr_t cntbase; + size_t size; + int phys_irq; + int virt_irq; +}; + +struct arch_timer_mem { + phys_addr_t cntctlbase; + size_t size; + int num_frames; + struct arch_timer_mem_frame frame[ARCH_TIMER_MEM_MAX_FRAMES]; +}; + #ifdef CONFIG_ARM_ARCH_TIMER
extern u32 arch_timer_get_rate(void);
From: Fu Wei fu.wei@linaro.org
Currently the code to probe MMIO architected timers mixes DT parsing with actual poking of hardware. This makes the code harder than necessary to understand, and makes it difficult to add support for probing via ACPI.
This patch factors all the DT-specific logic out of arch_timer_mem_init(), into a new function arch_timer_mem_of_init(). The former pokes the hardware and determines the suitablility of frames based on a datastructure populated by the latter.
This cleanly separates the two and will make it possible to add probing using the ACPI GTDT in subsequent patches.
Signed-off-by: Fu Wei fu.wei@linaro.org Reviewed-by: Hanjun Guo hanjun.guo@linaro.org --- drivers/clocksource/arm_arch_timer.c | 156 +++++++++++++++++++++++++---------- 1 file changed, 111 insertions(+), 45 deletions(-)
diff --git a/drivers/clocksource/arm_arch_timer.c b/drivers/clocksource/arm_arch_timer.c index f2b9ec4..73e875d 100644 --- a/drivers/clocksource/arm_arch_timer.c +++ b/drivers/clocksource/arm_arch_timer.c @@ -995,17 +995,20 @@ static int __init arch_timer_of_init(struct device_node *np) CLOCKSOURCE_OF_DECLARE(armv7_arch_timer, "arm,armv7-timer", arch_timer_of_init); CLOCKSOURCE_OF_DECLARE(armv8_arch_timer, "arm,armv8-timer", arch_timer_of_init);
-static int __init arch_timer_mem_init(struct device_node *np) +static int __init arch_timer_mem_init(struct arch_timer_mem *timer_mem) { - struct device_node *frame, *best_frame = NULL; void __iomem *cntctlbase, *base; - unsigned int irq, ret = -EINVAL; + struct arch_timer_mem_frame *best_frame = NULL; + unsigned int irq; u32 cnttidr; + int i, ret;
- arch_timers_present |= ARCH_TIMER_TYPE_MEM; - cntctlbase = of_iomap(np, 0); + if (!timer_mem->num_frames) + return -ENODEV; + + cntctlbase = ioremap(timer_mem->cntctlbase, timer_mem->size); if (!cntctlbase) { - pr_err("Can't find CNTCTLBase\n"); + pr_err("Can't map CNTCTLBase.\n"); return -ENXIO; }
@@ -1015,26 +1018,18 @@ static int __init arch_timer_mem_init(struct device_node *np) * Try to find a virtual capable frame. Otherwise fall back to a * physical capable frame. */ - for_each_available_child_of_node(np, frame) { - int n; - u32 cntacr; - - if (of_property_read_u32(frame, "frame-number", &n)) { - pr_err("Missing frame-number\n"); - of_node_put(frame); - goto out; - } + for (i = 0; i < timer_mem->num_frames; i++) { + u32 cntacr = CNTACR_RFRQ | CNTACR_RWPT | CNTACR_RPCT | + CNTACR_RWVT | CNTACR_RVOFF | CNTACR_RVCT; + int n = timer_mem->frame[i].frame_nr;
/* Try enabling everything, and see what sticks */ - cntacr = CNTACR_RFRQ | CNTACR_RWPT | CNTACR_RPCT | - CNTACR_RWVT | CNTACR_RVOFF | CNTACR_RVCT; writel_relaxed(cntacr, cntctlbase + CNTACR(n)); cntacr = readl_relaxed(cntctlbase + CNTACR(n));
if ((cnttidr & CNTTIDR_VIRT(n)) && !(~cntacr & (CNTACR_RWVT | CNTACR_RVCT))) { - of_node_put(best_frame); - best_frame = frame; + best_frame = &timer_mem->frame[i]; arch_timer_mem_use_virtual = true; break; } @@ -1042,55 +1037,126 @@ static int __init arch_timer_mem_init(struct device_node *np) if (~cntacr & (CNTACR_RWPT | CNTACR_RPCT)) continue;
- of_node_put(best_frame); - best_frame = of_node_get(frame); + best_frame = &timer_mem->frame[i]; } + iounmap(cntctlbase);
- ret= -ENXIO; - base = arch_counter_base = of_io_request_and_map(best_frame, 0, - "arch_mem_timer"); - if (IS_ERR(base)) { - pr_err("Can't map frame's registers\n"); - goto out; + if (!best_frame) { + pr_err("Can't find frame for register\n"); + return -EINVAL; }
if (arch_timer_mem_use_virtual) - irq = irq_of_parse_and_map(best_frame, ARCH_TIMER_VIRT_SPI); + irq = best_frame->virt_irq; else - irq = irq_of_parse_and_map(best_frame, ARCH_TIMER_PHYS_SPI); + irq = best_frame->phys_irq;
- ret = -EINVAL; if (!irq) { pr_err("Frame missing %s irq.\n", arch_timer_mem_use_virtual ? "virt" : "phys"); - goto out; + return -EINVAL; }
- /* - * Try to determine the frequency from the device tree, - * if fail, get the frequency from the CNTFRQ reg of MMIO timer. - */ - if (of_property_read_u32(np, "clock-frequency", &arch_timer_mmio_freq)) + if (!request_mem_region(best_frame->cntbase, best_frame->size, + "arch_mem_timer")) + return -EBUSY; + + base = ioremap(best_frame->cntbase, best_frame->size); + if (!base) { + pr_err("Can't map frame's registers\n"); + return -ENXIO; + } + + if (!arch_timer_mmio_freq) arch_timer_mmio_freq = arch_timer_get_mmio_freq(base); - if (!arch_timer_mmio_freq) { - pr_err(FW_BUG "frequency not available for MMIO timer.\n"); - ret = -EINVAL; - goto out; + if (!arch_timer_mmio_freq || + (arch_timer_sysreg_freq && + arch_timer_mmio_freq != arch_timer_sysreg_freq)) { + pr_err(FW_BUG "invalid frequency for MMIO timer.\n"); + arch_timer_mmio_freq = 0; + iounmap(base); + return -EINVAL; }
ret = arch_timer_mem_register(base, irq); - if (ret) + if (ret) { + iounmap(base); + return ret; + } + + arch_counter_base = base; + arch_timers_present |= ARCH_TIMER_TYPE_MEM; + + return 0; +} + +static int __init arch_timer_mem_of_init(struct device_node *np) +{ + struct arch_timer_mem *timer_mem; + struct device_node *frame_node; + struct resource res; + int i, ret = -EINVAL; + + timer_mem = kzalloc(sizeof(*timer_mem), GFP_KERNEL); + if (!timer_mem) + return -ENOMEM; + + if (of_address_to_resource(np, 0, &res)) goto out; + timer_mem->cntctlbase = res.start; + timer_mem->size = resource_size(&res); + + i = 0; + for_each_available_child_of_node(np, frame_node) { + int n; + struct arch_timer_mem_frame *frame; + + if (i >= ARCH_TIMER_MEM_MAX_FRAMES) { + pr_err(FW_BUG "too many frames, only %u are permitted.\n", + ARCH_TIMER_MEM_MAX_FRAMES); + goto out; + }
- if (!arch_timer_needs_of_probing()) + frame = &timer_mem->frame[i]; + + if (of_property_read_u32(frame_node, "frame-number", &n)) { + pr_err(FW_BUG "Missing frame-number\n"); + of_node_put(frame_node); + goto out; + } + frame->frame_nr = n; + + if (of_address_to_resource(frame_node, 0, &res)) { + of_node_put(frame_node); + goto out; + } + frame->cntbase = res.start; + frame->size = resource_size(&res); + + frame->virt_irq = irq_of_parse_and_map(frame_node, + ARCH_TIMER_VIRT_SPI); + frame->phys_irq = irq_of_parse_and_map(frame_node, + ARCH_TIMER_PHYS_SPI); + + i++; + } + timer_mem->num_frames = i; + + /* + * Try to get the frequency from the device tree, + * if fail, we will try the CNTFRQ register in arch_timer_mem_init. + */ + of_property_read_u32(np, "clock-frequency", &arch_timer_mmio_freq); + + ret = arch_timer_mem_init(timer_mem); + if (!ret && !arch_timer_needs_of_probing()) ret = arch_timer_common_init(); out: - iounmap(cntctlbase); - of_node_put(best_frame); + kfree(timer_mem); return ret; } CLOCKSOURCE_OF_DECLARE(armv7_arch_timer_mem, "arm,armv7-timer-mem", - arch_timer_mem_init); + arch_timer_mem_of_init);
#ifdef CONFIG_ACPI static int __init map_generic_timer_interrupt(u32 interrupt, u32 flags)
From: Fu Wei fu.wei@linaro.org
This patch adds support for parsing arch timer info in GTDT, provides some kernel APIs to parse all the PPIs and always-on info in GTDT and export them.
By this driver, we can simplify arm_arch_timer drivers, and separate the ACPI GTDT knowledge from it.
Signed-off-by: Fu Wei fu.wei@linaro.org Signed-off-by: Hanjun Guo hanjun.guo@linaro.org Acked-by: Rafael J. Wysocki rafael.j.wysocki@intel.com Tested-by: Xiongfeng Wang wangxiongfeng2@huawei.com Reviewed-by: Hanjun Guo hanjun.guo@linaro.org Tested-by: Hanjun Guo hanjun.guo@linaro.org --- arch/arm64/Kconfig | 1 + drivers/acpi/arm64/Kconfig | 3 + drivers/acpi/arm64/Makefile | 1 + drivers/acpi/arm64/gtdt.c | 157 ++++++++++++++++++++++++++++++++++++++++++++ include/linux/acpi.h | 6 ++ 5 files changed, 168 insertions(+)
diff --git a/arch/arm64/Kconfig b/arch/arm64/Kconfig index 1117421..ab1ee10 100644 --- a/arch/arm64/Kconfig +++ b/arch/arm64/Kconfig @@ -2,6 +2,7 @@ config ARM64 def_bool y select ACPI_CCA_REQUIRED if ACPI select ACPI_GENERIC_GSI if ACPI + select ACPI_GTDT if ACPI select ACPI_REDUCED_HARDWARE_ONLY if ACPI select ACPI_MCFG if ACPI select ACPI_SPCR_TABLE if ACPI diff --git a/drivers/acpi/arm64/Kconfig b/drivers/acpi/arm64/Kconfig index 4616da4..5a6f80f 100644 --- a/drivers/acpi/arm64/Kconfig +++ b/drivers/acpi/arm64/Kconfig @@ -4,3 +4,6 @@
config ACPI_IORT bool + +config ACPI_GTDT + bool diff --git a/drivers/acpi/arm64/Makefile b/drivers/acpi/arm64/Makefile index 72331f2..1017def 100644 --- a/drivers/acpi/arm64/Makefile +++ b/drivers/acpi/arm64/Makefile @@ -1 +1,2 @@ obj-$(CONFIG_ACPI_IORT) += iort.o +obj-$(CONFIG_ACPI_GTDT) += gtdt.o diff --git a/drivers/acpi/arm64/gtdt.c b/drivers/acpi/arm64/gtdt.c new file mode 100644 index 0000000..8a03b4b --- /dev/null +++ b/drivers/acpi/arm64/gtdt.c @@ -0,0 +1,157 @@ +/* + * ARM Specific GTDT table Support + * + * Copyright (C) 2016, Linaro Ltd. + * Author: Daniel Lezcano daniel.lezcano@linaro.org + * Fu Wei fu.wei@linaro.org + * Hanjun Guo hanjun.guo@linaro.org + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. + */ + +#include <linux/acpi.h> +#include <linux/init.h> +#include <linux/kernel.h> + +#include <clocksource/arm_arch_timer.h> + +#undef pr_fmt +#define pr_fmt(fmt) "ACPI GTDT: " fmt + +/** + * struct acpi_gtdt_descriptor - Store the key info of GTDT for all functions + * @gtdt: The pointer to the struct acpi_table_gtdt of GTDT table. + * @gtdt_end: The pointer to the end of GTDT table. + * @platform_timer: The pointer to the start of Platform Timer Structure + * + * The struct store the key info of GTDT table, it should be initialized by + * acpi_gtdt_init. + */ +struct acpi_gtdt_descriptor { + struct acpi_table_gtdt *gtdt; + void *gtdt_end; + void *platform_timer; +}; + +static struct acpi_gtdt_descriptor acpi_gtdt_desc __initdata; + +static int __init map_gt_gsi(u32 interrupt, u32 flags) +{ + int trigger, polarity; + + trigger = (flags & ACPI_GTDT_INTERRUPT_MODE) ? ACPI_EDGE_SENSITIVE + : ACPI_LEVEL_SENSITIVE; + + polarity = (flags & ACPI_GTDT_INTERRUPT_POLARITY) ? ACPI_ACTIVE_LOW + : ACPI_ACTIVE_HIGH; + + return acpi_register_gsi(NULL, interrupt, trigger, polarity); +} + +/** + * acpi_gtdt_map_ppi() - Map the PPIs of per-cpu arch_timer. + * @type: the type of PPI. + * + * Note: Linux on arm64 isn't supported on the secure side. + * So we only handle the non-secure timer PPIs, + * ARCH_TIMER_PHYS_SECURE_PPI is treated as invalid type. + * + * Return: the mapped PPI value, 0 if error. + */ +int __init acpi_gtdt_map_ppi(int type) +{ + struct acpi_table_gtdt *gtdt = acpi_gtdt_desc.gtdt; + + switch (type) { + case ARCH_TIMER_PHYS_NONSECURE_PPI: + return map_gt_gsi(gtdt->non_secure_el1_interrupt, + gtdt->non_secure_el1_flags); + case ARCH_TIMER_VIRT_PPI: + return map_gt_gsi(gtdt->virtual_timer_interrupt, + gtdt->virtual_timer_flags); + + case ARCH_TIMER_HYP_PPI: + return map_gt_gsi(gtdt->non_secure_el2_interrupt, + gtdt->non_secure_el2_flags); + default: + pr_err("Failed to map timer interrupt: invalid type.\n"); + } + + return 0; +} + +/** + * acpi_gtdt_c3stop() - Got c3stop info from GTDT according to the type of PPI. + * @type: the type of PPI. + * + * Return: 1 if the timer can be in deep idle state, 0 otherwise. + */ +bool __init acpi_gtdt_c3stop(int type) +{ + struct acpi_table_gtdt *gtdt = acpi_gtdt_desc.gtdt; + + switch (type) { + case ARCH_TIMER_PHYS_NONSECURE_PPI: + return !(gtdt->non_secure_el1_flags & ACPI_GTDT_ALWAYS_ON); + + case ARCH_TIMER_VIRT_PPI: + return !(gtdt->virtual_timer_flags & ACPI_GTDT_ALWAYS_ON); + + case ARCH_TIMER_HYP_PPI: + return !(gtdt->non_secure_el2_flags & ACPI_GTDT_ALWAYS_ON); + + default: + pr_err("Failed to get c3stop info: invalid type.\n"); + } + + return 0; +} + +/** + * acpi_gtdt_init() - Get the info of GTDT table to prepare for further init. + * @table: The pointer to GTDT table. + * @platform_timer_count: The pointer of int variate for returning the + * number of platform timers. It can be NULL, if + * driver don't need this info. + * + * Return: 0 if success, -EINVAL if error. + */ +int __init acpi_gtdt_init(struct acpi_table_header *table, + int *platform_timer_count) +{ + int ret = 0; + int timer_count = 0; + void *platform_timer = NULL; + struct acpi_table_gtdt *gtdt; + + gtdt = container_of(table, struct acpi_table_gtdt, header); + acpi_gtdt_desc.gtdt = gtdt; + acpi_gtdt_desc.gtdt_end = (void *)table + table->length; + + if (table->revision < 2) + pr_warn("Revision:%d doesn't support Platform Timers.\n", + table->revision); + else if (!gtdt->platform_timer_count) + pr_debug("No Platform Timer.\n"); + else + timer_count = gtdt->platform_timer_count; + + if (timer_count) { + platform_timer = (void *)gtdt + gtdt->platform_timer_offset; + if (platform_timer < (void *)table + + sizeof(struct acpi_table_gtdt)) { + pr_err(FW_BUG "invalid timer data.\n"); + timer_count = 0; + platform_timer = NULL; + ret = -EINVAL; + } + } + + acpi_gtdt_desc.platform_timer = platform_timer; + if (platform_timer_count) + *platform_timer_count = timer_count; + + return ret; +} diff --git a/include/linux/acpi.h b/include/linux/acpi.h index 5b36974..d0b271e 100644 --- a/include/linux/acpi.h +++ b/include/linux/acpi.h @@ -597,6 +597,12 @@ enum acpi_reconfig_event { int acpi_reconfig_notifier_register(struct notifier_block *nb); int acpi_reconfig_notifier_unregister(struct notifier_block *nb);
+#ifdef CONFIG_ACPI_GTDT +int acpi_gtdt_init(struct acpi_table_header *table, int *platform_timer_count); +int acpi_gtdt_map_ppi(int type); +bool acpi_gtdt_c3stop(int type); +#endif + #else /* !CONFIG_ACPI */
#define acpi_disabled 1
From: Fu Wei fu.wei@linaro.org
The patch update arm_arch_timer driver to use the function provided by the new GTDT driver of ACPI. By this way, arm_arch_timer.c can be simplified, and separate all the ACPI GTDT knowledge from this timer driver.
Signed-off-by: Fu Wei fu.wei@linaro.org Signed-off-by: Hanjun Guo hanjun.guo@linaro.org Tested-by: Xiongfeng Wang wangxiongfeng2@huawei.com Reviewed-by: Hanjun Guo hanjun.guo@linaro.org Tested-by: Hanjun Guo hanjun.guo@linaro.org --- drivers/clocksource/arm_arch_timer.c | 54 ++++++++++++------------------------ 1 file changed, 17 insertions(+), 37 deletions(-)
diff --git a/drivers/clocksource/arm_arch_timer.c b/drivers/clocksource/arm_arch_timer.c index 73e875d..35e0b66 100644 --- a/drivers/clocksource/arm_arch_timer.c +++ b/drivers/clocksource/arm_arch_timer.c @@ -1158,63 +1158,36 @@ static int __init arch_timer_mem_of_init(struct device_node *np) CLOCKSOURCE_OF_DECLARE(armv7_arch_timer_mem, "arm,armv7-timer-mem", arch_timer_mem_of_init);
-#ifdef CONFIG_ACPI -static int __init map_generic_timer_interrupt(u32 interrupt, u32 flags) -{ - int trigger, polarity; - - if (!interrupt) - return 0; - - trigger = (flags & ACPI_GTDT_INTERRUPT_MODE) ? ACPI_EDGE_SENSITIVE - : ACPI_LEVEL_SENSITIVE; - - polarity = (flags & ACPI_GTDT_INTERRUPT_POLARITY) ? ACPI_ACTIVE_LOW - : ACPI_ACTIVE_HIGH; - - return acpi_register_gsi(NULL, interrupt, trigger, polarity); -} - +#ifdef CONFIG_ACPI_GTDT /* Initialize per-processor generic timer */ static int __init arch_timer_acpi_init(struct acpi_table_header *table) { int ret; - struct acpi_table_gtdt *gtdt;
if (arch_timers_present & ARCH_TIMER_TYPE_CP15) { pr_warn("already initialized, skipping\n"); return -EINVAL; }
- gtdt = container_of(table, struct acpi_table_gtdt, header); - arch_timers_present |= ARCH_TIMER_TYPE_CP15;
- arch_timer_ppi[ARCH_TIMER_PHYS_SECURE_PPI] = - map_generic_timer_interrupt(gtdt->secure_el1_interrupt, - gtdt->secure_el1_flags); + ret = acpi_gtdt_init(table, NULL); + if (ret) { + pr_err("Failed to init GTDT table.\n"); + return ret; + }
arch_timer_ppi[ARCH_TIMER_PHYS_NONSECURE_PPI] = - map_generic_timer_interrupt(gtdt->non_secure_el1_interrupt, - gtdt->non_secure_el1_flags); + acpi_gtdt_map_ppi(ARCH_TIMER_PHYS_NONSECURE_PPI);
arch_timer_ppi[ARCH_TIMER_VIRT_PPI] = - map_generic_timer_interrupt(gtdt->virtual_timer_interrupt, - gtdt->virtual_timer_flags); + acpi_gtdt_map_ppi(ARCH_TIMER_VIRT_PPI);
arch_timer_ppi[ARCH_TIMER_HYP_PPI] = - map_generic_timer_interrupt(gtdt->non_secure_el2_interrupt, - gtdt->non_secure_el2_flags); + acpi_gtdt_map_ppi(ARCH_TIMER_HYP_PPI);
arch_timer_kvm_info.virtual_irq = arch_timer_ppi[ARCH_TIMER_VIRT_PPI];
- /* Get the frequency from the sysreg CNTFRQ */ - arch_timer_sysreg_freq = arch_timer_get_sysreg_freq(); - if (!arch_timer_sysreg_freq) { - pr_err(FW_BUG "frequency not available.\n"); - return -EINVAL; - } - arch_timer_uses_ppi = arch_timer_select_ppi(); if (!arch_timer_ppi[arch_timer_uses_ppi]) { pr_err("No interrupt available, giving up\n"); @@ -1222,7 +1195,14 @@ static int __init arch_timer_acpi_init(struct acpi_table_header *table) }
/* Always-on capability */ - arch_timer_c3stop = !(gtdt->non_secure_el1_flags & ACPI_GTDT_ALWAYS_ON); + arch_timer_c3stop = acpi_gtdt_c3stop(arch_timer_uses_ppi); + + /* Get the frequency from the sysreg CNTFRQ */ + arch_timer_sysreg_freq = arch_timer_get_sysreg_freq(); + if (!arch_timer_sysreg_freq) { + pr_err(FW_BUG "frequency not available.\n"); + return -EINVAL; + }
ret = arch_timer_register(); if (ret)
From: Fu Wei fu.wei@linaro.org
On platforms booting with ACPI, architected memory-mapped timers' configuration data is provided by firmware through the ACPI GTDT static table.
The clocksource architected timer kernel driver requires a firmware interface to collect timer configuration and configure its driver. this infrastructure is present for device tree systems, but it is missing on systems booting with ACPI.
Implement the kernel infrastructure required to parse the static ACPI GTDT table so that the architected timer clocksource driver can make use of it on systems booting with ACPI, therefore enabling the corresponding timers configuration.
Signed-off-by: Fu Wei fu.wei@linaro.org Signed-off-by: Hanjun Guo hanjun.guo@linaro.org --- drivers/acpi/arm64/gtdt.c | 128 ++++++++++++++++++++++++++++++++++++++++++++++ include/linux/acpi.h | 1 + 2 files changed, 129 insertions(+)
diff --git a/drivers/acpi/arm64/gtdt.c b/drivers/acpi/arm64/gtdt.c index 8a03b4b..29b9acc 100644 --- a/drivers/acpi/arm64/gtdt.c +++ b/drivers/acpi/arm64/gtdt.c @@ -37,6 +37,28 @@ struct acpi_gtdt_descriptor {
static struct acpi_gtdt_descriptor acpi_gtdt_desc __initdata;
+static inline void *next_platform_timer(void *platform_timer) +{ + struct acpi_gtdt_header *gh = platform_timer; + + platform_timer += gh->length; + if (platform_timer < acpi_gtdt_desc.gtdt_end) + return platform_timer; + + return NULL; +} + +#define for_each_platform_timer(_g) \ + for (_g = acpi_gtdt_desc.platform_timer; _g; \ + _g = next_platform_timer(_g)) + +static inline bool is_timer_block(void *platform_timer) +{ + struct acpi_gtdt_header *gh = platform_timer; + + return gh->type == ACPI_GTDT_TYPE_TIMER_BLOCK; +} + static int __init map_gt_gsi(u32 interrupt, u32 flags) { int trigger, polarity; @@ -155,3 +177,109 @@ int __init acpi_gtdt_init(struct acpi_table_header *table,
return ret; } + +static int __init gtdt_parse_timer_block(struct acpi_gtdt_timer_block *block, + struct arch_timer_mem *data) +{ + int i, j; + struct acpi_gtdt_timer_entry *frame; + + if (!block->timer_count) { + pr_err(FW_BUG "GT block present, but frame count is zero."); + return -ENODEV; + } + + if (block->timer_count > ARCH_TIMER_MEM_MAX_FRAMES) { + pr_err(FW_BUG "GT block lists %d frames, ACPI spec only allows 8\n", + block->timer_count); + return -EINVAL; + } + + data->cntctlbase = (phys_addr_t)block->block_address; + /* + * According to "Table * CNTCTLBase memory map" of + * <ARM Architecture Reference Manual> for ARMv8, + * The size of the CNTCTLBase frame is 4KB(Offset 0x000 – 0xFFC). + */ + data->size = SZ_4K; + + frame = (void *)block + block->timer_offset; + if (frame + block->timer_count != (void *)block + block->header.length) + return -EINVAL; + + /* + * Get the GT timer Frame data for every GT Block Timer + */ + for (i = 0, j = 0; i < block->timer_count; i++, frame++) { + if (frame->common_flags & ACPI_GTDT_GT_IS_SECURE_TIMER) + continue; + + if (!frame->base_address || !frame->timer_interrupt) + return -EINVAL; + + data->frame[j].phys_irq = map_gt_gsi(frame->timer_interrupt, + frame->timer_flags); + if (data->frame[j].phys_irq <= 0) { + pr_warn("failed to map physical timer irq in frame %d.\n", + i); + return -EINVAL; + } + + data->frame[j].virt_irq = + map_gt_gsi(frame->virtual_timer_interrupt, + frame->virtual_timer_flags); + if (data->frame[j].virt_irq <= 0) { + pr_warn("failed to map virtual timer irq in frame %d.\n", + i); + acpi_unregister_gsi(frame->timer_interrupt); + return -EINVAL; + } + + data->frame[j].frame_nr = frame->frame_number; + data->frame[j].cntbase = frame->base_address; + /* + * According to "Table * CNTBaseN memory map" of + * <ARM Architecture Reference Manual> for ARMv8, + * The size of the CNTBaseN frame is 4KB(Offset 0x000 – 0xFFC). + */ + data->frame[j].size = SZ_4K; + j++; + } + data->num_frames = j; + + return 0; +} + +/** + * acpi_arch_timer_mem_init() - Get the info of all GT blocks in GTDT table. + * @data: the pointer to the array of struct arch_timer_mem for returning + * the result of parsing. The element number of this array should + * be platform_timer_count(the total number of platform timers). + * @count: The pointer of int variate for returning the number of GT + * blocks we have parsed. + * + * Return: 0 if success, -EINVAL/-ENODEV if error. + */ +int __init acpi_arch_timer_mem_init(struct arch_timer_mem *data, + int *timer_count) +{ + int ret; + void *platform_timer; + + *timer_count = 0; + for_each_platform_timer(platform_timer) { + if (is_timer_block(platform_timer)) { + ret = gtdt_parse_timer_block(platform_timer, data); + if (ret) + return ret; + data++; + (*timer_count)++; + } + } + + if (*timer_count) + pr_info("found %d memory-mapped timer block(s).\n", + *timer_count); + + return 0; +} diff --git a/include/linux/acpi.h b/include/linux/acpi.h index d0b271e..51e85b9 100644 --- a/include/linux/acpi.h +++ b/include/linux/acpi.h @@ -601,6 +601,7 @@ int acpi_reconfig_notifier_unregister(struct notifier_block *nb); int acpi_gtdt_init(struct acpi_table_header *table, int *platform_timer_count); int acpi_gtdt_map_ppi(int type); bool acpi_gtdt_c3stop(int type); +int acpi_arch_timer_mem_init(struct arch_timer_mem *data, int *timer_count); #endif
#else /* !CONFIG_ACPI */
Hi,
On Tue, Feb 07, 2017 at 02:50:13AM +0800, fu.wei@linaro.org wrote:
+static int __init gtdt_parse_timer_block(struct acpi_gtdt_timer_block *block,
struct arch_timer_mem *data)
Please s/data/timer_mem/ here, to match the rest of the timer code.
+{
- int i, j;
- struct acpi_gtdt_timer_entry *frame;
So as to make it clear what this is, and to make things a litlte simpler below, please s/frame/gtdt_frame/ here.
- if (!block->timer_count) {
pr_err(FW_BUG "GT block present, but frame count is zero.");return -ENODEV;- }
- if (block->timer_count > ARCH_TIMER_MEM_MAX_FRAMES) {
pr_err(FW_BUG "GT block lists %d frames, ACPI spec only allows 8\n",block->timer_count);return -EINVAL;- }
- data->cntctlbase = (phys_addr_t)block->block_address;
- /*
* According to "Table * CNTCTLBase memory map" of* <ARM Architecture Reference Manual> for ARMv8,* The size of the CNTCTLBase frame is 4KB(Offset 0x000 – 0xFFC).*/
As a general thing, please cite the version of the ARM ARM you're referring to, as over time the internal numbering (and the headings) change.
e.g. /* * The CNTCTLBase frame is 4KB (register offsets 0x000 - 0xFFC). * See ARM DDI 0487A.k_iss10775, page I1-5129, Table I1-3 * "CNTCTLBase memory map". */
- data->size = SZ_4K;
- frame = (void *)block + block->timer_offset;
- if (frame + block->timer_count != (void *)block + block->header.length)
return -EINVAL;- /*
* Get the GT timer Frame data for every GT Block Timer*/- for (i = 0, j = 0; i < block->timer_count; i++, frame++) {
With the gtdt_frame rename as above, here we can do:
struct arch_timer_mem_frame *frame = &timer_mem->frame[j];
if (frame->common_flags & ACPI_GTDT_GT_IS_SECURE_TIMER)continue;if (!frame->base_address || !frame->timer_interrupt)return -EINVAL;data->frame[j].phys_irq = map_gt_gsi(frame->timer_interrupt,frame->timer_flags);
... allowing us to simplify lines like this.
Thanks, Mark.
Hi Mark,
On 18 March 2017 at 03:40, Mark Rutland mark.rutland@arm.com wrote:
Hi,
On Tue, Feb 07, 2017 at 02:50:13AM +0800, fu.wei@linaro.org wrote:
+static int __init gtdt_parse_timer_block(struct acpi_gtdt_timer_block *block,
struct arch_timer_mem *data)Please s/data/timer_mem/ here, to match the rest of the timer code.
+{
int i, j;struct acpi_gtdt_timer_entry *frame;So as to make it clear what this is, and to make things a litlte simpler below, please s/frame/gtdt_frame/ here.
if (!block->timer_count) {pr_err(FW_BUG "GT block present, but frame count is zero.");return -ENODEV;}if (block->timer_count > ARCH_TIMER_MEM_MAX_FRAMES) {pr_err(FW_BUG "GT block lists %d frames, ACPI spec only allows 8\n",block->timer_count);return -EINVAL;}data->cntctlbase = (phys_addr_t)block->block_address;/** According to "Table * CNTCTLBase memory map" of* <ARM Architecture Reference Manual> for ARMv8,* The size of the CNTCTLBase frame is 4KB(Offset 0x000 – 0xFFC).*/As a general thing, please cite the version of the ARM ARM you're referring to, as over time the internal numbering (and the headings) change.
e.g. /* * The CNTCTLBase frame is 4KB (register offsets 0x000 - 0xFFC). * See ARM DDI 0487A.k_iss10775, page I1-5129, Table I1-3 * "CNTCTLBase memory map". */
data->size = SZ_4K;frame = (void *)block + block->timer_offset;if (frame + block->timer_count != (void *)block + block->header.length)return -EINVAL;/** Get the GT timer Frame data for every GT Block Timer*/for (i = 0, j = 0; i < block->timer_count; i++, frame++) {With the gtdt_frame rename as above, here we can do:
struct arch_timer_mem_frame *frame = &timer_mem->frame[j];
if (frame->common_flags & ACPI_GTDT_GT_IS_SECURE_TIMER)continue;if (!frame->base_address || !frame->timer_interrupt)return -EINVAL;data->frame[j].phys_irq = map_gt_gsi(frame->timer_interrupt,frame->timer_flags);... allowing us to simplify lines like this.
Thanks, will follow all the suggestion above. :-)
Thanks, Mark.
From: Fu Wei fu.wei@linaro.org
The patch add memory-mapped timer register support by using the information provided by the new GTDT driver of ACPI.
Signed-off-by: Fu Wei fu.wei@linaro.org Reviewed-by: Hanjun Guo hanjun.guo@linaro.org --- drivers/clocksource/arm_arch_timer.c | 35 ++++++++++++++++++++++++++++++++--- 1 file changed, 32 insertions(+), 3 deletions(-)
diff --git a/drivers/clocksource/arm_arch_timer.c b/drivers/clocksource/arm_arch_timer.c index 35e0b66..44c55ec 100644 --- a/drivers/clocksource/arm_arch_timer.c +++ b/drivers/clocksource/arm_arch_timer.c @@ -1159,10 +1159,35 @@ CLOCKSOURCE_OF_DECLARE(armv7_arch_timer_mem, "arm,armv7-timer-mem", arch_timer_mem_of_init);
#ifdef CONFIG_ACPI_GTDT -/* Initialize per-processor generic timer */ +static int __init arch_timer_mem_acpi_init(int platform_timer_count) +{ + struct arch_timer_mem *timer_mem; + int timer_count, i, ret; + + timer_mem = kcalloc(platform_timer_count, sizeof(*timer_mem), + GFP_KERNEL); + if (!timer_mem) + return -ENOMEM; + + ret = acpi_arch_timer_mem_init(timer_mem, &timer_count); + if (ret || !timer_count) + goto error; + + for (i = 0; i < timer_count; i++) { + ret = arch_timer_mem_init(timer_mem + i); + if (!ret) + break; + } + +error: + kfree(timer_mem); + return ret; +} + +/* Initialize per-processor generic timer and memory-mapped timer(if present) */ static int __init arch_timer_acpi_init(struct acpi_table_header *table) { - int ret; + int ret, platform_timer_count;
if (arch_timers_present & ARCH_TIMER_TYPE_CP15) { pr_warn("already initialized, skipping\n"); @@ -1171,7 +1196,7 @@ static int __init arch_timer_acpi_init(struct acpi_table_header *table)
arch_timers_present |= ARCH_TIMER_TYPE_CP15;
- ret = acpi_gtdt_init(table, NULL); + ret = acpi_gtdt_init(table, &platform_timer_count); if (ret) { pr_err("Failed to init GTDT table.\n"); return ret; @@ -1208,6 +1233,10 @@ static int __init arch_timer_acpi_init(struct acpi_table_header *table) if (ret) return ret;
+ if (platform_timer_count && + arch_timer_mem_acpi_init(platform_timer_count)) + pr_err("Failed to initialize memory-mapped timer.\n"); + return arch_timer_common_init(); } CLOCKSOURCE_ACPI_DECLARE(arch_timer, ACPI_SIG_GTDT, arch_timer_acpi_init);
From: Fu Wei fu.wei@linaro.org
This driver adds support for parsing SBSA Generic Watchdog timer in GTDT, parse all info in SBSA Generic Watchdog Structure in GTDT, and creating a platform device with that information.
This allows the operating system to obtain device data from the resource of platform device. The platform device named "sbsa-gwdt" can be used by the ARM SBSA Generic Watchdog driver.
Signed-off-by: Fu Wei fu.wei@linaro.org Signed-off-by: Hanjun Guo hanjun.guo@linaro.org Tested-by: Xiongfeng Wang wangxiongfeng2@huawei.com --- drivers/acpi/arm64/gtdt.c | 93 +++++++++++++++++++++++++++++++++++++++++++++++ drivers/watchdog/Kconfig | 1 + 2 files changed, 94 insertions(+)
diff --git a/drivers/acpi/arm64/gtdt.c b/drivers/acpi/arm64/gtdt.c index 29b9acc..3a2eb57 100644 --- a/drivers/acpi/arm64/gtdt.c +++ b/drivers/acpi/arm64/gtdt.c @@ -14,6 +14,7 @@ #include <linux/acpi.h> #include <linux/init.h> #include <linux/kernel.h> +#include <linux/platform_device.h>
#include <clocksource/arm_arch_timer.h>
@@ -59,6 +60,13 @@ static inline bool is_timer_block(void *platform_timer) return gh->type == ACPI_GTDT_TYPE_TIMER_BLOCK; }
+static inline bool is_watchdog(void *platform_timer) +{ + struct acpi_gtdt_header *gh = platform_timer; + + return gh->type == ACPI_GTDT_TYPE_WATCHDOG; +} + static int __init map_gt_gsi(u32 interrupt, u32 flags) { int trigger, polarity; @@ -283,3 +291,88 @@ int __init acpi_arch_timer_mem_init(struct arch_timer_mem *data,
return 0; } + +/* + * Initialize a SBSA generic Watchdog platform device info from GTDT + */ +static int __init gtdt_import_sbsa_gwdt(struct acpi_gtdt_watchdog *wd, + int index) +{ + struct platform_device *pdev; + int irq = map_gt_gsi(wd->timer_interrupt, wd->timer_flags); + int no_irq = 1; + + /* + * According to SBSA specification the size of refresh and control + * frames of SBSA Generic Watchdog is SZ_4K(Offset 0x000 – 0xFFF). + */ + struct resource res[] = { + DEFINE_RES_MEM(wd->control_frame_address, SZ_4K), + DEFINE_RES_MEM(wd->refresh_frame_address, SZ_4K), + DEFINE_RES_IRQ(irq), + }; + + pr_debug("found a Watchdog (0x%llx/0x%llx gsi:%u flags:0x%x).\n", + wd->refresh_frame_address, wd->control_frame_address, + wd->timer_interrupt, wd->timer_flags); + + if (!(wd->refresh_frame_address && wd->control_frame_address)) { + pr_err(FW_BUG "failed to get the Watchdog base address.\n"); + return -EINVAL; + } + + if (!wd->timer_interrupt) + pr_warn(FW_BUG "failed to get the Watchdog interrupt.\n"); + else if (irq <= 0) + pr_warn("failed to map the Watchdog interrupt.\n"); + else + no_irq = 0; + + /* + * Add a platform device named "sbsa-gwdt" to match the platform driver. + * "sbsa-gwdt": SBSA(Server Base System Architecture) Generic Watchdog + * The platform driver (like drivers/watchdog/sbsa_gwdt.c)can get device + * info below by matching this name. + */ + pdev = platform_device_register_simple("sbsa-gwdt", index, res, + ARRAY_SIZE(res) - no_irq); + if (IS_ERR(pdev)) { + acpi_unregister_gsi(wd->timer_interrupt); + return PTR_ERR(pdev); + } + + return 0; +} + +static int __init gtdt_sbsa_gwdt_init(void) +{ + int ret, i = 0; + void *platform_timer; + struct acpi_table_header *table; + + if (acpi_disabled) + return 0; + + if (ACPI_FAILURE(acpi_get_table(ACPI_SIG_GTDT, 0, &table))) + return -EINVAL; + + ret = acpi_gtdt_init(table, NULL); + if (ret) + return ret; + + for_each_platform_timer(platform_timer) { + if (is_watchdog(platform_timer)) { + ret = gtdt_import_sbsa_gwdt(platform_timer, i); + if (ret) + break; + i++; + } + } + + if (i) + pr_info("found %d SBSA generic Watchdog(s).\n", i); + + return ret; +} + +device_initcall(gtdt_sbsa_gwdt_init); diff --git a/drivers/watchdog/Kconfig b/drivers/watchdog/Kconfig index acb00b5..c899df1 100644 --- a/drivers/watchdog/Kconfig +++ b/drivers/watchdog/Kconfig @@ -219,6 +219,7 @@ config ARM_SBSA_WATCHDOG tristate "ARM SBSA Generic Watchdog" depends on ARM64 depends on ARM_ARCH_TIMER + depends on ACPI_GTDT || !ACPI select WATCHDOG_CORE help ARM SBSA Generic Watchdog has two stage timeouts:
On Tue, Feb 07, 2017 at 02:50:15AM +0800, fu.wei@linaro.org wrote:
+static int __init gtdt_import_sbsa_gwdt(struct acpi_gtdt_watchdog *wd,
int index)+{
- struct platform_device *pdev;
- int irq = map_gt_gsi(wd->timer_interrupt, wd->timer_flags);
- int no_irq = 1;
- /*
* According to SBSA specification the size of refresh and control* frames of SBSA Generic Watchdog is SZ_4K(Offset 0x000 – 0xFFF).*/- struct resource res[] = {
DEFINE_RES_MEM(wd->control_frame_address, SZ_4K),DEFINE_RES_MEM(wd->refresh_frame_address, SZ_4K),DEFINE_RES_IRQ(irq),- };
- pr_debug("found a Watchdog (0x%llx/0x%llx gsi:%u flags:0x%x).\n",
wd->refresh_frame_address, wd->control_frame_address,wd->timer_interrupt, wd->timer_flags);- if (!(wd->refresh_frame_address && wd->control_frame_address)) {
pr_err(FW_BUG "failed to get the Watchdog base address.\n");return -EINVAL;- }
- if (!wd->timer_interrupt)
pr_warn(FW_BUG "failed to get the Watchdog interrupt.\n");
I've not been able to find where the ACPI spec says that zero is not a valid GSIV. This may simply be an oversight/ambiguity in the spec.
Is there any statement to that effect?
- else if (irq <= 0)
pr_warn("failed to map the Watchdog interrupt.\n");- else
no_irq = 0;- /*
* Add a platform device named "sbsa-gwdt" to match the platform driver.* "sbsa-gwdt": SBSA(Server Base System Architecture) Generic Watchdog* The platform driver (like drivers/watchdog/sbsa_gwdt.c)can get device* info below by matching this name.*/- pdev = platform_device_register_simple("sbsa-gwdt", index, res,
ARRAY_SIZE(res) - no_irq);
This no_irq variable is messy and confusing.
Get rid of no_irq, and replace it with nr_res, initialised to ARRAY_SIZE(res). If there's no interrupt, subtract one.
[...]
- for_each_platform_timer(platform_timer) {
if (is_watchdog(platform_timer)) {ret = gtdt_import_sbsa_gwdt(platform_timer, i);if (ret)break;i++;}- }
- if (i)
pr_info("found %d SBSA generic Watchdog(s).\n", i);
My reading of SBSA is that there is one watchdog in the system.
Is that not the case?
[...]
diff --git a/drivers/watchdog/Kconfig b/drivers/watchdog/Kconfig index acb00b5..c899df1 100644 --- a/drivers/watchdog/Kconfig +++ b/drivers/watchdog/Kconfig @@ -219,6 +219,7 @@ config ARM_SBSA_WATCHDOG tristate "ARM SBSA Generic Watchdog" depends on ARM64 depends on ARM_ARCH_TIMER
- depends on ACPI_GTDT || !ACPI
I don't think this is necessary.
This series hasn't touched this driver code at all.
Thanks, Mark.
Hi Mark
On 18 March 2017 at 04:01, Mark Rutland mark.rutland@arm.com wrote:
On Tue, Feb 07, 2017 at 02:50:15AM +0800, fu.wei@linaro.org wrote:
+static int __init gtdt_import_sbsa_gwdt(struct acpi_gtdt_watchdog *wd,
int index)+{
struct platform_device *pdev;int irq = map_gt_gsi(wd->timer_interrupt, wd->timer_flags);int no_irq = 1;/** According to SBSA specification the size of refresh and control* frames of SBSA Generic Watchdog is SZ_4K(Offset 0x000 – 0xFFF).*/struct resource res[] = {DEFINE_RES_MEM(wd->control_frame_address, SZ_4K),DEFINE_RES_MEM(wd->refresh_frame_address, SZ_4K),DEFINE_RES_IRQ(irq),};pr_debug("found a Watchdog (0x%llx/0x%llx gsi:%u flags:0x%x).\n",wd->refresh_frame_address, wd->control_frame_address,wd->timer_interrupt, wd->timer_flags);if (!(wd->refresh_frame_address && wd->control_frame_address)) {pr_err(FW_BUG "failed to get the Watchdog base address.\n");return -EINVAL;}if (!wd->timer_interrupt)pr_warn(FW_BUG "failed to get the Watchdog interrupt.\n");I've not been able to find where the ACPI spec says that zero is not a valid GSIV. This may simply be an oversight/ambiguity in the spec.
Is there any statement to that effect?
you are right, zero is a valid GSIV, I will delete this check. Thanks
else if (irq <= 0)pr_warn("failed to map the Watchdog interrupt.\n");elseno_irq = 0;/** Add a platform device named "sbsa-gwdt" to match the platform driver.* "sbsa-gwdt": SBSA(Server Base System Architecture) Generic Watchdog* The platform driver (like drivers/watchdog/sbsa_gwdt.c)can get device* info below by matching this name.*/pdev = platform_device_register_simple("sbsa-gwdt", index, res,ARRAY_SIZE(res) - no_irq);This no_irq variable is messy and confusing.
Get rid of no_irq, and replace it with nr_res, initialised to ARRAY_SIZE(res). If there's no interrupt, subtract one.
Sure, you are right ,will do
[...]
for_each_platform_timer(platform_timer) {if (is_watchdog(platform_timer)) {ret = gtdt_import_sbsa_gwdt(platform_timer, i);if (ret)break;i++;}}if (i)pr_info("found %d SBSA generic Watchdog(s).\n", i);My reading of SBSA is that there is one watchdog in the system.
Is that not the case?
do you mean: --------------- 4.2.4 Watchdogs The base server system implements a Generic Watchdog as specified in APPENDIX A: Generic Watchdog. ---------------
I am not sure about that if this is saying "we only have one SBSA watchdog in a system"
would you let me know where mention it? Do I miss something?
Thanks :-)
[...]
diff --git a/drivers/watchdog/Kconfig b/drivers/watchdog/Kconfig index acb00b5..c899df1 100644 --- a/drivers/watchdog/Kconfig +++ b/drivers/watchdog/Kconfig @@ -219,6 +219,7 @@ config ARM_SBSA_WATCHDOG tristate "ARM SBSA Generic Watchdog" depends on ARM64 depends on ARM_ARCH_TIMER
depends on ACPI_GTDT || !ACPII don't think this is necessary.
This series hasn't touched this driver code at all.
yes, since we are using "select ACPI_GTDT if ACPI" in ARM64, we don't this. Thanks for pointing it out. :-)
Thanks, Mark.
On Tue, Mar 21, 2017 at 01:57:58AM +0800, Fu Wei wrote:
On 18 March 2017 at 04:01, Mark Rutland mark.rutland@arm.com wrote:
On Tue, Feb 07, 2017 at 02:50:15AM +0800, fu.wei@linaro.org wrote:
I've not been able to find where the ACPI spec says that zero is not a valid GSIV. This may simply be an oversight/ambiguity in the spec.
Is there any statement to that effect?
you are right, zero is a valid GSIV, I will delete this check. Thanks
That being the case, how does one describe a watchdog that does not have an interrupt?
As I mentioned, I think this is an oversight/ambiguity in the spec tat we should address.
My reading of SBSA is that there is one watchdog in the system.
Is that not the case?
do you mean:
4.2.4 Watchdogs The base server system implements a Generic Watchdog as specified in APPENDIX A: Generic Watchdog.
I am not sure about that if this is saying "we only have one SBSA watchdog in a system"
would you let me know where mention it? Do I miss something?
My reading was that the 'a' above meant a single element. i.e.
The base server system implements _a_ Generic Watchdog as specified in APPENDIX A: Generic Watchdog.
Subsequently in 4.2.5, it is stated:
In this scenario, the system wakeup timer or generic watchdog is still required to send its interrupt.
... which only makes sense if there is a single watchdog in the system.
Perhaps this is an oversight in the specification.
Thanks, Mark.
On Mon, Mar 20, 2017 at 06:09:50PM +0000, Mark Rutland wrote:
On Tue, Mar 21, 2017 at 01:57:58AM +0800, Fu Wei wrote:
On 18 March 2017 at 04:01, Mark Rutland mark.rutland@arm.com wrote:
On Tue, Feb 07, 2017 at 02:50:15AM +0800, fu.wei@linaro.org wrote:
I've not been able to find where the ACPI spec says that zero is not a valid GSIV. This may simply be an oversight/ambiguity in the spec.
Is there any statement to that effect?
you are right, zero is a valid GSIV, I will delete this check. Thanks
That being the case, how does one describe a watchdog that does not have an interrupt?
As I mentioned, I think this is an oversight/ambiguity in the spec tat we should address.
My reading of SBSA is that there is one watchdog in the system.
Is that not the case?
do you mean:
4.2.4 Watchdogs The base server system implements a Generic Watchdog as specified in APPENDIX A: Generic Watchdog.
I am not sure about that if this is saying "we only have one SBSA watchdog in a system"
would you let me know where mention it? Do I miss something?
My reading was that the 'a' above meant a single element. i.e.
The base server system implements _a_ Generic Watchdog as specified in APPENDIX A: Generic Watchdog.
It is a requirement of a conforming implementation that there be a generic watchdog (impl as per the appendix). That doesn't preclude an implmentation from providing additional watchdogs (for example, if the processor implements EL3, it is likely that an implementation will include a secure watchdog as well as a non-secure watchdog).
The SBSA describes the minimal hardware requirements for a compliant server.
scott
Hi Mark, Lurndal,
On 21 March 2017 at 02:50, Lurndal, Scott Scott.Lurndal@cavium.com wrote:
On Mon, Mar 20, 2017 at 06:09:50PM +0000, Mark Rutland wrote:
On Tue, Mar 21, 2017 at 01:57:58AM +0800, Fu Wei wrote:
On 18 March 2017 at 04:01, Mark Rutland mark.rutland@arm.com wrote:
On Tue, Feb 07, 2017 at 02:50:15AM +0800, fu.wei@linaro.org wrote:
I've not been able to find where the ACPI spec says that zero is not a valid GSIV. This may simply be an oversight/ambiguity in the spec.
Is there any statement to that effect?
you are right, zero is a valid GSIV, I will delete this check. Thanks
That being the case, how does one describe a watchdog that does not have an interrupt?
As I mentioned, I think this is an oversight/ambiguity in the spec tat we should address.
My reading of SBSA is that there is one watchdog in the system.
Is that not the case?
do you mean:
4.2.4 Watchdogs The base server system implements a Generic Watchdog as specified in APPENDIX A: Generic Watchdog.
I am not sure about that if this is saying "we only have one SBSA watchdog in a system"
would you let me know where mention it? Do I miss something?
My reading was that the 'a' above meant a single element. i.e.
The base server system implements _a_ Generic Watchdog as specified in APPENDIX A: Generic Watchdog.It is a requirement of a conforming implementation that there be a generic watchdog (impl as per the appendix). That doesn't preclude an implmentation from providing additional watchdogs (for example, if the processor implements EL3, it is likely that an implementation will include a secure watchdog as well as a non-secure watchdog).
The SBSA describes the minimal hardware requirements for a compliant server.
So I think, for the SBSA watchdog:
(1) there maybe more then one non-secure watchdog in GTDT
(2) we may also need to skip secure watchdogs in GTDT, and only register non-secure watchdogs into platform resources.
Please correct me, if I misunderstand something.
scott
On Tue, Mar 21, 2017 at 11:48:02AM +0800, Fu Wei wrote:
Hi Mark, Lurndal,
The base server system implements _a_ Generic Watchdog as specified in APPENDIX A: Generic Watchdog.It is a requirement of a conforming implementation that there be a generic watchdog (impl as per the appendix). That doesn't preclude an implmentation from providing additional watchdogs (for example, if the processor implements EL3, it is likely that an implementation will include a secure watchdog as well as a non-secure watchdog).
The SBSA describes the minimal hardware requirements for a compliant server.
So I think, for the SBSA watchdog:
(1) there maybe more then one non-secure watchdog in GTDT
I suppose a firmware vendor could chose to expose more than the platform minimum to linux. Not quite sure what linux would do with it :-)
(2) we may also need to skip secure watchdogs in GTDT, and only register non-secure watchdogs into platform resources.
The secure watchdog will, be definition, never be accessible to non-secure EL2 or non-secure EL1, so only in the case of a secure EL1 operating system would the secure watchdog ever be conveyed through ACPI. I don't think secure EL1 is in the scope of the SBSA, or something that needs to be accomodated in the GTDT at this time.
scott
Hi Mark,
On 21 March 2017 at 02:09, Mark Rutland mark.rutland@arm.com wrote:
On Tue, Mar 21, 2017 at 01:57:58AM +0800, Fu Wei wrote:
On 18 March 2017 at 04:01, Mark Rutland mark.rutland@arm.com wrote:
On Tue, Feb 07, 2017 at 02:50:15AM +0800, fu.wei@linaro.org wrote:
I've not been able to find where the ACPI spec says that zero is not a valid GSIV. This may simply be an oversight/ambiguity in the spec.
Is there any statement to that effect?
you are right, zero is a valid GSIV, I will delete this check. Thanks
That being the case, how does one describe a watchdog that does not have an interrupt?
I think we may can use "Timer Flags", because all the GSIV come with a flag, if we can define a bit field called "valid" for all GSIV
Bit Field Bit Offset Number of bits Description Valid 31 1 This bit indicates the validity of the timer interrupt 1: Interrupt is valid 0: Interrupt is invalid Then we don't need to test the value of GSIV, just test this bit instead.
Just my thought, hope this makes sense to all of you :-)
As I mentioned, I think this is an oversight/ambiguity in the spec tat we should address.
My reading of SBSA is that there is one watchdog in the system.
Is that not the case?
do you mean:
4.2.4 Watchdogs The base server system implements a Generic Watchdog as specified in APPENDIX A: Generic Watchdog.
I am not sure about that if this is saying "we only have one SBSA watchdog in a system"
would you let me know where mention it? Do I miss something?
My reading was that the 'a' above meant a single element. i.e.
The base server system implements _a_ Generic Watchdog as specified in APPENDIX A: Generic Watchdog.Subsequently in 4.2.5, it is stated:
In this scenario, the system wakeup timer or generic watchdog is still required to send its interrupt.... which only makes sense if there is a single watchdog in the system.
Perhaps this is an oversight in the specification.
Thanks, Mark.
Hi Mark, Marc
On 7 February 2017 at 02:50, fu.wei@linaro.org wrote:
From: Fu Wei fu.wei@linaro.org
This patchset: (1)Preparation for adding GTDT support in arm_arch_timer: 1. Introduce two functions to get the frequency from mmio and sysreg. 2. separate out device-tree code from arch_timer_detect_rate 3. remove arch_timer_detect_rate use arch_timer_get_*_freq directly 4. split arch_timer_rate for different types of timer 5. Refactor arch_timer_needs_probing, and move it into DT init call 6. Introduce some new structs and refactor the MMIO timer init code for reusing some common code.
(2)Introduce ACPI GTDT parser: drivers/acpi/arm64/acpi_gtdt.c Parse all kinds of timer in GTDT table of ACPI:arch timer, memory-mapped timer and SBSA Generic Watchdog timer. This driver can help to simplify all the relevant timer drivers, and separate all the ACPI GTDT knowledge from them. (3)Simplify ACPI code for arm_arch_timer (4)Add GTDT support for ARM memory-mapped timer.This patchset has been tested on the following platforms with ACPI enabled: (1)ARM Foundation v8 model
Changelog: v21: https://lkml.org/lkml/2017/2/6/ Introduce two functions to get the frequency from mmio and sysreg. Remove arch_timer_detect_rate use arch_timer_get_*_freq directly Split arch_timer_rate for different types of timer. Skip secure timer frame in GTDT driver. Rebase to git://git.kernel.org/pub/scm/linux/kernel/git/mark/linux.git arch-timer/cleanup (The first 6 patches in v20 have been merged into arch-timer/cleanup branch)
Did I follow your suggestion correctly? I wonder how to improve this patchset. May I have your some suggestion or feedback on v21? :-)
Great thanks for your help!
v20: https://lkml.org/lkml/2017/1/18/534 Reorder the first 4 patches and split the 4th patches. Leave CNTHCTL_* as they originally were. Fix the bug in arch_timer_select_ppi. Split "Rework counter frequency detection" patch. Rework the arch_timer_detect_rate function. Improve the commit message of "Refactor MMIO timer probing". Rebase to 4.10.0-rc4
v19: https://lkml.org/lkml/2016/12/21/25 Fix a '\n' missing in a error message in arch_timer_mem_init. Add "request_mem_region" for ioremapping cntbase, according to f947ee1 clocksource/drivers/arm_arch_timer: Map frame with of_io_request_and_map() Rebase to 4.9.0-gfb779ff
v18: https://lkml.org/lkml/2016/12/8/446 Fix 8/15 patch problem of "int ret;" in arch_timer_acpi_init. Rebase to 4.9.0-rc8-g9269898
v17: https://lkml.org/lkml/2016/11/25/140 Take out some cleanups from 4/15. Merge 5/15 and 6/15, improve PPI determination code, improve commit message. Rework counter frequency detection. Move arch_timer_needs_of_probing into DT init call. Move Platform Timer scan loop back to timer init call to avoid allocating and free memory. Improve all the exported functions' comment.
v16: https://lkml.org/lkml/2016/11/16/268 Fix patchset problem about static enum ppi_nr of 01/13 in v15. Refactor arch_timer_detect_rate. Refactor arch_timer_needs_probing.
v15: https://lkml.org/lkml/2016/11/15/366 Re-order patches Add arm_arch_timer refactoring patches to prepare for GTDT: 1. rename some enums and defines, and some cleanups 2. separate out arch_timer_uses_ppi init code and fix a potential bug 3. Improve some new structs, refactor the timer init code. Since the some structs have been changed, GTDT parser for memory-mapped timer and SBSA Generic Watchdog timer have been update.
v14: https://lkml.org/lkml/2016/9/28/573 Separate memory-mapped timer GTDT support into two patches 1. Refactor the timer init code to prepare for GTDT 2. Add GTDT support for memory-mapped timer
v13: http://www.mail-archive.com/linux-kernel@vger.kernel.org/msg1231717.html Improve arm_arch_timer code for memory-mapped timer GTDT support, refactor original memory-mapped timer dt support for reusing some common code.
v12: https://lkml.org/lkml/2016/9/13/250 Rebase to latest Linux 4.8-rc6 Delete the confusing "skipping" in the error message.
V11: https://lkml.org/lkml/2016/9/6/354 Rebase to latest Linux 4.8-rc5 Delete typedef (suggested by checkpatch.pl)
V10: https://lkml.org/lkml/2016/7/26/215 Drop the "readq" patch. Rebase to latest Linux 4.7.
V9: https://lkml.org/lkml/2016/7/25/345 Improve pr_err message in acpi gtdt driver. Update Commit message for 7/9 shorten the irq mapping function name Improve GTDT driver for memory-mapped timer
v8: https://lkml.org/lkml/2016/7/19/660 Improve "pr_fmt(fmt)" definition: add "ACPI" in front of "GTDT", and also improve printk message. Simplify is_timer_block and is_watchdog. Merge acpi_gtdt_desc_init and gtdt_arch_timer_init into acpi_gtdt_init(); Delete __init in include/linux/acpi.h for GTDT API Make ARM64 select GTDT. Delete "#include <linux/module.h>" from acpi_gtdt.c Simplify GT block parse code.
v7: https://lkml.org/lkml/2016/7/13/769 Move the GTDT driver to drivers/acpi/arm64 Add add the ARM64-specific ACPI Support maintainers in MAINTAINERS Merge 3 patches of GTDT parser driver. Fix the for_each_platform_timer bug.
v6: https://lkml.org/lkml/2016/6/29/580 split the GTDT driver to 4 parts: basic, arch_timer, memory-mapped timer, and SBSA Generic Watchdog timer Improve driver by suggestions and example code from Daniel Lezcano
v5: https://lkml.org/lkml/2016/5/24/356 Sorting out all patches, simplify the API of GTDT driver: GTDT driver just fills the data struct for arm_arch_timer driver.
v4: https://lists.linaro.org/pipermail/linaro-acpi/2016-March/006667.html Delete the kvm relevant patches Separate two patches for sorting out the code for arm_arch_timer. Improve irq info export code to allow missing irq info in GTDT table.
v3: https://lkml.org/lkml/2016/2/1/658 Improve GTDT driver code: (1)improve pr_* by defining pr_fmt(fmt) (2)simplify gtdt_sbsa_gwdt_init (3)improve gtdt_arch_timer_data_init, if table is NULL, it will try to get GTDT table. Move enum ppi_nr to arm_arch_timer.h, and add enum spi_nr. Add arm_arch_timer get ppi from DT and GTDT support for kvm.
v2: https://lkml.org/lkml/2015/12/2/10 Rebase to latest kernel version(4.4-rc3). Fix the bug about the config problem, use CONFIG_ACPI_GTDT instead of CONFIG_ACPI in arm_arch_timer.c
v1: The first upstreaming version: https://lkml.org/lkml/2015/10/28/553
Fu Wei (13): clocksource: arm_arch_timer: introduce two functions to get the frequency from mmio and sysreg. clocksource: arm_arch_timer: separate out device-tree code from arch_timer_detect_rate clocksource: arm_arch_timer: remove arch_timer_detect_rate clocksource: arm_arch_timer: split arch_timer_rate for different types of timer clocksource: arm_arch_timer: refactor arch_timer_needs_probing clocksource: arm_arch_timer: move arch_timer_needs_of_probing into DT init call clocksource: arm_arch_timer: introduce some new structs to prepare for GTDT clocksource: arm_arch_timer: refactor MMIO timer probing. acpi/arm64: Add GTDT table parse driver clocksource: arm_arch_timer: simplify ACPI support code. acpi/arm64: Add memory-mapped timer support in GTDT driver clocksource: arm_arch_timer: add GTDT support for memory-mapped timer acpi/arm64: Add SBSA Generic Watchdog support in GTDT driver
arch/arm64/Kconfig | 1 + drivers/acpi/arm64/Kconfig | 3 + drivers/acpi/arm64/Makefile | 1 + drivers/acpi/arm64/gtdt.c | 378 +++++++++++++++++++++++++++++++++++ drivers/clocksource/arm_arch_timer.c | 354 ++++++++++++++++++++------------ drivers/watchdog/Kconfig | 1 + include/clocksource/arm_arch_timer.h | 17 ++ include/linux/acpi.h | 7 + 8 files changed, 635 insertions(+), 127 deletions(-) create mode 100644 drivers/acpi/arm64/gtdt.c
-- 2.9.3
Hi Mark, Marc,
I have tried to rebase all the 19(6+13) patches on 4.11-rc1, all the patchse can directly apply on 4.11-rc1,
Could you help to review the patches, and see if there is anywhere I can improve ? Great thanks ! :-)
On 20 February 2017 at 17:20, Fu Wei fu.wei@linaro.org wrote:
Hi Mark, Marc
On 7 February 2017 at 02:50, fu.wei@linaro.org wrote:
From: Fu Wei fu.wei@linaro.org
This patchset: (1)Preparation for adding GTDT support in arm_arch_timer: 1. Introduce two functions to get the frequency from mmio and sysreg. 2. separate out device-tree code from arch_timer_detect_rate 3. remove arch_timer_detect_rate use arch_timer_get_*_freq directly 4. split arch_timer_rate for different types of timer 5. Refactor arch_timer_needs_probing, and move it into DT init call 6. Introduce some new structs and refactor the MMIO timer init code for reusing some common code.
(2)Introduce ACPI GTDT parser: drivers/acpi/arm64/acpi_gtdt.c Parse all kinds of timer in GTDT table of ACPI:arch timer, memory-mapped timer and SBSA Generic Watchdog timer. This driver can help to simplify all the relevant timer drivers, and separate all the ACPI GTDT knowledge from them. (3)Simplify ACPI code for arm_arch_timer (4)Add GTDT support for ARM memory-mapped timer.This patchset has been tested on the following platforms with ACPI enabled: (1)ARM Foundation v8 model
Changelog: v21: https://lkml.org/lkml/2017/2/6/ Introduce two functions to get the frequency from mmio and sysreg. Remove arch_timer_detect_rate use arch_timer_get_*_freq directly Split arch_timer_rate for different types of timer. Skip secure timer frame in GTDT driver. Rebase to git://git.kernel.org/pub/scm/linux/kernel/git/mark/linux.git arch-timer/cleanup (The first 6 patches in v20 have been merged into arch-timer/cleanup branch)
Did I follow your suggestion correctly? I wonder how to improve this patchset. May I have your some suggestion or feedback on v21? :-)
Great thanks for your help!
v20: https://lkml.org/lkml/2017/1/18/534 Reorder the first 4 patches and split the 4th patches. Leave CNTHCTL_* as they originally were. Fix the bug in arch_timer_select_ppi. Split "Rework counter frequency detection" patch. Rework the arch_timer_detect_rate function. Improve the commit message of "Refactor MMIO timer probing". Rebase to 4.10.0-rc4
v19: https://lkml.org/lkml/2016/12/21/25 Fix a '\n' missing in a error message in arch_timer_mem_init. Add "request_mem_region" for ioremapping cntbase, according to f947ee1 clocksource/drivers/arm_arch_timer: Map frame with of_io_request_and_map() Rebase to 4.9.0-gfb779ff
v18: https://lkml.org/lkml/2016/12/8/446 Fix 8/15 patch problem of "int ret;" in arch_timer_acpi_init. Rebase to 4.9.0-rc8-g9269898
v17: https://lkml.org/lkml/2016/11/25/140 Take out some cleanups from 4/15. Merge 5/15 and 6/15, improve PPI determination code, improve commit message. Rework counter frequency detection. Move arch_timer_needs_of_probing into DT init call. Move Platform Timer scan loop back to timer init call to avoid allocating and free memory. Improve all the exported functions' comment.
v16: https://lkml.org/lkml/2016/11/16/268 Fix patchset problem about static enum ppi_nr of 01/13 in v15. Refactor arch_timer_detect_rate. Refactor arch_timer_needs_probing.
v15: https://lkml.org/lkml/2016/11/15/366 Re-order patches Add arm_arch_timer refactoring patches to prepare for GTDT: 1. rename some enums and defines, and some cleanups 2. separate out arch_timer_uses_ppi init code and fix a potential bug 3. Improve some new structs, refactor the timer init code. Since the some structs have been changed, GTDT parser for memory-mapped timer and SBSA Generic Watchdog timer have been update.
v14: https://lkml.org/lkml/2016/9/28/573 Separate memory-mapped timer GTDT support into two patches 1. Refactor the timer init code to prepare for GTDT 2. Add GTDT support for memory-mapped timer
v13: http://www.mail-archive.com/linux-kernel@vger.kernel.org/msg1231717.html Improve arm_arch_timer code for memory-mapped timer GTDT support, refactor original memory-mapped timer dt support for reusing some common code.
v12: https://lkml.org/lkml/2016/9/13/250 Rebase to latest Linux 4.8-rc6 Delete the confusing "skipping" in the error message.
V11: https://lkml.org/lkml/2016/9/6/354 Rebase to latest Linux 4.8-rc5 Delete typedef (suggested by checkpatch.pl)
V10: https://lkml.org/lkml/2016/7/26/215 Drop the "readq" patch. Rebase to latest Linux 4.7.
V9: https://lkml.org/lkml/2016/7/25/345 Improve pr_err message in acpi gtdt driver. Update Commit message for 7/9 shorten the irq mapping function name Improve GTDT driver for memory-mapped timer
v8: https://lkml.org/lkml/2016/7/19/660 Improve "pr_fmt(fmt)" definition: add "ACPI" in front of "GTDT", and also improve printk message. Simplify is_timer_block and is_watchdog. Merge acpi_gtdt_desc_init and gtdt_arch_timer_init into acpi_gtdt_init(); Delete __init in include/linux/acpi.h for GTDT API Make ARM64 select GTDT. Delete "#include <linux/module.h>" from acpi_gtdt.c Simplify GT block parse code.
v7: https://lkml.org/lkml/2016/7/13/769 Move the GTDT driver to drivers/acpi/arm64 Add add the ARM64-specific ACPI Support maintainers in MAINTAINERS Merge 3 patches of GTDT parser driver. Fix the for_each_platform_timer bug.
v6: https://lkml.org/lkml/2016/6/29/580 split the GTDT driver to 4 parts: basic, arch_timer, memory-mapped timer, and SBSA Generic Watchdog timer Improve driver by suggestions and example code from Daniel Lezcano
v5: https://lkml.org/lkml/2016/5/24/356 Sorting out all patches, simplify the API of GTDT driver: GTDT driver just fills the data struct for arm_arch_timer driver.
v4: https://lists.linaro.org/pipermail/linaro-acpi/2016-March/006667.html Delete the kvm relevant patches Separate two patches for sorting out the code for arm_arch_timer. Improve irq info export code to allow missing irq info in GTDT table.
v3: https://lkml.org/lkml/2016/2/1/658 Improve GTDT driver code: (1)improve pr_* by defining pr_fmt(fmt) (2)simplify gtdt_sbsa_gwdt_init (3)improve gtdt_arch_timer_data_init, if table is NULL, it will try to get GTDT table. Move enum ppi_nr to arm_arch_timer.h, and add enum spi_nr. Add arm_arch_timer get ppi from DT and GTDT support for kvm.
v2: https://lkml.org/lkml/2015/12/2/10 Rebase to latest kernel version(4.4-rc3). Fix the bug about the config problem, use CONFIG_ACPI_GTDT instead of CONFIG_ACPI in arm_arch_timer.c
v1: The first upstreaming version: https://lkml.org/lkml/2015/10/28/553
Fu Wei (13): clocksource: arm_arch_timer: introduce two functions to get the frequency from mmio and sysreg. clocksource: arm_arch_timer: separate out device-tree code from arch_timer_detect_rate clocksource: arm_arch_timer: remove arch_timer_detect_rate clocksource: arm_arch_timer: split arch_timer_rate for different types of timer clocksource: arm_arch_timer: refactor arch_timer_needs_probing clocksource: arm_arch_timer: move arch_timer_needs_of_probing into DT init call clocksource: arm_arch_timer: introduce some new structs to prepare for GTDT clocksource: arm_arch_timer: refactor MMIO timer probing. acpi/arm64: Add GTDT table parse driver clocksource: arm_arch_timer: simplify ACPI support code. acpi/arm64: Add memory-mapped timer support in GTDT driver clocksource: arm_arch_timer: add GTDT support for memory-mapped timer acpi/arm64: Add SBSA Generic Watchdog support in GTDT driver
arch/arm64/Kconfig | 1 + drivers/acpi/arm64/Kconfig | 3 + drivers/acpi/arm64/Makefile | 1 + drivers/acpi/arm64/gtdt.c | 378 +++++++++++++++++++++++++++++++++++ drivers/clocksource/arm_arch_timer.c | 354 ++++++++++++++++++++------------ drivers/watchdog/Kconfig | 1 + include/clocksource/arm_arch_timer.h | 17 ++ include/linux/acpi.h | 7 + 8 files changed, 635 insertions(+), 127 deletions(-) create mode 100644 drivers/acpi/arm64/gtdt.c
-- 2.9.3
-- Best regards,
Fu Wei Software Engineer Red Hat
On Thu, Mar 09, 2017 at 11:47:16PM +0100, Fu Wei wrote:
Hi Mark, Marc,
Hi,
I have tried to rebase all the 19(6+13) patches on 4.11-rc1, all the patchse can directly apply on 4.11-rc1,
Could you help to review the patches, and see if there is anywhere I can improve ?
I'm sorry I have taken so long to review this posting.
This is generally looking much better. I'm not sure about a few details relating to the watchdog, but I'm largely happy to pick up the rest of the series, if you can address my comments.
Thanks, Mark.
Hi Mark,
On 18 March 2017 at 04:03, Mark Rutland mark.rutland@arm.com wrote:
On Thu, Mar 09, 2017 at 11:47:16PM +0100, Fu Wei wrote:
Hi Mark, Marc,
Hi,
I have tried to rebase all the 19(6+13) patches on 4.11-rc1, all the patchse can directly apply on 4.11-rc1,
Could you help to review the patches, and see if there is anywhere I can improve ?
I'm sorry I have taken so long to review this posting.
This is generally looking much better. I'm not sure about a few details relating to the watchdog, but I'm largely happy to pick up the rest of the series, if you can address my comments.
Great thanks for your review, I will post a new v22 ASAP(before your Tuesday).
Thanks, Mark.
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Fu Wei -
fu.wei＠linaro.org
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Lurndal, Scott -
Mark Rutland