Linaro-acpi December 2013

linaro-acpi@lists.linaro.org

19 participants
38 discussions

[PATCH] rtsm_ve-aemv8a: Add ASL for bus device enumeration

by naresh.bhat＠linaro.org

From: Naresh Bhat <naresh.bhat(a)linaro.org> Add ASL for AMBA bus and devices on rtsm_ve-aemv8a platform. Signed-off-by: Naresh Bhat <naresh.bhat(a)linaro.org> --- platforms/rtsm_ve-aemv8a.acpi/dsdt.asl | 416 +++++++++++++++++++++++++++++++- 1 file changed, 413 insertions(+), 3 deletions(-) diff --git a/platforms/rtsm_ve-aemv8a.acpi/dsdt.asl b/platforms/rtsm_ve-aemv8a.acpi/dsdt.asl index 76ddfa3..8cea035 100644 --- a/platforms/rtsm_ve-aemv8a.acpi/dsdt.asl +++ b/platforms/rtsm_ve-aemv8a.acpi/dsdt.asl @@ -266,6 +266,74 @@ DefinitionBlock ( } } + Device (PMU0) { + Name (_HID, "LNRO0007") + Name (_UID, 0) + + Method (_CRS, 0x0, Serialized) { + Name (RBUF, ResourceTemplate () { + Interrupt (ResourceConsumer, Level, ActiveHigh, Exclusive, , , ) {92, 93, 94, 95} + }) + Return (RBUF) + } + } + + Device (SMB) { + Name (_HID, "ACPI0004") + Name (_UID, 0) + + Name (_CRS, ResourceTemplate () { + + DWordMemory (ResourceProducer, PosDecode, MinFixed, MaxFixed, NonCacheable, ReadWrite, + 0x00000000, // Address Space Granularity + 0x08000000, // Address Range Minimum (base address in FDT) + 0x0BFFFFFF, // Address Range Maximum (base + (len-1)) + 0x00000000, // Address Translation Offset + 0x04000000, // Address Length (len in FDT) + ,, , AddressRangeMemory, TypeStatic) + + DWordMemory (ResourceProducer, PosDecode, MinFixed, MaxFixed, NonCacheable, ReadWrite, + 0x00000000, // Address Space Granularity + 0x14000000, // Address Range Minimum (base address in FDT) + 0x17FFFFFF, // Address Range Maximum (base + (len-1)) + 0x00000000, // Address Translation Offset + 0x04000000, // Address Length (len in FDT) + ,, , AddressRangeMemory, TypeStatic) + + DWordMemory (ResourceProducer, PosDecode, MinFixed, MaxFixed, NonCacheable, ReadWrite, + 0x00000000, // Address Space Granularity + 0x18000000, // Address Range Minimum (base address in FDT) + 0x1BFFFFFF, // Address Range Maximum (base + (len-1)) + 0x00000000, // Address Translation Offset + 0x04000000, // Address Length (len in FDT) + ,, , AddressRangeMemory, TypeStatic) + + DWordMemory (ResourceProducer, PosDecode, MinFixed, MaxFixed, NonCacheable, ReadWrite, + 0x00000000, // Address Space Granularity + 0x1C000000, // Address Range Minimum (base address in FDT) + 0x1FFFFFFF, // Address Range Maximum (base + (len -1)) + 0x00000000, // Address Translation Offset + 0x04000000, // Address Length (len in FDT) + ,, , AddressRangeMemory, TypeStatic) + + DWordMemory (ResourceProducer, PosDecode, MinFixed, MaxFixed, NonCacheable, ReadWrite, + 0x00000000, // Address Space Granularity + 0x0C000000, // Address Range Minimum (base address in FDT) + 0x0FFFFFFF, // Address Range Maximum (base + (len-1)) + 0x00000000, // Address Translation Offset + 0x04000000, // Address Length (len in FDT) + ,, , AddressRangeMemory, TypeStatic) + + DWordMemory (ResourceProducer, PosDecode, MinFixed, MaxFixed, NonCacheable, ReadWrite, + 0x00000000, // Address Space Granularity + 0x10000000, // Address Range Minimum (base address in FDT) + 0x13FFFFFF, // Address Range Maximum (base + (len-1)) + 0x00000000, // Address Translation Offset + 0x04000000, // Address Length (len in FDT) + ,, , AddressRangeMemory, TypeStatic) + + }) + Device (NET0) { Name (_HID, "LNRO0003") Name (_UID, 0) @@ -279,16 +347,358 @@ DefinitionBlock ( } } - Device (PMU0) { - Name (_HID, "LNRO0007") + Device (CLK0) { + Name (_HID, "LNRO0008") + Name (_UID, 0) + + Method (FREQ, 0x0, NotSerialized) { + Return (24000000) + } + } + + Device (CLK1) { + Name (_HID, "LNRO0008") + Name (_UID, 1) + + Method (FREQ, 0x0, NotSerialized) { + Return (1000000) + } + } + + Device (CLK2) { + Name (_HID, "LNRO0008") + Name (_UID, 2) + + Method (FREQ, 0x0, NotSerialized) { + Return (32768) + } + } + + Device (FPGA) { + Name (_HID, "ACPI0004") + Name (_UID, 0) + + Name (_CRS, ResourceTemplate () { + + DWordMemory (ResourceProducer, PosDecode, MinFixed, MaxFixed, NonCacheable, ReadWrite, + 0x00000000, // Address Space Granularity + 0x1C000000, // Address Range Minimum (base address in FDT) + 0x1C1FFFFF, // Address Range Maximum (base + (len-1)) + 0x00000000, // Address Translation Offset + 0x00200000, // Address Length (len in FDT) + ,, , AddressRangeMemory, TypeStatic) + }) + + Device (VIRT) { + Name (_HID, "LNRO0005") + Name (_UID, 0) + + Method (_CRS, 0x0, Serialized) { + Name (RBUF, ResourceTemplate() { + Memory32Fixed (ReadWrite, 0x1c130000, 0x1000) + Interrupt (ResourceConsumer, Level, ActiveHigh, Exclusive, , , ) {0x4A} + }) + Return (RBUF) + } + } + } // End of FPGA + } // End SMB + + Method (DTGP, 5, NotSerialized) + { + If (LEqual (Arg0, Buffer (0x10) + { + /* UUID: a706b112-bf0b-48d2-9fa3-95591a3c4c06 */ + /* 0000 */ 0xa7, 0x06, 0xb1, 0x12, 0xbf, 0x0b, 0x48, 0xd2, + /* 0008 */ 0x9f, 0xa3, 0x95, 0x59, 0x1a, 0x3c, 0x4c, 0x06 + })) + { + If (LEqual (Arg1, 0x01)) { + If (LEqual (Arg2, 0x00)) { + Store (Buffer (0x01) + { + 0x03 + }, Arg4) + Return (0x01) + } + + If (LEqual (Arg2, 0x01)) { + Return (0x01) + } + } + } + + Store (Buffer (0x01) + { + 0x00 + }, Arg4) + + Return (0x00) + } + + Device (AMBA) { + Name (_HID, "AMBA0000") + Name (_UID, 0) + + /* Define 'apb_pclk' as a default clock source since it is + common with devices below */ + + Method(_DSM, 4, NotSerialized) { + Store (Package (2) + { + "clock-name", "apb_pclk \\_SB.SMB.CLK0", + }, Local0) + + DTGP (Arg0, Arg1, Arg2, Arg3, RefOf (Local0)) + + Return (Local0) + } + + Device (SCT0) { + Name (_HID, "LNRO000C") + Name (_UID, 0) + Name (_ADR, 0x1c020000) /* SYSCTL */ + Method (_CRS, 0x0, Serialized) { + Name (RBUF, ResourceTemplate () { + Memory32Fixed (ReadWrite, 0x1c020000, 0x00001000) + }) + Return (RBUF) + } + Method(_DSM, 4, Serialized) { + Store (Package (4) + { + "clock-name", "refclk \\_SB.SMB.CLK2", + "clock-name", "timclk \\_SB.SMB.CLK1", + }, Local0) + + DTGP (Arg0, Arg1, Arg2, Arg3, RefOf (Local0)) + + Return (Local0) + } + } + + Device (AAC0) { + Name (_HID, "LNRO000D") + Name (_UID, 0) + Name (_ADR, 0x1c040000) /* AACI */ + Method (_CRS, 0x0, Serialized) { + Name (RBUF, ResourceTemplate () { + Memory32Fixed (ReadWrite, 0x1c040000, 0x00001000) + Interrupt (ResourceConsumer, Edge, ActiveBoth, + Exclusive, , , ) {43} + }) + Return (RBUF) + } + } + + Device (MMC0) { + Name (_HID, "LNRO000E") Name (_UID, 0) + Name (_ADR, 0x1c050000) /* MMCI */ + Method (_CRS, 0x0, Serialized) { + Name (RBUF, ResourceTemplate () { + Memory32Fixed (ReadWrite, 0x1c050000, 0x00001000) + Interrupt (ResourceConsumer, Edge, ActiveBoth, + Exclusive, , , ) {41, 42} + }) + Return (RBUF) + } + Method(_DSM, 4, Serialized) { + Store (Package (2) + { + "clock-name", "MCLK \\_SB.SMB.CLK0", + }, Local0) + + DTGP (Arg0, Arg1, Arg2, Arg3, RefOf (Local0)) + Return (Local0) + } + } + + Device (KMI0) { + Name (_HID, "LNRO000F") + Name (_UID, 0) + Name (_ADR, 0x1c060000) Method (_CRS, 0x0, Serialized) { Name (RBUF, ResourceTemplate () { - Interrupt (ResourceConsumer, Level, ActiveHigh, Exclusive, , , ) {92, 93, 94, 95} + Memory32Fixed (ReadWrite, 0x1c060000, 0x00001000) + Interrupt (ResourceConsumer, Edge, ActiveBoth, + Exclusive, , , ) {44} + }) + Return (RBUF) + } + Method(_DSM, 4, Serialized) { + Store (Package (2) + { + "clock-name", "KMIREFCLK \\_SB.SMB.CLK0", + }, Local0) + + DTGP (Arg0, Arg1, Arg2, Arg3, RefOf (Local0)) + + Return (Local0) + } + } + + Device (KMI1) { + Name (_HID, "LNRO000F") + Name (_UID, 1) + Name (_ADR, 0x1c070000) + Method (_CRS, 0x0, Serialized) { + Name (RBUF, ResourceTemplate () { + Memory32Fixed (ReadWrite, 0x1c070000, 0x00001000) + Interrupt (ResourceConsumer, Edge, ActiveBoth, + Exclusive, , , ) {45} + }) + Return (RBUF) + } + Method(_DSM, 4, NotSerialized) { + Store (Package (2) + { + "clock-name", "KMIREFCLK \\_SB.SMB.CLK0", + }, Local0) + + DTGP (Arg0, Arg1, Arg2, Arg3, RefOf (Local0)) + + Return (Local0) + } + } + + Device (SER0) { + Name (_HID, "LNRO000A") + Name (_ADR, 0x1c090000) + Name (_UID, 0) + + Method (_CRS, 0x0, Serialized) { + Name (RBUF, ResourceTemplate() { + Memory32Fixed (ReadWrite, 0x1c090000, 0x1000) + Interrupt (ResourceConsumer, Edge, ActiveBoth, Exclusive, , , ) {0x25} + }) + Return (RBUF) + } + } + + Device (SER1) { + Name (_HID, "LNRO000A") + Name (_ADR, 0x1c0a0000) + Name (_UID, 1) + + Method (_CRS, 0x0, Serialized) { + Name (RBUF, ResourceTemplate() { + Memory32Fixed (ReadWrite, 0x1c0a0000, 0x1000) + Interrupt (ResourceConsumer, Edge, ActiveBoth, Exclusive, , , ) {0x26} + }) + Return (RBUF) + } + } + + Device (SER2) { + Name (_HID, "LNRO000A") + Name (_ADR, 0x1c0b0000) + Name (_UID, 2) + + Method (_CRS, 0x0, Serialized) { + Name (RBUF, ResourceTemplate() { + Memory32Fixed (ReadWrite, 0x1c0b0000, 0x1000) + Interrupt (ResourceConsumer, Edge, ActiveBoth, Exclusive, , , ) {0x27} + }) + Return (RBUF) + } + } + + Device (SER3) { + Name (_HID, "LNRO000A") + Name (_ADR, 0x1c0c0000) + Name (_UID, 3) + + Method (_CRS, 0x0, Serialized) { + Name (RBUF, ResourceTemplate() { + Memory32Fixed (ReadWrite, 0x1c0c0000, 0x1000) + Interrupt (ResourceConsumer, Edge, ActiveBoth, Exclusive, , , ) {0x28} + }) + Return (RBUF) + } + } + + Device (WDT0) { + Name (_HID, "LNRO0011") + Name (_UID, 0) + Name (_ADR, 0x1c0f0000) /* WDT */ + Method (_CRS, 0x0, Serialized) { + Name (RBUF, ResourceTemplate () { + Memory32Fixed (ReadWrite, 0x1c0f0000, 0x00001000) + Interrupt (ResourceConsumer, Edge, ActiveBoth, + Exclusive, , , ) {32} }) Return (RBUF) } } + + Device (TIM0) { + Name (_HID, "LNRO0012") + Name (_UID, 0) + Name (_ADR, 0x1c110000) /* TIMER01 */ + Method (_CRS, 0x0, Serialized) { + Name (RBUF, ResourceTemplate () { + Memory32Fixed (ReadWrite, 0x1c110000, 0x00001000) + Interrupt (ResourceConsumer, Edge, ActiveBoth, + Exclusive, , , ) {34} + }) + Return (RBUF) + } + } + + Device (TIM2) { + Name (_HID, "LNRO0012") + Name (_UID, 1) + Name (_ADR, 0x1c120000) /* TIMER23 */ + Method (_CRS, 0x0, Serialized) { + Name (RBUF, ResourceTemplate () { + Memory32Fixed (ReadWrite, 0x1c120000, 0x00001000) + Interrupt (ResourceConsumer, Edge, ActiveBoth, + Exclusive, , , ) {35} + }) + Return (RBUF) + } + } + + Device (RTC0) { + Name (_HID, "LNRO0013") + Name (_UID, 0) + Name (_ADR, 0x1c170000) /* RTC */ + Method (_CRS, 0x0, Serialized) { + Name (RBUF, ResourceTemplate () { + Memory32Fixed (ReadWrite, 0x1c170000, 0x00001000) + Interrupt (ResourceConsumer, Edge, ActiveBoth, + Exclusive, , , ) {36} + }) + Return (RBUF) + } + } + + Device (CLCD) { + Name (_HID, "LNRO0014") + Name (_UID, 0) + Name (_ADR, 0x1c1f0000) /* CLCD */ + Method (_CRS, 0x0, Serialized) { + Name (RBUF, ResourceTemplate () { + Memory32Fixed (ReadWrite, 0x1c1f0000, 0x00001000) + Interrupt (ResourceConsumer, Edge, ActiveBoth, + Exclusive, , , ) {46} + }) + Return (RBUF) + } + Method(_DSM, 4, Serialized) { + Store (Package (2) + { + "clock-name", "CCLDCLK \\_SB.SMB.CLK0", + }, Local0) + + DTGP (Arg0, Arg1, Arg2, Arg3, RefOf (Local0)) + + Return (Local0) + } + } + + } // End of AMBA } } -- 1.7.9.5

10 years, 5 months

[PATCH] arm64: dts: remove simplebus and panel from fvp-base-gicv2-psci-acpi

by Graeme Gregory

We can boot to a usable userspace without these hunks so remove them. This leaves only timer and gic to be removed and we are booting completely from ACPI Signed-off-by: Graeme Gregory <graeme.gregory(a)linaro.org> --- arch/arm64/boot/dts/fvp-base-gicv2-psci-acpi.dts | 84 ------------------------ 1 file changed, 84 deletions(-) diff --git a/arch/arm64/boot/dts/fvp-base-gicv2-psci-acpi.dts b/arch/arm64/boot/dts/fvp-base-gicv2-psci-acpi.dts index 09a4061..04a6200 100644 --- a/arch/arm64/boot/dts/fvp-base-gicv2-psci-acpi.dts +++ b/arch/arm64/boot/dts/fvp-base-gicv2-psci-acpi.dts @@ -148,88 +148,4 @@ reg = <0x0 0x2a820000 0x0 0x10000>; }; }; - - smb { - compatible = "simple-bus"; - - #address-cells = <2>; - #size-cells = <1>; - ranges = <0 0 0 0x08000000 0x04000000>, - <1 0 0 0x14000000 0x04000000>, - <2 0 0 0x18000000 0x04000000>, - <3 0 0 0x1c000000 0x04000000>, - <4 0 0 0x0c000000 0x04000000>, - <5 0 0 0x10000000 0x04000000>; - - #interrupt-cells = <1>; - interrupt-map-mask = <0 0 63>; - interrupt-map = <0 0 0 &gic 0 0 4>, - <0 0 1 &gic 0 1 4>, - <0 0 2 &gic 0 2 4>, - <0 0 3 &gic 0 3 4>, - <0 0 4 &gic 0 4 4>, - <0 0 5 &gic 0 5 4>, - <0 0 6 &gic 0 6 4>, - <0 0 7 &gic 0 7 4>, - <0 0 8 &gic 0 8 4>, - <0 0 9 &gic 0 9 4>, - <0 0 10 &gic 0 10 4>, - <0 0 11 &gic 0 11 4>, - <0 0 12 &gic 0 12 4>, - <0 0 13 &gic 0 13 4>, - <0 0 14 &gic 0 14 4>, - <0 0 15 &gic 0 15 4>, - <0 0 16 &gic 0 16 4>, - <0 0 17 &gic 0 17 4>, - <0 0 18 &gic 0 18 4>, - <0 0 19 &gic 0 19 4>, - <0 0 20 &gic 0 20 4>, - <0 0 21 &gic 0 21 4>, - <0 0 22 &gic 0 22 4>, - <0 0 23 &gic 0 23 4>, - <0 0 24 &gic 0 24 4>, - <0 0 25 &gic 0 25 4>, - <0 0 26 &gic 0 26 4>, - <0 0 27 &gic 0 27 4>, - <0 0 28 &gic 0 28 4>, - <0 0 29 &gic 0 29 4>, - <0 0 30 &gic 0 30 4>, - <0 0 31 &gic 0 31 4>, - <0 0 32 &gic 0 32 4>, - <0 0 33 &gic 0 33 4>, - <0 0 34 &gic 0 34 4>, - <0 0 35 &gic 0 35 4>, - <0 0 36 &gic 0 36 4>, - <0 0 37 &gic 0 37 4>, - <0 0 38 &gic 0 38 4>, - <0 0 39 &gic 0 39 4>, - <0 0 40 &gic 0 40 4>, - <0 0 41 &gic 0 41 4>, - <0 0 42 &gic 0 42 4>; - - /include/ "rtsm_ve-motherboard-acpi.dtsi" - }; - - panels { - panel@0 { - compatible = "panel"; - mode = "XVGA"; - refresh = <60>; - xres = <1024>; - yres = <768>; - pixclock = <15748>; - left_margin = <152>; - right_margin = <48>; - upper_margin = <23>; - lower_margin = <3>; - hsync_len = <104>; - vsync_len = <4>; - sync = <0>; - vmode = "FB_VMODE_NONINTERLACED"; - tim2 = "TIM2_BCD", "TIM2_IPC"; - cntl = "CNTL_LCDTFT", "CNTL_BGR", "CNTL_LCDVCOMP(1)"; - caps = "CLCD_CAP_5551", "CLCD_CAP_565", "CLCD_CAP_888"; - bpp = <16>; - }; - }; }; -- 1.8.4.2

10 years, 5 months

[RFC part3 PATCH 0/2] Using ACPI GTDT table to initialize arch timer

by Hanjun Guo

This is the last part of patch set for core of ARM64 ACPI, and is based on the patch set part2 "Using ACPI MADT table to initialise SMP and GIC". ACPI GTDT (Generic Timer Description Table) is used for ARM/ARM64 only, and contains the information for arch timer initialisation. This patch trys to convert the arch timer to ACPI using GTDT. After this patch set was posted, we already finished the SMP, GIC and arch timer initialisation, which all are essential for ARM64 core system running, then we will focus on converting the device drivers to ACPI. Here is the GTDT ASL code I used: --- platforms/foundation-v8.acpi/gtdt.asl | 35 ++++++++++++++++++++++----------- 1 file changed, 23 insertions(+), 12 deletions(-) diff --git a/platforms/foundation-v8.acpi/gtdt.asl b/platforms/foundation-v8.acpi/gtdt.asl index 18c821a..714d61c 100644 --- a/platforms/foundation-v8.acpi/gtdt.asl +++ b/platforms/foundation-v8.acpi/gtdt.asl @@ -1,5 +1,6 @@ /* * Copyright (c) 2013, Al Stone <al.stone(a)linaro.org> + * Hanjun Guo <hanjun.guo(a)linaro.org> * * [GTDT] Generic Timer Description Table * Format: [ByteLength] FieldName : HexFieldValue @@ -21,22 +22,32 @@ [0004] Flags (decoded below) : 00000001 Memory Present : 1 -[0004] Secure PL1 Interrupt : 00000000 -[0004] SPL1 Flags (decoded below) : 00000000 - Trigger Mode : 0 +/* In Foundation model's dts file, the last cell of interrupts + * is 0xff01, it means its cpu mask is FF, and trigger type + * and flag is 1 = low-to-high edge triggered. + * + * so in ACPI the Trigger Mode is 1 - Edge triggered, and + * Polarity is 0 - Active high as ACPI spec describled. + * + * using direct mapping for hwirqs, it means that we using + * ID [16, 31] for PPI, not [0, 15] used in FDT. + */ +[0004] Secure PL1 Interrupt : 0000001d +[0004] SPL1 Flags (decoded below) : 00000001 + Trigger Mode : 1 Polarity : 0 -[0004] Non-Secure PL1 Interrupt : 00000000 -[0004] NSPL1 Flags (decoded below) : 00000000 - Trigger Mode : 0 +[0004] Non-Secure PL1 Interrupt : 0000001e +[0004] NSPL1 Flags (decoded below) : 00000001 + Trigger Mode : 1 Polarity : 0 -[0004] Virtual Timer Interrupt : 00000000 -[0004] VT Flags (decoded below) : 00000000 - Trigger Mode : 0 +[0004] Virtual Timer Interrupt : 0000001b +[0004] VT Flags (decoded below) : 00000001 + Trigger Mode : 1 Polarity : 0 -[0004] Non-Secure PL2 Interrupt : 00000000 -[0004] NSPL2 Flags (decoded below) : 00000000 - Trigger Mode : 0 +[0004] Non-Secure PL2 Interrupt : 0000001a +[0004] NSPL2 Flags (decoded below) : 00000001 + Trigger Mode : 1 Polarity : 0 Hanjun Guo (2): clocksource / arch_timer: Use ACPI GTDT table to initialize arch timer ARM64 / clocksource: Use arch_timer_acpi_init() arch/arm64/kernel/time.c | 4 ++ drivers/clocksource/arm_arch_timer.c | 129 ++++++++++++++++++++++++++++++---- include/clocksource/arm_arch_timer.h | 7 +- 3 files changed, 124 insertions(+), 16 deletions(-) -- 1.7.9.5

10 years, 5 months

[PATCH] fvp: Remove device binding from fvp base gicv2 FDT

by naresh.bhat＠linaro.org

From: Naresh Bhat <naresh.bhat(a)linaro.org> The AMBA device binding has now been moved to DSDT, delete from fvp-base-gicv2-psci FDT Signed-off-by: Naresh Bhat <naresh.bhat(a)linaro.org> --- arch/arm64/boot/dts/fvp-base-gicv2-psci.dts | 15 --- arch/arm64/boot/dts/rtsm_ve-motherboard.dtsi | 152 -------------------------- 2 files changed, 167 deletions(-) diff --git a/arch/arm64/boot/dts/fvp-base-gicv2-psci.dts b/arch/arm64/boot/dts/fvp-base-gicv2-psci.dts index 646afb7..ae6072f 100644 --- a/arch/arm64/boot/dts/fvp-base-gicv2-psci.dts +++ b/arch/arm64/boot/dts/fvp-base-gicv2-psci.dts @@ -44,13 +44,6 @@ chosen { }; - aliases { - serial0 = &v2m_serial0; - serial1 = &v2m_serial1; - serial2 = &v2m_serial2; - serial3 = &v2m_serial3; - }; - psci { compatible = "arm,psci"; method = "smc"; @@ -154,14 +147,6 @@ }; }; - pmu { - compatible = "arm,armv8-pmuv3"; - interrupts = <0 60 4>, - <0 61 4>, - <0 62 4>, - <0 63 4>; - }; - smb { compatible = "simple-bus"; diff --git a/arch/arm64/boot/dts/rtsm_ve-motherboard.dtsi b/arch/arm64/boot/dts/rtsm_ve-motherboard.dtsi index 3f429da..a1080744b 100644 --- a/arch/arm64/boot/dts/rtsm_ve-motherboard.dtsi +++ b/arch/arm64/boot/dts/rtsm_ve-motherboard.dtsi @@ -48,33 +48,6 @@ reg = <2 0x00000000 0x00800000>; }; - ethernet@2,02000000 { - compatible = "smsc,lan91c111"; - reg = <2 0x02000000 0x10000>; - interrupts = <15>; - }; - - v2m_clk24mhz: clk24mhz { - compatible = "fixed-clock"; - #clock-cells = <0>; - clock-frequency = <24000000>; - clock-output-names = "v2m:clk24mhz"; - }; - - v2m_refclk1mhz: refclk1mhz { - compatible = "fixed-clock"; - #clock-cells = <0>; - clock-frequency = <1000000>; - clock-output-names = "v2m:refclk1mhz"; - }; - - v2m_refclk32khz: refclk32khz { - compatible = "fixed-clock"; - #clock-cells = <0>; - clock-frequency = <32768>; - clock-output-names = "v2m:refclk32khz"; - }; - iofpga@3,00000000 { compatible = "arm,amba-bus", "simple-bus"; #address-cells = <1>; @@ -88,131 +61,6 @@ #gpio-cells = <2>; }; - v2m_sysctl: sysctl@020000 { - compatible = "arm,sp810", "arm,primecell"; - reg = <0x020000 0x1000>; - clocks = <&v2m_refclk32khz>, <&v2m_refclk1mhz>, <&v2m_clk24mhz>; - clock-names = "refclk", "timclk", "apb_pclk"; - #clock-cells = <1>; - clock-output-names = "timerclken0", "timerclken1", "timerclken2", "timerclken3"; - }; - - aaci@040000 { - compatible = "arm,pl041", "arm,primecell"; - reg = <0x040000 0x1000>; - interrupts = <11>; - clocks = <&v2m_clk24mhz>; - clock-names = "apb_pclk"; - }; - - mmci@050000 { - compatible = "arm,pl180", "arm,primecell"; - reg = <0x050000 0x1000>; - interrupts = <9 10>; - cd-gpios = <&v2m_sysreg 0 0>; - wp-gpios = <&v2m_sysreg 1 0>; - max-frequency = <12000000>; - vmmc-supply = <&v2m_fixed_3v3>; - clocks = <&v2m_clk24mhz>, <&v2m_clk24mhz>; - clock-names = "mclk", "apb_pclk"; - }; - - kmi@060000 { - compatible = "arm,pl050", "arm,primecell"; - reg = <0x060000 0x1000>; - interrupts = <12>; - clocks = <&v2m_clk24mhz>, <&v2m_clk24mhz>; - clock-names = "KMIREFCLK", "apb_pclk"; - }; - - kmi@070000 { - compatible = "arm,pl050", "arm,primecell"; - reg = <0x070000 0x1000>; - interrupts = <13>; - clocks = <&v2m_clk24mhz>, <&v2m_clk24mhz>; - clock-names = "KMIREFCLK", "apb_pclk"; - }; - - v2m_serial0: uart@090000 { - compatible = "arm,pl011", "arm,primecell"; - reg = <0x090000 0x1000>; - interrupts = <5>; - clocks = <&v2m_clk24mhz>, <&v2m_clk24mhz>; - clock-names = "uartclk", "apb_pclk"; - }; - - v2m_serial1: uart@0a0000 { - compatible = "arm,pl011", "arm,primecell"; - reg = <0x0a0000 0x1000>; - interrupts = <6>; - clocks = <&v2m_clk24mhz>, <&v2m_clk24mhz>; - clock-names = "uartclk", "apb_pclk"; - }; - - v2m_serial2: uart@0b0000 { - compatible = "arm,pl011", "arm,primecell"; - reg = <0x0b0000 0x1000>; - interrupts = <7>; - clocks = <&v2m_clk24mhz>, <&v2m_clk24mhz>; - clock-names = "uartclk", "apb_pclk"; - }; - - v2m_serial3: uart@0c0000 { - compatible = "arm,pl011", "arm,primecell"; - reg = <0x0c0000 0x1000>; - interrupts = <8>; - clocks = <&v2m_clk24mhz>, <&v2m_clk24mhz>; - clock-names = "uartclk", "apb_pclk"; - }; - - wdt@0f0000 { - compatible = "arm,sp805", "arm,primecell"; - reg = <0x0f0000 0x1000>; - interrupts = <0>; - clocks = <&v2m_refclk32khz>, <&v2m_clk24mhz>; - clock-names = "wdogclk", "apb_pclk"; - }; - - v2m_timer01: timer@110000 { - compatible = "arm,sp804", "arm,primecell"; - reg = <0x110000 0x1000>; - interrupts = <2>; - clocks = <&v2m_sysctl 0>, <&v2m_sysctl 1>, <&v2m_clk24mhz>; - clock-names = "timclken1", "timclken2", "apb_pclk"; - }; - - v2m_timer23: timer@120000 { - compatible = "arm,sp804", "arm,primecell"; - reg = <0x120000 0x1000>; - interrupts = <3>; - clocks = <&v2m_sysctl 2>, <&v2m_sysctl 3>, <&v2m_clk24mhz>; - clock-names = "timclken1", "timclken2", "apb_pclk"; - }; - - rtc@170000 { - compatible = "arm,pl031", "arm,primecell"; - reg = <0x170000 0x1000>; - interrupts = <4>; - clocks = <&v2m_clk24mhz>; - clock-names = "apb_pclk"; - }; - - clcd@1f0000 { - compatible = "arm,pl111", "arm,primecell"; - reg = <0x1f0000 0x1000>; - interrupts = <14>; - clocks = <&v2m_oscclk1>, <&v2m_clk24mhz>; - clock-names = "clcdclk", "apb_pclk"; - mode = "XVGA"; - use_dma = <0>; - framebuffer = <0x18000000 0x00180000>; - }; - - virtio_block@0130000 { - compatible = "virtio,mmio"; - reg = <0x130000 0x1000>; - interrupts = <0x2a>; - }; }; v2m_fixed_3v3: fixedregulator@0 { -- 1.7.9.5

10 years, 5 months

[PATCH] FVP: Add ASL for bus and devices enumeration

by naresh.bhat＠linaro.org

From: Naresh Bhat <naresh.bhat(a)linaro.org> Add ASL methods for SMB, FPGA, NET, CLK, SYSCTL, WDT, TIMER01, TIMER23, RTC and SER. Signed-off-by: Naresh Bhat <naresh.bhat(a)linaro.org> --- .../AcpiTables/ArmVExpress-FVP-AArch64/dsdt.asl | 308 +++++++++++++++++++- 1 file changed, 304 insertions(+), 4 deletions(-) diff --git a/ArmPkg/Drivers/AcpiTables/ArmVExpress-FVP-AArch64/dsdt.asl b/ArmPkg/Drivers/AcpiTables/ArmVExpress-FVP-AArch64/dsdt.asl index 76ddfa3..9af6fe7 100644 --- a/ArmPkg/Drivers/AcpiTables/ArmVExpress-FVP-AArch64/dsdt.asl +++ b/ArmPkg/Drivers/AcpiTables/ArmVExpress-FVP-AArch64/dsdt.asl @@ -266,6 +266,74 @@ DefinitionBlock ( } } + Device (PMU0) { + Name (_HID, "LNRO0007") + Name (_UID, 0) + + Method (_CRS, 0x0, Serialized) { + Name (RBUF, ResourceTemplate () { + Interrupt (ResourceConsumer, Level, ActiveHigh, Exclusive, , , ) {92, 93, 94, 95} + }) + Return (RBUF) + } + } + + Device (SMB) { + Name (_HID, "ACPI0004") + Name (_UID, 0) + + Name (_CRS, ResourceTemplate () { + + DWordMemory (ResourceProducer, PosDecode, MinFixed, MaxFixed, NonCacheable, ReadWrite, + 0x00000000, // Address Space Granularity + 0x08000000, // Address Range Minimum (base address in FDT) + 0x0BFFFFFF, // Address Range Maximum (base + (len-1)) + 0x00000000, // Address Translation Offset + 0x04000000, // Address Length (len in FDT) + ,, , AddressRangeMemory, TypeStatic) + + DWordMemory (ResourceProducer, PosDecode, MinFixed, MaxFixed, NonCacheable, ReadWrite, + 0x00000000, // Address Space Granularity + 0x14000000, // Address Range Minimum (base address in FDT) + 0x17FFFFFF, // Address Range Maximum (base + (len-1)) + 0x00000000, // Address Translation Offset + 0x04000000, // Address Length (len in FDT) + ,, , AddressRangeMemory, TypeStatic) + + DWordMemory (ResourceProducer, PosDecode, MinFixed, MaxFixed, NonCacheable, ReadWrite, + 0x00000000, // Address Space Granularity + 0x18000000, // Address Range Minimum (base address in FDT) + 0x1BFFFFFF, // Address Range Maximum (base + (len-1)) + 0x00000000, // Address Translation Offset + 0x04000000, // Address Length (len in FDT) + ,, , AddressRangeMemory, TypeStatic) + + DWordMemory (ResourceProducer, PosDecode, MinFixed, MaxFixed, NonCacheable, ReadWrite, + 0x00000000, // Address Space Granularity + 0x1C000000, // Address Range Minimum (base address in FDT) + 0x1FFFFFFF, // Address Range Maximum (base + (len -1)) + 0x00000000, // Address Translation Offset + 0x04000000, // Address Length (len in FDT) + ,, , AddressRangeMemory, TypeStatic) + + DWordMemory (ResourceProducer, PosDecode, MinFixed, MaxFixed, NonCacheable, ReadWrite, + 0x00000000, // Address Space Granularity + 0x0C000000, // Address Range Minimum (base address in FDT) + 0x0FFFFFFF, // Address Range Maximum (base + (len-1)) + 0x00000000, // Address Translation Offset + 0x04000000, // Address Length (len in FDT) + ,, , AddressRangeMemory, TypeStatic) + + DWordMemory (ResourceProducer, PosDecode, MinFixed, MaxFixed, NonCacheable, ReadWrite, + 0x00000000, // Address Space Granularity + 0x10000000, // Address Range Minimum (base address in FDT) + 0x13FFFFFF, // Address Range Maximum (base + (len-1)) + 0x00000000, // Address Translation Offset + 0x04000000, // Address Length (len in FDT) + ,, , AddressRangeMemory, TypeStatic) + + }) + Device (NET0) { Name (_HID, "LNRO0003") Name (_UID, 0) @@ -279,16 +347,248 @@ DefinitionBlock ( } } - Device (PMU0) { - Name (_HID, "LNRO0007") - Name (_UID, 0) + Device (CLK0) { + Name (_HID, "LNRO0008") + Name (_UID, 0) + + Method (FREQ, 0x0, NotSerialized) { + Return (24000000) + } + } + + Device (CLK1) { + Name (_HID, "LNRO0008") + Name (_UID, 1) + + Method (FREQ, 0x0, NotSerialized) { + Return (1000000) + } + } + + Device (CLK2) { + Name (_HID, "LNRO0008") + Name (_UID, 2) + + Method (FREQ, 0x0, NotSerialized) { + Return (32768) + } + } + + Device (FPGA) { + Name (_HID, "ACPI0004") + Name (_UID, 0) + + Name (_CRS, ResourceTemplate () { + + DWordMemory (ResourceProducer, PosDecode, MinFixed, MaxFixed, NonCacheable, ReadWrite, + 0x00000000, // Address Space Granularity + 0x1C000000, // Address Range Minimum (base address in FDT) + 0x1C1FFFFF, // Address Range Maximum (base + (len-1)) + 0x00000000, // Address Translation Offset + 0x00200000, // Address Length (len in FDT) + ,, , AddressRangeMemory, TypeStatic) + }) + + Device (VIRT) { + Name (_HID, "LNRO0005") + Name (_UID, 0) + + Method (_CRS, 0x0, Serialized) { + Name (RBUF, ResourceTemplate() { + Memory32Fixed (ReadWrite, 0x1c130000, 0x1000) + Interrupt (ResourceConsumer, Level, ActiveHigh, Exclusive, , , ) {0x4A} + }) + Return (RBUF) + } + } + } // End of FPGA + } // End SMB + + Method (DTGP, 5, NotSerialized) + { + If (LEqual (Arg0, Buffer (0x10) + { + /* UUID: a706b112-bf0b-48d2-9fa3-95591a3c4c06 */ + /* 0000 */ 0xa7, 0x06, 0xb1, 0x12, 0xbf, 0x0b, 0x48, 0xd2, + /* 0008 */ 0x9f, 0xa3, 0x95, 0x59, 0x1a, 0x3c, 0x4c, 0x06 + })) + { + If (LEqual (Arg1, 0x01)) { + If (LEqual (Arg2, 0x00)) { + Store (Buffer (0x01) + { + 0x03 + }, Arg4) + Return (0x01) + } + + If (LEqual (Arg2, 0x01)) { + Return (0x01) + } + } + } + + Store (Buffer (0x01) + { + 0x00 + }, Arg4) + + Return (0x00) + } + + Device (AMBA) { + Name (_HID, "AMBA0000") + Name (_UID, 0) + + /* Define 'apb_pclk' as a default clock source since it is + common with devices below */ + + Method(_DSM, 4, NotSerialized) { + Store (Package (2) + { + "clock-name", "apb_pclk \\_SB.SMB.CLK0", + }, Local0) + + DTGP (Arg0, Arg1, Arg2, Arg3, RefOf (Local0)) + + Return (Local0) + } + Device (SCT0) { + Name (_HID, "LNRO000C") + Name (_UID, 0) + Name (_ADR, 0x1c020000) /* SYSCTL */ Method (_CRS, 0x0, Serialized) { Name (RBUF, ResourceTemplate () { - Interrupt (ResourceConsumer, Level, ActiveHigh, Exclusive, , , ) {92, 93, 94, 95} + Memory32Fixed (ReadWrite, 0x1c020000, 0x00001000) + }) + Return (RBUF) + } + Method(_DSM, 4, Serialized) { + Store (Package (4) + { + "clock-name", "refclk \\_SB.SMB.CLK2", + "clock-name", "timclk \\_SB.SMB.CLK1", + }, Local0) + + DTGP (Arg0, Arg1, Arg2, Arg3, RefOf (Local0)) + + Return (Local0) + } + } + + Device (SER0) { + Name (_HID, "LNRO000A") + Name (_ADR, 0x1c090000) + Name (_UID, 0) + + Method (_CRS, 0x0, Serialized) { + Name (RBUF, ResourceTemplate() { + Memory32Fixed (ReadWrite, 0x1c090000, 0x1000) + Interrupt (ResourceConsumer, Edge, ActiveBoth, Exclusive, , , ) {0x25} + }) + Return (RBUF) + } + } + + Device (SER1) { + Name (_HID, "LNRO000A") + Name (_ADR, 0x1c0a0000) + Name (_UID, 1) + + Method (_CRS, 0x0, Serialized) { + Name (RBUF, ResourceTemplate() { + Memory32Fixed (ReadWrite, 0x1c0a0000, 0x1000) + Interrupt (ResourceConsumer, Edge, ActiveBoth, Exclusive, , , ) {0x26} + }) + Return (RBUF) + } + } + + Device (SER2) { + Name (_HID, "LNRO000A") + Name (_ADR, 0x1c0b0000) + Name (_UID, 2) + + Method (_CRS, 0x0, Serialized) { + Name (RBUF, ResourceTemplate() { + Memory32Fixed (ReadWrite, 0x1c0b0000, 0x1000) + Interrupt (ResourceConsumer, Edge, ActiveBoth, Exclusive, , , ) {0x27} + }) + Return (RBUF) + } + } + + Device (SER3) { + Name (_HID, "LNRO000A") + Name (_ADR, 0x1c0c0000) + Name (_UID, 3) + + Method (_CRS, 0x0, Serialized) { + Name (RBUF, ResourceTemplate() { + Memory32Fixed (ReadWrite, 0x1c0c0000, 0x1000) + Interrupt (ResourceConsumer, Edge, ActiveBoth, Exclusive, , , ) {0x28} + }) + Return (RBUF) + } + } + + Device (WDT0) { + Name (_HID, "LNRO000D") + Name (_UID, 0) + Name (_ADR, 0x1c0f0000) /* WDT */ + Method (_CRS, 0x0, Serialized) { + Name (RBUF, ResourceTemplate () { + Memory32Fixed (ReadWrite, 0x1c0f0000, 0x00001000) + Interrupt (ResourceConsumer, Edge, ActiveBoth, + Exclusive, , , ) {32} + }) + Return (RBUF) + } + } + + Device (TIM0) { + Name (_HID, "LNRO000E") + Name (_UID, 0) + Name (_ADR, 0x1c110000) /* TIMER01 */ + Method (_CRS, 0x0, Serialized) { + Name (RBUF, ResourceTemplate () { + Memory32Fixed (ReadWrite, 0x1c110000, 0x00001000) + Interrupt (ResourceConsumer, Edge, ActiveBoth, + Exclusive, , , ) {34} }) Return (RBUF) } } + + Device (TIM2) { + Name (_HID, "LNRO000F") + Name (_UID, 0) + Name (_ADR, 0x1c120000) /* TIMER23 */ + Method (_CRS, 0x0, Serialized) { + Name (RBUF, ResourceTemplate () { + Memory32Fixed (ReadWrite, 0x1c120000, 0x00001000) + Interrupt (ResourceConsumer, Edge, ActiveBoth, + Exclusive, , , ) {35} + }) + Return (RBUF) + } + } + + Device (RTC0) { + Name (_HID, "LNRO0010") + Name (_UID, 0) + Name (_ADR, 0x1c170000) /* RTC */ + Method (_CRS, 0x0, Serialized) { + Name (RBUF, ResourceTemplate () { + Memory32Fixed (ReadWrite, 0x1c170000, 0x00001000) + Interrupt (ResourceConsumer, Edge, ActiveBoth, + Exclusive, , , ) {36} + }) + Return (RBUF) + } + } + + } // End of AMBA } } -- 1.7.9.5

10 years, 5 months

some help in booting V8 foundation model.

by Amit Kachhap

Hi Hanjun/ACPI team, I am trying to boot V8 foundation model. I am using boot wrapper code from git://git.linaro.org/arm/models/boot-wrapper-aarch64.git Kernel is booting fine but I cannot load ACPI blob as there are no hooks in it to pass to kernel. However in the git://git.linaro.org/arm/models/boot-wrapper.git there are some ACPI hooks but it is for armv7 and does not compile for arm64 linaro toolchain. Any pointer where i am going wrong? Thanks, Amit Daniel

10 years, 5 months

[RFC PATCH] acpi: arm64: move initialisation functions into arm-core

by Graeme Gregory

Instead of littering platform with multiple functions more them into the arm-core.c file. Stub them out in the !CONFIG_ACPI case. Signed-off-by: Graeme Gregory <graeme.gregory(a)linaro.org> --- arch/arm64/include/asm/acpi.h | 6 ++++++ arch/arm64/kernel/setup.c | 13 +------------ drivers/acpi/plat/arm-core.c | 9 +++++++++ 3 files changed, 16 insertions(+), 12 deletions(-) diff --git a/arch/arm64/include/asm/acpi.h b/arch/arm64/include/asm/acpi.h index 9095a7f..2611769 100644 --- a/arch/arm64/include/asm/acpi.h +++ b/arch/arm64/include/asm/acpi.h @@ -80,7 +80,13 @@ struct acpi_arm_root { }; extern struct acpi_arm_root acpi_arm_rsdp_info; +#ifdef CONFIG_ACPI void arm_acpi_reserve_memory(void); +void arm_acpi_init(void); +#else +inline void arm_acpi_reserve_memory(void) {return;} +inline void arm_acpi_init(void) {return;} +#endif /* Low-level suspend routine. */ extern int (*acpi_suspend_lowlevel)(void); diff --git a/arch/arm64/kernel/setup.c b/arch/arm64/kernel/setup.c index 7e2a71c..707b857 100644 --- a/arch/arm64/kernel/setup.c +++ b/arch/arm64/kernel/setup.c @@ -263,22 +263,11 @@ void __init setup_arch(char **cmdline_p) arm64_memblock_init(); -#ifdef CONFIG_ACPI arm_acpi_reserve_memory(); -#endif efi_init(); -#ifdef CONFIG_ACPI - /* - * Parse the ACPI tables for possible boot-time configuration - */ - acpi_boot_table_init(); - early_acpi_boot_init(); - boot_cpu_apic_id = read_cpuid_mpidr() & MPIDR_HWID_BITMASK; - acpi_boot_init(); - prefill_possible_map(); -#endif + arm_acpi_init(); paging_init(); request_standard_resources(); diff --git a/drivers/acpi/plat/arm-core.c b/drivers/acpi/plat/arm-core.c index bb37efe..f8798fc 100644 --- a/drivers/acpi/plat/arm-core.c +++ b/drivers/acpi/plat/arm-core.c @@ -42,6 +42,7 @@ #include <asm/io.h> #include <asm/smp.h> #include <asm/acpi.h> +#include <asm/cputype.h> /* * We never plan to use RSDT on arm/arm64 as its deprecated in spec but this @@ -621,6 +622,14 @@ void __init arm_acpi_reserve_memory() memblock_remove(addr - section_offset, num_sections * SECTION_SIZE); } +void arm_acpi_init(void) { + acpi_boot_table_init(); + early_acpi_boot_init(); + boot_cpu_apic_id = read_cpuid_mpidr() & MPIDR_HWID_BITMASK; + acpi_boot_init(); + prefill_possible_map(); +} + static int __init parse_acpi(char *arg) { if (!arg) -- 1.8.4.2

10 years, 5 months

[PATCH] ACPI: correct minor typos

by al.stone＠linaro.org

From: Al Stone <al.stone(a)linaro.org> Correct "coolign" to "cooling" and "*_ptg" to "*_pctg" as intended. This changes comment text only. Signed-off-by: Al Stone <al.stone(a)linaro.org> --- drivers/acpi/processor_thermal.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/drivers/acpi/processor_thermal.c b/drivers/acpi/processor_thermal.c index d1d2e7f..1ea79739 100644 --- a/drivers/acpi/processor_thermal.c +++ b/drivers/acpi/processor_thermal.c @@ -186,14 +186,14 @@ static int cpufreq_set_cur_state(unsigned int cpu, int state) #endif -/* thermal coolign device callbacks */ +/* thermal cooling device callbacks */ static int acpi_processor_max_state(struct acpi_processor *pr) { int max_state = 0; /* * There exists four states according to - * cpufreq_thermal_reduction_ptg. 0, 1, 2, 3 + * cpufreq_thermal_reduction_pctg. 0, 1, 2, 3 */ max_state += cpufreq_get_max_state(pr->id); if (pr->flags.throttling) -- 1.8.3.1

10 years, 5 months

[PATCH 1/2] ACPI / dock: Remove the redundant if (acpi_disabled) check

by Hanjun Guo

acpi_dock_init() will only be called in acpi_scan_init(), and the code logic shows that if (acpi_disabled) is redundant: acpi_init(); if (acpi_disabled) return; acpi_scan_init(); acpi_dock_init(); if (acpi_disabled) /* redundant */ return; Signed-off-by: Hanjun Guo <hanjun.guo(a)linaro.org> --- This patch set is inspired by Rob's question for my ACPI ARM64 core patches :) drivers/acpi/dock.c | 3 --- 1 file changed, 3 deletions(-) diff --git a/drivers/acpi/dock.c b/drivers/acpi/dock.c index 8da6be9..61d0c3f 100644 --- a/drivers/acpi/dock.c +++ b/drivers/acpi/dock.c @@ -893,9 +893,6 @@ find_dock_and_bay(acpi_handle handle, u32 lvl, void *context, void **rv) void __init acpi_dock_init(void) { - if (acpi_disabled) - return; - /* look for dock stations and bays */ acpi_walk_namespace(ACPI_TYPE_DEVICE, ACPI_ROOT_OBJECT, ACPI_UINT32_MAX, find_dock_and_bay, NULL, NULL, NULL); -- 1.7.9.5

10 years, 5 months

[PATCH] ACPI / table: Replace '1' with specific error in return value

by Hanjun Guo

In commit 7f8f97c3cc (ACPI: acpi_table_parse() now returns success/fail, not count), it return '1' when no table found, replace -ENODEV here to make it more resonable. Fix the same problem in acpi_table_init() too. Signed-off-by: Hanjun Guo <hanjun.guo(a)linaro.org> --- drivers/acpi/tables.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/drivers/acpi/tables.c b/drivers/acpi/tables.c index d67a1fe..4ec4425 100644 --- a/drivers/acpi/tables.c +++ b/drivers/acpi/tables.c @@ -306,7 +306,7 @@ int __init acpi_table_parse(char *id, acpi_tbl_table_handler handler) early_acpi_os_unmap_memory(table, tbl_size); return 0; } else - return 1; + return -ENODEV; } /* @@ -351,7 +351,7 @@ int __init acpi_table_init(void) status = acpi_initialize_tables(initial_tables, ACPI_MAX_TABLES, 0); if (ACPI_FAILURE(status)) - return 1; + return -EINVAL; check_multiple_madt(); return 0; -- 1.7.9.5

10 years, 5 months

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Linaro-acpi December 2013