This is the last part of patch set for core of ARM64 ACPI, and is based
on the patch set part2 "Using ACPI MADT table to initialise SMP and GIC".
ACPI GTDT (Generic Timer Description Table) is used for ARM/ARM64 only,
and contains the information for arch timer initialisation.
This patch trys to convert the arch timer to ACPI using GTDT.
After this patch set was posted, we already finished the SMP, GIC and
arch timer initialisation, which all are essential for ARM64 core system
running, then we will focus on converting the device drivers to ACPI.
Here is the GTDT ASL code I used:
---
platforms/foundation-v8.acpi/gtdt.asl | 35 ++++++++++++++++++++++-----------
1 file changed, 23 insertions(+), 12 deletions(-)
diff --git a/platforms/foundation-v8.acpi/gtdt.asl b/platforms/foundation-v8.acpi/gtdt.asl
index 18c821a..714d61c 100644
--- a/platforms/foundation-v8.acpi/gtdt.asl
+++ b/platforms/foundation-v8.acpi/gtdt.asl
@@ -1,5 +1,6 @@
/*
* Copyright (c) 2013, Al Stone <al.stone(a)linaro.org>
+ * Hanjun Guo <hanjun.guo(a)linaro.org>
*
* [GTDT] Generic Timer Description Table
* Format: [ByteLength] FieldName : HexFieldValue
@@ -21,22 +22,32 @@
[0004] Flags (decoded below) : 00000001
Memory Present : 1
-[0004] Secure PL1 Interrupt : 00000000
-[0004] SPL1 Flags (decoded below) : 00000000
- Trigger Mode : 0
+/* In Foundation model's dts file, the last cell of interrupts
+ * is 0xff01, it means its cpu mask is FF, and trigger type
+ * and flag is 1 = low-to-high edge triggered.
+ *
+ * so in ACPI the Trigger Mode is 1 - Edge triggered, and
+ * Polarity is 0 - Active high as ACPI spec describled.
+ *
+ * using direct mapping for hwirqs, it means that we using
+ * ID [16, 31] for PPI, not [0, 15] used in FDT.
+ */
+[0004] Secure PL1 Interrupt : 0000001d
+[0004] SPL1 Flags (decoded below) : 00000001
+ Trigger Mode : 1
Polarity : 0
-[0004] Non-Secure PL1 Interrupt : 00000000
-[0004] NSPL1 Flags (decoded below) : 00000000
- Trigger Mode : 0
+[0004] Non-Secure PL1 Interrupt : 0000001e
+[0004] NSPL1 Flags (decoded below) : 00000001
+ Trigger Mode : 1
Polarity : 0
-[0004] Virtual Timer Interrupt : 00000000
-[0004] VT Flags (decoded below) : 00000000
- Trigger Mode : 0
+[0004] Virtual Timer Interrupt : 0000001b
+[0004] VT Flags (decoded below) : 00000001
+ Trigger Mode : 1
Polarity : 0
-[0004] Non-Secure PL2 Interrupt : 00000000
-[0004] NSPL2 Flags (decoded below) : 00000000
- Trigger Mode : 0
+[0004] Non-Secure PL2 Interrupt : 0000001a
+[0004] NSPL2 Flags (decoded below) : 00000001
+ Trigger Mode : 1
Polarity : 0
Hanjun Guo (2):
clocksource / arch_timer: Use ACPI GTDT table to initialize arch
timer
ARM64 / clocksource: Use arch_timer_acpi_init()
arch/arm64/kernel/time.c | 4 ++
drivers/clocksource/arm_arch_timer.c | 129 ++++++++++++++++++++++++++++++----
include/clocksource/arm_arch_timer.h | 7 +-
3 files changed, 124 insertions(+), 16 deletions(-)
--
1.7.9.5
From: Naresh Bhat <naresh.bhat(a)linaro.org>
We had a missing symbol so define this as NULL for arm as it is currenly
unused on arm64 platform
Signed-off-by: Naresh Bhat <naresh.bhat(a)linaro.org>
---
arch/arm64/include/asm/acpi.h | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/arch/arm64/include/asm/acpi.h b/arch/arm64/include/asm/acpi.h
index 5f17424..9095a7f 100644
--- a/arch/arm64/include/asm/acpi.h
+++ b/arch/arm64/include/asm/acpi.h
@@ -83,7 +83,7 @@ extern struct acpi_arm_root acpi_arm_rsdp_info;
void arm_acpi_reserve_memory(void);
/* Low-level suspend routine. */
-extern int acpi_suspend_lowlevel(void);
+extern int (*acpi_suspend_lowlevel)(void);
extern void prefill_possible_map(void);
--
1.7.9.5
This is the first part of making ACPI core running on ARM.
PCI is optional on ARM64 but ACPI is dependent on PCI now, so
in the first patch we try to make ACPI can be running without
PCI.
_PDC is requred for ACPI processor_core.c, but its related code
is a little bit x86/ia64 dependent, so I rework _PDC related staff
to make it more arch independent, and then introduce the skeleton
of _PDC related for ARM64, it should be fully implemented after
ACPI spec is ready for processor idle control.
After that, arm-core.c is introduced so we can get ACPI table from
UEFI, then we can parsed for SMP initialisation, GIC initialisation
and for ACPI drivers.
This patch set is based on:
git://git.kernel.org/pub/scm/linux/kernel/git/rafael/linux-pm.git
origin/linux-next branch and plus Al Stone's v2 reduced hardware profile
patch.
Hanjun Guo (7):
ACPI: Make ACPI core running without PCI on ARM64
ARM64 : Add dummy asm/cpu.h
ACPI / processor_core: Rework _PDC related stuff to make it more
arch-independent
ARM64 / ACPI: Introduce the skeleton of _PDC related for ARM64
ARM64 / ACPI: Introduce arm_core.c and its related head file
ARM64 / ACPI: Introduce lowlevel suspend function
ARM64 / ACPI: Enable ARM64 in Kconfig
arch/arm64/Kconfig | 2 +
arch/arm64/include/asm/acpi.h | 93 +++++++++++++++
arch/arm64/include/asm/cpu.h | 25 ++++
arch/arm64/include/asm/processor.h | 11 ++
arch/arm64/kernel/process.c | 5 +
arch/arm64/kernel/setup.c | 8 ++
drivers/acpi/Kconfig | 12 +-
drivers/acpi/Makefile | 4 +-
drivers/acpi/internal.h | 5 +
drivers/acpi/osl.c | 16 +++
drivers/acpi/plat/Makefile | 1 +
drivers/acpi/plat/arm-core.c | 226 ++++++++++++++++++++++++++++++++++++
drivers/acpi/processor_core.c | 27 ++---
drivers/acpi/reboot.c | 47 +++++---
drivers/pnp/pnpacpi/rsparser.c | 2 +
15 files changed, 452 insertions(+), 32 deletions(-)
create mode 100644 arch/arm64/include/asm/acpi.h
create mode 100644 arch/arm64/include/asm/cpu.h
create mode 100644 drivers/acpi/plat/Makefile
create mode 100644 drivers/acpi/plat/arm-core.c
--
1.7.9.5