- Linaro-acpi - lists.linaro.org

by Graeme Gregory

Relocate code is no longer needed as mab can generate physcially relocated blobs for us. Relocate code was also causing problems when tables are passed in from UEFI bootloader as they were already located in memory and adding an aditional offset breaks this. Signed-off-by: Graeme Gregory <graeme.gregory(a)linaro.org> --- drivers/acpi/plat/arm/boot.c | 68 ------------------------------------------ 1 file changed, 68 deletions(-) diff --git a/drivers/acpi/plat/arm/boot.c b/drivers/acpi/plat/arm/boot.c index 82b7bd6..1f29230 100644 --- a/drivers/acpi/plat/arm/boot.c +++ b/drivers/acpi/plat/arm/boot.c @@ -728,67 +728,6 @@ void set_checksum(u8 *start, int len, u8 *cksum) *cksum = (u8)(0 - newsum); } -void __init acpi_arm_blob_relocate(void) -{ - /* - * Fortunately, there are only a few tables that need to - * have their offsets converted to actual addresses. - * - * NB: all values in the blob are little-endian. - */ - - struct acpi_table_rsdp *rp; - struct acpi_table_xsdt *xp; - struct acpi_table_fadt *fp; - phys_addr_t paddress; - void *vaddress; - u32 entries; - u32 ii; - u64 *tmp; - - if (!acpi_arm_rsdp_info.phys_address && !acpi_arm_rsdp_info.size) { - printk(KERN_ERR "(E) ACPI: failed to find rsdp info\n"); - return; - } - - paddress = acpi_arm_rsdp_info.phys_address; - paddress += ACPI_BLOB_HEADER_SIZE; - vaddress = phys_to_virt(paddress); - - /* fixups for the rsdp */ - rp = (struct acpi_table_rsdp *)vaddress; - if (rp->rsdt_physical_address) - rp->rsdt_physical_address += paddress; - if (rp->xsdt_physical_address) - rp->xsdt_physical_address += paddress; - set_checksum((u8 *)rp, rp->length, &(rp->checksum)); - - /* fixups for the xsdt */ - vaddress = phys_to_virt(rp->xsdt_physical_address); - xp = (struct acpi_table_xsdt *)vaddress; - entries = xp->header.length - sizeof (struct acpi_table_header); - entries /= 8; /* length is in bytes */ - tmp = (u64 *)(&(xp->table_offset_entry[0])); - for (ii = 0; ii < entries; ii++) - *tmp++ += paddress; - set_checksum((u8 *)xp, xp->header.length, &(xp->header.checksum)); - - /* fixups for the fadt */ - vaddress = phys_to_virt(xp->table_offset_entry[0]); - fp = (struct acpi_table_fadt *)vaddress; - if (fp->facs) - fp->facs += paddress; - if (fp->dsdt) - fp->dsdt += paddress; - if (fp->Xfacs) - fp->Xfacs += paddress; - if (fp->Xdsdt) - fp->Xdsdt += paddress; - - /* Always fix up the checksums since we've changed bits. */ - set_checksum((u8 *)fp, fp->header.length, &(fp->header.checksum)); -} - /* * ========== OLD COMMENTS FROM x86 ================================= * acpi_boot_table_init() and acpi_boot_init() @@ -828,13 +767,6 @@ void __init acpi_boot_table_init(void) return; /* - * Fix up the addresses in the ACPI we've loaded - * in. The blob has them as offsets and we need - * actual addresses. - */ - acpi_arm_blob_relocate(); - - /* * Initialize the ACPI boot-time table parser. */ if (acpi_table_init()) { -- 1.7.10.4

12 years, 9 months

2
2
0 0

[PATCH 0/4] cleanups and mab physcial locate feature

by Graeme Gregory

Hi, First two patches are cleanups for some stuff in Makefiles. The next two patches add the ability to relocate a block to a fixed physical address and the ability to use this from the makefile. An example for armv8 booting from our modified bootwrapper is. make PADDR=0x88100000 foundation-v8.acpi Near the top of the output from mab you will see the output. > relocating blob to 0x88100000 I shall be sending a patch soon to remove the in kernel re-location code as it is no longer needed and gets in the way of UEFI support. Thanks Graeme

12 years, 9 months

2
8
0 0

[PATCH] Add in a dummy platform in ASL

by al.stone＠linaro.org

From: Al Stone <al.stone(a)linaro.org> Add in a dummy platform intended as essentially null tables to be used in testing only. The intent is to put into the tables only what is needed to know we can load and initialize ACPI, but configure nothing. Signed-off-by: Al Stone <al.stone(a)linaro.org> --- platforms/dummy.acpi/.gitignore | 3 + platforms/dummy.acpi/apic.asl | 133 +++++++++++++++++ platforms/dummy.acpi/asf!.asl | 80 +++++++++++ platforms/dummy.acpi/bert.asl | 21 +++ platforms/dummy.acpi/bgrt.asl | 25 ++++ platforms/dummy.acpi/boot.asl | 21 +++ platforms/dummy.acpi/cpep.asl | 26 ++++ platforms/dummy.acpi/csrt.asl | 143 +++++++++++++++++++ platforms/dummy.acpi/dbgp.asl | 29 ++++ platforms/dummy.acpi/dmar.asl | 68 +++++++++ platforms/dummy.acpi/dsdt.asl | 17 +++ platforms/dummy.acpi/dummy.manifest | 34 +++++ platforms/dummy.acpi/ecdt.asl | 37 +++++ platforms/dummy.acpi/einj.asl | 151 ++++++++++++++++++++ platforms/dummy.acpi/erst.asl | 278 ++++++++++++++++++++++++++++++++++++ platforms/dummy.acpi/facp.asl | 167 ++++++++++++++++++++++ platforms/dummy.acpi/facs.asl | 21 +++ platforms/dummy.acpi/fpdt.asl | 35 +++++ platforms/dummy.acpi/gtdt.asl | 42 ++++++ platforms/dummy.acpi/hest.asl | 193 +++++++++++++++++++++++++ platforms/dummy.acpi/hpet.asl | 33 +++++ platforms/dummy.acpi/ivrs.asl | 86 +++++++++++ platforms/dummy.acpi/mcfg.asl | 26 ++++ platforms/dummy.acpi/mchi.asl | 38 +++++ platforms/dummy.acpi/mpst.asl | 87 +++++++++++ platforms/dummy.acpi/msct.asl | 51 +++++++ platforms/dummy.acpi/oem0.asl | 18 +++ platforms/dummy.acpi/pmtt.asl | 105 ++++++++++++++ platforms/dummy.acpi/rsdp.asl | 17 +++ platforms/dummy.acpi/rsdt.asl | 20 +++ platforms/dummy.acpi/s3pt.asl | 26 ++++ platforms/dummy.acpi/sbst.asl | 22 +++ platforms/dummy.acpi/slic.asl | 56 ++++++++ platforms/dummy.acpi/slit.asl | 60 ++++++++ platforms/dummy.acpi/spcr.asl | 46 ++++++ platforms/dummy.acpi/spmi.asl | 40 ++++++ platforms/dummy.acpi/srat.asl | 57 ++++++++ platforms/dummy.acpi/ssdt0.asl | 17 +++ platforms/dummy.acpi/tcpa.asl | 22 +++ platforms/dummy.acpi/tpm2.asl | 22 +++ platforms/dummy.acpi/uefi.asl | 21 +++ platforms/dummy.acpi/waet.asl | 22 +++ platforms/dummy.acpi/wdat.asl | 47 ++++++ platforms/dummy.acpi/wddt.asl | 44 ++++++ platforms/dummy.acpi/wdrt.asl | 42 ++++++ platforms/dummy.acpi/xsdt.asl | 39 +++++ 46 files changed, 2588 insertions(+) create mode 100644 platforms/dummy.acpi/.gitignore create mode 100644 platforms/dummy.acpi/apic.asl create mode 100644 platforms/dummy.acpi/asf!.asl create mode 100644 platforms/dummy.acpi/bert.asl create mode 100644 platforms/dummy.acpi/bgrt.asl create mode 100644 platforms/dummy.acpi/boot.asl create mode 100644 platforms/dummy.acpi/cpep.asl create mode 100644 platforms/dummy.acpi/csrt.asl create mode 100644 platforms/dummy.acpi/dbgp.asl create mode 100644 platforms/dummy.acpi/dmar.asl create mode 100644 platforms/dummy.acpi/dsdt.asl create mode 100644 platforms/dummy.acpi/dummy.manifest create mode 100644 platforms/dummy.acpi/ecdt.asl create mode 100644 platforms/dummy.acpi/einj.asl create mode 100644 platforms/dummy.acpi/erst.asl create mode 100644 platforms/dummy.acpi/facp.asl create mode 100644 platforms/dummy.acpi/facs.asl create mode 100644 platforms/dummy.acpi/fpdt.asl create mode 100644 platforms/dummy.acpi/gtdt.asl create mode 100644 platforms/dummy.acpi/hest.asl create mode 100644 platforms/dummy.acpi/hpet.asl create mode 100644 platforms/dummy.acpi/ivrs.asl create mode 100644 platforms/dummy.acpi/mcfg.asl create mode 100644 platforms/dummy.acpi/mchi.asl create mode 100644 platforms/dummy.acpi/mpst.asl create mode 100644 platforms/dummy.acpi/msct.asl create mode 100644 platforms/dummy.acpi/oem0.asl create mode 100644 platforms/dummy.acpi/pmtt.asl create mode 100644 platforms/dummy.acpi/rsdp.asl create mode 100644 platforms/dummy.acpi/rsdt.asl create mode 100644 platforms/dummy.acpi/s3pt.asl create mode 100644 platforms/dummy.acpi/sbst.asl create mode 100644 platforms/dummy.acpi/slic.asl create mode 100644 platforms/dummy.acpi/slit.asl create mode 100644 platforms/dummy.acpi/spcr.asl create mode 100644 platforms/dummy.acpi/spmi.asl create mode 100644 platforms/dummy.acpi/srat.asl create mode 100644 platforms/dummy.acpi/ssdt0.asl create mode 100644 platforms/dummy.acpi/tcpa.asl create mode 100644 platforms/dummy.acpi/tpm2.asl create mode 100644 platforms/dummy.acpi/uefi.asl create mode 100644 platforms/dummy.acpi/waet.asl create mode 100644 platforms/dummy.acpi/wdat.asl create mode 100644 platforms/dummy.acpi/wddt.asl create mode 100644 platforms/dummy.acpi/wdrt.asl create mode 100644 platforms/dummy.acpi/xsdt.asl diff --git a/platforms/dummy.acpi/.gitignore b/platforms/dummy.acpi/.gitignore new file mode 100644 index 0000000..9585b50 --- /dev/null +++ b/platforms/dummy.acpi/.gitignore @@ -0,0 +1,3 @@ +*.aml +*.lst +*.acpi diff --git a/platforms/dummy.acpi/apic.asl b/platforms/dummy.acpi/apic.asl new file mode 100644 index 0000000..5784017 --- /dev/null +++ b/platforms/dummy.acpi/apic.asl @@ -0,0 +1,133 @@ +/* + * Copyright (c) 2013, Al Stone <al.stone(a)linaro.org> + * + * [APIC] Multiple APIC Description Table (MADT) + * Format: [ByteLength] FieldName : HexFieldValue + * + * This source is released under the terms of the GPLv2. + */ + +[0004] Signature : "APIC" +[0004] Table Length : 000000F6 +[0001] Revision : 01 +[0001] Checksum : B0 +[0006] Oem ID : "LINARO" +[0008] Oem Table ID : "DUMMY " +[0004] Oem Revision : 00000001 +[0004] Asl Compiler ID : "INTL" +[0004] Asl Compiler Revision : 20110623 + +[0004] Local Apic Address : 00000000 +[0004] Flags (decoded below) : 00000001 + PC-AT Compatibility : 1 + +[0001] Subtable Type : 00 [Processor Local APIC] +[0001] Length : 08 +[0001] Processor ID : 00 +[0001] Local Apic ID : 00 +[0004] Flags (decoded below) : 00000001 + Processor Enabled : 1 + +[0001] Subtable Type : 01 [I/O APIC] +[0001] Length : 0C +[0001] I/O Apic ID : 01 +[0001] Reserved : 00 +[0004] Address : 00000000 +[0004] Interrupt : 00000000 + +[0001] Subtable Type : 02 [Interrupt Source Override] +[0001] Length : 0A +[0001] Bus : 00 +[0001] Source : 00 +[0004] Interrupt : 00000000 +[0002] Flags (decoded below) : 0000 + Polarity : 0 + Trigger Mode : 0 + +[0001] Subtable Type : 03 [NMI Source] +[0001] Length : 08 +[0002] Flags (decoded below) : 000D + Polarity : 1 + Trigger Mode : 3 +[0004] Interrupt : 00000001 + +[0001] Subtable Type : 04 [Local APIC NMI] +[0001] Length : 06 +[0001] Processor ID : 00 +[0002] Flags (decoded below) : 0005 + Polarity : 1 + Trigger Mode : 1 +[0001] Interrupt Input LINT : 01 + +[0001] Subtable Type : 05 [Local APIC Address Override] +[0001] Length : 0C +[0002] Reserved : 0000 +[0008] APIC Address : 0000000000000000 + +[0001] Subtable Type : 06 [I/O SAPIC] +[0001] Length : 10 +[0001] I/O Sapic ID : 00 +[0001] Reserved : 00 +[0004] Interrupt Base : 00000000 +[0008] Address : 0000000000000000 + +[0001] Subtable Type : 07 [Local SAPIC] +[0001] Length : 16 +[0001] Processor ID : 00 +[0001] Local Sapic ID : 00 +[0001] Local Sapic EID : 00 +[0003] Reserved : 000000 +[0004] Flags (decoded below) : 00000001 + Processor Enabled : 1 +[0004] Processor UID : 00000000 +[0006] Processor UID String : "\CPU0" + +[0001] Subtable Type : 08 [Platform Interrupt Sources] +[0001] Length : 10 +[0002] Flags (decoded below) : 0005 + Polarity : 1 + Trigger Mode : 1 +[0001] InterruptType : 00 +[0001] Processor ID : 00 +[0001] Processor EID : 00 +[0001] I/O Sapic Vector : 00 +[0004] Interrupt : 00000001 +[0004] Flags (decoded below) : 00000001 + CPEI Override : 1 + +[0001] Subtable Type : 09 [Processor Local x2APIC] +[0001] Length : 10 +[0002] Reserved : 0000 +[0004] Processor x2Apic ID : 00000000 +[0004] Flags (decoded below) : 00000001 + Processor Enabled : 1 +[0004] Processor UID : 00000000 + +[0001] Subtable Type : 0A [Local x2APIC NMI] +[0001] Length : 0C +[0002] Flags (decoded below) : 0005 + Polarity : 1 + Trigger Mode : 1 +[0004] Processor UID : 00000000 +[0001] Interrupt Input LINT : 00 +[0003] Reserved : 000000 + +[0001] Subtable Type : 0B [Generic Interrupt Controller] +[0001] Length : 28 +[0002] Reserved : 0000 +[0004] Local GIC Hardware ID : 00000000 +[0004] Processor UID : 00000000 +[0004] Flags (decoded below) : 00000001 + Processor Enabled : 1 +[0004] Parking Protocol Version : 00000000 +[0004] Performance Interrupt : 00000000 +[0008] Parked Address : 0000000000000000 +[0008] Base Address : 0000000000000000 + +[0001] Subtable Type : 0C [Generic Interrupt Distributor] +[0001] Length : 18 +[0002] Reserved : 0000 +[0004] Local GIC Hardware ID : 00000000 +[0008] Base Address : 0000000000000000 +[0004] Interrupt Base : 00000000 +[0004] Reserved : 00000000 diff --git a/platforms/dummy.acpi/asf!.asl b/platforms/dummy.acpi/asf!.asl new file mode 100644 index 0000000..a05f924 --- /dev/null +++ b/platforms/dummy.acpi/asf!.asl @@ -0,0 +1,80 @@ +/* + * Intel ACPI Component Architecture + * iASL Compiler/Disassembler version 20130117-64 [Jan 31 2013] + * Copyright (c) 2000 - 2013 Intel Corporation + * + * Template for [ASF!] ACPI Table + * Format: [ByteLength] FieldName : HexFieldValue + */ + +[0004] Signature : "ASF!" [Alert Standard Format table] +[0004] Table Length : 00000072 +[0001] Revision : 10 +[0001] Checksum : 0B +[0006] Oem ID : "INTEL " +[0008] Oem Table ID : "TEMPLATE" +[0004] Oem Revision : 00000001 +[0004] Asl Compiler ID : "INTL" +[0004] Asl Compiler Revision : 20100528 + +[0001] Subtable Type : 00 [ASF Information] +[0001] Reserved : 00 +[0002] Length : 0010 +[0001] Minimum Reset Value : 00 +[0001] Minimum Polling Interval : 00 +[0002] System ID : 0000 +[0004] Manufacturer ID : 00000000 +[0001] Flags : 00 +[0003] Reserved : 000000 + +[0001] Subtable Type : 01 [ASF Alerts] +[0001] Reserved : 00 +[0002] Length : 0014 +[0001] AssertMask : 00 +[0001] DeassertMask : 00 +[0001] Alert Count : 01 +[0001] Alert Data Length : 0C + +[0001] Address : 00 +[0001] Command : 00 +[0001] Mask : 00 +[0001] Value : 00 +[0001] SensorType : 00 +[0001] Type : 00 +[0001] Offset : 00 +[0001] SourceType : 00 +[0001] Severity : 00 +[0001] SensorNumber : 00 +[0001] Entity : 00 +[0001] Instance : 00 + +[0001] Subtable Type : 02 [ASF Remote Control] +[0001] Reserved : 00 +[0002] Length : 000C +[0001] Control Count : 01 +[0001] Control Data Length : 04 +[0002] Reserved : 0000 + +[0001] Function : 00 +[0001] Address : 00 +[0001] Command : 00 +[0001] Value : 00 + +[0001] Subtable Type : 03 [ASF RMCP Boot Options] +[0001] Reserved : 00 +[0002] Length : 0017 +[0007] Capabilities : 00 00 00 00 00 00 00 +[0001] Completion Code : 00 +[0004] Enterprise ID : 00000000 +[0001] Command : 00 +[0002] Parameter : 0000 +[0002] Boot Options : 0000 +[0002] Oem Parameters : 0000 + +[0001] Subtable Type : 84 [ASF Address] +[0001] Reserved : 00 +[0002] Length : 0007 +[0001] Eprom Address : 00 +[0001] Device Count : 01 +[0001] Addresses : 00 + diff --git a/platforms/dummy.acpi/bert.asl b/platforms/dummy.acpi/bert.asl new file mode 100644 index 0000000..55b1622 --- /dev/null +++ b/platforms/dummy.acpi/bert.asl @@ -0,0 +1,21 @@ +/* + * Copyright (c) 2013, Al Stone <al.stone(a)linaro.org> + * + * [BERT] Boot Error Record Table + * Format: [ByteLength] FieldName : HexFieldValue + * + * This source is released under the terms of the GPLv2. + */ + +[0004] Signature : "BERT" +[0004] Table Length : 00000030 +[0001] Revision : 01 +[0001] Checksum : 15 +[0006] Oem ID : "LINARO" +[0008] Oem Table ID : "DUMMY " +[0004] Oem Revision : 00000001 +[0004] Asl Compiler ID : "INTL" +[0004] Asl Compiler Revision : 20100528 + +[0004] Boot Error Region Length : 00000000 +[0008] Boot Error Region Address : 0000000000000000 diff --git a/platforms/dummy.acpi/bgrt.asl b/platforms/dummy.acpi/bgrt.asl new file mode 100644 index 0000000..c8af10e --- /dev/null +++ b/platforms/dummy.acpi/bgrt.asl @@ -0,0 +1,25 @@ +/* + * Intel ACPI Component Architecture + * iASL Compiler/Disassembler version 20130117-64 [Jan 31 2013] + * Copyright (c) 2000 - 2013 Intel Corporation + * + * Template for [BGRT] ACPI Table + * Format: [ByteLength] FieldName : HexFieldValue + */ + +[0004] Signature : "BGRT" [Boot Graphics Resource Table] +[0004] Table Length : 00000038 +[0001] Revision : 01 +[0001] Checksum : 0D +[0006] Oem ID : "INTEL " +[0008] Oem Table ID : "TEMPLATE" +[0004] Oem Revision : 00000001 +[0004] Asl Compiler ID : "INTL" +[0004] Asl Compiler Revision : 20110623 + +[0002] Version : 0001 +[0001] Status : 00 +[0001] Image Type : 00 +[0008] Image Address : 0000000000000000 +[0004] Image OffsetX : 00000000 +[0004] Image OffsetY : 00000000 diff --git a/platforms/dummy.acpi/boot.asl b/platforms/dummy.acpi/boot.asl new file mode 100644 index 0000000..5a567fb --- /dev/null +++ b/platforms/dummy.acpi/boot.asl @@ -0,0 +1,21 @@ +/* + * Intel ACPI Component Architecture + * iASL Compiler/Disassembler version 20130117-64 [Jan 31 2013] + * Copyright (c) 2000 - 2013 Intel Corporation + * + * Template for [BOOT] ACPI Table + * Format: [ByteLength] FieldName : HexFieldValue + */ + +[0004] Signature : "BOOT" [Simple Boot Flag Table] +[0004] Table Length : 00000028 +[0001] Revision : 01 +[0001] Checksum : 0D +[0006] Oem ID : "INTEL " +[0008] Oem Table ID : "TEMPLATE" +[0004] Oem Revision : 06040000 +[0004] Asl Compiler ID : "INTL" +[0004] Asl Compiler Revision : 20100528 + +[0001] Boot Register Index : 00 +[0003] Reserved : 000000 diff --git a/platforms/dummy.acpi/cpep.asl b/platforms/dummy.acpi/cpep.asl new file mode 100644 index 0000000..4383816 --- /dev/null +++ b/platforms/dummy.acpi/cpep.asl @@ -0,0 +1,26 @@ +/* + * Copyright (c) 2013, Al Stone <al.stone(a)linaro.org> + * + * [CPEP] Corrected Platform Error Polling Table + * Format: [ByteLength] FieldName : HexFieldValue + * + * This source is released under the terms of the GPLv2. + */ + +[0004] Signature : "CPEP" +[0004] Table Length : 00000034 +[0001] Revision : 01 +[0001] Checksum : 0F +[0006] Oem ID : "LINARO" +[0008] Oem Table ID : "DUMMY " +[0004] Oem Revision : 00000000 +[0004] Asl Compiler ID : "INTL" +[0004] Asl Compiler Revision : 20100528 + +[0008] Reserved : 0000000000000000 + +[0001] Subtable Type : 00 +[0001] Length : 08 +[0001] Processor ID : 00 +[0001] Processor EID : 00 +[0004] Polling Interval : 00000000 diff --git a/platforms/dummy.acpi/csrt.asl b/platforms/dummy.acpi/csrt.asl new file mode 100644 index 0000000..ab43ea5 --- /dev/null +++ b/platforms/dummy.acpi/csrt.asl @@ -0,0 +1,143 @@ +/* + * Intel ACPI Component Architecture + * iASL Compiler/Disassembler version 20130117-64 [Jan 31 2013] + * Copyright (c) 2000 - 2013 Intel Corporation + * + * Template for [CSRT] ACPI Table + * Format: [ByteLength] FieldName : HexFieldValue + */ + +[0004] Signature : "CSRT" [Core System Resource Table] +[0004] Table Length : 0000014C +[0001] Revision : 01 +[0001] Checksum : 0D +[0006] Oem ID : "INTEL " +[0008] Oem Table ID : "TEMPLATE" +[0004] Oem Revision : 00000001 +[0004] Asl Compiler ID : "INTL" +[0004] Asl Compiler Revision : 20121114 + + +[0004] Length : 00000088 +[0004] Vendor ID : 4C544E49 +[0004] Subvendor ID : 00000000 +[0002] Device ID : 9C60 +[0002] Subdevice ID : 0000 +[0002] Revision : 0002 +[0002] Reserved : 0000 +[0004] Shared Info Length : 0000001C + +[0002] Major Version : 0001 +[0002] Minor Version : 0000 +[0004] MMIO Base Address Low : B3A00000 +[0004] MMIO Base Address High : 00000000 +[0004] GSI Interrupt : 0000002A +[0001] Interrupt Polarity : 02 +[0001] Interrupt Mode : 00 +[0001] Num Channels : 06 +[0001] DMA Address Width : 20 +[0002] Base Request Line : 0000 +[0002] Num Handshake Signals : 0010 +[0004] Max Block Size : 00000FFF + +[0004] Length : 0000000C +[0002] Type : 0003 +[0002] Subtype : 0001 +[0004] UID : 20495053 + +[0004] Length : 0000000C +[0002] Type : 0003 +[0002] Subtype : 0000 +[0004] UID : 30414843 + +[0004] Length : 0000000C +[0002] Type : 0003 +[0002] Subtype : 0000 +[0004] UID : 31414843 + +[0004] Length : 0000000C +[0002] Type : 0003 +[0002] Subtype : 0000 +[0004] UID : 32414843 + +[0004] Length : 0000000C +[0002] Type : 0003 +[0002] Subtype : 0000 +[0004] UID : 33414843 + +[0004] Length : 0000000C +[0002] Type : 0003 +[0002] Subtype : 0000 +[0004] UID : 34414843 + +[0004] Length : 0000000C +[0002] Type : 0003 +[0002] Subtype : 0000 +[0004] UID : 35414843 + +[0004] Length : 000000A0 +[0004] Vendor ID : 4C544E49 +[0004] Subvendor ID : 00000000 +[0002] Device ID : 9C60 +[0002] Subdevice ID : 0000 +[0002] Revision : 0003 +[0002] Reserved : 0000 +[0004] Shared Info Length : 0000001C + +[0002] Major Version : 0001 +[0002] Minor Version : 0000 +[0004] MMIO Base Address Low : 00000000 +[0004] MMIO Base Address High : 00000000 +[0004] GSI Interrupt : 0000002B +[0001] Interrupt Polarity : 02 +[0001] Interrupt Mode : 00 +[0001] Num Channels : 08 +[0001] DMA Address Width : 20 +[0002] Base Request Line : 0010 +[0002] Num Handshake Signals : 0010 +[0004] Max Block Size : 00000FFF + +[0004] Length : 0000000C +[0002] Type : 0003 +[0002] Subtype : 0001 +[0004] UID : 20433249 + +[0004] Length : 0000000C +[0002] Type : 0003 +[0002] Subtype : 0000 +[0004] UID : 30414843 + +[0004] Length : 0000000C +[0002] Type : 0003 +[0002] Subtype : 0000 +[0004] UID : 31414843 + +[0004] Length : 0000000C +[0002] Type : 0003 +[0002] Subtype : 0000 +[0004] UID : 32414843 + +[0004] Length : 0000000C +[0002] Type : 0003 +[0002] Subtype : 0000 +[0004] UID : 33414843 + +[0004] Length : 0000000C +[0002] Type : 0003 +[0002] Subtype : 0000 +[0004] UID : 34414843 + +[0004] Length : 0000000C +[0002] Type : 0003 +[0002] Subtype : 0000 +[0004] UID : 35414843 + +[0004] Length : 0000000C +[0002] Type : 0003 +[0002] Subtype : 0000 +[0004] UID : 36414843 + +[0004] Length : 0000000C +[0002] Type : 0003 +[0002] Subtype : 0000 +[0004] UID : 37414843 diff --git a/platforms/dummy.acpi/dbgp.asl b/platforms/dummy.acpi/dbgp.asl new file mode 100644 index 0000000..d1a826f --- /dev/null +++ b/platforms/dummy.acpi/dbgp.asl @@ -0,0 +1,29 @@ +/* + * Intel ACPI Component Architecture + * iASL Compiler/Disassembler version 20130117-64 [Jan 31 2013] + * Copyright (c) 2000 - 2013 Intel Corporation + * + * Template for [DBGP] ACPI Table + * Format: [ByteLength] FieldName : HexFieldValue + */ + +[0004] Signature : "DBGP" [Debug Port table] +[0004] Table Length : 00000034 +[0001] Revision : 01 +[0001] Checksum : 1A +[0006] Oem ID : "INTEL " +[0008] Oem Table ID : "TEMPLATE" +[0004] Oem Revision : 00000000 +[0004] Asl Compiler ID : "INTL" +[0004] Asl Compiler Revision : 20100528 + +[0001] Interface Type : 00 +[0003] Reserved : 000000 + +[0012] Debug Port Register : [Generic Address Structure] +[0001] Space ID : 00 [SystemMemory] +[0001] Bit Width : 08 +[0001] Bit Offset : 00 +[0001] Encoded Access Width : 00 [Undefined/Legacy] +[0008] Address : 0000000000000000 + diff --git a/platforms/dummy.acpi/dmar.asl b/platforms/dummy.acpi/dmar.asl new file mode 100644 index 0000000..e10c8c3 --- /dev/null +++ b/platforms/dummy.acpi/dmar.asl @@ -0,0 +1,68 @@ +/* + * Intel ACPI Component Architecture + * iASL Compiler/Disassembler version 20130117-64 [Jan 31 2013] + * Copyright (c) 2000 - 2013 Intel Corporation + * + * Template for [DMAR] ACPI Table + * Format: [ByteLength] FieldName : HexFieldValue + */ + +[0004] Signature : "DMAR" [DMA Remapping table] +[0004] Table Length : 0000008C +[0001] Revision : 01 +[0001] Checksum : 15 +[0006] Oem ID : "INTEL " +[0008] Oem Table ID : "TEMPLATE" +[0004] Oem Revision : 00000001 +[0004] Asl Compiler ID : "INTL" +[0004] Asl Compiler Revision : 20100528 + +[0001] Host Address Width : 2F +[0001] Flags : 01 + +[0002] Subtable Type : 0000 [Hardware Unit Definition] +[0002] Length : 0018 +[0001] Flags : 01 +[0001] Reserved : 00 +[0002] PCI Segment Number : 0000 +[0008] Register Base Address : 00000000FD020000 + +[0001] Device Scope Entry Type : 03 +[0001] Entry Length : 08 +[0002] Reserved : 0000 +[0001] Enumeration ID : 08 +[0001] PCI Bus Number : F0 +[0002] PCI Path : 1F,07 + +[0002] Subtable Type : 0001 [Reserved Memory Region] +[0002] Length : 0020 +[0002] Reserved : 0000 +[0002] PCI Segment Number : 0000 +[0008] Base Address : 0000000078C21000 +[0008] End Address (limit) : 0000000078C23FFF + +[0001] Device Scope Entry Type : 01 +[0001] Entry Length : 08 +[0002] Reserved : 0000 +[0001] Enumeration ID : 00 +[0001] PCI Bus Number : 00 +[0002] PCI Path : 1D,00 + +[0002] Subtable Type : 0002 [Root Port ATS Capability] +[0002] Length : 0010 +[0001] Flags : 00 +[0001] Reserved : 00 +[0002] PCI Segment Number : 0000 + +[0001] Device Scope Entry Type : 02 +[0001] Entry Length : 08 +[0002] Reserved : 0000 +[0001] Enumeration ID : 00 +[0001] PCI Bus Number : 00 +[0002] PCI Path : 01,00 + +[0002] Subtable Type : 0003 [Remapping Hardware Static Affinity] +[0002] Length : 0014 +[0004] Reserved : 00000000 +[0008] Base Address : 00000000FD020000 +[0004] Proximity Domain : 00000000 diff --git a/platforms/dummy.acpi/dsdt.asl b/platforms/dummy.acpi/dsdt.asl new file mode 100644 index 0000000..541525b --- /dev/null +++ b/platforms/dummy.acpi/dsdt.asl @@ -0,0 +1,17 @@ +/* + * Copyright (c) 2013, Al Stone <al.stone(a)linaro.org> + * + * [DSDT] Null Description + * + * This source is released under the terms of the GPLv2. + */ + +DefinitionBlock ( + "dsdt.aml", // output filename + "DSDT", // table signature + 1, // DSDT compliance revision + "LINARO", // OEM ID + "DUMMY ", // table ID + 0x00000002) // OEM revision +{ +} diff --git a/platforms/dummy.acpi/dummy.manifest b/platforms/dummy.acpi/dummy.manifest new file mode 100644 index 0000000..6b3a743 --- /dev/null +++ b/platforms/dummy.acpi/dummy.manifest @@ -0,0 +1,34 @@ +# +# Each line is either a comment, white space, or two fields: +# +# <signature> : <ASL file name> +# +# NB: for each file x.asl, an AML file called x.aml will be created +# + +rsdp: rsdp.asl +xsdt: xsdt.asl +facp: facp.asl +dsdt: dsdt.asl +ssdt: ssdt0.asl +bert: bert.asl +ecdt: ecdt.asl +facs: facs.asl +gtdt: gtdt.asl +hest: hest.asl +apic: apic.asl +mcfg: mcfg.asl +mpst: mpst.asl +oem: oem0.asl +pmmt: pmmt.asl +slit: slit.asl +spmi: spmi.asl +srat: srat.asl +uefi: uefi.asl +cpep: cpep.asl +einj: einj.asl +erst: erst.asl +fpdt: fpdt.asl +mchi: mchi.asl +msct: msct.asl + diff --git a/platforms/dummy.acpi/ecdt.asl b/platforms/dummy.acpi/ecdt.asl new file mode 100644 index 0000000..2e38590 --- /dev/null +++ b/platforms/dummy.acpi/ecdt.asl @@ -0,0 +1,37 @@ +/* + * Copyright (c) 2013, Al Stone <al.stone(a)linaro.org> + * + * [ECDT] Embedded Controller Boot Resources Table + * Format: [ByteLength] FieldName : HexFieldValue + * + * This source is released under the terms of the GPLv2. + */ + +[0004] Signature : "ECDT" +[0004] Table Length : 00000042 +[0001] Revision : 01 +[0001] Checksum : 2D +[0006] Oem ID : "LINARO" +[0008] Oem Table ID : "DUMMY " +[0004] Oem Revision : 00000001 +[0004] Asl Compiler ID : "INTL" +[0004] Asl Compiler Revision : 20100528 + + +[0012] Command/Status Register : [Generic Address Structure] +[0001] Space ID : 01 [SystemIO] +[0001] Bit Width : 08 +[0001] Bit Offset : 00 +[0001] Encoded Access Width : 00 [Undefined/Legacy] +[0008] Address : 0000000000000066 + +[0012] Data Register : [Generic Address Structure] +[0001] Space ID : 01 [SystemIO] +[0001] Bit Width : 08 +[0001] Bit Offset : 00 +[0001] Encoded Access Width : 00 [Undefined/Legacy] +[0008] Address : 0000000000000062 + +[0004] UID : 00000000 +[0001] GPE Number : 09 +[0001] Namepath : "" diff --git a/platforms/dummy.acpi/einj.asl b/platforms/dummy.acpi/einj.asl new file mode 100644 index 0000000..65915c3 --- /dev/null +++ b/platforms/dummy.acpi/einj.asl @@ -0,0 +1,151 @@ +/* + * Copyright (c) 2013, Al Stone <al.stone(a)linaro.org> + * + * [EINJ] Error Injection Table + * Format: [ByteLength] FieldName : HexFieldValue + * + * This source released under the terms of the GPLv2. + */ + +[0004] Signature : "EINJ" +[0004] Table Length : 00000130 +[0001] Revision : 01 +[0001] Checksum : 09 +[0006] Oem ID : "LINARO" +[0008] Oem Table ID : "DUMMY " +[0004] Oem Revision : 00000001 +[0004] Asl Compiler ID : "INTL" +[0004] Asl Compiler Revision : 20100528 + +[0004] Injection Header Length : 00000030 +[0001] Flags : 00 +[0003] Reserved : 000000 +[0004] Injection Entry Count : 0000000A + +[0001] Action : 00 [Begin Operation] +[0001] Instruction : 00 [Read Register] +[0001] Flags (decoded below) : 00 + Preserve Register Bits : 0 +[0001] Reserved : 00 + +[0012] Register Region : [Generic Address Structure] +[0001] Space ID : 00 [SystemMemory] +[0001] Bit Width : 40 +[0001] Bit Offset : 00 +[0001] Encoded Access Width : 04 [QWord Access:64] +[0008] Address : 0000000000000000 + +[0008] Value : 0000000000000000 +[0008] Mask : FFFFFFFFFFFFFFFF + +[0001] Action : 01 [Get Trigger Table] +[0001] Instruction : 00 [Read Register] +[0001] Flags (decoded below) : 00 + Preserve Register Bits : 0 +[0001] Reserved : 00 + +[0012] Register Region : [Generic Address Structure] +[0001] Space ID : 00 [SystemMemory] +[0001] Bit Width : 40 +[0001] Bit Offset : 00 +[0001] Encoded Access Width : 04 [QWord Access:64] +[0008] Address : 0000000000000000 + +[0008] Value : 0000000000000000 +[0008] Mask : FFFFFFFFFFFFFFFF + +[0001] Action : 02 [Set Error Type] +[0001] Instruction : 02 [Write Register] +[0001] Flags (decoded below) : 01 + Preserve Register Bits : 1 +[0001] Reserved : 00 + +[0012] Register Region : [Generic Address Structure] +[0001] Space ID : 00 [SystemMemory] +[0001] Bit Width : 40 +[0001] Bit Offset : 00 +[0001] Encoded Access Width : 04 [QWord Access:64] +[0008] Address : 0000000000000000 + +[0008] Value : 0000000000000000 +[0008] Mask : FFFFFFFFFFFFFFFF + +[0001] Action : 03 [Get Error Type] +[0001] Instruction : 00 [Read Register] +[0001] Flags (decoded below) : 00 + Preserve Register Bits : 0 +[0001] Reserved : 00 + +[0012] Register Region : [Generic Address Structure] +[0001] Space ID : 00 [SystemMemory] +[0001] Bit Width : 40 +[0001] Bit Offset : 00 +[0001] Encoded Access Width : 04 [QWord Access:64] +[0008] Address : 0000000000000000 + +[0008] Value : 0000000000000000 +[0008] Mask : FFFFFFFFFFFFFFFF + +[0001] Action : 04 [End Operation] +[0001] Instruction : 03 [Write Register Value] +[0001] Flags (decoded below) : 01 + Preserve Register Bits : 1 +[0001] Reserved : 00 + +[0012] Register Region : [Generic Address Structure] +[0001] Space ID : 00 [SystemMemory] +[0001] Bit Width : 40 +[0001] Bit Offset : 00 +[0001] Encoded Access Width : 04 [QWord Access:64] +[0008] Address : 0000000000000000 + +[0008] Value : 0000000000000000 +[0008] Mask : FFFFFFFFFFFFFFFF + +[0001] Action : 05 [Execute Operation] +[0001] Instruction : 03 [Write Register Value] +[0001] Flags (decoded below) : 01 + Preserve Register Bits : 1 +[0001] Reserved : 00 + +[0012] Register Region : [Generic Address Structure] +[0001] Space ID : 01 [SystemIO] +[0001] Bit Width : 10 +[0001] Bit Offset : 00 +[0001] Encoded Access Width : 02 [Word Access:16] +[0008] Address : 0000000000000000 + +[0008] Value : 0000000000000000 +[0008] Mask : FFFFFFFFFFFFFFFF + +[0001] Action : 06 [Check Busy Status] +[0001] Instruction : 01 [Read Register Value] +[0001] Flags (decoded below) : 00 + Preserve Register Bits : 0 +[0001] Reserved : 00 + +[0012] Register Region : [Generic Address Structure] +[0001] Space ID : 00 [SystemMemory] +[0001] Bit Width : 40 +[0001] Bit Offset : 00 +[0001] Encoded Access Width : 04 [QWord Access:64] +[0008] Address : 0000000000000000 + +[0008] Value : 0000000000000000 +[0008] Mask : FFFFFFFFFFFFFFFF + +[0001] Action : 07 [Get Command Status] +[0001] Instruction : 00 [Read Register] +[0001] Flags (decoded below) : 01 + Preserve Register Bits : 1 +[0001] Reserved : 00 + +[0012] Register Region : [Generic Address Structure] +[0001] Space ID : 00 [SystemMemory] +[0001] Bit Width : 40 +[0001] Bit Offset : 00 +[0001] Encoded Access Width : 04 [QWord Access:64] +[0008] Address : 0000000000000000 + +[0008] Value : 0000000000000000 +[0008] Mask : FFFFFFFFFFFFFFFF diff --git a/platforms/dummy.acpi/erst.asl b/platforms/dummy.acpi/erst.asl new file mode 100644 index 0000000..33100bd --- /dev/null +++ b/platforms/dummy.acpi/erst.asl @@ -0,0 +1,278 @@ +/* + * Copyright (c) 2013, Al Stone <al.stone(a)linaro.org> + * + * [ERST] Error Record Serialization Table + * Format: [ByteLength] FieldName : HexFieldValue + * + * This source released under the terms of the GPLv2. + */ + +[0004] Signature : "ERST" +[0004] Table Length : 00000230 +[0001] Revision : 01 +[0001] Checksum : AB +[0006] Oem ID : "LINARO" +[0008] Oem Table ID : "DUMMY " +[0004] Oem Revision : 00000001 +[0004] Asl Compiler ID : "INTL" +[0004] Asl Compiler Revision : 20100528 + +[0004] Serialization Header Length : 00000030 +[0004] Reserved : 00000000 +[0004] Instruction Entry Count : 00000010 + +[0001] Action : 00 [Begin Write Operation] +[0001] Instruction : 03 [Write Register Value] +[0001] Flags (decoded below) : 00 + Preserve Register Bits : 0 +[0001] Reserved : 00 + +[0012] Register Region : [Generic Address Structure] +[0001] Space ID : 00 [SystemMemory] +[0001] Bit Width : 40 +[0001] Bit Offset : 00 +[0001] Encoded Access Width : 04 [QWord Access:64] +[0008] Address : 0000000000000000 + +[0008] Value : 0000000000000000 +[0008] Mask : FFFFFFFFFFFFFFFF + +[0001] Action : 01 [Begin Read Operation] +[0001] Instruction : 03 [Write Register Value] +[0001] Flags (decoded below) : 00 + Preserve Register Bits : 0 +[0001] Reserved : 00 + +[0012] Register Region : [Generic Address Structure] +[0001] Space ID : 00 [SystemMemory] +[0001] Bit Width : 40 +[0001] Bit Offset : 00 +[0001] Encoded Access Width : 04 [QWord Access:64] +[0008] Address : 0000000000000000 + +[0008] Value : 0000000000000000 +[0008] Mask : FFFFFFFFFFFFFFFF + +[0001] Action : 02 [Begin Clear Operation] +[0001] Instruction : 03 [Write Register Value] +[0001] Flags (decoded below) : 00 + Preserve Register Bits : 0 +[0001] Reserved : 00 + +[0012] Register Region : [Generic Address Structure] +[0001] Space ID : 00 [SystemMemory] +[0001] Bit Width : 40 +[0001] Bit Offset : 00 +[0001] Encoded Access Width : 04 [QWord Access:64] +[0008] Address : 0000000000000000 + +[0008] Value : 0000000000000000 +[0008] Mask : FFFFFFFFFFFFFFFF + +[0001] Action : 03 [End Operation] +[0001] Instruction : 04 [Noop] +[0001] Flags (decoded below) : 01 + Preserve Register Bits : 1 +[0001] Reserved : 00 + +[0012] Register Region : [Generic Address Structure] +[0001] Space ID : 00 [SystemMemory] +[0001] Bit Width : 40 +[0001] Bit Offset : 00 +[0001] Encoded Access Width : 04 [QWord Access:64] +[0008] Address : 0000000000000000 + +[0008] Value : 0000000000000000 +[0008] Mask : FFFFFFFFFFFFFFFF + +[0001] Action : 04 [Set Record Offset] +[0001] Instruction : 02 [Write Register] +[0001] Flags (decoded below) : 00 + Preserve Register Bits : 0 +[0001] Reserved : 00 + +[0012] Register Region : [Generic Address Structure] +[0001] Space ID : 00 [SystemMemory] +[0001] Bit Width : 40 +[0001] Bit Offset : 00 +[0001] Encoded Access Width : 04 [QWord Access:64] +[0008] Address : 0000000000000000 + +[0008] Value : 0000000000000000 +[0008] Mask : FFFFFFFFFFFFFFFF + +[0001] Action : 05 [Execute Operation] +[0001] Instruction : 03 [Write Register Value] +[0001] Flags (decoded below) : 00 + Preserve Register Bits : 0 +[0001] Reserved : 00 + +[0012] Register Region : [Generic Address Structure] +[0001] Space ID : 01 [SystemIO] +[0001] Bit Width : 08 +[0001] Bit Offset : 00 +[0001] Encoded Access Width : 01 [Byte Access:8] +[0008] Address : 0000000000000000 + +[0008] Value : 0000000000000000 +[0008] Mask : FFFFFFFFFFFFFFFF + +[0001] Action : 06 [Check Busy Status] +[0001] Instruction : 01 [Read Register Value] +[0001] Flags (decoded below) : 00 + Preserve Register Bits : 0 +[0001] Reserved : 00 + +[0012] Register Region : [Generic Address Structure] +[0001] Space ID : 00 [SystemMemory] +[0001] Bit Width : 40 +[0001] Bit Offset : 00 +[0001] Encoded Access Width : 04 [QWord Access:64] +[0008] Address : 0000000000000000 + +[0008] Value : 0000000000000000 +[0008] Mask : FFFFFFFFFFFFFFFF + +[0001] Action : 07 [Get Command Status] +[0001] Instruction : 00 [Read Register] +[0001] Flags (decoded below) : 00 + Preserve Register Bits : 0 +[0001] Reserved : 00 + +[0012] Register Region : [Generic Address Structure] +[0001] Space ID : 00 [SystemMemory] +[0001] Bit Width : 40 +[0001] Bit Offset : 00 +[0001] Encoded Access Width : 04 [QWord Access:64] +[0008] Address : 0000000000000000 + +[0008] Value : 0000000000000000 +[0008] Mask : FFFFFFFFFFFFFFFF + +[0001] Action : 08 [Get Record Identifier] +[0001] Instruction : 00 [Read Register] +[0001] Flags (decoded below) : 00 + Preserve Register Bits : 0 +[0001] Reserved : 00 + +[0012] Register Region : [Generic Address Structure] +[0001] Space ID : 00 [SystemMemory] +[0001] Bit Width : 40 +[0001] Bit Offset : 00 +[0001] Encoded Access Width : 04 [QWord Access:64] +[0008] Address : 0000000000000000 + +[0008] Value : 0000000000000000 +[0008] Mask : FFFFFFFFFFFFFFFF + +[0001] Action : 09 [Set Record Identifier] +[0001] Instruction : 02 [Write Register] +[0001] Flags (decoded below) : 00 + Preserve Register Bits : 0 +[0001] Reserved : 00 + +[0012] Register Region : [Generic Address Structure] +[0001] Space ID : 00 [SystemMemory] +[0001] Bit Width : 40 +[0001] Bit Offset : 00 +[0001] Encoded Access Width : 04 [QWord Access:64] +[0008] Address : 0000000000000000 + +[0008] Value : 0000000000000000 +[0008] Mask : FFFFFFFFFFFFFFFF + +[0001] Action : 0A [Get Record Count] +[0001] Instruction : 00 [Read Register] +[0001] Flags (decoded below) : 00 + Preserve Register Bits : 0 +[0001] Reserved : 00 + +[0012] Register Region : [Generic Address Structure] +[0001] Space ID : 00 [SystemMemory] +[0001] Bit Width : 40 +[0001] Bit Offset : 00 +[0001] Encoded Access Width : 04 [QWord Access:64] +[0008] Address : 0000000000000000 + +[0008] Value : 0000000000000000 +[0008] Mask : FFFFFFFFFFFFFFFF + +[0001] Action : 0B [Begin Dummy Write] +[0001] Instruction : 03 [Write Register Value] +[0001] Flags (decoded below) : 00 + Preserve Register Bits : 0 +[0001] Reserved : 00 + +[0012] Register Region : [Generic Address Structure] +[0001] Space ID : 00 [SystemMemory] +[0001] Bit Width : 40 +[0001] Bit Offset : 00 +[0001] Encoded Access Width : 04 [QWord Access:64] +[0008] Address : 0000000000000000 + +[0008] Value : 0000000000000000 +[0008] Mask : FFFFFFFFFFFFFFFF + +[0001] Action : 0C [Unused/Unknown Action] +[0001] Instruction : 00 [Read Register] +[0001] Flags (decoded below) : 00 + Preserve Register Bits : 0 +[0001] Reserved : 00 + +[0012] Register Region : [Generic Address Structure] +[0001] Space ID : 00 [SystemMemory] +[0001] Bit Width : 40 +[0001] Bit Offset : 00 +[0001] Encoded Access Width : 04 [QWord Access:64] +[0008] Address : 0000000000000000 + +[0008] Value : 0000000000000000 +[0008] Mask : FFFFFFFFFFFFFFFF + +[0001] Action : 0D [Get Error Address Range] +[0001] Instruction : 00 [Read Register] +[0001] Flags (decoded below) : 00 + Preserve Register Bits : 0 +[0001] Reserved : 00 + +[0012] Register Region : [Generic Address Structure] +[0001] Space ID : 00 [SystemMemory] +[0001] Bit Width : 40 +[0001] Bit Offset : 00 +[0001] Encoded Access Width : 04 [QWord Access:64] +[0008] Address : 0000000000000000 + +[0008] Value : 0000000000000000 +[0008] Mask : FFFFFFFFFFFFFFFF + +[0001] Action : 0E [Get Error Address Length] +[0001] Instruction : 00 [Read Register] +[0001] Flags (decoded below) : 00 + Preserve Register Bits : 0 +[0001] Reserved : 00 + +[0012] Register Region : [Generic Address Structure] +[0001] Space ID : 00 [SystemMemory] +[0001] Bit Width : 40 +[0001] Bit Offset : 00 +[0001] Encoded Access Width : 04 [QWord Access:64] +[0008] Address : 0000000000000000 + +[0008] Value : 0000000000000000 +[0008] Mask : FFFFFFFFFFFFFFFF + +[0001] Action : 0F [Get Error Attributes] +[0001] Instruction : 00 [Read Register] +[0001] Flags (decoded below) : 00 + Preserve Register Bits : 0 +[0001] Reserved : 00 + +[0012] Register Region : [Generic Address Structure] +[0001] Space ID : 00 [SystemMemory] +[0001] Bit Width : 40 +[0001] Bit Offset : 00 +[0001] Encoded Access Width : 04 [QWord Access:64] +[0008] Address : 0000000000000000 + +[0008] Value : 0000000000000000 +[0008] Mask : FFFFFFFFFFFFFFFF diff --git a/platforms/dummy.acpi/facp.asl b/platforms/dummy.acpi/facp.asl new file mode 100644 index 0000000..45d4d92 --- /dev/null +++ b/platforms/dummy.acpi/facp.asl @@ -0,0 +1,167 @@ +/* + * Copyright (c) 2013, Al Stone <al.stone(a)linaro.org> + * + * [FACP] ACPI Table + * + * This source is released under the terms of the GPLv2. + */ + +[0004] Signature : "FACP" +[0004] Table Length : 0000010C +[0001] Revision : 05 +[0001] Checksum : 18 +[0006] Oem ID : "LINARO" +[0008] Oem Table ID : "DUMMY " +[0004] Oem Revision : 00000000 +[0004] Asl Compiler ID : "INTL" +[0004] Asl Compiler Revision : 20111123 + +[0004] FACS Address : 00000000 +[0004] DSDT Address : 00000010 +[0001] Model : 00 +[0001] PM Profile : 04 /* Enterprise Server */ +[0002] SCI Interrupt : 0000 +[0004] SMI Command Port : 00000000 +[0001] ACPI Enable Value : 00 +[0001] ACPI Disable Value : 00 +[0001] S4BIOS Command : 00 +[0001] P-State Control : 00 +[0004] PM1A Event Block Address : 00000001 +[0004] PM1B Event Block Address : 00000000 +[0004] PM1A Control Block Address : 00000001 +[0004] PM1B Control Block Address : 00000000 +[0004] PM2 Control Block Address : 00000001 +[0004] PM Timer Block Address : 00000001 +[0004] GPE0 Block Address : 00000001 +[0004] GPE1 Block Address : 00000000 +[0001] PM1 Event Block Length : 04 +[0001] PM1 Control Block Length : 02 +[0001] PM2 Control Block Length : 01 +[0001] PM Timer Block Length : 04 +[0001] GPE0 Block Length : 08 +[0001] GPE1 Block Length : 00 +[0001] GPE1 Base Offset : 00 +[0001] _CST Support : 00 +[0002] C2 Latency : 0000 +[0002] C3 Latency : 0000 +[0002] CPU Cache Size : 0000 +[0002] Cache Flush Stride : 0000 +[0001] Duty Cycle Offset : 00 +[0001] Duty Cycle Width : 00 +[0001] RTC Day Alarm Index : 00 +[0001] RTC Month Alarm Index : 00 +[0001] RTC Century Index : 00 +[0002] Boot Flags (decoded below) : 0000 + Legacy Devices Supported (V2) : 0 + 8042 Present on ports 60/64 (V2) : 0 + VGA Not Present (V4) : 0 + MSI Not Supported (V4) : 0 + PCIe ASPM Not Supported (V4) : 0 + CMOS RTC Not Present (V5) : 0 +[0001] Reserved : 00 +[0004] Flags (decoded below) : 00000000 + WBINVD instruction is operational (V1) : 1 + WBINVD flushes all caches (V1) : 1 + All CPUs support C1 (V1) : 0 + C2 works on MP system (V1) : 0 + Control Method Power Button (V1) : 1 + Control Method Sleep Button (V1) : 1 + RTC wake not in fixed reg space (V1) : 0 + RTC can wake system from S4 (V1) : 0 + 32-bit PM Timer (V1) : 0 + Docking Supported (V1) : 0 + Reset Register Supported (V2) : 0 + Sealed Case (V3) : 0 + Headless - No Video (V3) : 1 + Use native instr after SLP_TYPx (V3) : 0 + PCIEXP_WAK Bits Supported (V4) : 0 + Use Platform Timer (V4) : 0 + RTC_STS valid on S4 wake (V4) : 0 + Remote Power-on capable (V4) : 1 + Use APIC Cluster Model (V4) : 0 + Use APIC Physical Destination Mode (V4) : 0 + Hardware Reduced (V5) : 1 + Low Power S0 Idle (V5) : 1 + +[0012] Reset Register : [Generic Address Structure] +[0001] Space ID : 01 [SystemIO] +[0001] Bit Width : 08 +[0001] Bit Offset : 00 +[0001] Encoded Access Width : 01 [Byte Access:8] +[0008] Address : 0000000000000001 + +[0001] Value to cause reset : 00 +[0003] Reserved : 000000 +[0008] FACS Address : 0000000000000000 +[0008] DSDT Address : 0000000000000010 +[0012] PM1A Event Block : [Generic Address Structure] +[0001] Space ID : 01 [SystemIO] +[0001] Bit Width : 20 +[0001] Bit Offset : 00 +[0001] Encoded Access Width : 02 [Word Access:16] +[0008] Address : 0000000000000001 + +[0012] PM1B Event Block : [Generic Address Structure] +[0001] Space ID : 01 [SystemIO] +[0001] Bit Width : 00 +[0001] Bit Offset : 00 +[0001] Encoded Access Width : 00 [Undefined/Legacy] +[0008] Address : 0000000000000000 + +[0012] PM1A Control Block : [Generic Address Structure] +[0001] Space ID : 01 [SystemIO] +[0001] Bit Width : 10 +[0001] Bit Offset : 00 +[0001] Encoded Access Width : 02 [Word Access:16] +[0008] Address : 0000000000000001 + +[0012] PM1B Control Block : [Generic Address Structure] +[0001] Space ID : 01 [SystemIO] +[0001] Bit Width : 00 +[0001] Bit Offset : 00 +[0001] Encoded Access Width : 00 [Undefined/Legacy] +[0008] Address : 0000000000000000 + +[0012] PM2 Control Block : [Generic Address Structure] +[0001] Space ID : 01 [SystemIO] +[0001] Bit Width : 08 +[0001] Bit Offset : 00 +[0001] Encoded Access Width : 00 [Undefined/Legacy] +[0008] Address : 0000000000000001 + +[0012] PM Timer Block : [Generic Address Structure] +[0001] Space ID : 01 [SystemIO] +[0001] Bit Width : 20 +[0001] Bit Offset : 00 +[0001] Encoded Access Width : 03 [DWord Access:32] +[0008] Address : 0000000000000001 + +[0012] GPE0 Block : [Generic Address Structure] +[0001] Space ID : 01 [SystemIO] +[0001] Bit Width : 80 +[0001] Bit Offset : 00 +[0001] Encoded Access Width : 01 [Byte Access:8] +[0008] Address : 0000000000000001 + +[0012] GPE1 Block : [Generic Address Structure] +[0001] Space ID : 01 [SystemIO] +[0001] Bit Width : 00 +[0001] Bit Offset : 00 +[0001] Encoded Access Width : 00 [Undefined/Legacy] +[0008] Address : 0000000000000000 + + +[0012] Sleep Control Register : [Generic Address Structure] +[0001] Space ID : 01 [SystemIO] +[0001] Bit Width : 08 +[0001] Bit Offset : 00 +[0001] Encoded Access Width : 01 [Byte Access:8] +[0008] Address : 0000000000000000 + +[0012] Sleep Status Register : [Generic Address Structure] +[0001] Space ID : 01 [SystemIO] +[0001] Bit Width : 08 +[0001] Bit Offset : 00 +[0001] Encoded Access Width : 01 [Byte Access:8] +[0008] Address : 0000000000000000 + diff --git a/platforms/dummy.acpi/facs.asl b/platforms/dummy.acpi/facs.asl new file mode 100644 index 0000000..8d12b41 --- /dev/null +++ b/platforms/dummy.acpi/facs.asl @@ -0,0 +1,21 @@ +/* + * Copyright (c) 2013, Al Stone <al.stone(a)linaro.org> + * + * [FACS] ACPI Table + * + * This source is released under the terms of the GPLv2. + */ + +[0004] Signature : "FACS" +[0004] Length : 00000040 +[0004] Hardware Signature : 00000000 +[0004] 32 Firmware Waking Vector : 00000000 +[0004] Global Lock : 00000000 +[0004] Flags (decoded below) : 00000000 + S4BIOS Support Present : 0 + 64-bit Wake Supported (V2) : 0 +[0008] 64 Firmware Waking Vector : 0000000000000000 +[0001] Version : 02 +[0003] Reserved : 000000 +[0004] OspmFlags (decoded below) : 00000000 + 64-bit Wake Env Required (V2) : 0 diff --git a/platforms/dummy.acpi/fpdt.asl b/platforms/dummy.acpi/fpdt.asl new file mode 100644 index 0000000..047255f --- /dev/null +++ b/platforms/dummy.acpi/fpdt.asl @@ -0,0 +1,35 @@ +/* + * Copyright (c) 2013, Al Stone <al.stone(a)linaro.org> + * + * [FPDT] Firmware Performance Data Table + * Format: [ByteLength] FieldName : HexFieldValue + * + * This source released under the terms of the GPLv2. + */ + +[0004] Signature : "FPDT" +[0004] Table Length : 00000064 +[0001] Revision : 01 +[0001] Checksum : BD +[0006] Oem ID : "LINARO" +[0008] Oem Table ID : "DUMMY " +[0004] Oem Revision : 00000001 +[0004] Asl Compiler ID : "INTL" +[0004] Asl Compiler Revision : 20110804 + + +[0002] Subtable Type : 0000 +[0001] Length : 30 +[0001] Revision : 01 +[0004] Reserved : 00000000 +[0008] Reset End : 0000000000000000 +[0008] Load Image Start : 0000000000000000 +[0008] Start Image Start : 0000000000000000 +[0008] Exit Services Entry : 0000000000000000 +[0008] Exit Services Exit : 0000000000000000 + +[0002] Subtable Type : 0001 +[0001] Length : 10 +[0001] Revision : 01 +[0004] Reserved : 00000000 +[0008] S3PT Address : 0000000000000000 diff --git a/platforms/dummy.acpi/gtdt.asl b/platforms/dummy.acpi/gtdt.asl new file mode 100644 index 0000000..e08cd06 --- /dev/null +++ b/platforms/dummy.acpi/gtdt.asl @@ -0,0 +1,42 @@ +/* + * Copyright (c) 2013, Al Stone <al.stone(a)linaro.org> + * + * [GTDT] Generic Timer Description Table + * Format: [ByteLength] FieldName : HexFieldValue + * + * This source is released under the terms of the GPLv2. + */ + +[0004] Signature : "GTDT" +[0004] Table Length : 00000050 +[0001] Revision : 01 +[0001] Checksum : F1 +[0006] Oem ID : "LINARO" +[0008] Oem Table ID : "DUMMY " +[0004] Oem Revision : 00000001 +[0004] Asl Compiler ID : "INTL" +[0004] Asl Compiler Revision : 20110623 + +[0008] Timer Address : 0000000000000000 +[0004] Flags (decoded below) : 00000001 + Memory Present : 1 + +[0004] Secure PL1 Interrupt : 00000000 +[0004] SPL1 Flags (decoded below) : 00000000 + Trigger Mode : 0 + Polarity : 0 + +[0004] Non-Secure PL1 Interrupt : 00000000 +[0004] NSPL1 Flags (decoded below) : 00000000 + Trigger Mode : 0 + Polarity : 0 + +[0004] Virtual Timer Interrupt : 00000000 +[0004] VT Flags (decoded below) : 00000000 + Trigger Mode : 0 + Polarity : 0 + +[0004] Non-Secure PL2 Interrupt : 00000000 +[0004] NSPL2 Flags (decoded below) : 00000000 + Trigger Mode : 0 + Polarity : 0 diff --git a/platforms/dummy.acpi/hest.asl b/platforms/dummy.acpi/hest.asl new file mode 100644 index 0000000..e34d856 --- /dev/null +++ b/platforms/dummy.acpi/hest.asl @@ -0,0 +1,193 @@ +/* + * Copyright (c) 2013, Al Stone <al.stone(a)linaro.org + * + * [HEST] Hardware Error Source Table + * Format: [ByteLength] FieldName : HexFieldValue + * + * This source is released under the terms of the GPLv2. + */ + +[0004] Signature : "HEST" +[0004] Table Length : 000001D4 +[0001] Revision : 01 +[0001] Checksum : 20 +[0006] Oem ID : "LINARO" +[0008] Oem Table ID : "DUMMY " +[0004] Oem Revision : 00000001 +[0004] Asl Compiler ID : "INTL" +[0004] Asl Compiler Revision : 20100528 + +[0004] Error Source Count : 00000004 + +[0002] Subtable Type : 0000 [IA-32 Machine Check Exception] +[0002] Source Id : 0000 +[0002] Reserved1 : 0000 +[0001] Flags (decoded below) : 00 + Firmware First : 0 +[0001] Enabled : 01 +[0004] Records To Preallocate : 00000001 +[0004] Max Sections Per Record : 00000001 +[0008] Global Capability Data : 0000000000000000 +[0008] Global Control Data : 0000000000000000 +[0001] Num Hardware Banks : 02 +[0007] Reserved2 : 00000000000000 + +[0001] Bank Number : 00 +[0001] Clear Status On Init : 00 +[0001] Status Format : 00 +[0001] Reserved : 00 +[0004] Control Register : 00000000 +[0008] Control Data : 0000000000000000 +[0004] Status Register : 00000000 +[0004] Address Register : 00000000 +[0004] Misc Register : 00000000 + +[0001] Bank Number : 01 +[0001] Clear Status On Init : 00 +[0001] Status Format : 00 +[0001] Reserved : 00 +[0004] Control Register : 00000000 +[0008] Control Data : 0000000000000000 +[0004] Status Register : 00000000 +[0004] Address Register : 00000000 +[0004] Misc Register : 00000000 + +[0002] Subtable Type : 0001 [IA-32 Corrected Machine Check] +[0002] Source Id : 0001 +[0002] Reserved1 : 0000 +[0001] Flags (decoded below) : 00 + Firmware First : 0 +[0001] Enabled : 01 +[0004] Records To Preallocate : 00000001 +[0004] Max Sections Per Record : 00000001 + +[0028] Notify : [Hardware Error Notification Structure] +[0001] Notify Type : 00 [Polled] +[0001] Notify Length : 00 +[0002] Configuration Write Enable : 0000 +[0004] PollInterval : 00000000 +[0004] Vector : 00000000 +[0004] Polling Threshold Value : 00000000 +[0004] Polling Threshold Window : 00000000 +[0004] Error Threshold Value : 00000000 +[0004] Error Threshold Window : 00000000 + +[0001] Num Hardware Banks : 02 +[0003] Reserved2 : 000000 + +[0001] Bank Number : 00 +[0001] Clear Status On Init : 00 +[0001] Status Format : 00 +[0001] Reserved : 00 +[0004] Control Register : 00000000 +[0008] Control Data : 0000000000000000 +[0004] Status Register : 00000000 +[0004] Address Register : 00000000 +[0004] Misc Register : 00000000 + +[0001] Bank Number : 01 +[0001] Clear Status On Init : 00 +[0001] Status Format : 00 +[0001] Reserved : 00 +[0004] Control Register : 00000000 +[0008] Control Data : 0000000000000000 +[0004] Status Register : 00000000 +[0004] Address Register : 00000000 +[0004] Misc Register : 00000000 + +[0002] Subtable Type : 0007 [PCI Express AER (AER Endpoint)] +[0002] Source Id : 0000 +[0002] Reserved : 0000 +[0001] Flags (decoded below) : 00 + Firmware First : 0 +[0001] Enabled : 01 +[0004] Records To Preallocate : 00000001 +[0004] Max Sections Per Record : 00000001 +[0004] Bus : 00000000 +[0002] Device : 0000 +[0002] Function : 0000 +[0002] DeviceControl : 0000 +[0002] Reserved : 0000 +[0004] Uncorrectable Mask : 00000000 +[0004] Uncorrectable Severity : 00000000 +[0004] Correctable Mask : 00000000 +[0004] Advanced Capabilities : 00000000 + +[0002] Subtable Type : 0008 [PCI Express/PCI-X Bridge AER] +[0002] Source Id : 0000 +[0002] Reserved : 0000 +[0001] Flags (decoded below) : 00 + Firmware First : 0 +[0001] Enabled : 01 +[0004] Records To Preallocate : 00000001 +[0004] Max Sections Per Record : 00000001 +[0004] Bus : 00000000 +[0002] Device : 0000 +[0002] Function : 0000 +[0002] DeviceControl : 0000 +[0002] Reserved : 0000 +[0004] Uncorrectable Mask : 00000000 +[0004] Uncorrectable Severity : 00000000 +[0004] Correctable Mask : 00000000 +[0004] Advanced Capabilities : 00000000 +[0004] 2nd Uncorrectable Mask : 00000000 +[0004] 2nd Uncorrectable Severity : 00000000 +[0004] 2nd Advanced Capabilities : 00000000 + +[0002] Subtable Type : 0009 [Generic Hardware Error Source] +[0002] Source Id : 0002 +[0002] Related Source Id : FFFF +[0001] Reserved : 00 +[0001] Enabled : 01 +[0004] Records To Preallocate : 00000001 +[0004] Max Sections Per Record : 00000001 +[0004] Max Raw Data Length : 00001000 + +[0012] Error Status Address : [Generic Address Structure] +[0001] Space ID : 00 [SystemMemory] +[0001] Bit Width : 40 +[0001] Bit Offset : 00 +[0001] Encoded Access Width : 04 [QWord Access:64] +[0008] Address : 0000000000000000 + +[0028] Notify : [Hardware Error Notification Structure] +[0001] Notify Type : 03 [SCI] +[0001] Notify Length : 1C +[0002] Configuration Write Enable : 0000 +[0004] PollInterval : 00000000 +[0004] Vector : 00000000 +[0004] Polling Threshold Value : 00000000 +[0004] Polling Threshold Window : 00000000 +[0004] Error Threshold Value : 00000000 +[0004] Error Threshold Window : 00000000 + +[0004] Error Status Block Length : 00001000 + +[0002] Subtable Type : 0009 [Generic Hardware Error Source] +[0002] Source Id : 0003 +[0002] Related Source Id : 0000 +[0001] Reserved : 00 +[0001] Enabled : 01 +[0004] Records To Preallocate : 00000001 +[0004] Max Sections Per Record : 00000001 +[0004] Max Raw Data Length : 00001000 + +[0012] Error Status Address : [Generic Address Structure] +[0001] Space ID : 00 [SystemMemory] +[0001] Bit Width : 40 +[0001] Bit Offset : 00 +[0001] Encoded Access Width : 04 [QWord Access:64] +[0008] Address : 0000000000000000 + +[0028] Notify : [Hardware Error Notification Structure] +[0001] Notify Type : 04 [NMI] +[0001] Notify Length : 1C +[0002] Configuration Write Enable : 0000 +[0004] PollInterval : 00000000 +[0004] Vector : 00000000 +[0004] Polling Threshold Value : 00000000 +[0004] Polling Threshold Window : 00000000 +[0004] Error Threshold Value : 00000000 +[0004] Error Threshold Window : 00000000 + +[0004] Error Status Block Length : 00001000 diff --git a/platforms/dummy.acpi/hpet.asl b/platforms/dummy.acpi/hpet.asl new file mode 100644 index 0000000..c150282 --- /dev/null +++ b/platforms/dummy.acpi/hpet.asl @@ -0,0 +1,33 @@ +/* + * Intel ACPI Component Architecture + * iASL Compiler/Disassembler version 20130117-64 [Jan 31 2013] + * Copyright (c) 2000 - 2013 Intel Corporation + * + * Template for [HPET] ACPI Table + * Format: [ByteLength] FieldName : HexFieldValue + */ + +[0004] Signature : "HPET" [High Precision Event Timer table] +[0004] Table Length : 00000038 +[0001] Revision : 01 +[0001] Checksum : 09 +[0006] Oem ID : "INTEL " +[0008] Oem Table ID : "TEMPLATE" +[0004] Oem Revision : 00000001 +[0004] Asl Compiler ID : "INTL" +[0004] Asl Compiler Revision : 20100528 + +[0004] Hardware Block ID : 00000000 + +[0012] Timer Block Register : [Generic Address Structure] +[0001] Space ID : 00 [SystemMemory] +[0001] Bit Width : 00 +[0001] Bit Offset : 00 +[0001] Encoded Access Width : 00 [Undefined/Legacy] +[0008] Address : 0000000000000000 + +[0001] Sequence Number : 00 +[0002] Minimum Clock Ticks : 0000 +[0001] Flags (decoded below) : 00 + 4K Page Protect : 0 + 64K Page Protect : 0 diff --git a/platforms/dummy.acpi/ivrs.asl b/platforms/dummy.acpi/ivrs.asl new file mode 100644 index 0000000..9f64314 --- /dev/null +++ b/platforms/dummy.acpi/ivrs.asl @@ -0,0 +1,86 @@ +/* + * Intel ACPI Component Architecture + * iASL Compiler/Disassembler version 20130117-64 [Jan 31 2013] + * Copyright (c) 2000 - 2013 Intel Corporation + * + * Template for [IVRS] ACPI Table + * Format: [ByteLength] FieldName : HexFieldValue + */ + +[0004] Signature : "IVRS" [I/O Virtualization Reporting Structure] +[0004] Table Length : 000000BC +[0001] Revision : 01 +[0001] Checksum : 87 +[0006] Oem ID : "INTEL " +[0008] Oem Table ID : "TEMPLATE" +[0004] Oem Revision : 00000001 +[0004] Asl Compiler ID : "INTL" +[0004] Asl Compiler Revision : 20100528 + +[0004] Virtualization Info : 00000000 +[0008] Reserved : 0000000000000000 + +[0001] Subtable Type : 10 [Hardware Definition Block] +[0001] Flags : 14 +[0002] Length : 0034 +[0002] DeviceId : 0000 + +[0002] Capability Offset : 0000 +[0008] Base Address : 0000000000000000 +[0002] PCI Segment Group : 0000 +[0002] Virtualization Info : 0000 +[0004] Reserved : 00000000 + +[0001] Entry Type : 00 +[0002] Device ID : 0000 +[0001] Data Setting : 00 + +[0001] Entry Type : 40 +[0002] Device ID : 0000 +[0001] Data Setting : 00 +[0004] Extended Data : 00000000 + +[0001] Entry Type : 42 +[0002] Device ID : 0000 +[0001] Data Setting : 00 +[0001] Reserved : 00 +[0002] Source Used Device ID : 0000 +[0001] Reserved : 00 + +[0001] Entry Type : 48 +[0002] Device ID : 0000 +[0001] Data Setting : 00 +[0001] Handle : 00 +[0002] Source Used Device ID : 0000 +[0001] Variety : 00 + +[0001] Subtable Type : 20 [Memory Definition Block] +[0001] Flags : 08 +[0002] Length : 0020 +[0002] DeviceId : 0000 + +[0002] Auxiliary Data : 0000 +[0008] Reserved : 0000000000000000 +[0008] Start Address : 0000000000000000 +[0008] Memory Length : 0000000000000000 + +[0001] Subtable Type : 21 [Memory Definition Block] +[0001] Flags : 04 +[0002] Length : 0020 +[0002] DeviceId : 0000 + +[0002] Auxiliary Data : 0000 +[0008] Reserved : 0000000000000000 +[0008] Start Address : 0000000000000000 +[0008] Memory Length : 0000000000000000 + +[0001] Subtable Type : 10 [Hardware Definition Block] +[0001] Flags : 14 +[0002] Length : 0018 +[0002] DeviceId : 0000 + +[0002] Capability Offset : 0000 +[0008] Base Address : 0000000000000000 +[0002] PCI Segment Group : 0000 +[0002] Virtualization Info : 0000 +[0004] Reserved : 00000000 diff --git a/platforms/dummy.acpi/mcfg.asl b/platforms/dummy.acpi/mcfg.asl new file mode 100644 index 0000000..a3e93e9 --- /dev/null +++ b/platforms/dummy.acpi/mcfg.asl @@ -0,0 +1,26 @@ +/* + * Copyright (c) 2013, Al Stone <al.stone(a)linaro.org> + * + * [MCFG] PCIe Memory Mapped Configuration Table + * Format: [ByteLength] FieldName : HexFieldValue + * + * This source is released under the terms of the GPLv2. + */ + +[0004] Signature : "MCFG" +[0004] Table Length : 0000003C +[0001] Revision : 01 +[0001] Checksum : 19 +[0006] Oem ID : "LINARO" +[0008] Oem Table ID : "DUMMY " +[0004] Oem Revision : 00000001 +[0004] Asl Compiler ID : "INTL" +[0004] Asl Compiler Revision : 20100528 + +[0008] Reserved : 0000000000000000 + +[0008] Base Address : 0000000000000000 +[0002] Segment Group Number : 0000 +[0001] Start Bus Number : 00 +[0001] End Bus Number : 00 +[0004] Reserved : 00000000 diff --git a/platforms/dummy.acpi/mchi.asl b/platforms/dummy.acpi/mchi.asl new file mode 100644 index 0000000..c10b8e9 --- /dev/null +++ b/platforms/dummy.acpi/mchi.asl @@ -0,0 +1,38 @@ +/* + * Copyright (c) 2013, Al Stone <al.stone(a)linaro.org> + * + * [MCHI] Management Controller Host Interface Table + * Format: [ByteLength] FieldName : HexFieldValue + * + * This source released under the terms of the GPLv2. + */ + +[0004] Signature : "MCHI" +[0004] Table Length : 00000045 +[0001] Revision : 01 +[0001] Checksum : E4 +[0006] Oem ID : "LINARO" +[0008] Oem Table ID : "DUMMY " +[0004] Oem Revision : 02000715 +[0004] Asl Compiler ID : "INTL" +[0004] Asl Compiler Revision : 20100528 + +[0001] Interface Type : 01 +[0001] Protocol : 00 +[0008] Protocol Data : 0000000000000000 +[0001] Interrupt Type : 00 +[0001] Gpe : 00 +[0001] Pci Device Flag : 00 +[0004] Global Interrupt : 00000000 + +[0012] Control Register : [Generic Address Structure] +[0001] Space ID : 02 [PCI_Config] +[0001] Bit Width : 08 +[0001] Bit Offset : 00 +[0001] Encoded Access Width : 00 [Undefined/Legacy] +[0008] Address : 0000000000000000 + +[0001] Pci Segment : 00 +[0001] Pci Bus : 00 +[0001] Pci Device : 00 +[0001] Pci Function : 00 diff --git a/platforms/dummy.acpi/mpst.asl b/platforms/dummy.acpi/mpst.asl new file mode 100644 index 0000000..624e351 --- /dev/null +++ b/platforms/dummy.acpi/mpst.asl @@ -0,0 +1,87 @@ +/* + * Copyright (c) 2013, Al Stone <al.stone(a)linaro.org> + * + * [MPST] Memory Power State Table + * Format: [ByteLength] FieldName : HexFieldValue + * + * This source is released under the terms of the GPLv2. + */ + +[0004] Signature : "MPST" +[0004] Table Length : 000000B6 +[0001] Revision : 01 +[0001] Checksum : 77 +[0006] Oem ID : "LINARO" +[0008] Oem Table ID : "DUMMY " +[0004] Oem Revision : 00000001 +[0004] Asl Compiler ID : "INTL" +[0004] Asl Compiler Revision : 20120913 + +[0001] Channel ID : 00 +[0003] Reserved : 000000 +[0002] Power Node Count : 0002 +[0002] Reserved : 0000 + +[0001] Flags (decoded below) : 00 + Node Enabled : 0 + Power Managed : 0 + Hot Plug Capable : 0 +[0001] Reserved : 00 +[0002] Node ID : 0000 +[0004] Length : 00000000 +[0008] Range Address : 0000000000000000 +[0008] Range Length : 0000000000000000 +[0004] Num Power States : 00000002 +[0004] Num Physical Components : 00000003 + +[0001] Power State : 00 +[0001] InfoIndex : 00 + +[0001] Power State : 00 +[0001] InfoIndex : 00 + +[0002] Component Id : 0000 +[0002] Component Id : 0001 +[0002] Component Id : 0002 + +[0001] Flags (decoded below) : 00 + Node Enabled : 0 + Power Managed : 0 + Hot Plug Capable : 0 +[0001] Reserved : 00 +[0002] Node ID : 0000 +[0004] Length : 00000000 +[0008] Range Address : 0000000000000000 +[0008] Range Length : 0000000000000000 +[0004] Num Power States : 00000001 +[0004] Num Physical Components : 00000001 + +[0001] Power State : 00 +[0001] InfoIndex : 00 + +[0002] Component Id : 0000 + +[0002] Characteristics Count : 0002 +[0002] Reserved : 0000 + +[0001] Structure ID : 01 +[0001] Flags (decoded below) : 00 + Memory Preserved : 0 + Auto Entry : 0 + Auto Exit : 0 +[0002] Reserved : 0000 +[0004] Average Power : 00000000 +[0004] Power Saving : 00000000 +[0008] Exit Latency : 0000000000000000 +[0008] Reserved : 0000000000000000 + +[0001] Structure ID : 01 +[0001] Flags (decoded below) : 00 + Memory Preserved : 0 + Auto Entry : 0 + Auto Exit : 0 +[0002] Reserved : 0000 +[0004] Average Power : 00000000 +[0004] Power Saving : 00000000 +[0008] Exit Latency : 0000000000000000 +[0008] Reserved : 0000000000000000 diff --git a/platforms/dummy.acpi/msct.asl b/platforms/dummy.acpi/msct.asl new file mode 100644 index 0000000..9635902 --- /dev/null +++ b/platforms/dummy.acpi/msct.asl @@ -0,0 +1,51 @@ +/* + * Copyright (c) 2013, Al Stone <al.stone(a)linaro.org> + * + * [MSCT] Maximum System Characteristics Table + * Format: [ByteLength] FieldName : HexFieldValue + * + * This source released under the terms of the GPLv2. + */ + +[0004] Signature : "MSCT" +[0004] Table Length : 00000090 +[0001] Revision : 01 +[0001] Checksum : B7 +[0006] Oem ID : "LINARO" +[0008] Oem Table ID : "DUMMY " +[0004] Oem Revision : 00000001 +[0004] Asl Compiler ID : "INTL" +[0004] Asl Compiler Revision : 20100528 + +[0004] Proximity Offset : 00000038 +[0004] Max Proximity Domains : 00000003 +[0004] Max Clock Domains : 00000000 +[0008] Max Physical Address : 00000FFFFFFFFFFF + +[0001] Revision : 01 +[0001] Length : 16 +[0004] Domain Range Start : 00000000 +[0004] Domain Range End : 00000003 +[0004] Processor Capacity : 00000010 +[0008] Memory Capacity : 0000004000000000 + +[0001] Revision : 01 +[0001] Length : 16 +[0004] Domain Range Start : 00000000 +[0004] Domain Range End : 00000000 +[0004] Processor Capacity : 00000000 +[0008] Memory Capacity : 0000000000000000 + +[0001] Revision : 01 +[0001] Length : 16 +[0004] Domain Range Start : 00000000 +[0004] Domain Range End : 00000000 +[0004] Processor Capacity : 00000000 +[0008] Memory Capacity : 0000000000000000 + +[0001] Revision : 01 +[0001] Length : 16 +[0004] Domain Range Start : 00000000 +[0004] Domain Range End : 00000000 +[0004] Processor Capacity : 00000000 +[0008] Memory Capacity : 0000000000000000 diff --git a/platforms/dummy.acpi/oem0.asl b/platforms/dummy.acpi/oem0.asl new file mode 100644 index 0000000..6b9e810 --- /dev/null +++ b/platforms/dummy.acpi/oem0.asl @@ -0,0 +1,18 @@ +/* + * Copyright (c) 2013, Al Stone <al.stone(a)linaro.org> + * + * [OEMx] OEM Specific Table + * Format: [ByteLength] FieldName : HexFieldValue + * + * This source is released under the terms of the GPLv2. + */ + +[0004] Signature : "OEM0" +[0004] Table Length : 00000024 +[0001] Revision : 01 +[0001] Checksum : 8B +[0006] Oem ID : "LINARO" +[0008] Oem Table ID : "DUMMY " +[0004] Oem Revision : 0000000A +[0004] Asl Compiler ID : "INTL" +[0004] Asl Compiler Revision : 20100528 diff --git a/platforms/dummy.acpi/pmtt.asl b/platforms/dummy.acpi/pmtt.asl new file mode 100644 index 0000000..a337c99 --- /dev/null +++ b/platforms/dummy.acpi/pmtt.asl @@ -0,0 +1,105 @@ +/* + * Copyright (c) 2013, Al Stone <al.stone(a)linaro.org> + * + * [PMTT] Platform Memory Topology Table + * Format: [ByteLength] FieldName : HexFieldValue + * + * This source is released under the terms of the GPLv2. + */ + +[0004] Signature : "PMTT" +[0004] Table Length : 000000B4 +[0001] Revision : 01 +[0001] Checksum : 3A +[0006] Oem ID : "LINARO" +[0008] Oem Table ID : "DUMMY " +[0004] Oem Revision : 00000001 +[0004] Asl Compiler ID : "INTL" +[0004] Asl Compiler Revision : 20110826 + +[0004] Reserved : 00000000 + +[0001] Subtable Type : 00 [Socket] +[0001] Reserved : 00 +[0002] Length : 0080 +[0002] Flags (decoded below) : 0001 + Top-level Device : 1 + Physical Element : 0 + Memory Type : 0 +[0002] Reserved : 0000 +[0002] Socket ID : 0000 +[0002] Reserved : 0000 + +[0001] Subtable Type : 01 [Memory Controller] +[0001] Reserved : 00 +[0002] Length : 0054 +[0002] Flags (decoded below) : 0005 + Top-level Device : 1 + Physical Element : 0 + Memory Type : 1 +[0002] Reserved : 0000 +[0004] Read Latency : 00000000 +[0004] Write Latency : 00000000 +[0004] Read Bandwidth : 00000000 +[0004] Write Bandwidth : 00000000 +[0002] Access Width : 0000 +[0002] Alignment : 0000 +[0002] Reserved : 0000 +[0002] Domain Count : 0003 +[0004] Proximity Domain : 00000000 +[0004] Proximity Domain : 00000000 +[0004] Proximity Domain : 00000000 + +[0001] Subtable Type : 02 [Physical Component (DIMM)] +[0001] Reserved : 00 +[0002] Length : 0014 +[0002] Flags (decoded below) : 0002 + Top-level Device : 0 + Physical Element : 1 + Memory Type : 0 +[0002] Reserved : 0000 +[0002] Component ID : 0000 +[0002] Reserved : 0000 +[0004] Memory Size : 00000000 +[0004] Bios Handle : 00000000 + +[0001] Subtable Type : 02 [Physical Component (DIMM)] +[0001] Reserved : 00 +[0002] Length : 0014 +[0002] Flags (decoded below) : 0002 + Top-level Device : 0 + Physical Element : 1 + Memory Type : 0 +[0002] Reserved : 0000 +[0002] Component ID : 0000 +[0002] Reserved : 0000 +[0004] Memory Size : 00000000 +[0004] Bios Handle : 00000000 + +[0001] Subtable Type : 01 [Memory Controller] +[0001] Reserved : 00 +[0002] Length : 0020 +[0002] Flags (decoded below) : 0001 + Top-level Device : 1 + Physical Element : 0 + Memory Type : 0 +[0002] Reserved : 0000 +[0004] Read Latency : 00000000 +[0004] Write Latency : 00000000 +[0004] Read Bandwidth : 00000000 +[0004] Write Bandwidth : 00000000 +[0002] Access Width : 0000 +[0002] Alignment : 0000 +[0002] Reserved : 0000 +[0002] Domain Count : 0000 + +[0001] Subtable Type : 00 [Socket] +[0001] Reserved : 00 +[0002] Length : 000C +[0002] Flags (decoded below) : 0001 + Top-level Device : 1 + Physical Element : 0 + Memory Type : 0 +[0002] Reserved : 0000 +[0002] Socket ID : 0000 +[0002] Reserved : 0000 diff --git a/platforms/dummy.acpi/rsdp.asl b/platforms/dummy.acpi/rsdp.asl new file mode 100644 index 0000000..3460a77 --- /dev/null +++ b/platforms/dummy.acpi/rsdp.asl @@ -0,0 +1,17 @@ +/* + * Copyright (c) 2013, Al Stone <al.stone(a)linaro.org> + * + * [RSDP] ACPI Table + * + * This source is released under the terms of the GPLv2. + */ + +[0008] Signature : "RSD PTR " +[0001] Checksum : 43 +[0006] Oem ID : "LINARO" +[0001] Revision : 02 +[0004] RSDT Address : 00000000 +[0004] Length : 00000024 +[0008] XSDT Address : 0000000000000000 +[0001] Extended Checksum : DC +[0003] Reserved : 000000 diff --git a/platforms/dummy.acpi/rsdt.asl b/platforms/dummy.acpi/rsdt.asl new file mode 100644 index 0000000..a94868f --- /dev/null +++ b/platforms/dummy.acpi/rsdt.asl @@ -0,0 +1,20 @@ +/* + * Copyright (c) 2013, Al Stone <al.stone(a)linaro.org> + * + * [RSDT] ACPI Table + * Format: [ByteLength] FieldName : HexFieldValue + * + * This source is released under the terms of the GPLv2. + */ + +[0004] Signature : "RSDT" +[0004] Table Length : 00000044 +[0001] Revision : 01 +[0001] Checksum : 8B +[0006] Oem ID : "LINARO" +[0008] Oem Table ID : "DUMMY " +[0004] Oem Revision : 00000001 +[0004] Asl Compiler ID : "INTL" +[0004] Asl Compiler Revision : 20100528 + +[0008] ACPI Table Address 0 : 42009000 /* FACP */ diff --git a/platforms/dummy.acpi/s3pt.asl b/platforms/dummy.acpi/s3pt.asl new file mode 100644 index 0000000..694caf7 --- /dev/null +++ b/platforms/dummy.acpi/s3pt.asl @@ -0,0 +1,26 @@ +/* + * Intel ACPI Component Architecture + * iASL Compiler/Disassembler version 20130117-64 [Jan 31 2013] + * Copyright (c) 2000 - 2013 Intel Corporation + * + * Template for [S3PT] ACPI Table + * Format: [ByteLength] FieldName : HexFieldValue + */ + +[0004] Signature : "S3PT" [S3 Performance Table] +[0004] Length : 00000034 + +[0002] Type : 0000 +[0001] Length : 18 +[0001] Revision : 01 + +[0004] Resume Count : 00000000 +[0008] Full Resume : 0000000000000000 +[0008] Average Resume : 0000000000000000 + +[0002] Type : 0001 +[0001] Length : 14 +[0001] Revision : 01 + +[0008] Suspend Start : 0000000000000000 +[0008] Suspend End : 0000000000000000 diff --git a/platforms/dummy.acpi/sbst.asl b/platforms/dummy.acpi/sbst.asl new file mode 100644 index 0000000..714b15f --- /dev/null +++ b/platforms/dummy.acpi/sbst.asl @@ -0,0 +1,22 @@ +/* + * Intel ACPI Component Architecture + * iASL Compiler/Disassembler version 20130117-64 [Jan 31 2013] + * Copyright (c) 2000 - 2013 Intel Corporation + * + * Template for [SBST] ACPI Table + * Format: [ByteLength] FieldName : HexFieldValue + */ + +[0004] Signature : "SBST" [Smart Battery Specification Table] +[0004] Table Length : 00000030 +[0001] Revision : 01 +[0001] Checksum : 06 +[0006] Oem ID : "INTEL " +[0008] Oem Table ID : "TEMPLATE" +[0004] Oem Revision : 00000001 +[0004] Asl Compiler ID : "INTL" +[0004] Asl Compiler Revision : 20100528 + +[0004] Warning Level : 00000000 +[0004] Low Level : 00000000 +[0004] Critical Level : 00000000 diff --git a/platforms/dummy.acpi/slic.asl b/platforms/dummy.acpi/slic.asl new file mode 100644 index 0000000..df77bf2 --- /dev/null +++ b/platforms/dummy.acpi/slic.asl @@ -0,0 +1,56 @@ +/* + * Intel ACPI Component Architecture + * iASL Compiler/Disassembler version 20130117-64 [Jan 31 2013] + * Copyright (c) 2000 - 2013 Intel Corporation + * + * Template for [SLIC] ACPI Table + * Format: [ByteLength] FieldName : HexFieldValue + */ + +[0004] Signature : "SLIC" [Software Licensing Description Table] +[0004] Table Length : 00000176 +[0001] Revision : 01 +[0001] Checksum : 07 +[0006] Oem ID : "INTEL " +[0008] Oem Table ID : "TEMPLATE" +[0004] Oem Revision : 00000001 +[0004] Asl Compiler ID : "INTL" +[0004] Asl Compiler Revision : 20110211 + + +[0004] Subtable Type : 00000000 [Public Key Structure] +[0004] Length : 0000009C + +[0001] Key Type : 06 +[0001] Version : 02 +[0002] Reserved : 0000 +[0004] Algorithm : 00002400 +[0004] Magic : "RSA1" +[0004] BitLength : 00000400 +[0004] Exponent : 00000000 +[0128] Modulus : 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 \ + 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 \ + 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 \ + 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 \ + 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 \ + 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 \ + 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 \ + 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 + +[0004] Subtable Type : 00000001 [Windows Marker Structure] +[0004] Length : 000000B6 + +[0004] Version : 00020000 +[0006] Oem ID : "INTEL " +[0008] Oem Table ID : "TEMPLATE" +[0008] Windows Flag : "WINDOWS " +[0004] SLIC Version : 00020001 +[0016] Reserved : 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +[0128] Signature : 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 \ + 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 \ + 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 \ + 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 \ + 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 \ + 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 \ + 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 \ + 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 diff --git a/platforms/dummy.acpi/slit.asl b/platforms/dummy.acpi/slit.asl new file mode 100644 index 0000000..ecaadd8 --- /dev/null +++ b/platforms/dummy.acpi/slit.asl @@ -0,0 +1,60 @@ +/* + * Copyright (c) 2013, Al Stone <al.stone(a)linaro.org> + * + * [SLIT] System Locality Information Table + * Format: [ByteLength] FieldName : HexFieldValue + * + * This source is released under the terms of the GPLv2. + */ + +[0004] Signature : "SLIT" +[0004] Table Length : 000001BC +[0001] Revision : 01 +[0001] Checksum : 00 +[0006] Oem ID : "LINARO" +[0008] Oem Table ID : "DUMMY " +[0004] Oem Revision : 00000001 +[0004] Asl Compiler ID : "INTL" +[0004] Asl Compiler Revision : 20110316 + +[0008] Localities : 0000000000000014 +[0020] Locality 0 : 0A 10 16 17 18 19 1A 1B 1C 1D 1E 1F 20 21 22 23 \ + 24 25 26 27 +[0020] Locality 1 : 10 0A 15 16 17 18 19 1A 1B 1C 1D 1E 1F 20 21 22 \ + 23 24 25 26 +[0020] Locality 2 : 16 15 0A 10 16 17 18 19 1A 1B 1C 1D 1E 1F 20 21 \ + 22 23 24 25 +[0020] Locality 3 : 17 16 10 0A 15 16 17 18 19 1A 1B 1C 1D 1E 1F 20 \ + 21 22 23 24 +[0020] Locality 4 : 18 17 16 15 0A 10 16 17 18 19 1A 1B 1C 1D 1E 1F \ + 20 21 22 23 +[0020] Locality 5 : 19 18 17 16 10 0A 15 16 17 18 19 1A 1B 1C 1D 1E \ + 1F 20 21 22 +[0020] Locality 6 : 1A 19 18 17 16 15 0A 10 16 17 18 19 1A 1B 1C 1D \ + 1E 1F 20 21 +[0020] Locality 7 : 1B 1A 19 18 17 16 10 0A 15 16 17 18 19 1A 1B 1C \ + 1D 1E 1F 20 +[0020] Locality 8 : 1C 1B 1A 19 18 17 16 15 0A 10 16 17 18 19 1A 1B \ + 1C 1D 1E 1F +[0020] Locality 9 : 1D 1C 1B 1A 19 18 17 16 10 0A 15 16 17 18 19 1A \ + 1B 1C 1D 1E +[0020] Locality 10 : 1E 1D 1C 1B 1A 19 18 17 16 15 0A 10 16 17 18 19 \ + 1A 1B 1C 1D +[0020] Locality 11 : 1F 1E 1D 1C 1B 1A 19 18 17 16 10 0A 15 16 17 18 \ + 19 1A 1B 1C +[0020] Locality 12 : 20 1F 1E 1D 1C 1B 1A 19 18 17 16 15 0A 10 16 17 \ + 18 19 1A 1B +[0020] Locality 13 : 21 20 1F 1E 1D 1C 1B 1A 19 18 17 16 10 0A 15 16 \ + 17 18 19 1A +[0020] Locality 14 : 22 21 20 1F 1E 1D 1C 1B 1A 19 18 17 16 15 0A 10 \ + 16 17 18 19 +[0020] Locality 15 : 23 22 21 20 1F 1E 1D 1C 1B 1A 19 18 17 16 10 0A \ + 15 16 17 18 +[0020] Locality 16 : 24 23 22 21 20 1F 1E 1D 1C 1B 1A 19 18 17 16 15 \ + 0A 10 16 17 +[0020] Locality 17 : 25 24 23 22 21 20 1F 1E 1D 1C 1B 1A 19 18 17 16 \ + 10 0A 15 16 +[0020] Locality 18 : 26 25 24 23 22 21 20 1F 1E 1D 1C 1B 1A 19 18 17 \ + 16 15 0A 10 +[0020] Locality 19 : 27 26 25 24 23 22 21 20 1F 1E 1D 1C 1B 1A 19 18 \ + 17 16 10 0A diff --git a/platforms/dummy.acpi/spcr.asl b/platforms/dummy.acpi/spcr.asl new file mode 100644 index 0000000..7998ba8 --- /dev/null +++ b/platforms/dummy.acpi/spcr.asl @@ -0,0 +1,46 @@ +/* + * Intel ACPI Component Architecture + * iASL Compiler/Disassembler version 20130117-64 [Jan 31 2013] + * Copyright (c) 2000 - 2013 Intel Corporation + * + * Template for [SPCR] ACPI Table + * Format: [ByteLength] FieldName : HexFieldValue + */ + +[0004] Signature : "SPCR" [Serial Port Console Redirection table] +[0004] Table Length : 00000050 +[0001] Revision : 01 +[0001] Checksum : E3 +[0006] Oem ID : "INTEL " +[0008] Oem Table ID : "TEMPLATE" +[0004] Oem Revision : 00000000 +[0004] Asl Compiler ID : "INTL" +[0004] Asl Compiler Revision : 20100528 + +[0001] Interface Type : 00 +[0003] Reserved : 000000 + +[0012] Serial Port Register : [Generic Address Structure] +[0001] Space ID : 00 [SystemMemory] +[0001] Bit Width : 08 +[0001] Bit Offset : 00 +[0001] Encoded Access Width : 00 [Undefined/Legacy] +[0008] Address : 0000000000000000 + +[0001] Interrupt Type : 00 +[0001] PCAT-compatible IRQ : 00 +[0004] Interrupt : 00000000 +[0001] Baud Rate : 00 +[0001] Parity : 00 +[0001] Stop Bits : 00 +[0001] Flow Control : 00 +[0001] Terminal Type : 00 +[0001] Reserved : 00 +[0002] PCI Device ID : 0000 +[0002] PCI Vendor ID : 0000 +[0001] PCI Bus : 00 +[0001] PCI Device : 00 +[0001] PCI Function : 00 +[0004] PCI Flags : 00000000 +[0001] PCI Segment : 00 +[0004] Reserved : 00000000 diff --git a/platforms/dummy.acpi/spmi.asl b/platforms/dummy.acpi/spmi.asl new file mode 100644 index 0000000..0fe75e5 --- /dev/null +++ b/platforms/dummy.acpi/spmi.asl @@ -0,0 +1,40 @@ +/* + * Copyright (c) 2013, Al Stone <al.stone(a)linaro.org + * + * [SPMI] Server Platform Management Interface Table + * Format: [ByteLength] FieldName : HexFieldValue + * + * This source is released under the terms of the GPLv2. + */ + +[0004] Signature : "SPMI" +[0004] Table Length : 00000041 +[0001] Revision : 04 +[0001] Checksum : ED +[0006] Oem ID : "LINARO" +[0008] Oem Table ID : "DUMMY " +[0004] Oem Revision : 00000000 +[0004] Asl Compiler ID : "INTL" +[0004] Asl Compiler Revision : 20100528 + +[0001] Interface Type : 00 +[0001] Reserved : 00 +[0002] IPMI Spec Version : 0000 +[0001] Interrupt Type : 00 +[0001] GPE Number : 00 +[0001] Reserved : 00 +[0001] PCI Device Flag : 00 +[0004] Interrupt : 00000000 + +[0012] IPMI Register : [Generic Address Structure] +[0001] Space ID : 00 [SystemMemory] +[0001] Bit Width : 08 +[0001] Bit Offset : 00 +[0001] Encoded Access Width : 01 [Byte Access:8] +[0008] Address : 0000000000000000 + +[0001] PCI Segment : 00 +[0001] PCI Bus : 00 +[0001] PCI Device : 00 +[0001] PCI Function : 00 +[0001] Reserved : 00 diff --git a/platforms/dummy.acpi/srat.asl b/platforms/dummy.acpi/srat.asl new file mode 100644 index 0000000..f82c4ae --- /dev/null +++ b/platforms/dummy.acpi/srat.asl @@ -0,0 +1,57 @@ +/* + * Copyright (c) 2013, Al Stone <al.stone(a)linaro.org> + * + * [SRAT] System Resource Affinity Table + * Format: [ByteLength] FieldName : HexFieldValue + * + * This source is released under the terms of the GPLv2. + */ + +[0004] Signature : "SRAT" +[0004] Table Length : 00000080 +[0001] Revision : 03 +[0001] Checksum : 5A +[0006] Oem ID : "LINARO" +[0008] Oem Table ID : "DUMMY " +[0004] Oem Revision : 00000001 +[0004] Asl Compiler ID : "INTL" +[0004] Asl Compiler Revision : 20100528 + +[0004] Table Revision : 00000001 +[0008] Reserved : 0000000000000000 + +[0001] Subtable Type : 00 [Processor Local APIC/SAPIC Affinity] +[0001] Length : 10 + +[0001] Proximity Domain Low(8) : 00 +[0001] Apic ID : 00 +[0004] Flags (decoded below) : 00000001 + Enabled : 1 +[0001] Local Sapic EID : 00 +[0003] Proximity Domain High(24) : 000000 +[0004] Reserved : 00000000 + +[0001] Subtable Type : 01 [Memory Affinity] +[0001] Length : 28 + +[0004] Proximity Domain : 00000000 +[0002] Reserved1 : 0000 +[0008] Base Address : 0000000000000000 +[0008] Address Length : 000000000009FC00 +[0004] Reserved2 : 00000000 +[0004] Flags (decoded below) : 00000001 + Enabled : 1 + Hot Pluggable : 0 + Non-Volatile : 0 +[0008] Reserved3 : 0000000000000000 + +[0001] Subtable Type : 02 [Processor Local x2APIC Affinity] +[0001] Length : 18 + +[0002] Reserved1 : 0000 +[0004] Proximity Domain : 00000000 +[0004] Apic ID : 00000000 +[0004] Flags (decoded below) : 00000001 + Enabled : 1 +[0004] Clock Domain : 00000000 +[0004] Reserved2 : 00000000 diff --git a/platforms/dummy.acpi/ssdt0.asl b/platforms/dummy.acpi/ssdt0.asl new file mode 100644 index 0000000..5d593ef --- /dev/null +++ b/platforms/dummy.acpi/ssdt0.asl @@ -0,0 +1,17 @@ +/* + * Copyright (c) 2013, Al Stone <al.stone(a)linaro.org> + * + * [SSDT] Null Description + * + * This source is released under the terms of the GPLv2. + */ + +DefinitionBlock ( + "ssdt0.aml", // output filename + "SSDT", // table signature + 2, // SSDT compliance revision + "LINARO", // OEM ID + "DUMMY ", // table ID + 0x00000001) // OEM revision +{ +} diff --git a/platforms/dummy.acpi/tcpa.asl b/platforms/dummy.acpi/tcpa.asl new file mode 100644 index 0000000..cfdfa39 --- /dev/null +++ b/platforms/dummy.acpi/tcpa.asl @@ -0,0 +1,22 @@ +/* + * Intel ACPI Component Architecture + * iASL Compiler/Disassembler version 20130117-64 [Jan 31 2013] + * Copyright (c) 2000 - 2013 Intel Corporation + * + * Template for [TCPA] ACPI Table + * Format: [ByteLength] FieldName : HexFieldValue + */ + +[0004] Signature : "TCPA" [Trusted Computing Platform Alliance table] +[0004] Table Length : 00000032 +[0001] Revision : 01 +[0001] Checksum : 67 +[0006] Oem ID : "INTEL " +[0008] Oem Table ID : "TEMPLATE" +[0004] Oem Revision : 00003180 +[0004] Asl Compiler ID : "INTL" +[0004] Asl Compiler Revision : 20100528 + +[0002] Reserved : 0000 +[0004] Max Event Log Length : 00000000 +[0008] Event Log Address : 0000000000000001 diff --git a/platforms/dummy.acpi/tpm2.asl b/platforms/dummy.acpi/tpm2.asl new file mode 100644 index 0000000..38cc502 --- /dev/null +++ b/platforms/dummy.acpi/tpm2.asl @@ -0,0 +1,22 @@ +/* + * Intel ACPI Component Architecture + * iASL Compiler/Disassembler version 20130117-64 [Jan 31 2013] + * Copyright (c) 2000 - 2013 Intel Corporation + * + * Template for [TPM2] ACPI Table + * Format: [ByteLength] FieldName : HexFieldValue + */ + +[0004] Signature : "TPM2" [Trusted Platform Module hardware interface table] +[0004] Table Length : 00000034 +[0001] Revision : 03 +[0001] Checksum : 42 +[0006] Oem ID : "INTEL " +[0008] Oem Table ID : "TEMPLATE" +[0004] Oem Revision : 00000001 +[0004] Asl Compiler ID : "INTL" +[0004] Asl Compiler Revision : 20121114 + +[0004] Flags : 00000000 +[0008] Control Address : 0011223344556677 +[0004] Start Method : 00000001 diff --git a/platforms/dummy.acpi/uefi.asl b/platforms/dummy.acpi/uefi.asl new file mode 100644 index 0000000..efad184 --- /dev/null +++ b/platforms/dummy.acpi/uefi.asl @@ -0,0 +1,21 @@ +/* + * Copyright (c) 2013, Al Stone <al.stone(a)linaro.org> + * + * [UEFI] UEFI Boot Optimization Table + * Format: [ByteLength] FieldName : HexFieldValue + * + * This source is released under the terms of the GPLv2. + */ + +[0004] Signature : "UEFI" +[0004] Table Length : 00000036 +[0001] Revision : 01 +[0001] Checksum : 9B +[0006] Oem ID : "LINARO" +[0008] Oem Table ID : "DUMMY " +[0004] Oem Revision : 00000001 +[0004] Asl Compiler ID : "INTL" +[0004] Asl Compiler Revision : 20100528 + +[0016] UUID Identifier : 03020100-0504-0706-0809-0A0B0C0D0E0F +[0002] Data Offset : 0000 diff --git a/platforms/dummy.acpi/waet.asl b/platforms/dummy.acpi/waet.asl new file mode 100644 index 0000000..b459110 --- /dev/null +++ b/platforms/dummy.acpi/waet.asl @@ -0,0 +1,22 @@ +/* + * Intel ACPI Component Architecture + * iASL Compiler/Disassembler version 20130117-64 [Jan 31 2013] + * Copyright (c) 2000 - 2013 Intel Corporation + * + * Template for [WAET] ACPI Table + * Format: [ByteLength] FieldName : HexFieldValue + */ + +[0004] Signature : "WAET" [Windows ACPI Emulated Devices Table] +[0004] Table Length : 00000028 +[0001] Revision : 01 +[0001] Checksum : 19 +[0006] Oem ID : "INTEL " +[0008] Oem Table ID : "TEMPLATE" +[0004] Oem Revision : 00000001 +[0004] Asl Compiler ID : "INTL" +[0004] Asl Compiler Revision : 20100528 + +[0004] Flags (decoded below) : 00000000 + RTC needs no INT ack : 0 + PM timer, one read only : 0 diff --git a/platforms/dummy.acpi/wdat.asl b/platforms/dummy.acpi/wdat.asl new file mode 100644 index 0000000..e49205a --- /dev/null +++ b/platforms/dummy.acpi/wdat.asl @@ -0,0 +1,47 @@ +/* + * Intel ACPI Component Architecture + * iASL Compiler/Disassembler version 20130117-64 [Jan 31 2013] + * Copyright (c) 2000 - 2013 Intel Corporation + * + * Template for [WDAT] ACPI Table + * Format: [ByteLength] FieldName : HexFieldValue + */ + +[0004] Signature : "WDAT" [Watchdog Action Table] +[0004] Table Length : 0000005C +[0001] Revision : 01 +[0001] Checksum : E3 +[0006] Oem ID : "INTEL " +[0008] Oem Table ID : "TEMPLATE" +[0004] Oem Revision : 00000000 +[0004] Asl Compiler ID : "INTL" +[0004] Asl Compiler Revision : 20100528 + +[0004] Header Length : 00000020 +[0002] PCI Segment : 00FF +[0001] PCI Bus : FF +[0001] PCI Device : FF +[0001] PCI Function : FF +[0003] Reserved : 000000 +[0004] Timer Period : 00000258 +[0004] Max Count : 000003FF +[0004] Min Count : 00000002 +[0001] Flags (decoded below) : 00 + Enabled : 0 + Stopped When Asleep : 0 +[0003] Reserved : 000000 +[0004] Watchdog Entry Count : 0000000E + +[0001] Watchdog Action : 01 +[0001] Instruction : 02 +[0002] Reserved : 0000 + +[0012] Register Region : [Generic Address Structure] +[0001] Space ID : 01 [SystemIO] +[0001] Bit Width : 10 +[0001] Bit Offset : 00 +[0001] Encoded Access Width : 02 [Word Access:16] +[0008] Address : 0000000000000460 + +[0004] Value : 00000001 +[0004] Register Mask : 00000001 diff --git a/platforms/dummy.acpi/wddt.asl b/platforms/dummy.acpi/wddt.asl new file mode 100644 index 0000000..a0b039e --- /dev/null +++ b/platforms/dummy.acpi/wddt.asl @@ -0,0 +1,44 @@ +/* + * Intel ACPI Component Architecture + * iASL Compiler/Disassembler version 20130117-64 [Jan 31 2013] + * Copyright (c) 2000 - 2013 Intel Corporation + * + * Template for [WDDT] ACPI Table + * Format: [ByteLength] FieldName : HexFieldValue + */ + +[0004] Signature : "WDDT" [Watchdog Description Table] +[0004] Table Length : 00000040 +[0001] Revision : 01 +[0001] Checksum : 00 +[0006] Oem ID : "INTEL " +[0008] Oem Table ID : "TEMPLATE" +[0004] Oem Revision : 00000000 +[0004] Asl Compiler ID : "INTL" +[0004] Asl Compiler Revision : 20100528 + +[0002] Specification Version : 0000 +[0002] Table Version : 0000 +[0002] PCI Vendor ID : 0000 + +[0012] Timer Register : [Generic Address Structure] +[0001] Space ID : 01 [SystemIO] +[0001] Bit Width : FF +[0001] Bit Offset : 00 +[0001] Encoded Access Width : 00 [Undefined/Legacy] +[0008] Address : 0000000000000000 + +[0002] Max Count : 0000 +[0002] Min Count : 0000 +[0002] Period : 0000 +[0002] Status (decoded below) : 0000 + Available : 0 + Active : 0 + OS Owns : 0 + User Reset : 0 + Timeout Reset : 0 + Power Fail Reset : 0 + Unknown Reset : 0 +[0002] Capability (decoded below) : 0000 + Auto Reset : 0 + Timeout Alert : 0 diff --git a/platforms/dummy.acpi/wdrt.asl b/platforms/dummy.acpi/wdrt.asl new file mode 100644 index 0000000..14453c7 --- /dev/null +++ b/platforms/dummy.acpi/wdrt.asl @@ -0,0 +1,42 @@ +/* + * Intel ACPI Component Architecture + * iASL Compiler/Disassembler version 20130117-64 [Jan 31 2013] + * Copyright (c) 2000 - 2013 Intel Corporation + * + * Template for [WDRT] ACPI Table + * Format: [ByteLength] FieldName : HexFieldValue + */ + +[0004] Signature : "WDRT" [Watchdog Resource Table] +[0004] Table Length : 00000047 +[0001] Revision : 01 +[0001] Checksum : B0 +[0006] Oem ID : "INTEL " +[0008] Oem Table ID : "TEMPLATE" +[0004] Oem Revision : 00000001 +[0004] Asl Compiler ID : "INTL" +[0004] Asl Compiler Revision : 20100528 + + +[0012] Control Register : [Generic Address Structure] +[0001] Space ID : 00 [SystemMemory] +[0001] Bit Width : 20 +[0001] Bit Offset : 00 +[0001] Encoded Access Width : 00 [Undefined/Legacy] +[0008] Address : 0000000000000000 + +[0012] Count Register : [Generic Address Structure] +[0001] Space ID : 00 [SystemMemory] +[0001] Bit Width : 20 +[0001] Bit Offset : 00 +[0001] Encoded Access Width : 00 [Undefined/Legacy] +[0008] Address : 0000000000000000 + +[0002] PCI Device ID : FFFF +[0002] PCI Vendor ID : FFFF +[0001] PCI Bus : 00 +[0001] PCI Device : 00 +[0001] PCI Function : 00 +[0001] PCI Segment : 00 +[0002] Max Count : FFFF +[0001] Counter Units : 00 diff --git a/platforms/dummy.acpi/xsdt.asl b/platforms/dummy.acpi/xsdt.asl new file mode 100644 index 0000000..ff718be --- /dev/null +++ b/platforms/dummy.acpi/xsdt.asl @@ -0,0 +1,39 @@ +/* + * Copyright (c) 2013, Al Stone <al.stone(a)linaro.org> + * + * [XSDT] Extended System Description Table + * Format: [ByteLength] FieldName : HexFieldValue + * + * This source is released under the terms of the GPLv2. + */ + +[0004] Signature : "XSDT" +[0004] Table Length : 00000064 +[0001] Revision : 01 +[0001] Checksum : 8B +[0006] Oem ID : "LINARO" +[0008] Oem Table ID : "DUMMY " +[0004] Oem Revision : 00000014 +[0004] Asl Compiler ID : "INTL" +[0004] Asl Compiler Revision : 20100528 + +[0008] ACPI Table Address 0 : 0000000000000010 +[0008] ACPI Table Address 0 : 0000000000000020 +[0008] ACPI Table Address 0 : 0000000000000030 +[0008] ACPI Table Address 0 : 0000000000000040 +[0008] ACPI Table Address 0 : 0000000000000050 +[0008] ACPI Table Address 0 : 0000000000000060 +[0008] ACPI Table Address 0 : 0000000000000070 +[0008] ACPI Table Address 0 : 0000000000000080 +[0008] ACPI Table Address 0 : 0000000000000090 +[0008] ACPI Table Address 0 : 00000000000000A0 +[0008] ACPI Table Address 0 : 00000000000000B0 +[0008] ACPI Table Address 0 : 00000000000000C0 +[0008] ACPI Table Address 0 : 00000000000000D0 +[0008] ACPI Table Address 0 : 00000000000000E0 +[0008] ACPI Table Address 0 : 00000000000000F0 +[0008] ACPI Table Address 0 : 0000000000000100 +[0008] ACPI Table Address 0 : 0000000000000110 +[0008] ACPI Table Address 0 : 0000000000000120 +[0008] ACPI Table Address 0 : 0000000000000130 +[0008] ACPI Table Address 0 : 0000000000000140 -- 1.8.1.4

12 years, 9 months

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Wiki page on the implications of the Reduced Hardware Profile

by Al Stone

As I've been working through the detailed requirements of the reduced hardware mode in ACPI, and more particularly, working through where the current Linux implementation is either lacking or incorrect, I had a bunch of hand-scribbled notes scattered around. Since those had a bit of a tendency to wander off, I finally put them all in a wiki page: https://wiki.linaro.org/LEG/Engineering/Kernel/ACPI/AcpiReducedHw Now it will be much easier to lose them all at once. If there are corrections needed or things missing, feel free to edit the page or let me know. -- ciao, al ----------------------------------- Al Stone Software Engineer Linaro Enterprise Group al.stone(a)linaro.org -----------------------------------

12 years, 9 months

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ACPI ASL git repository

by Graeme Gregory

Hi, I have moved the acpi asl definitions out of the kernel repository into their own repository so that they can be used for building UEFI. The new repository for ASL is :- http://git.linaro.org/gitweb?p=arm/acpi/acpi-asl.git;a=summary There will be a strict all patches require one Ack policy on this repo for changes. And a NAK will deny access. Currently there are two platforms defined in the platforms/ directory. One for the Arndale board and one for the foundation v8 model. Obviously this ASL is currently a work in progress. For acpi team members the "blob" can be built with mab using either :- make exynos5250-arndale.acpi or make foundation-v8.acpi in the root directory of the repo. Thanks Graeme

12 years, 9 months

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[PATCH 1/3] cpu topology: remove stale arch_provides_topology_pointers and define_siblings_show_map/list()

by Hanjun Guo

arch_provides_topology_pointers was introduced in commit 23ca4bba3 (x86: cleanup early per cpu variables/accesses v4) to indicate pointers to the topology cpumask_t maps are valid to avoid copying data on to/off of the stack. But later in commit fbd59a8d (cpumask: Use topology_core_cpumask()/ topology_thread_cpumask()), the pointers to the topology struct cpumask maps are always valid. After that commit, the only difference is that there is a redundant "unsigned int cpu = dev->id;" if arch_provides_topology_pointers defined, but dev->id is type 'u32' which devolves to 'unsigned int' on all supported arches. So this arch_provides_topology_pointers define is pointless and only cause obfuscation now, remove it. Tested on x86 machine, topology information in sys/devices/system/cpu/ cpuX/topology/ is the same after appling this patch set. Signed-off-by: Hanjun Guo <hanjun.guo(a)linaro.org> --- drivers/base/topology.c | 20 -------------------- 1 file changed, 20 deletions(-) diff --git a/drivers/base/topology.c b/drivers/base/topology.c index 2f5919e..94ffee3 100644 --- a/drivers/base/topology.c +++ b/drivers/base/topology.c @@ -62,25 +62,6 @@ static ssize_t show_cpumap(int type, const struct cpumask *mask, char *buf) } #endif -#ifdef arch_provides_topology_pointers -#define define_siblings_show_map(name) \ -static ssize_t show_##name(struct device *dev, \ - struct device_attribute *attr, char *buf) \ -{ \ - unsigned int cpu = dev->id; \ - return show_cpumap(0, topology_##name(cpu), buf); \ -} - -#define define_siblings_show_list(name) \ -static ssize_t show_##name##_list(struct device *dev, \ - struct device_attribute *attr, \ - char *buf) \ -{ \ - unsigned int cpu = dev->id; \ - return show_cpumap(1, topology_##name(cpu), buf); \ -} - -#else #define define_siblings_show_map(name) \ static ssize_t show_##name(struct device *dev, \ struct device_attribute *attr, char *buf) \ @@ -95,7 +76,6 @@ static ssize_t show_##name##_list(struct device *dev, \ { \ return show_cpumap(1, topology_##name(dev->id), buf); \ } -#endif #define define_siblings_show_func(name) \ define_siblings_show_map(name); define_siblings_show_list(name) -- 1.7.9.5

12 years, 9 months

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acpica-tools for Linaro

by Al Stone

Just an FYI: I've cloned the git tree I use to maintain the acpica-tools package for Debian and put a copy here: https://git.linaro.org/gitweb?p=people/ahs3/acpica-tools.git;a=summary This is of course the ever fun package that includes iasl and acpiexec and acpidump and all of your favorite ACPI user space tools. I've also filed the proper bug to get this into the CI loop. Once it is, the Linaro overlay PPA will get automatically updated with new versions as they get pushed up. In the meantime, it has also been uploaded to Debian unstable and a Fedora repository is also ready (it is still pending final review for Fedora). Latest version pushed is 20130626-1. Apart from corrections, the biggest change is that the package added running the AAPITS tests as part of the build (the ASLTS tests are already being run as part of the build). And, of course, as I expected would happen, 20130725 was just announced by upstream, so I'll push that sometime next week. -- ciao, al ----------------------------------- Al Stone Software Engineer Linaro Enterprise Group al.stone(a)linaro.org -----------------------------------

12 years, 9 months

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[PATCH 0/5] ASL fix and virtio converted to ACPI

by Graeme Gregory

In this series I fix a warning that iasl is outputting about DSDT code. I also conver the virtio device to probe via ACPI. The virtio device is a bus which is probeable and contains the block device that is used as the rootfs in the model. Thanks Graeme

12 years, 9 months

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acpi branch updated to 3.11-rc2

by Graeme Gregory

Hi Guys, I have rebased our work on 3.11-rc2, there are some quite major changes in the driver/acpi directory. In this release Arndale board seems to be broken oopsing which is nothing to do with our work. For this reason acpi-ltfixes will remain at 3.10 level for now! I have attached the config I used for armv8 Thanks Graeme [ 0.000000] Machine: SAMSUNG EXYNOS5 (Flattened Device Tree), model: Insignal Arndale evaluation board based on EXYNOS5250 [ 0.000000] bootconsole [earlycon0] enabled [ 0.000000] NR_BANKS too low, ignoring high memory [ 0.000000] ------------[ cut here ]------------ [ 0.000000] kernel BUG at mm/vmalloc.c:1134! [ 0.000000] Internal error: Oops - BUG: 0 [#1] PREEMPT SMP ARM [ 0.000000] Modules linked in: [ 0.000000] CPU: 0 PID: 0 Comm: swapper Not tainted 3.11.0-rc2 #202 [ 0.000000] task: c0554c88 ti: c054a000 task.ti: c054a000 [ 0.000000] PC is at vm_area_add_early+0x40/0x80 [ 0.000000] LR is at add_static_vm_early+0xc/0x60 [ 0.000000] pc : [<c051da5c>] lr : [<c0515c6c>] psr: 800001d3 [ 0.000000] sp : c054befc ip : ef7fdec0 fp : 00008402 [ 0.000000] r10: 40000001 r9 : 00010406 r8 : c05163a0 [ 0.000000] r7 : ef7fdf88 r6 : 00000000 r5 : ef7fdf88 r4 : 00080000 [ 0.000000] r3 : ef7fdfd8 r2 : f7020000 r1 : f7080000 r0 : ef7fdf88 [ 0.000000] Flags: Nzcv IRQs off FIQs off Mode SVC_32 ISA ARM Segment kernel [ 0.000000] Control: 10c5387d Table: 4000406a DAC: 00000015 [ 0.000000] Process swapper (pid: 0, stack limit = 0xc054a238) [ 0.000000] Stack: (0xc054befc to 0xc054c000)

12 years, 9 months

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[PATCHv2 0/5] Foundation model network by ACPI

by Graeme Gregory

Hi Guys, In the spirit of starting things for our LCU target here is the network device on Foundation model converted to probe from ACPI. Things that have come out of this conversion: 1) we need an ACPI equivalent of simple-bus from FDT 2) we need to decide on how to handle irq domains and especially the domain for the GIC. Changes Since v1 small typo in the ASL and a whitespace change in smc9x driver that should not have been committed. Thanks Graeme

12 years, 9 months

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[PATCH 0/5] Foundation model network by ACPI

by Graeme Gregory

Hi Guys, In the spirit of starting things for our LCU target here is the network device on Foundation model converted to probe from ACPI. Things that have come out of this conversion: 1) we need an ACPI equivalent of simple-bus from FDT 2) we need to decide on how to handle irq domains and especially the domain for the GIC. Thanks Graeme

12 years, 9 months

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[RFC][PATCH] Add ARM64 cpu topology definition

by Hanjun Guo

We can define the cpu topology of ARM64 platform from the affinity of processors which is defined in the MPIDR register. After we get the cpu topology, we can use it for sched_mc and sched_smt. Signed-off-by: Hanjun Guo <hanjun.guo(a)linaro.org> --- arch/arm64/Kconfig | 25 ++++++++ arch/arm64/include/asm/cputype.h | 13 ++++ arch/arm64/include/asm/topology.h | 35 +++++++++++ arch/arm64/kernel/Makefile | 5 +- arch/arm64/kernel/smp.c | 6 ++ arch/arm64/kernel/topology.c | 120 +++++++++++++++++++++++++++++++++++++ 6 files changed, 200 insertions(+), 4 deletions(-) diff --git a/arch/arm64/Kconfig b/arch/arm64/Kconfig index c967b11..67c1c53 100644 --- a/arch/arm64/Kconfig +++ b/arch/arm64/Kconfig @@ -144,6 +144,31 @@ config SMP If you don't know what to do here, say N. +config ARM64_CPU_TOPOLOGY + bool "Support cpu topology definition" + depends on SMP && ARM64 + default y + help + Support ARM64 cpu topology definition. The MPIDR register defines + affinity between processors which is then used to describe the cpu + topology of an ARM64 System. + +config SCHED_MC + bool "Multi-core scheduler support" + depends on ARM64_CPU_TOPOLOGY + help + Multi-core scheduler support improves the CPU scheduler's decision + making when dealing with multi-core CPU chips at a cost of slightly + increased overhead in some places. If unsure say N here. + +config SCHED_SMT + bool "SMT scheduler support" + depends on ARM64_CPU_TOPOLOGY + help + Improves the CPU scheduler's decision making when dealing with + MultiThreading at a cost of slightly increased overhead in some + places. If unsure say N here. + config NR_CPUS int "Maximum number of CPUs (2-32)" range 2 32 diff --git a/arch/arm64/include/asm/cputype.h b/arch/arm64/include/asm/cputype.h index cf27494..75ac91c 100644 --- a/arch/arm64/include/asm/cputype.h +++ b/arch/arm64/include/asm/cputype.h @@ -30,6 +30,19 @@ #define MPIDR_HWID_BITMASK 0xff00ffffff +#define MPIDR_SMP_BITMASK (0x3 << 30) +#define MPIDR_SMP_VALUE (0x2 << 30) + +#define MPIDR_MT_BITMASK (0x1 << 24) + +#define MPIDR_LEVEL_BITS 8 +#define MPIDR_LEVEL_MASK ((1 << MPIDR_LEVEL_BITS) - 1) + +#define MPIDR_AFFINITY_LEVEL_0(mpidr) ((mpidr) & MPIDR_LEVEL_MASK) +#define MPIDR_AFFINITY_LEVEL_1(mpidr) ((mpidr >> 8) & MPIDR_LEVEL_MASK) +#define MPIDR_AFFINITY_LEVEL_2(mpidr) ((mpidr >> 16) & MPIDR_LEVEL_MASK) +#define MPIDR_AFFINITY_LEVEL_3(mpidr) ((mpidr >> 32) & MPIDR_LEVEL_MASK) + #define read_cpuid(reg) ({ \ u64 __val; \ asm("mrs %0, " reg : "=r" (__val)); \ diff --git a/arch/arm64/include/asm/topology.h b/arch/arm64/include/asm/topology.h index 22c9421..6436e73 100644 --- a/arch/arm64/include/asm/topology.h +++ b/arch/arm64/include/asm/topology.h @@ -1,8 +1,43 @@ #ifndef _ASM_ARM64_TOPOLOGY_H #define _ASM_ARM64_TOPOLOGY_H +#ifdef CONFIG_ARM64_CPU_TOPOLOGY + +#include <linux/cpumask.h> + +struct cputopo_arm64 { + int thread_id; + int core_id; + int socket_id; + cpumask_t thread_sibling; + cpumask_t core_sibling; +}; + +DECLARE_PER_CPU(struct cputopo_arm64, cpu_topology); + +#define cpu_topo(cpu) per_cpu(cpu_topology, cpu) + +#define topology_physical_package_id(cpu) (cpu_topo(cpu).socket_id) +#define topology_core_id(cpu) (cpu_topo(cpu).core_id) +#define topology_core_cpumask(cpu) (&cpu_topo(cpu).core_sibling) +#define topology_thread_cpumask(cpu) (&cpu_topo(cpu).thread_sibling) + +#define mc_capable() (cpu_topology[0].socket_id != -1) +#define smt_capable() (cpu_topology[0].thread_id != -1) + +void init_cpu_topology(void); +void store_cpu_topology(unsigned int cpuid); +const struct cpumask *cpu_coregroup_mask(int cpu); void arch_fix_phys_package_id(int num, u32 slot); +#else + +static inline void arch_fix_phys_package_id(int num, u32 slot) {} +static inline void init_cpu_topology(void) { } +static inline void store_cpu_topology(unsigned int cpuid) { } + +#endif + #include <asm-generic/topology.h> #endif /* _ASM_ARM64_TOPOLOGY_H */ diff --git a/arch/arm64/kernel/Makefile b/arch/arm64/kernel/Makefile index c5e29d5..a47c359 100644 --- a/arch/arm64/kernel/Makefile +++ b/arch/arm64/kernel/Makefile @@ -18,6 +18,7 @@ arm64-obj-$(CONFIG_SMP) += smp.o smp_spin_table.o smp_psci.o arm64-obj-$(CONFIG_HW_PERF_EVENTS) += perf_event.o arm64-obj-$(CONFIG_HAVE_HW_BREAKPOINT)+= hw_breakpoint.o arm64-obj-$(CONFIG_EARLY_PRINTK) += early_printk.o +arm64-obj-$(CONFIG_ARM64_CPU_TOPOLOGY) += topology.o obj-y += $(arm64-obj-y) vdso/ obj-m += $(arm64-obj-m) @@ -27,7 +28,3 @@ extra-y := $(head-y) vmlinux.lds # vDSO - this must be built first to generate the symbol offsets $(call objectify,$(arm64-obj-y)): $(obj)/vdso/vdso-offsets.h $(obj)/vdso/vdso-offsets.h: $(obj)/vdso - -# Hack for now -obj-y += topology.o - diff --git a/arch/arm64/kernel/smp.c b/arch/arm64/kernel/smp.c index 5ec1723..36d09fe 100644 --- a/arch/arm64/kernel/smp.c +++ b/arch/arm64/kernel/smp.c @@ -39,6 +39,7 @@ #include <asm/atomic.h> #include <asm/cacheflush.h> #include <asm/cputype.h> +#include <asm/topology.h> #include <asm/mmu_context.h> #include <asm/pgtable.h> #include <asm/pgalloc.h> @@ -206,6 +207,8 @@ asmlinkage void __cpuinit secondary_start_kernel(void) local_irq_enable(); local_fiq_enable(); + store_cpu_topology(cpu); + /* * OK, now it's safe to let the boot CPU continue. Wait for * the CPU migration code to notice that the CPU is online @@ -407,6 +410,9 @@ void __init smp_prepare_cpus(unsigned int max_cpus) int cpu, err; unsigned int ncores = num_possible_cpus(); + init_cpu_topology(); + store_cpu_topology(smp_processor_id()); + /* * are we trying to boot more cores than exist? */ diff --git a/arch/arm64/kernel/topology.c b/arch/arm64/kernel/topology.c index 5c8e69c..20fd521 100644 --- a/arch/arm64/kernel/topology.c +++ b/arch/arm64/kernel/topology.c @@ -1,3 +1,16 @@ +/* + * arch/arm64/kernel/topology.c + * + * Copyright (C) 2013 Linaro Limited. + * Written by: Hanjun Guo + * + * based on arch/arm/kernel/topology.c + * + * This file is subject to the terms and conditions of the GNU General Public + * License. See the file "COPYING" in the main directory of this archive + * for more details. + */ + #include <linux/cpu.h> #include <linux/cpumask.h> #include <linux/export.h> @@ -13,6 +26,113 @@ #include <asm/topology.h> #include <asm/cpu.h> +DEFINE_PER_CPU(struct cputopo_arm64, cpu_topology); + +const struct cpumask *cpu_coregroup_mask(int cpu) +{ + return &cpu_topo(cpu).core_sibling; +} + +void update_siblings_masks(unsigned int cpuid) +{ + struct cputopo_arm64 *topo, *cpuid_topo = &cpu_topo(cpuid); + int cpu; + + /* update core and thread sibling masks */ + for_each_possible_cpu(cpu) { + topo = &cpu_topo(cpu); + + if (cpuid_topo->socket_id != topo->socket_id) + continue; + + cpumask_set_cpu(cpuid, &topo->core_sibling); + if (cpu != cpuid) + cpumask_set_cpu(cpu, &cpuid_topo->core_sibling); + + if (cpuid_topo->core_id != topo->core_id) + continue; + + cpumask_set_cpu(cpuid, &topo->thread_sibling); + if (cpu != cpuid) + cpumask_set_cpu(cpu, &cpuid_topo->thread_sibling); + } + smp_wmb(); +} + +/* + * store_cpu_topology is called at boot when only one cpu is running + * and with the mutex cpu_hotplug.lock locked, when several cpus have booted, + * which prevents simultaneous write access to cpu_topology array + */ +void store_cpu_topology(unsigned int cpuid) +{ + struct cputopo_arm64 *cpuid_topo = &cpu_topo(cpuid); + unsigned int mpidr; + + /* If the cpu topology has been already set, just return */ + if (cpuid_topo->core_id != -1) + return; + + mpidr = read_cpuid_mpidr(); + + /* create cpu topology mapping */ + if ((mpidr & MPIDR_SMP_BITMASK) == MPIDR_SMP_VALUE) { + /* + * This is a multiprocessor system + * multiprocessor format & multiprocessor mode field are set + */ + + if (mpidr & MPIDR_MT_BITMASK) { + /* core performance interdependency */ + cpuid_topo->thread_id = MPIDR_AFFINITY_LEVEL_0(mpidr); + cpuid_topo->core_id = MPIDR_AFFINITY_LEVEL_1(mpidr); + cpuid_topo->socket_id = MPIDR_AFFINITY_LEVEL_2(mpidr); + } else { + /* largely independent cores */ + cpuid_topo->thread_id = -1; + cpuid_topo->core_id = MPIDR_AFFINITY_LEVEL_0(mpidr); + cpuid_topo->socket_id = MPIDR_AFFINITY_LEVEL_1(mpidr); + } + } else { + /* + * This is an uniprocessor system + * we are in multiprocessor format but uniprocessor system + * or in the old uniprocessor format + */ + cpuid_topo->thread_id = -1; + cpuid_topo->core_id = 0; + cpuid_topo->socket_id = -1; + } + + update_siblings_masks(cpuid); + + printk(KERN_INFO "CPU%u: thread %d, cpu %d, socket %d, mpidr %x\n", + cpuid, cpu_topo(cpuid).thread_id, + cpu_topo(cpuid).core_id, + cpu_topo(cpuid).socket_id, mpidr); +} + +/* + * init_cpu_topology is called at boot when only one cpu is running + * which prevent simultaneous write access to cpu_topology array + */ +void __init init_cpu_topology(void) +{ + unsigned int cpu; + + /* init core mask */ + for_each_possible_cpu(cpu) { + struct cputopo_arm64 *topo = &cpu_topo(cpu); + + topo->thread_id = -1; + topo->core_id = -1; + topo->socket_id = -1; + cpumask_clear(&topo->core_sibling); + cpumask_clear(&topo->thread_sibling); + } + smp_wmb(); +} + void arch_fix_phys_package_id(int num, u32 slot) { } -- 1.7.9.5

12 years, 9 months

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[PATCHv2 0/2] Initialise ACPI from EFI

by Graeme Gregory

These patches implement getting ACPI tables from EFI and remove some unneeded debugging which will crash kernel in this case. Changes since v1 Handled the case where CONFIG_EFI=n in patch 1/2

12 years, 9 months

2
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[PATCH 0/1] Workaround for ACPI table mapping across page size boundary

by Tomasz Nowicki

If MAB tool would form ACPI blob in the way where some of the tbales cross page size boundary current kernel can not map it correctly (table size < 4k case is allowed). We round up table to page size reaching PAGE_SIZE alignment. Kernel should handle with such case thus changes within acpi_map() function are needed. -- 1.7.9.5

12 years, 10 months

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[PATCH] of: fdt: remove debugging from ACPI initialisation

by Graeme Gregory

From: Graeme Gregory <graeme.gregory(a)linaro.org> Remove the debugging code from acpi initialisation as it is no longer needed and causes issues becuase it is called before paging_init() which depending on memory layout crashes. Signed-off-by: Graeme Gregory <graeme.gregory(a)linaro.org> --- drivers/of/fdt.c | 14 -------------- 1 file changed, 14 deletions(-) diff --git a/drivers/of/fdt.c b/drivers/of/fdt.c index 0535169..3b8b38e 100644 --- a/drivers/of/fdt.c +++ b/drivers/of/fdt.c @@ -728,20 +728,6 @@ int __init early_init_dt_scan_acpi(unsigned long node, const char *uname, if (p != NULL && l > 0) pinfo->size = be32_to_cpu(*p); - printk("acpi: start info is 0x%016llX, %lu bytes\n", - pinfo->phys_address, pinfo->size); - - memblock_reserve(pinfo->phys_address, pinfo->size); - - sig = phys_to_virt(pinfo->phys_address); - - printk("acpi: sig is \"%c%c%c%c\"\n", - sig[0], sig[1], sig[2], sig[3]); - printk("acpi: info is %02x %02x %02x %02x\n", - sig[4], sig[5], sig[6], sig[7]); - printk("acpi: first table is \"%c%c%c%c\"\n", - sig[8], sig[9], sig[10], sig[11]); - return 1; } #endif -- 1.7.10.4

12 years, 10 months

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ACPI Blob Handling (offset correction)

by Graeme Gregory

Hi Guys, I think I made a mistake when I originally did the u-boot ACPI blob loading. I would like to correct that mistake before we progress further. I do not think I should have passed the ACPI.... (length) piece to the kernel I don't think we actually need in as nothing apart from our debug code ever checks it. The length is also redundant as its stored in the FDT if we ever need it (which we don't currently). When I did the grub/efi work the bootloader is passing a pointer to RSDT into the kernel. I would like to fix the u-boot path to do the same (and simplify some code). This will obviously mean people need to refresh their u-boot. What do you guys think? Thanks Graeme

12 years, 10 months

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processor_idle issues

by Graeme Gregory

Hi Guys, Ok, a serious impediment to us upstreaming code is the state of CPU idle, currently we have large chunks of code #defined out for our build. We need to come up with a plan to solve this! Graeme

12 years, 10 months

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[PATCHv3] grub armacpi implementation

by Graeme Gregory

Hi, this is v3 of the patch after review from Leif. Leif it would be good if you could carry this in your branch to save us having to maintain another grub tree. Changes since v2: Updates to pointer types to prevent compile warnings (-Werror issues) from Leif Changes since v1: Address Leifs comments:- return type for grub_cmd_armcpi does not return with bogus error leaving file open, not jumps to out: properly bogus whitespace change removed. Thanks Graeme

12 years, 10 months

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[PATCHv2] grub armacpi implementation

by Graeme Gregory

Hi, this is v2 of the patch after review from Leif. Leif it would be good if you could carry this in your branch to save us having to maintain another grub tree. Changes since v1: Address Leifs comments:- return type for grub_cmd_armcpi does not return with bogus error leaving file open, not jumps to out: properly bogus whitespace change removed. Thanks Graeme

12 years, 10 months

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[PATCH] arm: efi fill the acpi20 pointer if it is given

by Graeme Gregory

From: Graeme Gregory <graeme.gregory(a)linaro.org> Make sure to update the efi.acpi20 pointer if the ACPI20 GUID is found in the system configuration tables list. Signed-off-by: Graeme Gregory <graeme.gregory(a)linaro.org> --- arch/arm/kernel/efi.c | 2 ++ 1 file changed, 2 insertions(+) diff --git a/arch/arm/kernel/efi.c b/arch/arm/kernel/efi.c index 86bb75e..482ff48 100644 --- a/arch/arm/kernel/efi.c +++ b/arch/arm/kernel/efi.c @@ -160,6 +160,8 @@ static int __init uefi_config_init(void) str, (u32)table); if (!efi_guidcmp(guid, ACPI_TABLE_GUID)) efi.acpi = table; + if (!efi_guidcmp(guid, ACPI_20_TABLE_GUID)) + efi.acpi20 = table; if (!efi_guidcmp(guid, SMBIOS_TABLE_GUID)) efi.smbios = table; } -- 1.7.10.4

12 years, 10 months

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ACPI via EFI Wiki

by Graeme Gregory

Hi Guys, I have detailed the steps I did to get our ACPI stuff running with EFI/GRUB2. https://wiki.linaro.org/LEG/Engineering/Kernel/ACPI/ACPIviaEFI And I have uploaded a demo tree which is our ACPI work on top of the lce_2013 branch of Leif. https://git.linaro.org/gitweb?p=people/graemegregory/linux.git;a=shortlog;h… Thanks Graeme

12 years, 10 months

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GRUB add armacpi command to load blob.

by Graeme Gregory

Please find attached patch to add new armacpi command to grub. This will load the blob and do the correct thing to add it to the system configuration table. Graeme

12 years, 10 months

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[PATCH 1/2] acpi: arm: allow relocation of tables passed from EFI

by Graeme Gregory

From: Graeme Gregory <graeme.gregory(a)linaro.org> Add handling for tables from EFI in addition to the handling already present for tables passed via FDT. Signed-off-by: Graeme Gregory <graeme.gregory(a)linaro.org> --- drivers/acpi/plat/arm/boot.c | 13 +++++++++---- 1 file changed, 9 insertions(+), 4 deletions(-) diff --git a/drivers/acpi/plat/arm/boot.c b/drivers/acpi/plat/arm/boot.c index 82b7bd6..9818ba1 100644 --- a/drivers/acpi/plat/arm/boot.c +++ b/drivers/acpi/plat/arm/boot.c @@ -746,13 +746,18 @@ void __init acpi_arm_blob_relocate(void) u32 ii; u64 *tmp; - if (!acpi_arm_rsdp_info.phys_address && !acpi_arm_rsdp_info.size) { - printk(KERN_ERR "(E) ACPI: failed to find rsdp info\n"); + if (efi.acpi20) + paddress = efi.acpi20; + else if (efi.acpi) + paddress = efi.acpi; + else if (acpi_arm_rsdp_info.phys_address && acpi_arm_rsdp_info.size) { + paddress = acpi_arm_rsdp_info.phys_address; + paddress += ACPI_BLOB_HEADER_SIZE; + } else { + pr_err("ACPI: failed to find rsdp info\n"); return; } - paddress = acpi_arm_rsdp_info.phys_address; - paddress += ACPI_BLOB_HEADER_SIZE; vaddress = phys_to_virt(paddress); /* fixups for the rsdp */ -- 1.7.10.4

12 years, 10 months

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[PATCH] ARM/ACPI: remove yet another unneeded debug message

by al.stone＠linaro.org

From: Al Stone <ahs3(a)redhat.com> Signed-off-by: Al Stone <al.stone(a)linaro.org> --- drivers/acpi/acpica/tbutils.c | 1 - 1 file changed, 1 deletion(-) diff --git a/drivers/acpi/acpica/tbutils.c b/drivers/acpi/acpica/tbutils.c index 2b6d8dc..ce3d5db 100644 --- a/drivers/acpi/acpica/tbutils.c +++ b/drivers/acpi/acpica/tbutils.c @@ -634,7 +634,6 @@ acpi_tb_parse_root_table(acpi_physical_address rsdp_address) acpi_status status; ACPI_FUNCTION_TRACE(tb_parse_root_table); - printk(KERN_INFO "(I) entering acpi_tb_parse_root_table\n"); /* * Map the entire RSDP and extract the address of the RSDT or XSDT -- 1.8.1.4

12 years, 10 months

2
1
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[PATCH] ARM: ACPI: for now add some dummies to make acpi_processor compile

by Graeme Gregory

From: Graeme Gregory <graeme.gregory(a)linaro.org> These dummies are copied directly from arm64 and will probably need corrected for arm. Signed-off-by: Graeme Gregory <graeme.gregory(a)linaro.org> --- arch/arm/include/asm/acpi.h | 12 ++++++++++++ 1 file changed, 12 insertions(+) diff --git a/arch/arm/include/asm/acpi.h b/arch/arm/include/asm/acpi.h index e752c5c..e5ac1b8 100644 --- a/arch/arm/include/asm/acpi.h +++ b/arch/arm/include/asm/acpi.h @@ -36,6 +36,9 @@ #define COMPILER_DEPENDENT_INT64 long long #define COMPILER_DEPENDENT_UINT64 unsigned long long +#define MAX_LOCAL_APIC 256 +#define MAX_IO_APICS 64 + /* * Calling conventions: * @@ -96,6 +99,13 @@ extern int acpi_noirq; extern int acpi_pci_disabled; extern int acpi_strict; +/* map logic cpu id to physical APIC id + * APIC = GIC cpu interface on ARM + */ +extern volatile int arm_cpu_to_apicid[NR_CPUS]; +extern int boot_cpu_apic_id; +#define cpu_physical_id(cpu) arm_cpu_to_apicid[cpu] + struct acpi_arm_root { phys_addr_t phys_address; unsigned long size; @@ -105,6 +115,8 @@ extern struct acpi_arm_root acpi_arm_rsdp_info; /* Low-level suspend routine. */ extern int acpi_suspend_lowlevel(void); +extern void prefill_possible_map(void); + /* Physical address to resume after wakeup */ /* BOZO: was... #define acpi_wakeup_address ((unsigned long)(real_mode_header->wakeup_start)) -- 1.7.10.4

12 years, 10 months

2
1
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[PATCH 00/10] ARM64 / ACPI: Prototype for cpu hot-plug

by Hanjun Guo

Here is the first version of prototype for cpu-hotplug on ARM64. The first part is patch 1~3 for MADT parse. MADT is being parsed and the cpu possible map and cpu present map are prefilled. I kept the terminology consistent with x86 as Al and Andrea's advice. CPU possible map is equal to the GIC entries in MADT no matter enabled or disabled, and cpu present map limits to the enabled cpu in MADT. This is the base for cpu hot-plug. The second part is patch 4~10 for ACPI cpu hot-plug drivers. ACPI driver for CPU hot-plug is implemented in this part, when the cpu logical online/offline is ready, the cpu hot-plug can work on arm64. Please give some comments, thanks. Hanjun Guo (10): ARM64 / ACPI: MADT for armv8 foundation model ARM64 / ACPI: Core functions for MADT parse ARM64 / ACPI: Prefill cpu possible and present maps and map logical cpu id to APIC id ARM64 / ACPI: Declare processors in ACPI namespace in the DSDT ARM64 / ACPI: Introduce map_gic_id() to get apic id from MADT or _MAT method ARM64 / ACPI: Get logic cpu id to see if the cpu is a new added cpu ARM64 / ACPI: Implement acpi_map/unmap_lsapic for cpu hot-plug ARM64 / ACPI: Fix the variable declared but not defined ARM64 / ACPI: Introduce arch_register/unregister_cpu() for arm64 ARM64 / CPU hot-plug: Skeleton logic cpu online/offline for cpu hot-plug arch/arm64/Kconfig | 7 + arch/arm64/boot/asl/foundation-v8.acpi/apic.asl | 165 +++++++------ arch/arm64/boot/asl/foundation-v8.acpi/dsdt.asl | 205 +++++++++++++++- arch/arm64/include/asm/acpi.h | 12 + arch/arm64/include/asm/cpu.h | 5 + arch/arm64/include/asm/smp.h | 3 + arch/arm64/kernel/setup.c | 16 +- arch/arm64/kernel/smp.c | 23 ++ arch/arm64/kernel/topology.c | 26 +++ drivers/acpi/plat/arm/boot.c | 286 +++++++++++++++++++++-- drivers/acpi/processor_core.c | 50 ++-- drivers/acpi/tables.c | 21 ++ 12 files changed, 694 insertions(+), 125 deletions(-) -- 1.7.9.5

12 years, 10 months

2
12
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[PATCH] ARM: ACPI: exynos5250-arndale fix DSDT for cpu definitions

by Graeme Gregory

From: Graeme Gregory <graeme.gregory(a)linaro.org> This file was mismerged scope \_PR should have been removed and SCK0 should have been in scope \_SB. Signed-off-by: Graeme Gregory <graeme.gregory(a)linaro.org> Reported-by: Hanjun Guo <hanjun.guo(a)linaro.org> --- arch/arm/boot/asl/exynos5250-arndale.acpi/dsdt.asl | 118 ++++++++++---------- 1 file changed, 56 insertions(+), 62 deletions(-) diff --git a/arch/arm/boot/asl/exynos5250-arndale.acpi/dsdt.asl b/arch/arm/boot/asl/exynos5250-arndale.acpi/dsdt.asl index c67aeec..2cca765 100644 --- a/arch/arm/boot/asl/exynos5250-arndale.acpi/dsdt.asl +++ b/arch/arm/boot/asl/exynos5250-arndale.acpi/dsdt.asl @@ -14,12 +14,6 @@ DefinitionBlock ( "ARNDALE ", // table ID 0x00000002) // OEM revision { - Scope (\_PR) - { - Processor (CPU0, 0x01, 0x00000410, 0x06) {} - Processor (CPU1, 0x02, 0x00000410, 0x06) {} - } - Scope (\_SB) { Device (GPB3) { @@ -51,105 +45,105 @@ DefinitionBlock ( Return (20000) } } - } - - Device (SCK0) - { - Name (_HID, "ACPI0004") - Name (_UID, 0x00) - Method (_STA, 0, NotSerialized) - { - Return (0x0F) - } - Device (PRC0) + Device (SCK0) { - Name (_HID, "ACPI0007") + Name (_HID, "ACPI0004") Name (_UID, 0x00) - - /* CPU0 will be always present */ Method (_STA, 0, NotSerialized) { Return (0x0F) } - Name (MAT0, Buffer (0x28) + Device (PRC0) { + Name (_HID, "ACPI0007") + Name (_UID, 0x00) + + /* CPU0 will be always present */ + Method (_STA, 0, NotSerialized) + { + Return (0x0F) + } + + Name (MAT0, Buffer (0x28) + { /* 0000 */ 0x0B, 0x28, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, /* type, len, reserved, gic_id */ /* 0008 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x01, /* uid, flags */ /* 0010 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, /* parking_version, performance_interrupt */ /* 0018 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, /* parked_address */ /* 0020 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00 /* base_address */ - }) + }) - Name (MAT1, Buffer (0x28) - { + Name (MAT1, Buffer (0x28) + { /* 0000 */ 0x0B, 0x28, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, /* 0008 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, /* 0010 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, /* 0018 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, /* 0020 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00 - }) + }) - Method (_MAT, 0, NotSerialized) - { - If (_STA()) - { - Return (MAT0) - } - Else + Method (_MAT, 0, NotSerialized) { - Return (MAT1) + If (_STA()) + { + Return (MAT0) + } + Else + { + Return (MAT1) + } } } - } - Device (PRC1) - { - Name (_HID, "ACPI0007") - Name (_UID, 0x01) - - Name (STA1, 0x0F) - Method (_STA, 0, NotSerialized) + Device (PRC1) { - Return (STA1) - } + Name (_HID, "ACPI0007") + Name (_UID, 0x01) - Method (_EJ0, 1, NotSerialized) - { - If (LEqual (STA1, 0x0F)) + Name (STA1, 0x0F) + Method (_STA, 0, NotSerialized) { - Store (0x00, STA1) + Return (STA1) } - } - Name (MAT0, Buffer (0x28) - { + Method (_EJ0, 1, NotSerialized) + { + If (LEqual (STA1, 0x0F)) + { + Store (0x00, STA1) + } + } + + Name (MAT0, Buffer (0x28) + { /* 0000 */ 0x0B, 0x28, 0x00, 0x00, 0x00, 0x00, 0x00, 0x01, /* type, len, reserved, gic_id */ /* 0008 */ 0x00, 0x00, 0x00, 0x01, 0x00, 0x00, 0x00, 0x01, /* uid, flags */ /* 0010 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, /* parking_version, performance_interrupt */ /* 0018 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, /* parked_address */ /* 0020 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00 /* base_address */ - }) + }) - Name (MAT1, Buffer (0x28) - { + Name (MAT1, Buffer (0x28) + { /* 0000 */ 0x0B, 0x28, 0x00, 0x00, 0x00, 0x00, 0x00, 0x01, /* 0008 */ 0x00, 0x00, 0x00, 0x01, 0x00, 0x00, 0x00, 0x00, /* 0010 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, /* 0018 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, /* 0020 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00 - }) + }) - Method (_MAT, 0, NotSerialized) - { - If (_STA()) - { - Return (MAT0) - } - Else + Method (_MAT, 0, NotSerialized) { - Return (MAT1) + If (_STA()) + { + Return (MAT0) + } + Else + { + Return (MAT1) + } } } } -- 1.7.10.4

12 years, 10 months

2
1
0 0

ACPI vs FDT Presentation

by Graeme Gregory

I have attached the slides, I never realised until doing this quite how buggy LibreOffice/OpenOffice is :-( Graeme

12 years, 10 months

3
2
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[PATCH 0/5] Hanjuns CPU Topology patches

by Graeme Gregory

Hi Hanjun and others, I have rebased these patches on the 3.10rcX based tree and done a quick boot test and they don't cause any oopses. So I thought I would push them to the tree. Thanks Graeme

12 years, 10 months

3
12
0 0

[PATCH 0/8] APEI: injection of GHES error from userspace

by Tomasz Nowicki

We are able to inject GHES from userspace. Kernel can parse error status block and print error message in a more descriptive way: [...] [ 0.744715] GHES: APEI firmware first mode is enabled by APEI bit. [ 0.744749] EINJ: Error INJection is initialized. [...] # echo 0x20 > /sys/kernel/debug/apei/einj/error_inject [ 149.010380] {1}[Hardware Error]: Hardware error from APEI Generic Hardware Error Source: 2 [ 149.017080] {1}[Hardware Error]: APEI generic hardware error status [ 149.023217] {1}[Hardware Error]: severity: 1, fatal [ 149.027998] {1}[Hardware Error]: section: 0, severity: 0, recoverable [ 149.034317] {1}[Hardware Error]: flags: 0x00 [ 149.038501] {1}[Hardware Error]: section_type: memory error where 0x20 can be random error ID because of the hack. Please see following patches for more explanation.

12 years, 10 months

3
14
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[RFC][PATCH 0/3] Prototype cpu topology and cpu-hotplug (part1: parse MADT)

by Hanjun Guo

Here is the first part of cpu topology and cpu-hotplug code for RFC. In this part of code, MADT is being parsed and the cpu possible map and cpu present map are prefilled. CPU possible map is equal to the GIC entries in MADT no matter enabled or disabled, and cpu present map limits to the enabled cpu in MADT. Without this patch set, CPU possible map is equal to the cpus found in FDT, and cpu possible map is the same as cpu present map with no hotplugble cpus. Boot information with this patch (with --cores=4): ACPI: GIC (acpi_id[0x0000] gic_id[0x0000] enabled) // MADT was parsed ACPI: GIC (acpi_id[0x0001] gic_id[0x0001] enabled) ACPI: GIC (acpi_id[0x0002] gic_id[0x0002] disabled) ACPI: GIC (acpi_id[0x0003] gic_id[0x0003] disabled) ACPI: GIC (acpi_id[0x0004] gic_id[0x0004] disabled) ACPI: GIC (acpi_id[0x0005] gic_id[0x0005] disabled) ACPI: GIC (acpi_id[0x0006] gic_id[0x0006] disabled) ACPI: GIC (acpi_id[0x0007] gic_id[0x0007] disabled) 2 CPUs available, 8 CPUs total //find 2 enabled cpus which // is the same as MADT described ACPI: GIC Distributor (id[0x0000] address[0x2c001000] gsi_base[0]) // IOAPIC(GIC distributor is also parsed) Using ACPI (MADT) for SMP configuration information SMP: limits to 4 CPUs // the foundation model supports only 4 four cpus SMP: Allowing 4 CPUs, 2 hotplug CPUs // so limits to 4 cpus, and 2 disabled in MADT can be hotpluged PERCPU: Embedded 10 pages/cpu @ffffffc03ffa7000 s11520 r8192 d21248 u40960 [....] CPU1: Booted secondary processor Brought up 2 CPUs SMP: Total of 2 processors activated (400.00 BogoMIPS). Because only 2 cpus is enabled in MADT, so the system will up 2 cpus in despite of --cores=4. Next step will prototype cpu topology code for ACPI driver. This is the RFC version only, will updated and rebased on the new acpi branch. Hanjun Guo (3): ARM / ACPI: MADT for armv8 foundation model ARM / ACPI: Core functions for MADT parse ARM / ACPI: Prefill cpu possible and present map when boot with MADT arch/arm64/boot/asl/foundation-v8.acpi/apic.asl | 175 ++++++++------- arch/arm64/include/asm/acpi.h | 3 + arch/arm64/kernel/setup.c | 6 + arch/arm64/kernel/smp.c | 2 + drivers/acpi/plat/arm/boot.c | 261 ++++++++++++++++++++++- drivers/acpi/tables.c | 21 ++ 6 files changed, 374 insertions(+), 94 deletions(-) -- 1.7.9.5

12 years, 10 months

4
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ACPI/ACPI-combined switch 10AM BST 27th June

by Graeme Gregory

Hi Guys, Discussed this with Al and I think everyone is finished with 3.9 work now! I am going to switch the acpi branch to be the contents of the acpi-combined branch at 10AM tomorrow my local time! The two branches will initially be :- acpi - our work branch now based off 3.10-rcX kernel (and will track mainline releases/rc releases) acpi-ltfixes - is the acpi branch + some needed fixes from Samsung landing team for Arndale prototyping. We can of course create more short term branches for demos, prototyping as needed. Thanks Graeme

12 years, 10 months

3
4
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[PATCH] ARM64: ACPI: Initialize acpi_state variable

by naresh.bhat＠linaro.org

From: Naresh Bhat <naresh.bhat(a)linaro.org> CC drivers/acpi/fan.o drivers/acpi/fan.c: In function ‘fan_get_cur_state’: drivers/acpi/fan.c:96:9: warning: ‘acpi_state’ may be used uninitialized in this function [-Wuninitialized] --- drivers/acpi/fan.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/acpi/fan.c b/drivers/acpi/fan.c index f815da8..f61f7fd 100644 --- a/drivers/acpi/fan.c +++ b/drivers/acpi/fan.c @@ -84,7 +84,7 @@ static int fan_get_cur_state(struct thermal_cooling_device *cdev, unsigned long { struct acpi_device *device = cdev->devdata; int result; - int acpi_state; + int acpi_state = 0; if (!device) return -EINVAL; -- 1.7.9.5

12 years, 10 months

3
2
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[PATCH] ARM64: ACPI:Fix compilation warning prodessor_idle

by naresh.bhat＠linaro.org

From: Naresh Bhat <naresh.bhat(a)linaro.org> CC drivers/acpi/processor_idle.o drivers/acpi/processor_idle.c: In function ‘acpi_idle_play_dead’: drivers/acpi/processor_idle.c:758:28: warning: unused variable ‘cx’ [-Wunused-variable] --- drivers/acpi/processor_idle.c | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) diff --git a/drivers/acpi/processor_idle.c b/drivers/acpi/processor_idle.c index 0b6132a..0993526 100644 --- a/drivers/acpi/processor_idle.c +++ b/drivers/acpi/processor_idle.c @@ -755,8 +755,9 @@ static int acpi_idle_enter_c1(struct cpuidle_device *dev, */ static int acpi_idle_play_dead(struct cpuidle_device *dev, int index) { +#ifdef CONFIG_X86 struct acpi_processor_cx *cx = per_cpu(acpi_cstate[index], dev->cpu); - +#endif ACPI_FLUSH_CPU_CACHE(); while (1) { -- 1.7.9.5

12 years, 10 months

2
1
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[PATCH 0/3] clean up some early boot messages

by al.stone＠linaro.org

From: Al Stone <ahs3(a)redhat.com> There are a few places where the printk()s no longer serve a useful purpose -- those printk()s are removed by the first patch. The second and third patches remove printk() in favor of proper use of pr_err() and pr_debug(), respectively. Al Stone (3): ARM: ACPI: remove some unneeded printk messages used for initial debugging ARM: ACPI: use pr_err() as one should and not printk() ACPI: ARM: use pr_debug() as one should and not printk() drivers/acpi/osl.c | 31 +++++++++++++++---------------- drivers/acpi/plat/arm/boot.c | 9 --------- 2 files changed, 15 insertions(+), 25 deletions(-) -- 1.8.1.4

12 years, 10 months

3
5
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acpi-combined & network/LPAE fixes for Arndale

by Graeme Gregory

Hi guys, I have extracted the necessary fixes from Samsung Landing Team tree for Arndale network (actually usb hack) and LPAE. I have uploaded these on top of our acpi-combined branch as acpi-combined-ltfixes. This should make it easier for people testing armv7. I have attached my config file for this. Thanks Graeme

12 years, 10 months

1
0
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[PATCH] ARM64: ACPI: Skeleton topology.c hack to make arm64 compile

by Graeme Gregory

From: Graeme Gregory <graeme.gregory(a)linaro.org> This is just a null do nothing topology.c in order to make acpi_processor driver compile on arm64. It will need to be replaced by fully functional driver at later date. Signed-off-by: Graeme Gregory <graeme.gregory(a)linaro.org> --- arch/arm64/include/asm/cpu.h | 1 + arch/arm64/include/asm/topology.h | 8 ++++++++ arch/arm64/kernel/Makefile | 3 +++ arch/arm64/kernel/topology.c | 20 ++++++++++++++++++++ 4 files changed, 32 insertions(+) create mode 100644 arch/arm64/include/asm/topology.h create mode 100644 arch/arm64/kernel/topology.c diff --git a/arch/arm64/include/asm/cpu.h b/arch/arm64/include/asm/cpu.h index 5341811..dbeb98d 100644 --- a/arch/arm64/include/asm/cpu.h +++ b/arch/arm64/include/asm/cpu.h @@ -10,6 +10,7 @@ #include <linux/percpu.h> #include <linux/cpu.h> +#include <linux/topology.h> struct cpuinfo_arm { struct cpu cpu; diff --git a/arch/arm64/include/asm/topology.h b/arch/arm64/include/asm/topology.h new file mode 100644 index 0000000..22c9421 --- /dev/null +++ b/arch/arm64/include/asm/topology.h @@ -0,0 +1,8 @@ +#ifndef _ASM_ARM64_TOPOLOGY_H +#define _ASM_ARM64_TOPOLOGY_H + +void arch_fix_phys_package_id(int num, u32 slot); + +#include <asm-generic/topology.h> + +#endif /* _ASM_ARM64_TOPOLOGY_H */ diff --git a/arch/arm64/kernel/Makefile b/arch/arm64/kernel/Makefile index f8bebc1..c5e29d5 100644 --- a/arch/arm64/kernel/Makefile +++ b/arch/arm64/kernel/Makefile @@ -28,3 +28,6 @@ extra-y := $(head-y) vmlinux.lds $(call objectify,$(arm64-obj-y)): $(obj)/vdso/vdso-offsets.h $(obj)/vdso/vdso-offsets.h: $(obj)/vdso +# Hack for now +obj-y += topology.o + diff --git a/arch/arm64/kernel/topology.c b/arch/arm64/kernel/topology.c new file mode 100644 index 0000000..cb548f1 --- /dev/null +++ b/arch/arm64/kernel/topology.c @@ -0,0 +1,20 @@ +#include <linux/cpu.h> +#include <linux/cpumask.h> +#include <linux/export.h> +#include <linux/init.h> +#include <linux/percpu.h> +#include <linux/node.h> +#include <linux/nodemask.h> +#include <linux/of.h> +#include <linux/sched.h> +#include <linux/slab.h> + +#include <asm/cputype.h> +#include <asm/topology.h> +#include <asm/cpu.h> + +void arch_fix_phys_package_id(int num, u32 slot) +{ +} +EXPORT_SYMBOL_GPL(arch_fix_phys_package_id); + -- 1.7.10.4

12 years, 10 months

1
0
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ACPI Table Size Issue

by Graeme Gregory

Hi, I have managed to boot our ACPI enabled kernel on the beaglebone device which has working earlyprintk. You will see from the log below there is a very familiar looking RCU stall, same place as I was seeing with Hanjun's patches. I did not check the size of his blob but I suspect its the same issue and actually not to do with cpu topology at all. Anyway below is the log of the ACPI kernel booting on the beaglebone. Thanks Graeme U-Boot 2013.04-00003-g8fc034b-dirty (Jun 22 2013 - 00:52:05) I2C: ready DRAM: 256 MiB WARNING: Caches not enabled NAND: No NAND device found!!! 0 MiB MMC: OMAP SD/MMC: 0, OMAP SD/MMC: 1 *** Warning - readenv() failed, using default environment musb-hdrc: ConfigData=0xde (UTMI-8, dyn FIFOs, HB-ISO Rx, HB-ISO Tx, SoftConn) musb-hdrc: MHDRC RTL version 2.0 musb-hdrc: setup fifo_mode 4 musb-hdrc: 28/31 max ep, 16384/16384 memory USB Peripheral mode controller at 47401000 using PIO, IRQ 0 musb-hdrc: ConfigData=0xde (UTMI-8, dyn FIFOs, HB-ISO Rx, HB-ISO Tx, SoftConn) musb-hdrc: MHDRC RTL version 2.0 musb-hdrc: setup fifo_mode 4 musb-hdrc: 28/31 max ep, 16384/16384 memory USB Host mode controller at 47401800 using PIO, IRQ 0 Net: <ethaddr> not set. Validating first E-fuse MAC cpsw, usb_ether Hit any key to stop autoboot: 0 link up on port 0, speed 100, full duplex BOOTP broadcast 1 DHCP client bound to address 192.168.222.138 Using cpsw device TFTP from server 192.168.222.11; our IP address is 192.168.222.138 Filename 'zImage-bone'. Load address: 0x80200000 Loading: ################################################################# ################################################################# ################################################################# ################################################################# ################################################################# ################################################################# ################################################################# ################################################################# ################################################################# ################################################################# ################################################################# ################################################################# ######################################## 625 KiB/s done Bytes transferred = 4197392 (400c10 hex) link up on port 0, speed 100, full duplex Using cpsw device TFTP from server 192.168.222.11; our IP address is 192.168.222.138 Filename 'am335x-bone.dtb'. Load address: 0x80f80000 Loading: ## 489.3 KiB/s done Bytes transferred = 8518 (2146 hex) link up on port 0, speed 100, full duplex Using cpsw device TFTP from server 192.168.222.11; our IP address is 192.168.222.138 Filename 'bone.acpi'. Load address: 0x80f84000 Loading: # 416 KiB/s done Bytes transferred = 4266 (10aa hex) ## Flattened Device Tree blob at 80f80000 Booting using the fdt blob at 0x80f80000 * acpi: cmdline image address = 0x80f84000 * acpi: Length of blob 4258 * acpi: loading to 8f236000, end 8f2370aa Loading Device Tree to 8f230000, end 8f235145 ... OK using: ACPI Starting kernel ... [ 0.000000] Booting Linux on physical CPU 0x0 [ 0.000000] Linux version 3.10.0-rc6-00024-g0eba3878-dirty (graeme@xora-build) (gcc version 4.7.3 20130328 (prerelease) (crosstool-NG linaro-1.13.1-4.7-2013.04-20130415 - Linaro GCC 2013.04) ) #125 SMP Sat Jun 22 00:39:57 BST 2013 [ 0.000000] CPU: ARMv7 Processor [413fc082] revision 2 (ARMv7), cr=10c53c7d [ 0.000000] CPU: PIPT / VIPT nonaliasing data cache, VIPT aliasing instruction cache [ 0.000000] Machine: Generic AM33XX (Flattened Device Tree), model: TI AM335x BeagleBone [ 0.000000] bootconsole [earlycon0] enabled [ 0.000000] cma: CMA: reserved 16 MiB at 8e000000 [ 0.000000] Memory policy: ECC disabled, Data cache writeback [ 0.000000] acpi: vaddress c0fb5000 [ 0.000000] acpi: Phys 80fb5000 Virt c0fb5000 [ 0.000000] acpi: GOT HERE1 [ 0.000000] acpi: GOT HERE2 [ 0.000000] (I) entering acpi_tb_parse_root_table [ 0.000000] ACPI: RSDP 80fb5000 00024 (v02 LINARO) [ 0.000000] ACPI: XSDT 80fb5024 000C4 (v01 LINARO ARNDALE 00000014 INTL 20130517) [ 0.000000] ACPI: FACP 80fb50e8 0010C (v05 LINARO ARNDALE 00000000 INTL 20130517) [ 0.000000] ACPI: DSDT 80fb51f4 00228 (v01 LINARO ARNDALE 00000002 INTL 20130517) [ 0.000000] ACPI: MSCT 80fb545c 00090 (v01 LINARO ARNDALE 00000001 INTL 20130517) [ 0.000000] ACPI: MCHI 80fb54ec 00045 (v01 LINARO ARNDALE 02000715 INTL 20130517) [ 0.000000] ACPI: FPDT 80fb5531 00064 (v01 LINARO ARNDALE 00000001 INTL 20130517) [ 0.000000] ACPI: ERST 80fb5595 00230 (v01 LINARO ARNDALE 00000001 INTL 20130517) [ 0.000000] ACPI: EINJ 80fb57c5 00130 (v01 LINARO ARNDALE 00000001 INTL 20130517) [ 0.000000] ACPI: CPEP 80fb58f5 00034 (v01 LINARO ARNDALE 00000000 INTL 20130517) [ 0.000000] ACPI: UEFI 80fb5929 00036 (v01 LINARO ARNDALE 00000001 INTL 20130517) [ 0.000000] ACPI: SRAT 80fb595f 00080 (v03 LINARO ARNDALE 00000001 INTL 20130517) [ 0.000000] ACPI: SPMI 80fb59df 00041 (v04 LINARO ARNDALE 00000000 INTL 20130517) [ 0.000000] ACPI: SLIT 80fb5a20 001BC (v01 LINARO ARNDALE 00000001 INTL 20130517) [ 0.000000] ACPI: OEM0 80fb5bdc 00024 (v01 LINARO ARNDALE 0000000A INTL 20130517) [ 0.000000] ACPI: MPST 80fb5c00 000B6 (v01 LINARO ARNDALE 00000001 INTL 20130517) [ 0.000000] ACPI: MCFG 80fb5cb6 0003C (v01 LINARO ARNDALE 00000001 INTL 20130517) [ 0.000000] ACPI: APIC 80fb5cf2 000F6 (v01 LINARO ARNDALE 00000001 INTL 20130517) [ 0.000000] ACPI: HEST 80fb5de8 001D4 (v01 LINARO ARNDALE 00000001 INTL 20130517) [ 0.000000] ACPI: GTDT 80fb5fbc 00050 (v01 LINARO ARNDALE 00000001 INTL 20130517) [ 0.000000] ACPI: ECDT 80fb600c 00042 (v01 LINARO ARNDALE 00000001 INTL 20130517) [ 0.000000] ACPI: BERT 80fb604e 00030 (v01 LINARO ARNDALE 00000001 INTL 20130517) [ 0.000000] ACPI: SSDT 80fb607e 00024 (v02 LINARO ARNDALE 00000001 INTL 20130517) [ 0.000000] (I) acpi_table_init call completed [ 0.000000] (I) exit acpi_boot_table_init [ 0.000000] enter early_acpi_boot_init [ 0.000000] CPU: All CPU(s) started in SVC mode. [ 0.000000] AM335X ES1.0 (neon ) [ 0.000000] enter acpi_boot_init [ 0.000000] PERCPU: Embedded 9 pages/cpu @c0fbd000 s14592 r8192 d14080 u36864 [ 0.000000] Built 1 zonelists in Zone order, mobility grouping on. Total pages: 64768 [ 0.000000] Kernel command line: console=ttyO0,115200n8 root=/dev/mmcblk0p2 rootwait earlyprintk [ 0.000000] PID hash table entries: 1024 (order: 0, 4096 bytes) [ 0.000000] Dentry cache hash table entries: 32768 (order: 5, 131072 bytes) [ 0.000000] Inode-cache hash table entries: 16384 (order: 4, 65536 bytes) [ 0.000000] Memory: 255MB = 255MB total [ 0.000000] Memory: 228316k/228316k available, 33828k reserved, 0K highmem [ 0.000000] Virtual kernel memory layout: [ 0.000000] vector : 0xffff0000 - 0xffff1000 ( 4 kB) [ 0.000000] fixmap : 0xfff00000 - 0xfffe0000 ( 896 kB) [ 0.000000] vmalloc : 0xd0800000 - 0xff000000 ( 744 MB) [ 0.000000] lowmem : 0xc0000000 - 0xd0000000 ( 256 MB) [ 0.000000] pkmap : 0xbfe00000 - 0xc0000000 ( 2 MB) [ 0.000000] modules : 0xbf000000 - 0xbfe00000 ( 14 MB) [ 0.000000] .text : 0xc0008000 - 0xc074a858 (7435 kB) [ 0.000000] .init : 0xc074b000 - 0xc07b2900 ( 415 kB) [ 0.000000] .data : 0xc07b4000 - 0xc084cc88 ( 612 kB) [ 0.000000] .bss : 0xc084cc88 - 0xc0db18e8 (5524 kB) [ 0.000000] Hierarchical RCU implementation. [ 0.000000] RCU restricting CPUs from NR_CPUS=2 to nr_cpu_ids=1. [ 0.000000] NR_IRQS:16 nr_irqs:16 16 [ 0.000000] IRQ: Found an INTC at 0xfa200000 (revision 5.0) with 128 interrupts [ 0.000000] Total of 128 interrupts on 1 active controller [ 0.000000] OMAP clockevent source: timer2 at 24000000 Hz [ 0.000000] sched_clock: 32 bits at 24MHz, resolution 41ns, wraps every 178956ms [ 0.000000] OMAP clocksource: timer1 at 24000000 Hz [ 0.000000] Console: colour dummy device 80x30 [ 0.000000] Lock dependency validator: Copyright (c) 2006 Red Hat, Inc., Ingo Molnar [ 0.000000] ... MAX_LOCKDEP_SUBCLASSES: 8 [ 0.000000] ... MAX_LOCK_DEPTH: 48 [ 0.000000] ... MAX_LOCKDEP_KEYS: 8191 [ 0.000000] ... CLASSHASH_SIZE: 4096 [ 0.000000] ... MAX_LOCKDEP_ENTRIES: 16384 [ 0.000000] ... MAX_LOCKDEP_CHAINS: 32768 [ 0.000000] ... CHAINHASH_SIZE: 16384 [ 0.000000] memory used by lock dependency info: 3695 kB [ 0.000000] per task-struct memory footprint: 1152 bytes [ 0.062509] Calibrating delay loop... 363.72 BogoMIPS (lpj=1818624) [ 0.119238] pid_max: default: 32768 minimum: 301 [ 0.124655] Security Framework initialized [ 0.129183] Mount-cache hash table entries: 512 [ 0.146500] CPU: Testing write buffer coherency: ok [ 0.151830] ACPI: Core revision 20130328 [ 0.158096] ACPI: All ACPI Tables successfully acquired [ 0.165239] CPU0: thread -1, cpu 0, socket -1, mpidr 0 [ 0.170770] Setting up static identity map for 0xc0524750 - 0xc05247c0 [ 0.181338] Brought up 1 CPUs [ 0.184500] SMP: Total of 1 processors activated (363.72 BogoMIPS). [ 0.191125] CPU: All CPU(s) started in SVC mode. [ 0.199973] devtmpfs: initialized [ 0.283148] pinctrl core: initialized pinctrl subsystem [ 0.294438] regulator-dummy: no parameters [ 0.303478] NET: Registered protocol family 16 [ 0.318367] DMA: preallocated 256 KiB pool for atomic coherent allocations [ 0.355305] OMAP GPIO hardware version 0.1 [ 0.387884] No ATAGs? [ 0.390062] hw-breakpoint: debug architecture 0x4 unsupported. [ 0.486304] bio: create slab <bio-0> at 0 [ 0.494907] ACPI: Added _OSI(Module Device) [ 0.499533] ACPI: Added _OSI(Processor Device) [ 0.504209] ACPI: Added _OSI(3.0 _SCP Extensions) [ 0.509237] ACPI: Added _OSI(Processor Aggregator Device) [ 0.515927] ACPI: EC: EC description table is found, configuring boot EC [ 0.525136] ACPI: Interpreter enabled [ 0.529128] ACPI Exception: AE_NOT_FOUND, While evaluating Sleep State [\_S1_] (20130328/hwxface-568) [ 0.538831] ACPI Exception: AE_NOT_FOUND, While evaluating Sleep State [\_S2_] (20130328/hwxface-568) [ 0.548527] ACPI Exception: AE_NOT_FOUND, While evaluating Sleep State [\_S3_] (20130328/hwxface-568) [ 0.558323] ACPI Exception: AE_NOT_FOUND, While evaluating Sleep State [\_S5_] (20130328/hwxface-568) [ 0.568153] ACPI: (supports S0) [ 0.571482] ACPI: Using GIC for interrupt routing [ 21.596404] INFO: rcu_sched detected stalls on CPUs/tasks: {} (detected by 0, t=2102 jiffies, g=4294967023, c=4294967022, q=67) [ 21.608358] INFO: Stall ended before state dump start

12 years, 10 months

5
17
0 0

[PATCH] ARM: ACPI: remove 64bit divide replace with do_div

by Graeme Gregory

From: Graeme Gregory <graeme.gregory(a)linaro.org> I some situations custom 64bit by 32bit divide was giving the wrong values so replace it with the internal kernel do_div function instead. Signed-off-by: Graeme Gregory <graeme.gregory(a)linaro.org> --- arch/arm/include/asm/acpi.h | 18 ++--- drivers/acpi/plat/arm/Makefile | 1 - drivers/acpi/plat/arm/acpi_div_64_by_32.S | 105 ----------------------------- 3 files changed, 7 insertions(+), 117 deletions(-) delete mode 100644 drivers/acpi/plat/arm/acpi_div_64_by_32.S diff --git a/arch/arm/include/asm/acpi.h b/arch/arm/include/asm/acpi.h index aafc276..e752c5c 100644 --- a/arch/arm/include/asm/acpi.h +++ b/arch/arm/include/asm/acpi.h @@ -31,6 +31,8 @@ #include <linux/init.h> +#include <asm/div64.h> + #define COMPILER_DEPENDENT_INT64 long long #define COMPILER_DEPENDENT_UINT64 unsigned long long @@ -54,17 +56,11 @@ #define ACPI_ENABLE_IRQS() local_irq_enable() #define ACPI_FLUSH_CPU_CACHE() flush_cache_all() -#define ACPI_DIV_64_BY_32(n_hi, n_lo, d32, q32, r32) \ - asm ("mov r0, %2\n" \ - "mov r1, %3\n" \ - "mov r2, %4\n" \ - "bl __arm_acpi_div_64_by_32\n" \ - "mov %0, r0\n" \ - "mov %1, r1\n" \ - : "=r"(q32), "=r"(r32) /* output operands */ \ - : "r"(n_hi), "r"(n_lo), "r"(d32) /* input operands */ \ - : "r0", "r1", "r2" /* clobbered registers */ \ - ) +#define ACPI_DIV_64_BY_32(n_hi, n_lo, d32, q32, r32) { \ + u64 value = (u64)n_hi << 32 | n_lo; \ + r32 = do_div(value, d32); \ + q32 = value; \ + } #define ACPI_SHIFT_RIGHT_64(n_hi, n_lo) \ asm ("mov r0, %2\n" \ diff --git a/drivers/acpi/plat/arm/Makefile b/drivers/acpi/plat/arm/Makefile index aa9dd19..a1f056d 100644 --- a/drivers/acpi/plat/arm/Makefile +++ b/drivers/acpi/plat/arm/Makefile @@ -1,4 +1,3 @@ obj-y += boot.o obj-y += sleep.o -obj-$(CONFIG_ARM) += acpi_div_64_by_32.o diff --git a/drivers/acpi/plat/arm/acpi_div_64_by_32.S b/drivers/acpi/plat/arm/acpi_div_64_by_32.S deleted file mode 100644 index 573bce4..0000000 --- a/drivers/acpi/plat/arm/acpi_div_64_by_32.S +++ /dev/null @@ -1,105 +0,0 @@ -/* - * Copyright (c) 2013, Al Stone <ahs3(a)redhat.com> - * - * __acpi_arm_div64_by_32: perform integer division of a 64-bit value - * a 32-bit value - * - * The algorithm is borrowed from the GMP library, but has been redone - * here in order to put this implementation under a GPLv2 license. - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; either version 2 of the License, or - * (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA - */ - -#ifdef __ARM_ARCH_7A__ - -#include <linux/linkage.h> - -/* - * This needs to be called in the following manner: - * n_lo => r0 # these are the low 32 bits of the dividend - * n_hi => r1 # the high 32 bits of the dividend - * d32 => r2 # the 32-bit divisor - * - * The result is: - * q32 <= r0 # the 32-bit quotient - * r32 <= r1 # the 32-bit remainder - * - * This should be consistent with the normal ARMv7 calling conventions. - * - */ - -ENTRY(__arm_acpi_div_64_by_32) - mov r12, #32 // loop counter - cmp r2, #0x80000000 // check divisor MSB and clear carry - bcs bigdiv - -loop: adcs r1, r1, r1 // handle each bit - adc r0, r0, r0 - cmp r0, r2 - subcs r0, r0, r2 - sub r12, r12, #1 - teq r12, #0 - bne loop - - mov r3, r0 // stash the remainder for a tic - adc r0, r1, r1 // quotient: add in last carry - mov r1, r3 // remainder (now in right register) - mov pc, lr - -bigdiv: stmfd sp!, { r8, lr } // clear some scratch space - - and r8, r1, #1 // save LSB of dividend - mov lr, r0, lsl #31 - orrs r1, lr, r1, lsr #1 // r1 = lower part >> 1 bit - mov r0, r0, lsr #1 // r0 = higher part >> 1 bit - - and lr, r2, #1 // save LSB of divisor - movs r2, r2, lsr #1 // r2 = floor(divisor / 2) - adc r2, r2, #0 // r2 = ceil(divisor / 2) - -loop2: adcs r1, r1, r1 // handle each bit - adc r0, r0, r0 - cmp r0, r2 - subcs r0, r0, r2 - sub r12, r12, #1 - teq r12, #0 - bne loop2 - - adc r1, r1, r1 // shift and add last carry - add r0, r8, r0, lsl #1 // shift in remaining dividend LSB - tst lr, lr - beq evendiv - - rsb r2, lr, r2, lsl #1 // restore divisor value - adds r0, r0, r1 // adjust for omitted divisor LSB - addcs r1, r1, #1 // adjust quotient if a carry results - subcs r0, r0, r2 // adjust remainder, if carry - cmp r0, r2 - subcs r0, r0, #1 // adjust remainder - addcs r1, r1, #1 // adjust quotient - -evendiv: - mov r3, r0 // stash the remainder for a tic - mov r0, r1 // quotient - mov r1, r3 // remainder - - ldmfd sp!, { r8, pc } // restore the registers used - -ENDPROC(__arm_acpi_div_64_by_32) - -#else /* ! __ARM_ARCH_7A__ */ -#error __arm_acpi_div_64_by_32 not defined for this architecture -#endif - -- 1.7.10.4

12 years, 10 months

2
1
0 0

RAS and ACPI

by Tomasz Nowicki

Hi Robert, I am doing APEI implementation of ACPI specification. That is, ACPI kernel side of RAS work. I am manage to test some of APEI functionality now. I would like to ask about status of LEG-389 since I want to avoid of doing work that may be actually already done. Regards, Tomasz Nowicki

12 years, 11 months

2
3
0 0

example GPIO ASL

by Al Stone

Sorry I did not send this out sooner -- I rewrote it a several different times over the last week to play with some ideas... Nonetheless, here's the simple bit of ASL I'm using for GPIO right now: Scope (\_SB) { // Base Address: 0x11400000 Device (GPA0) // GPIO controller GPA0 { Name (_HID, "LINA0002") Name (_UID, 0x00) Method (_CRS, 0x0, Serialized) { Name(RBUF, ResourceTemplate () { Memory32Fixed (ReadWrite, 0x11400000, 0x18) GpioIo (Exclusive, PullDefault, , // debounce timeout , // drive strength , // IO restriction "GPA0") { // pin numbers 0x00, 0x01, 0x02, 0x03, 0x04, 0x05, 0x06, 0x07 } }) Return(RBUF) } } } This is still not quite working in the Samsung gpiolib code just yet. They never really used FDT before (or at least, not in a way I would consider proper) so I'm having to unwind some partial movement to FDT and their specific data structures. GPIO interrupts are not going to be much different but I don't have a good example to send out just yet. You should be able to figure out the address from the current FDT. The pin numbers are much better hidden in mach-exynos/include/mach/gpio.h. Sometimes it's easier just to read them from /sys :). I put this in an SSDT just for grins, but it can also go in the DSDT. -- ciao, al ----------------------------------- Al Stone Software Engineer Linaro Enterprise Group al.stone(a)linaro.org -----------------------------------

12 years, 11 months

5
6
0 0

[PATCH 1/1] Set macro ACPI_REDUCED_HARDWARE as TRUE for reduced hardware paltform

by Hanjun Guo

PM Event and Control registers and other ACPI fixed hardware features were not supported on ARM64 yet, so we need enable reduced hardware as described in ACPI 5.0. I met a boot panic failure on the ARMv8 model, [ 9.024370] Unable to handle kernel paging request at virtual address ffffffbffbe00001 [ 9.024423] pgd = ffffffc00007d000 [ 9.024468] [ffffffbffbe00001] *pgd=000000008007f003, *pmd=0000000000000000 [ 9.024538] Internal error: Oops: 96000006 [#1] SMP [ 9.024577] Modules linked in: [ 9.024627] CPU: 0 Not tainted (3.9.0+ #3) [ 9.024691] PC is at acpi_os_read_port+0x58/0xc8 [ 9.024753] LR is at acpi_hw_read_port+0x4c/0xc4 [ 9.024810] pc : [<ffffffc0002810cc>] lr : [<ffffffc0002a4fc4>] pstate: 600003c5 .... [ 9.031956] Call trace: [ 9.032021] [<ffffffc0002810cc>] acpi_os_read_port+0x58/0xc8 [ 9.032094] [<ffffffc0002a4fc4>] acpi_hw_read_port+0x4c/0xc4 [ 9.032165] [<ffffffc0002a4198>] acpi_hw_read+0x6c/0x100 [ 9.032237] [<ffffffc0002a4250>] acpi_hw_read_multiple+0x24/0x70 [ 9.032312] [<ffffffc0002a457c>] acpi_hw_register_read+0xa8/0x164 [ 9.032386] [<ffffffc0002a52dc>] acpi_write_bit_register+0x9c/0x194 [ 9.032472] [<ffffffc0002bffb4>] acpi_processor_get_power_info+0x6c4/0x748 [ 9.032550] [<ffffffc000565220>] acpi_processor_power_init+0xac/0x138 [ 9.032630] [<ffffffc0003f3c00>] acpi_processor_start+0x48/0x138 [ 9.032704] [<ffffffc000565118>] acpi_processor_add+0x43c/0x498 [ 9.032784] [<ffffffc000283a74>] acpi_device_probe+0x3c/0x198 [ 9.032862] [<ffffffc0002ef0fc>] driver_probe_device+0x90/0x348 [ 9.032940] [<ffffffc0002ef450>] __driver_attach+0x9c/0xa0 [ 9.033015] [<ffffffc0002ed40c>] bus_for_each_dev+0x4c/0x8c [ 9.033090] [<ffffffc0002eeb98>] driver_attach+0x20/0x28 [ 9.033166] [<ffffffc0002ee6e0>] bus_add_driver+0xfc/0x254 [ 9.033244] [<ffffffc0002ef8b0>] driver_register+0x6c/0x184 [ 9.033325] [<ffffffc000284894>] acpi_bus_register_driver+0x34/0x44 [ 9.033400] [<ffffffc000559c60>] acpi_processor_init+0x28/0x40 [ 9.033469] [<ffffffc000081438>] do_one_initcall+0x100/0x138 [ 9.033544] [<ffffffc0005448c8>] kernel_init_freeable+0x128/0x1cc [ 9.033620] [<ffffffc0003f2f90>] kernel_init+0x10/0xcc [ 9.033700] Code: d2bf7c02 f2dff7e2 f2ffffe2 8b020000 (79400000) [ 9.033843] ---[ end trace 64376967e6bc20a9 ]--- [ 9.033995] Kernel panic - not syncing: Attempted to kill init! exitcode=0x0000000b Since PM control register is not exist on ARM64, It will cause such failure. ACPICA provided a macro to enable reduced hardware feature, and functions deal with ACPI hardware will defined as empty when ACPI_REDUCED_HARDWARE is TRUE, so we can avoid panic when excute the ACPI driver code. Signed-off-by: Hanjun Guo <hanjun.guo(a)linaro.org> --- include/acpi/acconfig.h | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) mode change 100644 => 100755 arch/arm64/boot/install.sh diff --git a/arch/arm64/boot/install.sh b/arch/arm64/boot/install.sh old mode 100644 new mode 100755 diff --git a/include/acpi/acconfig.h b/include/acpi/acconfig.h index 14ceff7..cb80ea9 100644 --- a/include/acpi/acconfig.h +++ b/include/acpi/acconfig.h @@ -100,7 +100,7 @@ * ACPI PM timer * FACS table (Waking vectors and Global Lock) */ -#define ACPI_REDUCED_HARDWARE FALSE +#define ACPI_REDUCED_HARDWARE TRUE /****************************************************************************** * -- 1.7.9.5

12 years, 11 months

5
17
0 0

Combined armv7/armv8 3.10-rc6 kernel

by Graeme Gregory

Hi Everyone, I have combined our work on armv7 and armv8 into one branch based on 3.10rc6 mainline kernel. This is newer than our previous base which was 3.9 based. This kernel boots on both of our main test platforms 1) Arndale 2) armv8 Foundation Model The branch is available here. https://git.linaro.org/gitweb?p=arm/acpi/acpi.git;a=shortlog;h=refs/heads/a… I have attached to the email the two configs I used. I would suggest that we use this is a base for ongoing work so its easy to switch between model and hardware for tests. Thanks Graeme

12 years, 11 months

1
0
0 0

Upstreaming Session

by Graeme Gregory

Hi, I think the upstreaming session I was talking about at standup is this one. http://lce-13.zerista.com/event/member/81058 I suggest that even though this clashes with hacking sessions most of the team should go to this to prevent Greg KH using you as an example at future connects. For those who were not at last connect here is the video of Gregs talk https://www.youtube.com/watch?v=iiED1K98lnw Thanks Graeme

12 years, 11 months

1
0
0 0

[PATCH 00/14] armv8 ACPI bringup

by Graeme Gregory

Hi Guys, I have just pushed this series of patches to the official repo. Branch is acpi-armv8 This brings us to the same state in armv8 as we are in for armv7. Without the prototype stuff like i2c drivers. But is a base to start work on for armv8. I have tried to get these patches as checkpatch clean as possible. I want to try and merge armv7 and armv8 changes into one and maintain that together as I think there is very little different in the two platforms from the point of initialisation or drivers. Thanks Graeme

12 years, 11 months

3
21
0 0

[PATCH 1/2] ARM64: ACPI: fix email address for Al Stone

by Graeme Gregory

From: Graeme Gregory <graeme.gregory(a)linaro.org> Change to @linaro.org for Al Stone email address Signed-off-by: Graeme Gregory <graeme.gregory(a)linaro.org> --- arch/arm64/include/asm/acpi.h | 2 +- arch/arm64/kernel/acpi/boot.c | 2 +- 2 files changed, 2 insertions(+), 2 deletions(-) diff --git a/arch/arm64/include/asm/acpi.h b/arch/arm64/include/asm/acpi.h index b68d819..605478e 100644 --- a/arch/arm64/include/asm/acpi.h +++ b/arch/arm64/include/asm/acpi.h @@ -1,5 +1,5 @@ /* - * Copyright (C) 2013, Al Stone <ahs3(a)redhat.com> + * Copyright (C) 2013, Al Stone <al.stone(a)linaro.org> * * ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ * diff --git a/arch/arm64/kernel/acpi/boot.c b/arch/arm64/kernel/acpi/boot.c index 5db7f6b..e62d167 100644 --- a/arch/arm64/kernel/acpi/boot.c +++ b/arch/arm64/kernel/acpi/boot.c @@ -3,7 +3,7 @@ * * Copyright (C) 2001, 2002 Paul Diefenbaugh <paul.s.diefenbaugh(a)intel.com> * Copyright (C) 2001 Jun Nakajima <jun.nakajima(a)intel.com> - * Copyright (C) 2013, Al Stone <ahs3(a)redhat.com> (ARM version) + * Copyright (C) 2013, Al Stone <al.stone(a)linaro.org> (ARM version) * * ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ * -- 1.7.10.4

12 years, 11 months

1
1
0 0

[PATCH] ACPI: ARM: clean up unneeded error/debug messages on boot

by al.stone＠linaro.org

From: Al Stone <ahs3(a)redhat.com> Signed-off-by: Al Stone <al.stone(a)linaro.org> --- arch/arm/kernel/acpi/boot.c | 6 ------ drivers/acpi/osl.c | 28 ++++++++++++++-------------- 2 files changed, 14 insertions(+), 20 deletions(-) diff --git a/arch/arm/kernel/acpi/boot.c b/arch/arm/kernel/acpi/boot.c index 8848024..be1e5d2 100644 --- a/arch/arm/kernel/acpi/boot.c +++ b/arch/arm/kernel/acpi/boot.c @@ -1390,7 +1390,6 @@ void __init acpi_boot_table_init(void) return; } - printk(KERN_INFO "(I) acpi_table_init call completed\n"); acpi_table_parse(ACPI_SIG_BOOT, acpi_parse_sbf); /* @@ -1406,7 +1405,6 @@ void __init acpi_boot_table_init(void) } } - printk(KERN_INFO "(I) exit acpi_boot_table_init\n"); } int __init early_acpi_boot_init(void) @@ -1417,8 +1415,6 @@ int __init early_acpi_boot_init(void) if (acpi_disabled) return 1; - printk(KERN_INFO "enter early_acpi_boot_init\n"); - /* * Process the Multiple APIC Description Table (MADT), if present */ @@ -1435,8 +1431,6 @@ int __init acpi_boot_init(void) if (acpi_disabled) return 1; - printk(KERN_INFO "enter acpi_boot_init\n"); - acpi_table_parse(ACPI_SIG_BOOT, acpi_parse_sbf); /* diff --git a/drivers/acpi/osl.c b/drivers/acpi/osl.c index 1e17bfd..42255a1 100644 --- a/drivers/acpi/osl.c +++ b/drivers/acpi/osl.c @@ -253,7 +253,7 @@ void acpi_find_arm_root_pointer(acpi_physical_address *pa) * What we do is, while using u-boot still, is use the values * that have already been retrieved from the FDT node * (/chosen/linux,acpi-start and /chosen/linux,acpi-len) which - * contain the address of the first byte of the RSDP after it + * contain the address of the first byte of the RSDP after it * has been loaded into RAM during u-boot (e.g., using something * like fatload mmc 0:2 42008000 my.blob), and the size of the * data in the complete ACPI blob. We only do this since we have @@ -267,7 +267,7 @@ void acpi_find_arm_root_pointer(acpi_physical_address *pa) struct acpi_table_rsdp *rp; if (!acpi_arm_rsdp_info.phys_address && !acpi_arm_rsdp_info.size) { - printk(KERN_ERR "(E) ACPI: failed to find rsdp info\n"); + printk(KERN_ERR PREFIX "failed to find rsdp info\n"); *pa = (acpi_physical_address)NULL; return; } @@ -277,25 +277,25 @@ void acpi_find_arm_root_pointer(acpi_physical_address *pa) *pa = (acpi_physical_address)address; rp = (struct acpi_table_rsdp *)address; - printk(KERN_DEBUG "(I) ACPI rsdp rp: 0x%08lx\n", (long unsigned int)rp); + printk(KERN_DEBUG PREFIX "rsdp rp: 0x%08lx\n", (long unsigned int)rp); if (rp) { - printk(KERN_DEBUG "(I) ACPI rsdp content:\n"); - printk(KERN_DEBUG "(I) signature: %.8s\n", rp->signature); - printk(KERN_DEBUG "(I) checksum: 0x%02x\n", rp->checksum); - printk(KERN_DEBUG "(I) oem_id: %.6s\n", rp->oem_id); - printk(KERN_DEBUG "(I) revision: %d\n", rp->revision); - printk(KERN_DEBUG "(I) rsdt: 0x%08lX\n", + printk(KERN_DEBUG PREFIX "rsdp content:\n"); + printk(KERN_DEBUG PREFIX " signature: %.8s\n", rp->signature); + printk(KERN_DEBUG PREFIX " checksum: 0x%02x\n", rp->checksum); + printk(KERN_DEBUG PREFIX " oem_id: %.6s\n", rp->oem_id); + printk(KERN_DEBUG PREFIX " revision: %d\n", rp->revision); + printk(KERN_DEBUG PREFIX " rsdt: 0x%08lX\n", (long unsigned int)rp->rsdt_physical_address); - printk(KERN_DEBUG "(I) length: %d\n", rp->length); - printk(KERN_DEBUG "(I) xsdt: 0x%016llX\n", + printk(KERN_DEBUG PREFIX " length: %d\n", rp->length); + printk(KERN_DEBUG PREFIX " xsdt: 0x%016llX\n", (u64)rp->xsdt_physical_address); - printk(KERN_DEBUG "(I) x_checksum: 0x%02x\n", + printk(KERN_DEBUG PREFIX " x_checksum: 0x%02x\n", rp->extended_checksum); *pa = (acpi_physical_address)(virt_to_phys(rp)); } else { - printk(KERN_ERR "(E) ACPI missing rsdp info\n"); + printk(KERN_ERR PREFIX "missing rsdp info\n"); *pa = (acpi_physical_address)NULL; } @@ -1324,7 +1324,7 @@ acpi_status acpi_os_wait_semaphore(acpi_handle handle, u32 units, u16 timeout) jiffies = MAX_SCHEDULE_TIMEOUT; else jiffies = msecs_to_jiffies(timeout); - + ret = down_timeout(sem, jiffies); if (ret) status = AE_TIME; -- 1.8.1.4

12 years, 11 months

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[PATCH] ARM64: ACPI remove unused assembler optimisations

by Graeme Gregory

From: Graeme Gregory <graeme.gregory(a)linaro.org> Modern linux systems all define ACPI_USE_NATIVE_DIVIDE as they support 64bit maths natively. So these assembly versions are never used. Remove them to save confusion. Signed-off-by: Graeme Gregory <graeme.gregory(a)linaro.org> --- arch/arm64/include/asm/acpi.h | 26 ------- arch/arm64/kernel/acpi/acpi_div_64_by_32.S | 105 ---------------------------- 2 files changed, 131 deletions(-) delete mode 100644 arch/arm64/kernel/acpi/acpi_div_64_by_32.S diff --git a/arch/arm64/include/asm/acpi.h b/arch/arm64/include/asm/acpi.h index 3ef9fc0..b68d819 100644 --- a/arch/arm64/include/asm/acpi.h +++ b/arch/arm64/include/asm/acpi.h @@ -54,32 +54,6 @@ #define ACPI_ENABLE_IRQS() local_irq_enable() #define ACPI_FLUSH_CPU_CACHE() flush_cache_all() -#define ACPI_DIV_64_BY_32(n_hi, n_lo, d32, q32, r32) (\ - asm ("mov r0, %2\n" \ - "mov r1, %3\n" \ - "mov r2, %4\n" \ - "bl __arm_acpi_div_64_by_32\n" \ - "mov %0, r0\n" \ - "mov %1, r1\n" \ - : "=r"(q32), "=r"(r32) /* output */ \ - : "r"(n_hi), "r"(n_lo), "r"(d32) /* input */ \ - : "r0", "r1", "r2" /* clobbered registers */ \ - )) - -#define ACPI_SHIFT_RIGHT_64(n_hi, n_lo) (\ - asm ("mov r0, %2\n" \ - "mov r1, %3\n" \ - "and r2, r0, #1\n" \ - "lsr r0, r0, #1\n" \ - "lsr r1, r1, #1\n" \ - "orr r1, r1, r2, lsl #31\n" \ - "mov %0, r0\n" \ - "mov %1, r1\n" \ - : "=r"(n_hi), "=r"(n_lo) /* output operands */ \ - : "0"(n_hi), "1"(n_lo) /* input operands */ \ - : "r0", "r1", "r2" /* clobbered registers */ \ - )) - /* Blob handling macros */ #define ACPI_BLOB_HEADER_SIZE 8 diff --git a/arch/arm64/kernel/acpi/acpi_div_64_by_32.S b/arch/arm64/kernel/acpi/acpi_div_64_by_32.S deleted file mode 100644 index 99a14a4..0000000 --- a/arch/arm64/kernel/acpi/acpi_div_64_by_32.S +++ /dev/null @@ -1,105 +0,0 @@ -/* - * Copyright (c) 2013, Al Stone <ahs3(a)redhat.com> - * - * __acpi_arm_div64_by_32: perform integer division of a 64-bit value - * a 32-bit value - * - * The algorithm is borrowed from the GMP library, but has been redone - * here in order to put this implementation under a GPLv2 license. - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; either version 2 of the License, or - * (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA - */ - -#ifdef __ARM_ARCH_8__ - -#include <linux/linkage.h> - -/* - * This needs to be called in the following manner: - * n_lo => r0 # these are the low 32 bits of the dividend - * n_hi => r1 # the high 32 bits of the dividend - * d32 => r2 # the 32-bit divisor - * - * The result is: - * q32 <= r0 # the 32-bit quotient - * r32 <= r1 # the 32-bit remainder - * - * This should be consistent with the normal ARMv7 calling conventions. - * - */ - -ENTRY(__arm_acpi_div_64_by_32) - mov r12, #32 // loop counter - cmp r2, #0x80000000 // check divisor MSB and clear carry - bcs bigdiv - -loop: adcs r1, r1, r1 // handle each bit - adc r0, r0, r0 - cmp r0, r2 - subcs r0, r0, r2 - sub r12, r12, #1 - teq r12, #0 - bne loop - - mov r3, r0 // stash the remainder for a tic - adc r0, r1, r1 // quotient: add in last carry - mov r1, r3 // remainder (now in right register) - mov pc, lr - -bigdiv: stmfd sp!, { r8, lr } // clear some scratch space - - and r8, r1, #1 // save LSB of dividend - mov lr, r0, lsl #31 - orrs r1, lr, r1, lsr #1 // r1 = lower part >> 1 bit - mov r0, r0, lsr #1 // r0 = higher part >> 1 bit - - and lr, r2, #1 // save LSB of divisor - movs r2, r2, lsr #1 // r2 = floor(divisor / 2) - adc r2, r2, #0 // r2 = ceil(divisor / 2) - -loop2: adcs r1, r1, r1 // handle each bit - adc r0, r0, r0 - cmp r0, r2 - subcs r0, r0, r2 - sub r12, r12, #1 - teq r12, #0 - bne loop2 - - adc r1, r1, r1 // shift and add last carry - add r0, r8, r0, lsl #1 // shift in remaining dividend LSB - tst lr, lr - beq evendiv - - rsb r2, lr, r2, lsl #1 // restore divisor value - adds r0, r0, r1 // adjust for omitted divisor LSB - addcs r1, r1, #1 // adjust quotient if a carry results - subcs r0, r0, r2 // adjust remainder, if carry - cmp r0, r2 - subcs r0, r0, #1 // adjust remainder - addcs r1, r1, #1 // adjust quotient - -evendiv: - mov r3, r0 // stash the remainder for a tic - mov r0, r1 // quotient - mov r1, r3 // remainder - - ldmfd sp!, { r8, pc } // restore the registers used - -ENDPROC(__arm_acpi_div_64_by_32) - -#else /* ! __ARM_ARCH_7A__ */ -#error __arm_acpi_div_64_by_32 not defined for this architecture -#endif - -- 1.7.10.4

12 years, 11 months

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[PATCHv2] ACPI state

by Graeme Gregory

Hi, I have managed to get us to boot as far as the dreaded > ACPI: Interpreter enabled state on armv8 now. For now ACPI tables cannot be bigger than 1MB in size (we are nowhere near this size). And also FDT cannot be bigger than 1MB (still nowhere near). >From the conversion which was mostly changing u32 -> void * u32 -> phys_addr_t and adding the correct initialisation to the setup.c on armv8 it is becoming clear that with the correct universal types used that the arch/arm/kernel/acpi and arch/arm64/kernel/acpi are actually mostly generic to both platforms so we will need to decide where to put them. This genericness is nice to have as it means we should be able to switch v7/v8 at will for testing! There is still some code from armv7 that I have not yet brought over to v8 and someone fluent in v8 assembler needs to fix the two assembly bits. I shall continue to bring code over and enable more ACPI features. Graeme

12 years, 11 months

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[PATCH v2] ACPI: ARM: set OEM ID to correct name in Arndale ASL files

by al.stone＠linaro.org

From: Al Stone <al.stone(a)linaro.org> arch/arm/boot/asl/exynos5250-arndale.acpi/*.asl: set OEM ID to LINARO arch/arm/boot/asl/exynos5250-arndale.acpi/*.asl: set author info properly arch/arm/boot/asl/exynos5250-arndale.acpi/ssdt.asl: unused, removed Signed-off-by: Al Stone <al.stone(a)linaro.org> --- arch/arm/boot/asl/exynos5250-arndale.acpi/apic.asl | 4 ++-- arch/arm/boot/asl/exynos5250-arndale.acpi/bert.asl | 4 ++-- arch/arm/boot/asl/exynos5250-arndale.acpi/cpep.asl | 4 ++-- arch/arm/boot/asl/exynos5250-arndale.acpi/dsdt.asl | 4 ++-- arch/arm/boot/asl/exynos5250-arndale.acpi/ecdt.asl | 4 ++-- arch/arm/boot/asl/exynos5250-arndale.acpi/einj.asl | 4 ++-- arch/arm/boot/asl/exynos5250-arndale.acpi/erst.asl | 4 ++-- arch/arm/boot/asl/exynos5250-arndale.acpi/facp.asl | 4 ++-- arch/arm/boot/asl/exynos5250-arndale.acpi/facs.asl | 2 +- arch/arm/boot/asl/exynos5250-arndale.acpi/fpdt.asl | 4 ++-- arch/arm/boot/asl/exynos5250-arndale.acpi/gtdt.asl | 4 ++-- arch/arm/boot/asl/exynos5250-arndale.acpi/hest.asl | 4 ++-- arch/arm/boot/asl/exynos5250-arndale.acpi/mcfg.asl | 4 ++-- arch/arm/boot/asl/exynos5250-arndale.acpi/mchi.asl | 4 ++-- arch/arm/boot/asl/exynos5250-arndale.acpi/mpst.asl | 4 ++-- arch/arm/boot/asl/exynos5250-arndale.acpi/msct.asl | 4 ++-- arch/arm/boot/asl/exynos5250-arndale.acpi/oem0.asl | 4 ++-- arch/arm/boot/asl/exynos5250-arndale.acpi/pmtt.asl | 4 ++-- arch/arm/boot/asl/exynos5250-arndale.acpi/rsdp.asl | 4 ++-- arch/arm/boot/asl/exynos5250-arndale.acpi/rsdt.asl | 4 ++-- arch/arm/boot/asl/exynos5250-arndale.acpi/slit.asl | 4 ++-- arch/arm/boot/asl/exynos5250-arndale.acpi/spmi.asl | 4 ++-- arch/arm/boot/asl/exynos5250-arndale.acpi/srat.asl | 4 ++-- arch/arm/boot/asl/exynos5250-arndale.acpi/ssdt.asl | 16 ---------------- arch/arm/boot/asl/exynos5250-arndale.acpi/ssdt0.asl | 4 ++-- arch/arm/boot/asl/exynos5250-arndale.acpi/uefi.asl | 4 ++-- arch/arm/boot/asl/exynos5250-arndale.acpi/xsdt.asl | 4 ++-- 27 files changed, 51 insertions(+), 67 deletions(-) delete mode 100644 arch/arm/boot/asl/exynos5250-arndale.acpi/ssdt.asl diff --git a/arch/arm/boot/asl/exynos5250-arndale.acpi/apic.asl b/arch/arm/boot/asl/exynos5250-arndale.acpi/apic.asl index 80582d4..69f0dc1 100644 --- a/arch/arm/boot/asl/exynos5250-arndale.acpi/apic.asl +++ b/arch/arm/boot/asl/exynos5250-arndale.acpi/apic.asl @@ -1,5 +1,5 @@ /* - * Copyright (c) 2013, Al Stone <ahs3(a)redhat.com> + * Copyright (c) 2013, Al Stone <al.stone(a)linaro.org> * * [APIC] Multiple APIC Description Table (MADT) * Format: [ByteLength] FieldName : HexFieldValue @@ -11,7 +11,7 @@ [0004] Table Length : 000000F6 [0001] Revision : 01 [0001] Checksum : B0 -[0006] Oem ID : "REDHAT" +[0006] Oem ID : "LINARO" [0008] Oem Table ID : "ARNDALE " [0004] Oem Revision : 00000001 [0004] Asl Compiler ID : "INTL" diff --git a/arch/arm/boot/asl/exynos5250-arndale.acpi/bert.asl b/arch/arm/boot/asl/exynos5250-arndale.acpi/bert.asl index d38cdef..94024bb 100644 --- a/arch/arm/boot/asl/exynos5250-arndale.acpi/bert.asl +++ b/arch/arm/boot/asl/exynos5250-arndale.acpi/bert.asl @@ -1,5 +1,5 @@ /* - * Copyright (c) 2013, Al Stone <ahs3(a)redhat.com> + * Copyright (c) 2013, Al Stone <al.stone(a)linaro.org> * * [BERT] Boot Error Record Table * Format: [ByteLength] FieldName : HexFieldValue @@ -11,7 +11,7 @@ [0004] Table Length : 00000030 [0001] Revision : 01 [0001] Checksum : 15 -[0006] Oem ID : "REDHAT" +[0006] Oem ID : "LINARO" [0008] Oem Table ID : "ARNDALE " [0004] Oem Revision : 00000001 [0004] Asl Compiler ID : "INTL" diff --git a/arch/arm/boot/asl/exynos5250-arndale.acpi/cpep.asl b/arch/arm/boot/asl/exynos5250-arndale.acpi/cpep.asl index c58eac0..bd790a7 100644 --- a/arch/arm/boot/asl/exynos5250-arndale.acpi/cpep.asl +++ b/arch/arm/boot/asl/exynos5250-arndale.acpi/cpep.asl @@ -1,5 +1,5 @@ /* - * Copyright (c) 2013, Al Stone <ahs3(a)redhat.com> + * Copyright (c) 2013, Al Stone <al.stone(a)linaro.org> * * [CPEP] Corrected Platform Error Polling Table * Format: [ByteLength] FieldName : HexFieldValue @@ -11,7 +11,7 @@ [0004] Table Length : 00000034 [0001] Revision : 01 [0001] Checksum : 0F -[0006] Oem ID : "REDHAT" +[0006] Oem ID : "LINARO" [0008] Oem Table ID : "ARNDALE " [0004] Oem Revision : 00000000 [0004] Asl Compiler ID : "INTL" diff --git a/arch/arm/boot/asl/exynos5250-arndale.acpi/dsdt.asl b/arch/arm/boot/asl/exynos5250-arndale.acpi/dsdt.asl index d03b011..67b1b42 100644 --- a/arch/arm/boot/asl/exynos5250-arndale.acpi/dsdt.asl +++ b/arch/arm/boot/asl/exynos5250-arndale.acpi/dsdt.asl @@ -1,5 +1,5 @@ /* - * Copyright (c) 2013, Al Stone <ahs3(a)redhat.com> + * Copyright (c) 2013, Al Stone <al.stone(a)linaro.org> * * [DSDT] Description of the Arndale board (exynos5250) * @@ -10,7 +10,7 @@ DefinitionBlock ( "dsdt.aml", // output filename "DSDT", // table signature 1, // DSDT compliance revision - "REDHAT", // OEM ID + "LINARO", // OEM ID "ARNDALE ", // table ID 0x00000002) // OEM revision { diff --git a/arch/arm/boot/asl/exynos5250-arndale.acpi/ecdt.asl b/arch/arm/boot/asl/exynos5250-arndale.acpi/ecdt.asl index aae7637..2bb32e7 100644 --- a/arch/arm/boot/asl/exynos5250-arndale.acpi/ecdt.asl +++ b/arch/arm/boot/asl/exynos5250-arndale.acpi/ecdt.asl @@ -1,5 +1,5 @@ /* - * Copyright (c) 2013, Al Stone <ahs3(a)redhat.com> + * Copyright (c) 2013, Al Stone <al.stone(a)linaro.org> * * [ECDT] Embedded Controller Boot Resources Table * Format: [ByteLength] FieldName : HexFieldValue @@ -11,7 +11,7 @@ [0004] Table Length : 00000042 [0001] Revision : 01 [0001] Checksum : 2D -[0006] Oem ID : "REDHAT" +[0006] Oem ID : "LINARO" [0008] Oem Table ID : "ARNDALE " [0004] Oem Revision : 00000001 [0004] Asl Compiler ID : "INTL" diff --git a/arch/arm/boot/asl/exynos5250-arndale.acpi/einj.asl b/arch/arm/boot/asl/exynos5250-arndale.acpi/einj.asl index e334180..2127989 100644 --- a/arch/arm/boot/asl/exynos5250-arndale.acpi/einj.asl +++ b/arch/arm/boot/asl/exynos5250-arndale.acpi/einj.asl @@ -1,5 +1,5 @@ /* - * Copyright (c) 2013, Al Stone <ahs3(a)redhat.com> + * Copyright (c) 2013, Al Stone <al.stone(a)linaro.org> * * [EINJ] Error Injection Table * Format: [ByteLength] FieldName : HexFieldValue @@ -11,7 +11,7 @@ [0004] Table Length : 00000130 [0001] Revision : 01 [0001] Checksum : 09 -[0006] Oem ID : "REDHAT" +[0006] Oem ID : "LINARO" [0008] Oem Table ID : "ARNDALE " [0004] Oem Revision : 00000001 [0004] Asl Compiler ID : "INTL" diff --git a/arch/arm/boot/asl/exynos5250-arndale.acpi/erst.asl b/arch/arm/boot/asl/exynos5250-arndale.acpi/erst.asl index 2620a94..ad1d3b9 100644 --- a/arch/arm/boot/asl/exynos5250-arndale.acpi/erst.asl +++ b/arch/arm/boot/asl/exynos5250-arndale.acpi/erst.asl @@ -1,5 +1,5 @@ /* - * Copyright (c) 2013, Al Stone <ahs3(a)redhat.com> + * Copyright (c) 2013, Al Stone <al.stone(a)linaro.org> * * [ERST] Error Record Serialization Table * Format: [ByteLength] FieldName : HexFieldValue @@ -11,7 +11,7 @@ [0004] Table Length : 00000230 [0001] Revision : 01 [0001] Checksum : AB -[0006] Oem ID : "REDHAT" +[0006] Oem ID : "LINARO" [0008] Oem Table ID : "ARNDALE " [0004] Oem Revision : 00000001 [0004] Asl Compiler ID : "INTL" diff --git a/arch/arm/boot/asl/exynos5250-arndale.acpi/facp.asl b/arch/arm/boot/asl/exynos5250-arndale.acpi/facp.asl index d1d2fc9..1770c93 100644 --- a/arch/arm/boot/asl/exynos5250-arndale.acpi/facp.asl +++ b/arch/arm/boot/asl/exynos5250-arndale.acpi/facp.asl @@ -1,5 +1,5 @@ /* - * Copyright (c) 2013, Al Stone <ahs3(a)redhat.com> + * Copyright (c) 2013, Al Stone <al.stone(a)linaro.org> * * [FACP] ACPI Table * @@ -10,7 +10,7 @@ [0004] Table Length : 0000010C [0001] Revision : 05 [0001] Checksum : 18 -[0006] Oem ID : "REDHAT" +[0006] Oem ID : "LINARO" [0008] Oem Table ID : "ARNDALE " [0004] Oem Revision : 00000000 [0004] Asl Compiler ID : "INTL" diff --git a/arch/arm/boot/asl/exynos5250-arndale.acpi/facs.asl b/arch/arm/boot/asl/exynos5250-arndale.acpi/facs.asl index 118bb44..8d12b41 100644 --- a/arch/arm/boot/asl/exynos5250-arndale.acpi/facs.asl +++ b/arch/arm/boot/asl/exynos5250-arndale.acpi/facs.asl @@ -1,5 +1,5 @@ /* - * Copyright (c) 2013, Al Stone <ahs3(a)redhat.com> + * Copyright (c) 2013, Al Stone <al.stone(a)linaro.org> * * [FACS] ACPI Table * diff --git a/arch/arm/boot/asl/exynos5250-arndale.acpi/fpdt.asl b/arch/arm/boot/asl/exynos5250-arndale.acpi/fpdt.asl index fcfc708..8a1e935 100644 --- a/arch/arm/boot/asl/exynos5250-arndale.acpi/fpdt.asl +++ b/arch/arm/boot/asl/exynos5250-arndale.acpi/fpdt.asl @@ -1,5 +1,5 @@ /* - * Copyright (c) 2013, Al Stone <ahs3(a)redhat.com> + * Copyright (c) 2013, Al Stone <al.stone(a)linaro.org> * * [FPDT] Firmware Performance Data Table * Format: [ByteLength] FieldName : HexFieldValue @@ -11,7 +11,7 @@ [0004] Table Length : 00000064 [0001] Revision : 01 [0001] Checksum : BD -[0006] Oem ID : "REDHAT" +[0006] Oem ID : "LINARO" [0008] Oem Table ID : "ARNDALE " [0004] Oem Revision : 00000001 [0004] Asl Compiler ID : "INTL" diff --git a/arch/arm/boot/asl/exynos5250-arndale.acpi/gtdt.asl b/arch/arm/boot/asl/exynos5250-arndale.acpi/gtdt.asl index 6bb486c..5552d62 100644 --- a/arch/arm/boot/asl/exynos5250-arndale.acpi/gtdt.asl +++ b/arch/arm/boot/asl/exynos5250-arndale.acpi/gtdt.asl @@ -1,5 +1,5 @@ /* - * Copyright (c) 2013, Al Stone <ahs3(a)redhat.com> + * Copyright (c) 2013, Al Stone <al.stone(a)linaro.org> * * [GTDT] Generic Timer Description Table * Format: [ByteLength] FieldName : HexFieldValue @@ -11,7 +11,7 @@ [0004] Table Length : 00000050 [0001] Revision : 01 [0001] Checksum : F1 -[0006] Oem ID : "REDHAT" +[0006] Oem ID : "LINARO" [0008] Oem Table ID : "ARNDALE " [0004] Oem Revision : 00000001 [0004] Asl Compiler ID : "INTL" diff --git a/arch/arm/boot/asl/exynos5250-arndale.acpi/hest.asl b/arch/arm/boot/asl/exynos5250-arndale.acpi/hest.asl index 7da782a..ad29f6f 100644 --- a/arch/arm/boot/asl/exynos5250-arndale.acpi/hest.asl +++ b/arch/arm/boot/asl/exynos5250-arndale.acpi/hest.asl @@ -1,5 +1,5 @@ /* - * Copyright (c) 2013, Al Stone <ahs3(a)redhat.com + * Copyright (c) 2013, Al Stone <al.stone(a)linaro.org * * [HEST] Hardware Error Source Table * Format: [ByteLength] FieldName : HexFieldValue @@ -11,7 +11,7 @@ [0004] Table Length : 000001D4 [0001] Revision : 01 [0001] Checksum : 20 -[0006] Oem ID : "REDHAT" +[0006] Oem ID : "LINARO" [0008] Oem Table ID : "ARNDALE " [0004] Oem Revision : 00000001 [0004] Asl Compiler ID : "INTL" diff --git a/arch/arm/boot/asl/exynos5250-arndale.acpi/mcfg.asl b/arch/arm/boot/asl/exynos5250-arndale.acpi/mcfg.asl index 615d90c..25c4241 100644 --- a/arch/arm/boot/asl/exynos5250-arndale.acpi/mcfg.asl +++ b/arch/arm/boot/asl/exynos5250-arndale.acpi/mcfg.asl @@ -1,5 +1,5 @@ /* - * Copyright (c) 2013, Al Stone <ahs3(a)redhat.com> + * Copyright (c) 2013, Al Stone <al.stone(a)linaro.org> * * [MCFG] PCIe Memory Mapped Configuration Table * Format: [ByteLength] FieldName : HexFieldValue @@ -11,7 +11,7 @@ [0004] Table Length : 0000003C [0001] Revision : 01 [0001] Checksum : 19 -[0006] Oem ID : "REDHAT" +[0006] Oem ID : "LINARO" [0008] Oem Table ID : "ARNDALE " [0004] Oem Revision : 00000001 [0004] Asl Compiler ID : "INTL" diff --git a/arch/arm/boot/asl/exynos5250-arndale.acpi/mchi.asl b/arch/arm/boot/asl/exynos5250-arndale.acpi/mchi.asl index d57c52d..9260f4e 100644 --- a/arch/arm/boot/asl/exynos5250-arndale.acpi/mchi.asl +++ b/arch/arm/boot/asl/exynos5250-arndale.acpi/mchi.asl @@ -1,5 +1,5 @@ /* - * Copyright (c) 2013, Al Stone <ahs3(a)redhat.com> + * Copyright (c) 2013, Al Stone <al.stone(a)linaro.org> * * [MCHI] Management Controller Host Interface Table * Format: [ByteLength] FieldName : HexFieldValue @@ -11,7 +11,7 @@ [0004] Table Length : 00000045 [0001] Revision : 01 [0001] Checksum : E4 -[0006] Oem ID : "REDHAT" +[0006] Oem ID : "LINARO" [0008] Oem Table ID : "ARNDALE " [0004] Oem Revision : 02000715 [0004] Asl Compiler ID : "INTL" diff --git a/arch/arm/boot/asl/exynos5250-arndale.acpi/mpst.asl b/arch/arm/boot/asl/exynos5250-arndale.acpi/mpst.asl index d9be8f5..786361f2 100644 --- a/arch/arm/boot/asl/exynos5250-arndale.acpi/mpst.asl +++ b/arch/arm/boot/asl/exynos5250-arndale.acpi/mpst.asl @@ -1,5 +1,5 @@ /* - * Copyright (c) 2013, Al Stone <ahs3(a)redhat.com> + * Copyright (c) 2013, Al Stone <al.stone(a)linaro.org> * * [MPST] Memory Power State Table * Format: [ByteLength] FieldName : HexFieldValue @@ -11,7 +11,7 @@ [0004] Table Length : 000000B6 [0001] Revision : 01 [0001] Checksum : 77 -[0006] Oem ID : "REDHAT" +[0006] Oem ID : "LINARO" [0008] Oem Table ID : "ARNDALE " [0004] Oem Revision : 00000001 [0004] Asl Compiler ID : "INTL" diff --git a/arch/arm/boot/asl/exynos5250-arndale.acpi/msct.asl b/arch/arm/boot/asl/exynos5250-arndale.acpi/msct.asl index b2bf22f..41c3fcc 100644 --- a/arch/arm/boot/asl/exynos5250-arndale.acpi/msct.asl +++ b/arch/arm/boot/asl/exynos5250-arndale.acpi/msct.asl @@ -1,5 +1,5 @@ /* - * Copyright (c) 2013, Al Stone <ahs3(a)redhat.com> + * Copyright (c) 2013, Al Stone <al.stone(a)linaro.org> * * [MSCT] Maximum System Characteristics Table * Format: [ByteLength] FieldName : HexFieldValue @@ -11,7 +11,7 @@ [0004] Table Length : 00000090 [0001] Revision : 01 [0001] Checksum : B7 -[0006] Oem ID : "REDHAT" +[0006] Oem ID : "LINARO" [0008] Oem Table ID : "ARNDALE " [0004] Oem Revision : 00000001 [0004] Asl Compiler ID : "INTL" diff --git a/arch/arm/boot/asl/exynos5250-arndale.acpi/oem0.asl b/arch/arm/boot/asl/exynos5250-arndale.acpi/oem0.asl index 5808009..f676f62 100644 --- a/arch/arm/boot/asl/exynos5250-arndale.acpi/oem0.asl +++ b/arch/arm/boot/asl/exynos5250-arndale.acpi/oem0.asl @@ -1,5 +1,5 @@ /* - * Copyright (c) 2013, Al Stone <ahs3(a)redhat.com> + * Copyright (c) 2013, Al Stone <al.stone(a)linaro.org> * * [OEMx] OEM Specific Table * Format: [ByteLength] FieldName : HexFieldValue @@ -11,7 +11,7 @@ [0004] Table Length : 00000024 [0001] Revision : 01 [0001] Checksum : 8B -[0006] Oem ID : "REDHAT" +[0006] Oem ID : "LINARO" [0008] Oem Table ID : "ARNDALE " [0004] Oem Revision : 0000000A [0004] Asl Compiler ID : "INTL" diff --git a/arch/arm/boot/asl/exynos5250-arndale.acpi/pmtt.asl b/arch/arm/boot/asl/exynos5250-arndale.acpi/pmtt.asl index e757170..3804a60 100644 --- a/arch/arm/boot/asl/exynos5250-arndale.acpi/pmtt.asl +++ b/arch/arm/boot/asl/exynos5250-arndale.acpi/pmtt.asl @@ -1,5 +1,5 @@ /* - * Copyright (c) 2013, Al Stone <ahs3(a)redhat.com> + * Copyright (c) 2013, Al Stone <al.stone(a)linaro.org> * * [PMTT] Platform Memory Topology Table * Format: [ByteLength] FieldName : HexFieldValue @@ -11,7 +11,7 @@ [0004] Table Length : 000000B4 [0001] Revision : 01 [0001] Checksum : 3A -[0006] Oem ID : "REDHAT" +[0006] Oem ID : "LINARO" [0008] Oem Table ID : "ARNDALE " [0004] Oem Revision : 00000001 [0004] Asl Compiler ID : "INTL" diff --git a/arch/arm/boot/asl/exynos5250-arndale.acpi/rsdp.asl b/arch/arm/boot/asl/exynos5250-arndale.acpi/rsdp.asl index a6e827b..3460a77 100644 --- a/arch/arm/boot/asl/exynos5250-arndale.acpi/rsdp.asl +++ b/arch/arm/boot/asl/exynos5250-arndale.acpi/rsdp.asl @@ -1,5 +1,5 @@ /* - * Copyright (c) 2013, Al Stone <ahs3(a)redhat.com> + * Copyright (c) 2013, Al Stone <al.stone(a)linaro.org> * * [RSDP] ACPI Table * @@ -8,7 +8,7 @@ [0008] Signature : "RSD PTR " [0001] Checksum : 43 -[0006] Oem ID : "REDHAT" +[0006] Oem ID : "LINARO" [0001] Revision : 02 [0004] RSDT Address : 00000000 [0004] Length : 00000024 diff --git a/arch/arm/boot/asl/exynos5250-arndale.acpi/rsdt.asl b/arch/arm/boot/asl/exynos5250-arndale.acpi/rsdt.asl index 4494a43..65e7d02 100644 --- a/arch/arm/boot/asl/exynos5250-arndale.acpi/rsdt.asl +++ b/arch/arm/boot/asl/exynos5250-arndale.acpi/rsdt.asl @@ -1,5 +1,5 @@ /* - * Copyright (c) 2013, Al Stone <ahs3(a)redhat.com> + * Copyright (c) 2013, Al Stone <al.stone(a)linaro.org> * * [RSDT] ACPI Table * Format: [ByteLength] FieldName : HexFieldValue @@ -11,7 +11,7 @@ [0004] Table Length : 00000044 [0001] Revision : 01 [0001] Checksum : 8B -[0006] Oem ID : "REDHAT" +[0006] Oem ID : "LINARO" [0008] Oem Table ID : "ARNDALE " [0004] Oem Revision : 00000001 [0004] Asl Compiler ID : "INTL" diff --git a/arch/arm/boot/asl/exynos5250-arndale.acpi/slit.asl b/arch/arm/boot/asl/exynos5250-arndale.acpi/slit.asl index 692e065..7c4dbbb 100644 --- a/arch/arm/boot/asl/exynos5250-arndale.acpi/slit.asl +++ b/arch/arm/boot/asl/exynos5250-arndale.acpi/slit.asl @@ -1,5 +1,5 @@ /* - * Copyright (c) 2013, Al Stone <ahs3(a)redhat.com> + * Copyright (c) 2013, Al Stone <al.stone(a)linaro.org> * * [SLIT] System Locality Information Table * Format: [ByteLength] FieldName : HexFieldValue @@ -11,7 +11,7 @@ [0004] Table Length : 000001BC [0001] Revision : 01 [0001] Checksum : 00 -[0006] Oem ID : "REDHAT" +[0006] Oem ID : "LINARO" [0008] Oem Table ID : "ARNDALE " [0004] Oem Revision : 00000001 [0004] Asl Compiler ID : "INTL" diff --git a/arch/arm/boot/asl/exynos5250-arndale.acpi/spmi.asl b/arch/arm/boot/asl/exynos5250-arndale.acpi/spmi.asl index 28d6307..88b0355 100644 --- a/arch/arm/boot/asl/exynos5250-arndale.acpi/spmi.asl +++ b/arch/arm/boot/asl/exynos5250-arndale.acpi/spmi.asl @@ -1,5 +1,5 @@ /* - * Copyright (c) 2013, Al Stone <ahs3(a)redhat.com + * Copyright (c) 2013, Al Stone <al.stone(a)linaro.org * * [SPMI] Server Platform Management Interface Table * Format: [ByteLength] FieldName : HexFieldValue @@ -11,7 +11,7 @@ [0004] Table Length : 00000041 [0001] Revision : 04 [0001] Checksum : ED -[0006] Oem ID : "REDHAT" +[0006] Oem ID : "LINARO" [0008] Oem Table ID : "ARNDALE " [0004] Oem Revision : 00000000 [0004] Asl Compiler ID : "INTL" diff --git a/arch/arm/boot/asl/exynos5250-arndale.acpi/srat.asl b/arch/arm/boot/asl/exynos5250-arndale.acpi/srat.asl index 2170445..3332072 100644 --- a/arch/arm/boot/asl/exynos5250-arndale.acpi/srat.asl +++ b/arch/arm/boot/asl/exynos5250-arndale.acpi/srat.asl @@ -1,5 +1,5 @@ /* - * Copyright (c) 2013, Al Stone <ahs3(a)redhat.com> + * Copyright (c) 2013, Al Stone <al.stone(a)linaro.org> * * [SRAT] System Resource Affinity Table * Format: [ByteLength] FieldName : HexFieldValue @@ -11,7 +11,7 @@ [0004] Table Length : 00000080 [0001] Revision : 03 [0001] Checksum : 5A -[0006] Oem ID : "REDHAT" +[0006] Oem ID : "LINARO" [0008] Oem Table ID : "ARNDALE " [0004] Oem Revision : 00000001 [0004] Asl Compiler ID : "INTL" diff --git a/arch/arm/boot/asl/exynos5250-arndale.acpi/ssdt.asl b/arch/arm/boot/asl/exynos5250-arndale.acpi/ssdt.asl deleted file mode 100644 index 02d3acc..0000000 --- a/arch/arm/boot/asl/exynos5250-arndale.acpi/ssdt.asl +++ /dev/null @@ -1,16 +0,0 @@ -/* - * Intel ACPI Component Architecture - * iASL Compiler/Disassembler version 20130117-64 [Jan 31 2013] - * Copyright (c) 2000 - 2013 Intel Corporation - * - * Template for [SSDT] ACPI Table - */ - -DefinitionBlock ("ssdt.aml", "SSDT", 2, "Intel", "Template", 0x00000001) -{ - Method (MAIN, 0, NotSerialized) - { - Return (Zero) - } -} - diff --git a/arch/arm/boot/asl/exynos5250-arndale.acpi/ssdt0.asl b/arch/arm/boot/asl/exynos5250-arndale.acpi/ssdt0.asl index e2397b8..69dce10 100644 --- a/arch/arm/boot/asl/exynos5250-arndale.acpi/ssdt0.asl +++ b/arch/arm/boot/asl/exynos5250-arndale.acpi/ssdt0.asl @@ -1,5 +1,5 @@ /* - * Copyright (c) 2013, Al Stone <ahs3(a)redhat.com> + * Copyright (c) 2013, Al Stone <al.stone(a)linaro.org> * * [SSDT] Description of the Arndale board (exynos5250) GPIO structure * @@ -10,7 +10,7 @@ DefinitionBlock ( "ssdt0.aml", // output filename "SSDT", // table signature 2, // SSDT compliance revision - "REDHAT", // OEM ID + "LINARO", // OEM ID "ARNDALE ", // table ID 0x00000001) // OEM revision { diff --git a/arch/arm/boot/asl/exynos5250-arndale.acpi/uefi.asl b/arch/arm/boot/asl/exynos5250-arndale.acpi/uefi.asl index 15585a0..1a5e38c 100644 --- a/arch/arm/boot/asl/exynos5250-arndale.acpi/uefi.asl +++ b/arch/arm/boot/asl/exynos5250-arndale.acpi/uefi.asl @@ -1,5 +1,5 @@ /* - * Copyright (c) 2013, Al Stone <ahs3(a)redhat.com> + * Copyright (c) 2013, Al Stone <al.stone(a)linaro.org> * * [UEFI] UEFI Boot Optimization Table * Format: [ByteLength] FieldName : HexFieldValue @@ -11,7 +11,7 @@ [0004] Table Length : 00000036 [0001] Revision : 01 [0001] Checksum : 9B -[0006] Oem ID : "REDHAT" +[0006] Oem ID : "LINARO" [0008] Oem Table ID : "ARNDALE " [0004] Oem Revision : 00000001 [0004] Asl Compiler ID : "INTL" diff --git a/arch/arm/boot/asl/exynos5250-arndale.acpi/xsdt.asl b/arch/arm/boot/asl/exynos5250-arndale.acpi/xsdt.asl index 057b5dc..be9f2c9 100644 --- a/arch/arm/boot/asl/exynos5250-arndale.acpi/xsdt.asl +++ b/arch/arm/boot/asl/exynos5250-arndale.acpi/xsdt.asl @@ -1,5 +1,5 @@ /* - * Copyright (c) 2013, Al Stone <ahs3(a)redhat.com> + * Copyright (c) 2013, Al Stone <al.stone(a)linaro.org> * * [XSDT] Extended System Description Table * Format: [ByteLength] FieldName : HexFieldValue @@ -11,7 +11,7 @@ [0004] Table Length : 00000064 [0001] Revision : 01 [0001] Checksum : 8B -[0006] Oem ID : "REDHAT" +[0006] Oem ID : "LINARO" [0008] Oem Table ID : "ARNDALE " [0004] Oem Revision : 00000014 [0004] Asl Compiler ID : "INTL" -- 1.8.1.4

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Linaro-acpi