From: Fu Wei fu.wei@linaro.org
This patchset: (1)Introduce Documentation/devicetree/bindings/watchdog/sbsa-gwdt.txt for FDT info of SBSA Generic Watchdog, and give two examples of adding SBSA Generic Watchdog device node into the dts files: foundation-v8.dts and amd-seattle-soc.dtsi.
(2)Introduce "pretimeout" into the watchdog framework, and update Documentation/watchdog/watchdog-kernel-api.txt to introduce: (1)the new elements in the watchdog_device and watchdog_ops struct; (2)the new API "watchdog_init_timeouts".
(3)Introduce ARM SBSA watchdog driver: a.Use linux kernel watchdog framework; b.Work with FDT on ARM64; c.Use "pretimeout" in watchdog framework; d.Support getting timeout and pretimeout from parameter and FDT at the driver init stage. e.In the first timeout, do panic to save system context; f.In the second stage, user can still feed the dog without cleaning WS0. By this feature, we can avoid the panic infinite loops, while backing up a large system context in a server. g.In the second stage, can trigger WS1 by setting pretimeout = 0 if necessary.
(4)Introduce ACPI GTDT parser: drivers/acpi/gtdt.c Parse SBSA Generic Watchdog Structure in GTDT table of ACPI, and create a platform device with that information. This platform device can be used by This Watchdog driver. drivers/clocksource/arm_arch_timer.c is simplified by this GTDT support.
This patchset has been tested with watchdog daemon (ACPI/FDT, module/build-in) on the following platforms: (1)ARM Foundation v8 model
Changelog: v7: Rebase to latest kernel version(4.2-rc7). Improve FDT support: geting resource by order, instead of name. According to the FDT support, Update the example dts file, gtdt.c and sbsa_gwdt.c. Pass the sparse test, and fix the warning. Fix the max_pretimeout and max_timeout value overflow bug. Delete the WCV output value.
v6: Improve the dtb example files: reduce the register frame size to 4K. Improve pretimeout support: (1) improve watchdog_init_timeouts function (2) rename watchdog_check_min_max_timeouts back to the original name (1) improve watchdog_timeout_invalid/watchdog_pretimeout_invalid Add the new features in the sbsa_gwdt driver: (1) In the second stage, user can feed the dog without cleaning WS0. (2) In the second stage, user can trigger WS1 by setting pretimeout = 0. (3) expand the max value of pretimeout, in case 10 second is not enough for a kdump kernel reboot in panic.
v5: Improve pretimeout support: (1)fix typo in documentation and comments. (2)fix the timeout limits validation bug. Simplify sbsa_gwdt driver: (1)integrate all the registers access functions into caller.
v4: Refactor GTDT support code: remove it from arch/arm64/kernel/acpi.c, put it into drivers/acpi/gtdt.c file. Integrate the GTDT code of drivers/clocksource/arm_arch_timer.c into drivers/acpi/gtdt.c. Improve pretimeout support, fix "pretimeout == 0" problem. Simplify sbsa_gwdt driver: (1)timeout/pretimeout limits setup; (2)keepalive function; (3)delete "clk == 0" check; (4)delete WS0 status bit check in interrupt routine; (5)sbsa_gwdt_set_wcv function.
v3: Delete "export arch_timer_get_rate" patch. Driver back to use arch_timer_get_cntfrq. Improve watchdog_init_timeouts function and update relevant documentation. Improve watchdog_timeout_invalid and watchdog_pretimeout_invalid. Improve foundation-v8.dts: delete the unnecessary tag of device node. Remove "ARM64 || COMPILE_TEST" from Kconfig. Add comments in arch/arm64/kernel/acpi.c Fix typoes and incorrect comments.
v2: Improve watchdog-kernel-api.txt documentation for pretimeout support. Export "arch_timer_get_rate" in arm_arch_timer.c. Add watchdog_init_timeouts API for pretimeout support in framework. Improve suspend and resume foundation in driver Improve timeout/pretimeout values init code in driver. Delete unnecessary items of the sbsa_gwdt struct and #define. Delete all unnecessary debug info in driver. Fix 64bit division bug. Use the arch_timer interface to get watchdog clock rate. Add MODULE_DEVICE_TABLE for platform device id. Fix typoes.
v1: The first version upstream patchset to linux mailing list.
Fu Wei (8): Documentation: add sbsa-gwdt.txt documentation ARM64: add SBSA Generic Watchdog device node in foundation-v8.dts ARM64: add SBSA Generic Watchdog device node in amd-seattle-soc.dtsi Watchdog: introdouce "pretimeout" into framework Watchdog: introduce ARM SBSA watchdog driver ACPI: add GTDT table parse driver into ACPI driver Watchdog: enable ACPI GTDT support for ARM SBSA watchdog driver clocksource: simplify ACPI code in arm_arch_timer.c
.../devicetree/bindings/watchdog/sbsa-gwdt.txt | 32 ++ Documentation/watchdog/watchdog-kernel-api.txt | 47 ++- arch/arm64/boot/dts/amd/amd-seattle-soc.dtsi | 8 + arch/arm64/boot/dts/arm/foundation-v8.dts | 7 + arch/arm64/kernel/time.c | 4 +- drivers/acpi/Kconfig | 9 + drivers/acpi/Makefile | 1 + drivers/acpi/gtdt.c | 178 ++++++++ drivers/clocksource/Kconfig | 1 + drivers/clocksource/arm_arch_timer.c | 60 +-- drivers/watchdog/Kconfig | 15 + drivers/watchdog/Makefile | 1 + drivers/watchdog/sbsa_gwdt.c | 459 +++++++++++++++++++++ drivers/watchdog/watchdog_core.c | 98 +++-- drivers/watchdog/watchdog_dev.c | 53 +++ include/clocksource/arm_arch_timer.h | 8 + include/linux/acpi.h | 5 + include/linux/clocksource.h | 4 +- include/linux/watchdog.h | 39 +- 19 files changed, 939 insertions(+), 90 deletions(-) create mode 100644 Documentation/devicetree/bindings/watchdog/sbsa-gwdt.txt create mode 100644 drivers/acpi/gtdt.c create mode 100644 drivers/watchdog/sbsa_gwdt.c
From: Fu Wei fu.wei@linaro.org
The sbsa-gwdt.txt documentation in devicetree/bindings/watchdog is for introducing SBSA(Server Base System Architecture) Generic Watchdog device node info into FDT.
Acked-by: Arnd Bergmann arnd@arndb.de Signed-off-by: Fu Wei fu.wei@linaro.org --- .../devicetree/bindings/watchdog/sbsa-gwdt.txt | 32 ++++++++++++++++++++++ 1 file changed, 32 insertions(+)
diff --git a/Documentation/devicetree/bindings/watchdog/sbsa-gwdt.txt b/Documentation/devicetree/bindings/watchdog/sbsa-gwdt.txt new file mode 100644 index 0000000..8b43640 --- /dev/null +++ b/Documentation/devicetree/bindings/watchdog/sbsa-gwdt.txt @@ -0,0 +1,32 @@ +* SBSA(Server Base System Architecture) Generic Watchdog + +The SBSA Generic Watchdog Timer is used for resetting the system after +two stages of timeout. +More details: ARM-DEN-0029 - Server Base System Architecture (SBSA) + +Required properties: +- compatible : Should at least contain "arm,sbsa-gwdt". + +- reg : Specifies base physical address of the two register frames + and length of memory mapped region, order: + 1: Watchdog control frame + 2: Refresh frame. + +- interrupts : Should at least contain WS0 interrupt, + the WS1 interrupt is optional, order: + 1: WS0 interrupt + 2: WS1 interrupt + +Optional properties +- timeout-sec : Watchdog pre-timeout and timeout values (in seconds). + The first is timeout values, then pre-timeout. + +Example for FVP Foundation Model v8: + +watchdog@2a440000 { + compatible = "arm,sbsa-gwdt"; + reg = <0x0 0x2a440000 0 0x1000>, + <0x0 0x2a450000 0 0x1000>; + interrupts = <0 27 4>; + timeout-sec = <10 5>; +};
From: Fu Wei fu.wei@linaro.org
This can be a example of adding SBSA Generic Watchdog device node into some dts files for the Soc which contains SBSA Generic Watchdog.
Acked-by: Arnd Bergmann arnd@arndb.de Signed-off-by: Fu Wei fu.wei@linaro.org --- arch/arm64/boot/dts/arm/foundation-v8.dts | 7 +++++++ 1 file changed, 7 insertions(+)
diff --git a/arch/arm64/boot/dts/arm/foundation-v8.dts b/arch/arm64/boot/dts/arm/foundation-v8.dts index 4eac8dc..824431f 100644 --- a/arch/arm64/boot/dts/arm/foundation-v8.dts +++ b/arch/arm64/boot/dts/arm/foundation-v8.dts @@ -237,4 +237,11 @@ }; }; }; + watchdog@2a440000 { + compatible = "arm,sbsa-gwdt"; + reg = <0x0 0x2a440000 0 0x1000>, + <0x0 0x2a450000 0 0x1000>; + interrupts = <0 27 4>; + timeout-sec = <10 5>; + }; };
On 08/25/15 at 01:01am, fu.wei@linaro.org wrote:
From: Fu Wei fu.wei@linaro.org
This can be a example of adding SBSA Generic Watchdog device node into some dts files for the Soc which contains SBSA Generic Watchdog.
Acked-by: Arnd Bergmann arnd@arndb.de Signed-off-by: Fu Wei fu.wei@linaro.org
arch/arm64/boot/dts/arm/foundation-v8.dts | 7 +++++++ 1 file changed, 7 insertions(+)
diff --git a/arch/arm64/boot/dts/arm/foundation-v8.dts b/arch/arm64/boot/dts/arm/foundation-v8.dts index 4eac8dc..824431f 100644 --- a/arch/arm64/boot/dts/arm/foundation-v8.dts +++ b/arch/arm64/boot/dts/arm/foundation-v8.dts @@ -237,4 +237,11 @@ }; }; };
- watchdog@2a440000 {
compatible = "arm,sbsa-gwdt";
reg = <0x0 0x2a440000 0 0x1000>,
<0x0 0x2a450000 0 0x1000>;
interrupts = <0 27 4>;
timeout-sec = <10 5>;
I assume 10 is timeout, 5 is pre timeout, but in the driver code the default value is 30/10, I think the example dts[i] should use same default values as in code.
BTW, for kdump kernel Pratyush is working on kdump on wdt enabled system. Basiclly we expect one configure longer timeout, and kick it in shorter period so we can get a chance to save vmcore. 10s sounds too short for the case..
- };
};
2.4.3
On 15/09/2015:04:43:32 PM, Dave Young wrote:
On 08/25/15 at 01:01am, fu.wei@linaro.org wrote:
From: Fu Wei fu.wei@linaro.org
This can be a example of adding SBSA Generic Watchdog device node into some dts files for the Soc which contains SBSA Generic Watchdog.
Acked-by: Arnd Bergmann arnd@arndb.de Signed-off-by: Fu Wei fu.wei@linaro.org
arch/arm64/boot/dts/arm/foundation-v8.dts | 7 +++++++ 1 file changed, 7 insertions(+)
diff --git a/arch/arm64/boot/dts/arm/foundation-v8.dts b/arch/arm64/boot/dts/arm/foundation-v8.dts index 4eac8dc..824431f 100644 --- a/arch/arm64/boot/dts/arm/foundation-v8.dts +++ b/arch/arm64/boot/dts/arm/foundation-v8.dts @@ -237,4 +237,11 @@ }; }; };
- watchdog@2a440000 {
compatible = "arm,sbsa-gwdt";
reg = <0x0 0x2a440000 0 0x1000>,
<0x0 0x2a450000 0 0x1000>;
interrupts = <0 27 4>;
timeout-sec = <10 5>;
I assume 10 is timeout, 5 is pre timeout, but in the driver code the default value is 30/10, I think the example dts[i] should use same default values as in code.
BTW, for kdump kernel Pratyush is working on kdump on wdt enabled system. Basiclly we expect one configure longer timeout, and kick it in shorter period so we can get a chance to save vmcore. 10s sounds too short for the case..
Specially if D-cache is not enabled in ARM64 kexec-tool/purgatory then its more than 2 min. Geoff has yet not agreed [1] to take D-cache support in purgatory.
[1] https://www.mail-archive.com/kexec@lists.infradead.org/msg12881.html
~Pratyush
Hi Pratyush,
On 15 September 2015 at 17:44, Pratyush Anand panand@redhat.com wrote:
On 15/09/2015:04:43:32 PM, Dave Young wrote:
On 08/25/15 at 01:01am, fu.wei@linaro.org wrote:
From: Fu Wei fu.wei@linaro.org
This can be a example of adding SBSA Generic Watchdog device node into some dts files for the Soc which contains SBSA Generic Watchdog.
Acked-by: Arnd Bergmann arnd@arndb.de Signed-off-by: Fu Wei fu.wei@linaro.org
arch/arm64/boot/dts/arm/foundation-v8.dts | 7 +++++++ 1 file changed, 7 insertions(+)
diff --git a/arch/arm64/boot/dts/arm/foundation-v8.dts b/arch/arm64/boot/dts/arm/foundation-v8.dts index 4eac8dc..824431f 100644 --- a/arch/arm64/boot/dts/arm/foundation-v8.dts +++ b/arch/arm64/boot/dts/arm/foundation-v8.dts @@ -237,4 +237,11 @@ }; }; };
- watchdog@2a440000 {
compatible = "arm,sbsa-gwdt";
reg = <0x0 0x2a440000 0 0x1000>,
<0x0 0x2a450000 0 0x1000>;
interrupts = <0 27 4>;
timeout-sec = <10 5>;
I assume 10 is timeout, 5 is pre timeout, but in the driver code the default value is 30/10, I think the example dts[i] should use same default values as in code.
BTW, for kdump kernel Pratyush is working on kdump on wdt enabled system. Basiclly we expect one configure longer timeout, and kick it in shorter period so we can get a chance to save vmcore. 10s sounds too short for the case..
Specially if D-cache is not enabled in ARM64 kexec-tool/purgatory then its more than 2 min. Geoff has yet not agreed [1] to take D-cache support in purgatory.
[1] https://www.mail-archive.com/kexec@lists.infradead.org/msg12881.html
Great thanks for your info. I thinks I may need to make the default pretimeout longer in example, may be at least 30s(for kdump kernel with D-cache)
any thought?
~Pratyush
Hi Dave,
On 15 September 2015 at 16:43, Dave Young dyoung@redhat.com wrote:
On 08/25/15 at 01:01am, fu.wei@linaro.org wrote:
From: Fu Wei fu.wei@linaro.org
This can be a example of adding SBSA Generic Watchdog device node into some dts files for the Soc which contains SBSA Generic Watchdog.
Acked-by: Arnd Bergmann arnd@arndb.de Signed-off-by: Fu Wei fu.wei@linaro.org
arch/arm64/boot/dts/arm/foundation-v8.dts | 7 +++++++ 1 file changed, 7 insertions(+)
diff --git a/arch/arm64/boot/dts/arm/foundation-v8.dts b/arch/arm64/boot/dts/arm/foundation-v8.dts index 4eac8dc..824431f 100644 --- a/arch/arm64/boot/dts/arm/foundation-v8.dts +++ b/arch/arm64/boot/dts/arm/foundation-v8.dts @@ -237,4 +237,11 @@ }; }; };
watchdog@2a440000 {
compatible = "arm,sbsa-gwdt";
reg = <0x0 0x2a440000 0 0x1000>,
<0x0 0x2a450000 0 0x1000>;
interrupts = <0 27 4>;
timeout-sec = <10 5>;
I assume 10 is timeout, 5 is pre timeout, but in the driver code the default value is 30/10, I think the example dts[i] should use same default values as in code.
yes, that is good idea, will make them to be the same. :-)
BTW, for kdump kernel Pratyush is working on kdump on wdt enabled system. Basiclly we expect one configure longer timeout, and kick it in shorter period so we can get a chance to save vmcore. 10s sounds too short for the case..
Thanks for your info.
So that means: we may need that long timeout support in the second stage. WOR is not enough for the second stage in most of kdump case.
};
};
2.4.3
From: Fu Wei fu.wei@linaro.org
This can be a example of adding SBSA Generic Watchdog device node into some dts files for the Soc which contains SBSA Generic Watchdog.
Acked-by: Arnd Bergmann arnd@arndb.de Acked-by: Suravee Suthikulpanit Suravee.Suthikulpanit@amd.com Tested-by: Suravee Suthikulpanit Suravee.Suthikulpanit@amd.com Signed-off-by: Fu Wei fu.wei@linaro.org --- arch/arm64/boot/dts/amd/amd-seattle-soc.dtsi | 8 ++++++++ 1 file changed, 8 insertions(+)
diff --git a/arch/arm64/boot/dts/amd/amd-seattle-soc.dtsi b/arch/arm64/boot/dts/amd/amd-seattle-soc.dtsi index 2874d92..259430f 100644 --- a/arch/arm64/boot/dts/amd/amd-seattle-soc.dtsi +++ b/arch/arm64/boot/dts/amd/amd-seattle-soc.dtsi @@ -84,6 +84,14 @@ clock-names = "uartclk", "apb_pclk"; };
+ watchdog0: watchdog@e0bb0000 { + compatible = "arm,sbsa-gwdt"; + reg = <0x0 0xe0bc0000 0 0x1000>, + <0x0 0xe0bb0000 0 0x1000>; + interrupts = <0 337 4>; + timeout-sec = <10 5>; + }; + spi0: ssp@e1020000 { status = "disabled"; compatible = "arm,pl022", "arm,primecell";
From: Fu Wei fu.wei@linaro.org
Also update Documentation/watchdog/watchdog-kernel-api.txt to introduce: (1)the new elements in the watchdog_device and watchdog_ops struct; (2)the new API "watchdog_init_timeouts"
Reasons: (1)kernel already has two watchdog drivers are using "pretimeout": drivers/char/ipmi/ipmi_watchdog.c drivers/watchdog/kempld_wdt.c(but the definition is different) (2)some other drivers are going to use this: ARM SBSA Generic Watchdog
Signed-off-by: Fu Wei fu.wei@linaro.org --- Documentation/watchdog/watchdog-kernel-api.txt | 47 ++++++++++-- drivers/watchdog/watchdog_core.c | 98 ++++++++++++++++++-------- drivers/watchdog/watchdog_dev.c | 53 ++++++++++++++ include/linux/watchdog.h | 39 ++++++++-- 4 files changed, 200 insertions(+), 37 deletions(-)
diff --git a/Documentation/watchdog/watchdog-kernel-api.txt b/Documentation/watchdog/watchdog-kernel-api.txt index d8b0d33..1fadeb9 100644 --- a/Documentation/watchdog/watchdog-kernel-api.txt +++ b/Documentation/watchdog/watchdog-kernel-api.txt @@ -53,6 +53,9 @@ struct watchdog_device { unsigned int timeout; unsigned int min_timeout; unsigned int max_timeout; + unsigned int pretimeout; + unsigned int min_pretimeout; + unsigned int max_pretimeout; void *driver_data; struct mutex lock; unsigned long status; @@ -75,6 +78,9 @@ It contains following fields: * timeout: the watchdog timer's timeout value (in seconds). * min_timeout: the watchdog timer's minimum timeout value (in seconds). * max_timeout: the watchdog timer's maximum timeout value (in seconds). +* pretimeout: the watchdog timer's pretimeout value (in seconds). +* min_pretimeout: the watchdog timer's minimum pretimeout value (in seconds). +* max_pretimeout: the watchdog timer's maximum pretimeout value (in seconds). * bootstatus: status of the device after booting (reported with watchdog WDIOF_* status bits). * driver_data: a pointer to the drivers private data of a watchdog device. @@ -99,6 +105,7 @@ struct watchdog_ops { int (*ping)(struct watchdog_device *); unsigned int (*status)(struct watchdog_device *); int (*set_timeout)(struct watchdog_device *, unsigned int); + int (*set_pretimeout)(struct watchdog_device *, unsigned int); unsigned int (*get_timeleft)(struct watchdog_device *); void (*ref)(struct watchdog_device *); void (*unref)(struct watchdog_device *); @@ -160,9 +167,19 @@ they are supported. These optional routines/operations are: and -EIO for "could not write value to the watchdog". On success this routine should set the timeout value of the watchdog_device to the achieved timeout value (which may be different from the requested one - because the watchdog does not necessarily has a 1 second resolution). + because the watchdog does not necessarily has a 1 second resolution; + If the driver supports pretimeout, then the timeout value must be greater + than that). (Note: the WDIOF_SETTIMEOUT needs to be set in the options field of the watchdog's info structure). +* set_pretimeout: this routine checks and changes the pretimeout of the + watchdog timer device. It returns 0 on success, -EINVAL for "parameter out of + range" and -EIO for "could not write value to the watchdog". On success this + routine should set the pretimeout value of the watchdog_device to the + achieved pretimeout value (which may be different from the requested one + because the watchdog does not necessarily has a 1 second resolution). + (Note: the WDIOF_PRETIMEOUT needs to be set in the options field of the + watchdog's info structure). * get_timeleft: this routines returns the time that's left before a reset. * ref: the operation that calls kref_get on the kref of a dynamically allocated watchdog_device struct. @@ -226,8 +243,28 @@ extern int watchdog_init_timeout(struct watchdog_device *wdd, unsigned int timeout_parm, struct device *dev);
The watchdog_init_timeout function allows you to initialize the timeout field -using the module timeout parameter or by retrieving the timeout-sec property from -the device tree (if the module timeout parameter is invalid). Best practice is -to set the default timeout value as timeout value in the watchdog_device and -then use this function to set the user "preferred" timeout value. +using the module timeout parameter or by retrieving the first element of +the timeout-sec property from the device tree (if the module timeout parameter +is invalid). Best practice is to set the default timeout value as timeout value +in the watchdog_device and then use this function to set the user "preferred" +timeout value. +This routine returns zero on success and a negative errno code for failure. + +Some watchdog timers have two stage of timeouts (timeout and pretimeout), +to initialize the timeout and pretimeout fields at the same time, the following +function can be used: + +int watchdog_init_timeouts(struct watchdog_device *wdd, + unsigned int pretimeout_parm, + unsigned int timeout_parm, + struct device *dev); + +The watchdog_init_timeouts function allows you to initialize the pretimeout and +timeout fields using the module pretimeout and timeout parameter or by +retrieving the elements in the timeout-sec property (the first element is for +timeout, the second one is for pretimeout) from the device tree (if the module +pretimeout and timeout parameter are invalid). +Best practice is to set the default pretimeout and timeout value as pretimeout +and timeout value in the watchdog_device and then use this function to set the +user "preferred" pretimeout value. This routine returns zero on success and a negative errno code for failure. diff --git a/drivers/watchdog/watchdog_core.c b/drivers/watchdog/watchdog_core.c index 1a80594..280c399 100644 --- a/drivers/watchdog/watchdog_core.c +++ b/drivers/watchdog/watchdog_core.c @@ -85,57 +85,99 @@ static void watchdog_deferred_registration_del(struct watchdog_device *wdd) static void watchdog_check_min_max_timeout(struct watchdog_device *wdd) { /* - * Check that we have valid min and max timeout values, if - * not reset them both to 0 (=not used or unknown) + * Check that we have valid min and max pretimeout and timeout values, + * if not, reset them all to 0 (=not used or unknown) */ - if (wdd->min_timeout > wdd->max_timeout) { - pr_info("Invalid min and max timeout values, resetting to 0!\n"); + if (wdd->min_pretimeout > wdd->max_pretimeout || + wdd->min_timeout > wdd->max_timeout || + wdd->min_timeout < wdd->min_pretimeout || + wdd->max_timeout < wdd->max_pretimeout) { + pr_info("Invalid min or max timeouts, resetting to 0\n"); + wdd->min_pretimeout = 0; + wdd->max_pretimeout = 0; wdd->min_timeout = 0; wdd->max_timeout = 0; } }
/** - * watchdog_init_timeout() - initialize the timeout field + * watchdog_init_timeouts() - initialize the pretimeout and timeout field + * @pretimeout_parm: pretimeout module parameter * @timeout_parm: timeout module parameter * @dev: Device that stores the timeout-sec property * - * Initialize the timeout field of the watchdog_device struct with either the - * timeout module parameter (if it is valid value) or the timeout-sec property - * (only if it is a valid value and the timeout_parm is out of bounds). - * If none of them are valid then we keep the old value (which should normally - * be the default timeout value. + * Initialize the pretimeout and timeout field of the watchdog_device struct + * with both the pretimeout and timeout module parameters (if they are valid) or + * the timeout-sec property (only if they are valid and the pretimeout_parm or + * timeout_parm is out of bounds). If one of them is invalid, then we keep + * the old value (which should normally be the default timeout value). * * A zero is returned on success and -EINVAL for failure. */ -int watchdog_init_timeout(struct watchdog_device *wdd, - unsigned int timeout_parm, struct device *dev) +int watchdog_init_timeouts(struct watchdog_device *wdd, + unsigned int pretimeout_parm, + unsigned int timeout_parm, + struct device *dev) { - unsigned int t = 0; - int ret = 0; + int ret = 0, length = 0; + u32 timeouts[2] = {0}; + struct property *prop;
watchdog_check_min_max_timeout(wdd);
- /* try to get the timeout module parameter first */ - if (!watchdog_timeout_invalid(wdd, timeout_parm) && timeout_parm) { - wdd->timeout = timeout_parm; - return ret; - } - if (timeout_parm) + /* + * Try to get the pretimeout module parameter first. + * Note: zero is a valid value for pretimeout. + */ + if (watchdog_pretimeout_invalid(wdd, pretimeout_parm)) + ret = -EINVAL; + + /* + * Try to get the timeout module parameter, + * if it's valid and pretimeout is valid(ret == 0), + * assignment and return zero. Otherwise, try dtb. + */ + if (timeout_parm && !ret) { + if (!watchdog_timeout_invalid(wdd, timeout_parm)) { + wdd->timeout = timeout_parm; + wdd->pretimeout = pretimeout_parm; + return 0; + } ret = -EINVAL; + }
- /* try to get the timeout_sec property */ + /* + * Either at least one of the module parameters is invalid, + * or timeout_parm is 0. Try to get the timeout_sec property. + */ if (dev == NULL || dev->of_node == NULL) return ret; - of_property_read_u32(dev->of_node, "timeout-sec", &t); - if (!watchdog_timeout_invalid(wdd, t) && t) - wdd->timeout = t; - else - ret = -EINVAL;
- return ret; + prop = of_find_property(dev->of_node, "timeout-sec", &length); + if (prop && length > 0 && length <= sizeof(u32) * 2) { + of_property_read_u32_array(dev->of_node, + "timeout-sec", timeouts, + length / sizeof(u32)); + if (length == sizeof(u32) * 2) { + if (watchdog_pretimeout_invalid(wdd, timeouts[1])) + return -EINVAL; + ret = 0; + } else { + ret = -EINVAL; + } + + if (!watchdog_timeout_invalid(wdd, timeouts[0]) && + timeouts[0]) { + wdd->timeout = timeouts[0]; + if (!ret) + wdd->pretimeout = timeouts[1]; + return 0; + } + } + + return -EINVAL; } -EXPORT_SYMBOL_GPL(watchdog_init_timeout); +EXPORT_SYMBOL_GPL(watchdog_init_timeouts);
static int __watchdog_register_device(struct watchdog_device *wdd) { diff --git a/drivers/watchdog/watchdog_dev.c b/drivers/watchdog/watchdog_dev.c index 6aaefba..af0777e 100644 --- a/drivers/watchdog/watchdog_dev.c +++ b/drivers/watchdog/watchdog_dev.c @@ -218,6 +218,38 @@ out_timeout: }
/* + * watchdog_set_pretimeout: set the watchdog timer pretimeout + * @wddev: the watchdog device to set the timeout for + * @pretimeout: pretimeout to set in seconds + */ + +static int watchdog_set_pretimeout(struct watchdog_device *wddev, + unsigned int pretimeout) +{ + int err; + + if (!wddev->ops->set_pretimeout || + !(wddev->info->options & WDIOF_PRETIMEOUT)) + return -EOPNOTSUPP; + + if (watchdog_pretimeout_invalid(wddev, pretimeout)) + return -EINVAL; + + mutex_lock(&wddev->lock); + + if (test_bit(WDOG_UNREGISTERED, &wddev->status)) { + err = -ENODEV; + goto out_pretimeout; + } + + err = wddev->ops->set_pretimeout(wddev, pretimeout); + +out_pretimeout: + mutex_unlock(&wddev->lock); + return err; +} + +/* * watchdog_get_timeleft: wrapper to get the time left before a reboot * @wddev: the watchdog device to get the remaining time from * @timeleft: the time that's left @@ -388,6 +420,27 @@ static long watchdog_ioctl(struct file *file, unsigned int cmd, if (wdd->timeout == 0) return -EOPNOTSUPP; return put_user(wdd->timeout, p); + case WDIOC_SETPRETIMEOUT: + /* check if we support the pretimeout */ + if (!(wdd->info->options & WDIOF_PRETIMEOUT)) + return -EOPNOTSUPP; + if (get_user(val, p)) + return -EFAULT; + err = watchdog_set_pretimeout(wdd, val); + if (err < 0) + return err; + /* + * If the watchdog is active then we send a keepalive ping + * to make sure that the watchdog keeps running (and if + * possible that it takes the new pretimeout) + */ + watchdog_ping(wdd); + /* Fall */ + case WDIOC_GETPRETIMEOUT: + /* check if we support the pretimeout */ + if (wdd->info->options & WDIOF_PRETIMEOUT) + return put_user(wdd->pretimeout, p); + return -EOPNOTSUPP; case WDIOC_GETTIMELEFT: err = watchdog_get_timeleft(wdd, &val); if (err) diff --git a/include/linux/watchdog.h b/include/linux/watchdog.h index f47fead..bf2d9e9 100644 --- a/include/linux/watchdog.h +++ b/include/linux/watchdog.h @@ -25,6 +25,7 @@ struct watchdog_device; * @ping: The routine that sends a keepalive ping to the watchdog device. * @status: The routine that shows the status of the watchdog device. * @set_timeout:The routine for setting the watchdog devices timeout value. + * @set_pretimeout:The routine for setting the watchdog devices pretimeout value * @get_timeleft:The routine that get's the time that's left before a reset. * @ref: The ref operation for dyn. allocated watchdog_device structs * @unref: The unref operation for dyn. allocated watchdog_device structs @@ -44,6 +45,7 @@ struct watchdog_ops { int (*ping)(struct watchdog_device *); unsigned int (*status)(struct watchdog_device *); int (*set_timeout)(struct watchdog_device *, unsigned int); + int (*set_pretimeout)(struct watchdog_device *, unsigned int); unsigned int (*get_timeleft)(struct watchdog_device *); void (*ref)(struct watchdog_device *); void (*unref)(struct watchdog_device *); @@ -62,6 +64,9 @@ struct watchdog_ops { * @timeout: The watchdog devices timeout value. * @min_timeout:The watchdog devices minimum timeout value. * @max_timeout:The watchdog devices maximum timeout value. + * @pretimeout: The watchdog devices pretimeout value. + * @min_pretimeout:The watchdog devices minimum pretimeout value. + * @max_pretimeout:The watchdog devices maximum pretimeout value. * @driver-data:Pointer to the drivers private data. * @lock: Lock for watchdog core internal use only. * @status: Field that contains the devices internal status bits. @@ -88,6 +93,9 @@ struct watchdog_device { unsigned int timeout; unsigned int min_timeout; unsigned int max_timeout; + unsigned int pretimeout; + unsigned int min_pretimeout; + unsigned int max_pretimeout; void *driver_data; struct mutex lock; unsigned long status; @@ -119,8 +127,22 @@ static inline void watchdog_set_nowayout(struct watchdog_device *wdd, bool noway /* Use the following function to check if a timeout value is invalid */ static inline bool watchdog_timeout_invalid(struct watchdog_device *wdd, unsigned int t) { - return ((wdd->max_timeout != 0) && - (t < wdd->min_timeout || t > wdd->max_timeout)); + return (wdd->max_timeout && + (t < wdd->min_timeout || t > wdd->max_timeout)) || + (wdd->pretimeout && t <= wdd->pretimeout); +} + +/* + * Use the following function to check if a pretimeout value is invalid. + * It can be "0", that means we don't use pretimeout. + * This function returns false, when pretimeout is 0. + */ +static inline bool watchdog_pretimeout_invalid(struct watchdog_device *wdd, + unsigned int t) +{ + return t && ((wdd->max_pretimeout && + (t < wdd->min_pretimeout || t > wdd->max_pretimeout)) || + (wdd->timeout && t >= wdd->timeout)); }
/* Use the following functions to manipulate watchdog driver specific data */ @@ -135,8 +157,17 @@ static inline void *watchdog_get_drvdata(struct watchdog_device *wdd) }
/* drivers/watchdog/watchdog_core.c */ -extern int watchdog_init_timeout(struct watchdog_device *wdd, - unsigned int timeout_parm, struct device *dev); +int watchdog_init_timeouts(struct watchdog_device *wdd, + unsigned int pretimeout_parm, + unsigned int timeout_parm, + struct device *dev); +static inline int watchdog_init_timeout(struct watchdog_device *wdd, + unsigned int timeout_parm, + struct device *dev) +{ + return watchdog_init_timeouts(wdd, 0, timeout_parm, dev); +} + extern int watchdog_register_device(struct watchdog_device *); extern void watchdog_unregister_device(struct watchdog_device *);
From: Fu Wei fu.wei@linaro.org
This driver bases on linux kernel watchdog framework, and use "pretimeout" in the framework. It supports getting timeout and pretimeout from parameter and FDT at the driver init stage. In first timeout, the interrupt routine run panic to save system context.
Signed-off-by: Fu Wei fu.wei@linaro.org --- drivers/watchdog/Kconfig | 14 ++ drivers/watchdog/Makefile | 1 + drivers/watchdog/sbsa_gwdt.c | 459 +++++++++++++++++++++++++++++++++++++++++++ 3 files changed, 474 insertions(+)
diff --git a/drivers/watchdog/Kconfig b/drivers/watchdog/Kconfig index 241fafd..b2734f0 100644 --- a/drivers/watchdog/Kconfig +++ b/drivers/watchdog/Kconfig @@ -173,6 +173,20 @@ config ARM_SP805_WATCHDOG ARM Primecell SP805 Watchdog timer. This will reboot your system when the timeout is reached.
+config ARM_SBSA_WATCHDOG + tristate "ARM SBSA Generic Watchdog" + depends on ARM64 + depends on ARM_ARCH_TIMER + select WATCHDOG_CORE + help + ARM SBSA Generic Watchdog. This watchdog has two Watchdog timeouts. + The first timeout will trigger a panic; the second timeout will + trigger a system reset. + More details: ARM DEN0029B - Server Base System Architecture (SBSA) + + To compile this driver as module, choose M here: The module + will be called sbsa_gwdt. + config AT91RM9200_WATCHDOG tristate "AT91RM9200 watchdog" depends on SOC_AT91RM9200 && MFD_SYSCON diff --git a/drivers/watchdog/Makefile b/drivers/watchdog/Makefile index 59ea9a1..be8e7c5 100644 --- a/drivers/watchdog/Makefile +++ b/drivers/watchdog/Makefile @@ -30,6 +30,7 @@ obj-$(CONFIG_USBPCWATCHDOG) += pcwd_usb.o
# ARM Architecture obj-$(CONFIG_ARM_SP805_WATCHDOG) += sp805_wdt.o +obj-$(CONFIG_ARM_SBSA_WATCHDOG) += sbsa_gwdt.o obj-$(CONFIG_AT91RM9200_WATCHDOG) += at91rm9200_wdt.o obj-$(CONFIG_AT91SAM9X_WATCHDOG) += at91sam9_wdt.o obj-$(CONFIG_CADENCE_WATCHDOG) += cadence_wdt.o diff --git a/drivers/watchdog/sbsa_gwdt.c b/drivers/watchdog/sbsa_gwdt.c new file mode 100644 index 0000000..7ae45cc --- /dev/null +++ b/drivers/watchdog/sbsa_gwdt.c @@ -0,0 +1,459 @@ +/* + * SBSA(Server Base System Architecture) Generic Watchdog driver + * + * Copyright (c) 2015, Linaro Ltd. + * Author: Fu Wei fu.wei@linaro.org + * Suravee Suthikulpanit Suravee.Suthikulpanit@amd.com + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License 2 as published + * by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * The SBSA Generic watchdog driver is compatible with the pretimeout + * concept of Linux kernel. + * The timeout and pretimeout are determined by WCV or WOR. + * The first watch period is set by writing WCV directly, that can + * support more than 10s timeout at the maximum system counter + * frequency (400MHz). + * When WS0 is triggered, the second watch period (pretimeout) is + * determined by one of these registers: + * (1)WOR: 32bit register, this gives a maximum watch period of + * around 10s at the maximum system counter frequency. It's loaded + * automatically by hardware. + * (2)WCV: If the pretimeout value is greater then "max_wor_timeout", + * it will be loaded in WS0 interrupt routine. If system is in + * ws0_mode (reboot by kexec/kdump in panic with watchdog enabled + * and WS0 == true), the ping operation will only reload WCV. + * More details about the hardware specification of this device: + * ARM DEN0029B - Server Base System Architecture (SBSA) + * + * Kernel/API: P------------------| pretimeout + * |----------------------------------------T timeout + * SBSA GWDT: P---WOR (or WCV)---WS1 pretimeout + * |-------WCV----------WS0~~~(ws0_mode)~~~~T timeout + */ + +#include <linux/io.h> +#include <linux/interrupt.h> +#include <linux/module.h> +#include <linux/moduleparam.h> +#include <linux/of.h> +#include <linux/of_device.h> +#include <linux/platform_device.h> +#include <linux/uaccess.h> +#include <linux/watchdog.h> +#include <asm/arch_timer.h> + +/* SBSA Generic Watchdog register definitions */ +/* refresh frame */ +#define SBSA_GWDT_WRR 0x000 + +/* control frame */ +#define SBSA_GWDT_WCS 0x000 +#define SBSA_GWDT_WOR 0x008 +#define SBSA_GWDT_WCV_LO 0x010 +#define SBSA_GWDT_WCV_HI 0x014 + +/* refresh/control frame */ +#define SBSA_GWDT_W_IIDR 0xfcc +#define SBSA_GWDT_IDR 0xfd0 + +/* Watchdog Control and Status Register */ +#define SBSA_GWDT_WCS_EN BIT(0) +#define SBSA_GWDT_WCS_WS0 BIT(1) +#define SBSA_GWDT_WCS_WS1 BIT(2) + +/** + * struct sbsa_gwdt - Internal representation of the SBSA GWDT + * @wdd: kernel watchdog_device structure + * @clk: store the System Counter clock frequency, in Hz. + * @ws0_mode: indicate the system boot in the second stage timeout. + * @max_wor_timeout: the maximum timeout value for WOR (in seconds). + * @refresh_base: Virtual address of the watchdog refresh frame + * @control_base: Virtual address of the watchdog control frame + */ +struct sbsa_gwdt { + struct watchdog_device wdd; + u32 clk; + bool ws0_mode; + int max_wor_timeout; + void __iomem *refresh_base; + void __iomem *control_base; +}; + +#define to_sbsa_gwdt(e) container_of(e, struct sbsa_gwdt, wdd) + +#define DEFAULT_TIMEOUT 30 /* seconds, the 1st + 2nd watch periods*/ +#define DEFAULT_PRETIMEOUT 10 /* seconds, the 2nd watch period*/ + +static unsigned int timeout; +module_param(timeout, uint, 0); +MODULE_PARM_DESC(timeout, + "Watchdog timeout in seconds. (>=0, default=" + __MODULE_STRING(DEFAULT_TIMEOUT) ")"); + +static unsigned int pretimeout; +module_param(pretimeout, uint, 0); +MODULE_PARM_DESC(pretimeout, + "Watchdog pretimeout in seconds. (>=0, default=" + __MODULE_STRING(DEFAULT_PRETIMEOUT) ")"); + +static bool nowayout = WATCHDOG_NOWAYOUT; +module_param(nowayout, bool, S_IRUGO); +MODULE_PARM_DESC(nowayout, + "Watchdog cannot be stopped once started (default=" + __MODULE_STRING(WATCHDOG_NOWAYOUT) ")"); + +/* + * help functions for accessing 64bit WCV register + */ +static u64 sbsa_gwdt_get_wcv(struct watchdog_device *wdd) +{ + u32 wcv_lo, wcv_hi; + struct sbsa_gwdt *gwdt = to_sbsa_gwdt(wdd); + + do { + wcv_hi = readl_relaxed(gwdt->control_base + SBSA_GWDT_WCV_HI); + wcv_lo = readl_relaxed(gwdt->control_base + SBSA_GWDT_WCV_LO); + } while (wcv_hi != readl_relaxed(gwdt->control_base + + SBSA_GWDT_WCV_HI)); + + return (((u64)wcv_hi << 32) | wcv_lo); +} + +static void sbsa_gwdt_set_wcv(struct watchdog_device *wdd, unsigned int t) +{ + struct sbsa_gwdt *gwdt = to_sbsa_gwdt(wdd); + u64 wcv; + + wcv = arch_counter_get_cntvct() + (u64)t * gwdt->clk; + + writel_relaxed(upper_32_bits(wcv), + gwdt->control_base + SBSA_GWDT_WCV_HI); + writel_relaxed(lower_32_bits(wcv), + gwdt->control_base + SBSA_GWDT_WCV_LO); +} + +/* + * inline functions for reloading 64bit WCV register + */ +static inline void reload_pretimeout_to_wcv(struct watchdog_device *wdd) +{ + sbsa_gwdt_set_wcv(wdd, wdd->pretimeout); +} + +static inline void reload_first_stage_to_wcv(struct watchdog_device *wdd) +{ + sbsa_gwdt_set_wcv(wdd, wdd->timeout - wdd->pretimeout); +} + +/* + * watchdog operation functions + */ +static int sbsa_gwdt_set_timeout(struct watchdog_device *wdd, + unsigned int timeout) +{ + wdd->timeout = timeout; + + return 0; +} + +static int sbsa_gwdt_set_pretimeout(struct watchdog_device *wdd, + unsigned int pretimeout) +{ + struct sbsa_gwdt *gwdt = to_sbsa_gwdt(wdd); + u32 wor; + + wdd->pretimeout = pretimeout; + + /* If ws0_mode == true, we won't touch WOR */ + if (!gwdt->ws0_mode) { + if (!pretimeout) + /* + * If pretimeout is 0, it gives driver a timeslot (1s) + * to update WCV after an explicit refresh + * (sbsa_gwdt_start) + */ + wor = gwdt->clk; + else + if (pretimeout > gwdt->max_wor_timeout) + wor = U32_MAX; + else + wor = pretimeout * gwdt->clk; + + /* wtite WOR, that will cause an explicit watchdog refresh */ + writel_relaxed(wor, gwdt->control_base + SBSA_GWDT_WOR); + } + + return 0; +} + +static unsigned int sbsa_gwdt_get_timeleft(struct watchdog_device *wdd) +{ + struct sbsa_gwdt *gwdt = to_sbsa_gwdt(wdd); + u64 timeleft = sbsa_gwdt_get_wcv(wdd) - arch_counter_get_cntvct(); + + do_div(timeleft, gwdt->clk); + + return timeleft; +} + +static int sbsa_gwdt_keepalive(struct watchdog_device *wdd) +{ + struct sbsa_gwdt *gwdt = to_sbsa_gwdt(wdd); + + if (gwdt->ws0_mode) + reload_pretimeout_to_wcv(wdd); + else + reload_first_stage_to_wcv(wdd); + + return 0; +} + +static int sbsa_gwdt_start(struct watchdog_device *wdd) +{ + struct sbsa_gwdt *gwdt = to_sbsa_gwdt(wdd); + + /* If ws0_mode == true, the watchdog is enabled */ + if (!gwdt->ws0_mode) + /* writing WCS will cause an explicit watchdog refresh */ + writel_relaxed(SBSA_GWDT_WCS_EN, + gwdt->control_base + SBSA_GWDT_WCS); + + return sbsa_gwdt_keepalive(wdd); +} + +static int sbsa_gwdt_stop(struct watchdog_device *wdd) +{ + struct sbsa_gwdt *gwdt = to_sbsa_gwdt(wdd); + + writel_relaxed(0, gwdt->control_base + SBSA_GWDT_WCS); + /* + * Writing WCS has caused an explicit watchdog refresh. + * Both watchdog signals are deasserted, so clean ws0_mode flag. + */ + gwdt->ws0_mode = false; + + return 0; +} + +static irqreturn_t sbsa_gwdt_interrupt(int irq, void *dev_id) +{ + struct sbsa_gwdt *gwdt = (struct sbsa_gwdt *)dev_id; + struct watchdog_device *wdd = &gwdt->wdd; + + /* We don't use pretimeout, trigger WS1 now */ + if (!wdd->pretimeout) + sbsa_gwdt_set_wcv(wdd, 0); + + /* + * The pretimeout is valid, go panic + * If pretimeout is greater then "max_wor_timeout", + * reload the right value to WCV, then panic + */ + if (wdd->pretimeout > gwdt->max_wor_timeout) + reload_pretimeout_to_wcv(wdd); + panic("SBSA Watchdog pre-timeout"); + + return IRQ_HANDLED; +} + +static struct watchdog_info sbsa_gwdt_info = { + .identity = "SBSA Generic Watchdog", + .options = WDIOF_SETTIMEOUT | + WDIOF_KEEPALIVEPING | + WDIOF_MAGICCLOSE | + WDIOF_PRETIMEOUT | + WDIOF_CARDRESET, +}; + +static struct watchdog_ops sbsa_gwdt_ops = { + .owner = THIS_MODULE, + .start = sbsa_gwdt_start, + .stop = sbsa_gwdt_stop, + .ping = sbsa_gwdt_keepalive, + .set_timeout = sbsa_gwdt_set_timeout, + .set_pretimeout = sbsa_gwdt_set_pretimeout, + .get_timeleft = sbsa_gwdt_get_timeleft, +}; + +static int sbsa_gwdt_probe(struct platform_device *pdev) +{ + void __iomem *rf_base, *cf_base; + struct device *dev = &pdev->dev; + struct watchdog_device *wdd; + struct sbsa_gwdt *gwdt; + struct resource *res; + int ret, irq; + u32 status; + + gwdt = devm_kzalloc(dev, sizeof(*gwdt), GFP_KERNEL); + if (!gwdt) + return -ENOMEM; + platform_set_drvdata(pdev, gwdt); + + res = platform_get_resource(pdev, IORESOURCE_MEM, 0); + cf_base = devm_ioremap_resource(dev, res); + if (IS_ERR(cf_base)) + return PTR_ERR(cf_base); + + res = platform_get_resource(pdev, IORESOURCE_MEM, 1); + rf_base = devm_ioremap_resource(dev, res); + if (IS_ERR(rf_base)) + return PTR_ERR(rf_base); + + irq = platform_get_irq(pdev, 0); + if (irq < 0) { + dev_err(dev, "unable to get ws0 interrupt.\n"); + return irq; + } + + /* + * Get the frequency of system counter from the cp15 interface of ARM + * Generic timer. We don't need to check it, because if it returns "0", + * system would panic in very early stage. + */ + gwdt->clk = arch_timer_get_cntfrq(); + gwdt->refresh_base = rf_base; + gwdt->control_base = cf_base; + gwdt->max_wor_timeout = U32_MAX / gwdt->clk; + gwdt->ws0_mode = false; + + wdd = &gwdt->wdd; + wdd->parent = dev; + wdd->info = &sbsa_gwdt_info; + wdd->ops = &sbsa_gwdt_ops; + watchdog_set_drvdata(wdd, gwdt); + watchdog_set_nowayout(wdd, nowayout); + + wdd->min_pretimeout = 0; + wdd->min_timeout = 1; + + /* + * Because the maximum of gwdt->clk is 400MHz and the maximum of WCV is + * U64_MAX, so the result of (U64_MAX / gwdt->clk) is always greater + * than U32_MAX. And the maximum of "unsigned int" is U32_MAX on ARM64. + * So we set the maximum value of pretimeout and timeout below. + */ + wdd->max_pretimeout = U32_MAX - 1; + wdd->max_timeout = U32_MAX; + + wdd->pretimeout = DEFAULT_PRETIMEOUT; + wdd->timeout = DEFAULT_TIMEOUT; + watchdog_init_timeouts(wdd, pretimeout, timeout, dev); + + status = readl_relaxed(gwdt->control_base + SBSA_GWDT_WCS); + if (status & SBSA_GWDT_WCS_WS1) { + dev_warn(dev, "System reset by WDT.\n"); + wdd->bootstatus |= WDIOF_CARDRESET; + } else if (status == (SBSA_GWDT_WCS_WS0 | SBSA_GWDT_WCS_EN)) { + gwdt->ws0_mode = true; + } + + ret = devm_request_irq(dev, irq, sbsa_gwdt_interrupt, 0, + pdev->name, gwdt); + if (ret) { + dev_err(dev, "unable to request IRQ %d\n", irq); + return ret; + } + + ret = watchdog_register_device(wdd); + if (ret) + return ret; + + /* If ws0_mode == true, the line won't update WOR */ + sbsa_gwdt_set_pretimeout(wdd, wdd->pretimeout); + + /* + * If watchdog is already enabled, do a ping operation + * to keep system running + */ + if (status & SBSA_GWDT_WCS_EN) + sbsa_gwdt_keepalive(wdd); + + dev_info(dev, "Initialized with %ds timeout, %ds pretimeout @ %u Hz%s\n", + wdd->timeout, wdd->pretimeout, gwdt->clk, + status & SBSA_GWDT_WCS_EN ? + gwdt->ws0_mode ? " [second stage]" : " [enabled]" : + ""); + + return 0; +} + +static void sbsa_gwdt_shutdown(struct platform_device *pdev) +{ + struct sbsa_gwdt *gwdt = platform_get_drvdata(pdev); + + sbsa_gwdt_stop(&gwdt->wdd); +} + +static int sbsa_gwdt_remove(struct platform_device *pdev) +{ + struct sbsa_gwdt *gwdt = platform_get_drvdata(pdev); + + watchdog_unregister_device(&gwdt->wdd); + + return 0; +} + +/* Disable watchdog if it is active during suspend */ +static int __maybe_unused sbsa_gwdt_suspend(struct device *dev) +{ + struct sbsa_gwdt *gwdt = dev_get_drvdata(dev); + + if (watchdog_active(&gwdt->wdd)) + sbsa_gwdt_stop(&gwdt->wdd); + + return 0; +} + +/* Enable watchdog and configure it if necessary */ +static int __maybe_unused sbsa_gwdt_resume(struct device *dev) +{ + struct sbsa_gwdt *gwdt = dev_get_drvdata(dev); + + if (watchdog_active(&gwdt->wdd)) + sbsa_gwdt_start(&gwdt->wdd); + + return 0; +} + +static const struct dev_pm_ops sbsa_gwdt_pm_ops = { + SET_SYSTEM_SLEEP_PM_OPS(sbsa_gwdt_suspend, sbsa_gwdt_resume) +}; + +static const struct of_device_id sbsa_gwdt_of_match[] = { + { .compatible = "arm,sbsa-gwdt", }, + {}, +}; +MODULE_DEVICE_TABLE(of, sbsa_gwdt_of_match); + +static const struct platform_device_id sbsa_gwdt_pdev_match[] = { + { .name = "sbsa-gwdt", }, + {}, +}; +MODULE_DEVICE_TABLE(platform, sbsa_gwdt_pdev_match); + +static struct platform_driver sbsa_gwdt_driver = { + .driver = { + .name = "sbsa-gwdt", + .pm = &sbsa_gwdt_pm_ops, + .of_match_table = sbsa_gwdt_of_match, + }, + .probe = sbsa_gwdt_probe, + .remove = sbsa_gwdt_remove, + .shutdown = sbsa_gwdt_shutdown, + .id_table = sbsa_gwdt_pdev_match, +}; + +module_platform_driver(sbsa_gwdt_driver); + +MODULE_DESCRIPTION("SBSA Generic Watchdog Driver"); +MODULE_AUTHOR("Fu Wei fu.wei@linaro.org"); +MODULE_AUTHOR("Suravee Suthikulpanit Suravee.Suthikulpanit@amd.com"); +MODULE_LICENSE("GPL v2");
On 08/24/2015 01:01 PM, fu.wei@linaro.org wrote:
- /*
* Get the frequency of system counter from the cp15 interface of ARM
* Generic timer. We don't need to check it, because if it returns "0",
* system would panic in very early stage.
*/
- gwdt->clk = arch_timer_get_cntfrq();
Just thinking out loud...
What happens later if we virtualize this device within KVM/QEMU/Xen and then live migrate to another system in which the frequency changes?
Jon.
On Thu, Sep 10, 2015 at 06:29:53PM -0400, Jon Masters wrote:
On 08/24/2015 01:01 PM, fu.wei@linaro.org wrote:
- /*
* Get the frequency of system counter from the cp15 interface of ARM
* Generic timer. We don't need to check it, because if it returns "0",
* system would panic in very early stage.
*/
- gwdt->clk = arch_timer_get_cntfrq();
Just thinking out loud...
What happens later if we virtualize this device within KVM/QEMU/Xen and then live migrate to another system in which the frequency changes?
I don't know, but I would suspect that we might end up in all kinds of trouble if clocks can change like that, and not just in this driver. Many drivers make the assumption that clock rates are not changed under the hood. If it can happen, shouldn't there be a callback into the drivers using the affected clock(s) ?
Also, it seems to me that changing a clock like that would be inherently unsafe. For example, what will happen if the system is stopped and migrated right after the clock frequency is read, but before the returned value is used ? Can that happen ? Or does it only happen during suspend/resume cycles, if it happens ?
Thanks, Guenter
On 09/10/2015 03:29 PM, Jon Masters wrote:
On 08/24/2015 01:01 PM, fu.wei@linaro.org wrote:
- /*
* Get the frequency of system counter from the cp15 interface of ARM
* Generic timer. We don't need to check it, because if it returns "0",
* system would panic in very early stage.
*/
- gwdt->clk = arch_timer_get_cntfrq();
Just thinking out loud...
What happens later if we virtualize this device within KVM/QEMU/Xen and then live migrate to another system in which the frequency changes?
Thinking about it, this scenario would cause severe trouble. I think clocks (like I would assume pretty much all other hardware parameters / registers) need to be virtualized and must not change.
Example: clock is set to 100 kHz on original system, and 400 kHz on new system. Timeout is set to 30s, and registers are programmed accordingly. User space sends heartbeats every 15 seconds.
In this scenario, the watchdog would time out after 30/4 = 7.5 seconds on the new system, or in other words almost immediately.
This would be even worse if the original system had a clock of, say, 10 kHz and the new system would use 400 kHz. This just doesn't work.
Guenter
Hi Guenter, Jon,
On 11 September 2015 at 10:50, Guenter Roeck linux@roeck-us.net wrote:
On 09/10/2015 03:29 PM, Jon Masters wrote:
On 08/24/2015 01:01 PM, fu.wei@linaro.org wrote:
/*
* Get the frequency of system counter from the cp15 interface of
ARM
* Generic timer. We don't need to check it, because if it
returns "0",
* system would panic in very early stage.
*/
gwdt->clk = arch_timer_get_cntfrq();
Just thinking out loud...
What happens later if we virtualize this device within KVM/QEMU/Xen and then live migrate to another system in which the frequency changes?
Thinking about it, this scenario would cause severe trouble. I think clocks (like I would assume pretty much all other hardware parameters / registers) need to be virtualized and must not change.
Example: clock is set to 100 kHz on original system, and 400 kHz on new system. Timeout is set to 30s, and registers are programmed accordingly. User space sends heartbeats every 15 seconds.
In this scenario, the watchdog would time out after 30/4 = 7.5 seconds on the new system, or in other words almost immediately.
This would be even worse if the original system had a clock of, say, 10 kHz and the new system would use 400 kHz. This just doesn't work.
I have rechecked the SBSA spec and "Architecture Reference Manual(ARM)", I think we don't need to worry about "the frequency changes", let me explain this, but if I misunderstand something, please correct me!
(1) what is the clock source (or reference) of SBSA watchdog timer? SBSA spec(2.3) has answered this well at page 23: --------------------------- The Watchdog uses the Generic Timer system count value as the timebase against which the decision to trigger an interrupt is made. ---------------------------
(2) Can the frequency of the Generic Timer System counter be changed? At ARMv8 ARM, D6.1.1 System counter : --------------------------- The Generic Timer provides a system counter with the following specification: Frequency Increments at *a fixed frequency*, typically in the range 1-50MHz. Can support one or more alternative operating modes in which it increments by larger amounts at a lower frequency, typically for power-saving.
To support lower-power operating modes, the counter can increment by larger amounts at a lower frequency. For example, a 10MHz system counter might either increment either: • By 1 at 10MHz. • By 500 at 20kHz, when the system lowers the clock frequency, to reduce power consumption. In this case, the counter must support transitions between high-frequency, high-precision operation, and lower-frequency, lower-precision operation, without any impact on the required accuracy of the counter. --------------------------- So even the frequency of the Generic Timer System counter be changed by some reason(typically for power-saving), this won't affect the timeout(and pretimeout) of watchdog, the actual time will be always right.
*we were talking about real hardware above. Now we think about virtualization.* (3) if the virtual watchdog device in KVM/QEMU/Xen is migrated to another system in which the frequency changes, will it affect the "dog feeding procedure"?
I don't think so. if the frequency changes, the frequency of System counter is changed. But in ARM system, System counter is a global reference for all clocks or timers(per-cpu and Memory-mapped). So if System counter is getting faster, everything in this virtual machine is getting faster, and vice versa.
Now we use the example above if clock is set to 100 kHz on original system, and 400 kHz on new system. Timeout is set to 30s, and registers are programmed accordingly. User space sends heartbeats every 15 seconds. In this scenario, On the new system, the watchdog would time out after 30/4 = 7.5 seconds. * User space sends heartbeats every 15/4 = 3.25 second now , but NOT 15 seconds.* If everything goes well, system will keep running.
Hope I understand the question correctly, please correct me if I miss something or said anything wrong.
Great thanks for your feedback!
Guenter
On 08/25/15 at 01:01am, fu.wei@linaro.org wrote:
From: Fu Wei fu.wei@linaro.org
This driver bases on linux kernel watchdog framework, and use "pretimeout" in the framework. It supports getting timeout and pretimeout from parameter and FDT at the driver init stage. In first timeout, the interrupt routine run panic to save system context.
Signed-off-by: Fu Wei fu.wei@linaro.org
drivers/watchdog/Kconfig | 14 ++ drivers/watchdog/Makefile | 1 + drivers/watchdog/sbsa_gwdt.c | 459 +++++++++++++++++++++++++++++++++++++++++++ 3 files changed, 474 insertions(+)
diff --git a/drivers/watchdog/Kconfig b/drivers/watchdog/Kconfig index 241fafd..b2734f0 100644 --- a/drivers/watchdog/Kconfig +++ b/drivers/watchdog/Kconfig @@ -173,6 +173,20 @@ config ARM_SP805_WATCHDOG ARM Primecell SP805 Watchdog timer. This will reboot your system when the timeout is reached. +config ARM_SBSA_WATCHDOG
- tristate "ARM SBSA Generic Watchdog"
- depends on ARM64
- depends on ARM_ARCH_TIMER
- select WATCHDOG_CORE
- help
ARM SBSA Generic Watchdog. This watchdog has two Watchdog timeouts.
The first timeout will trigger a panic; the second timeout will
trigger a system reset.
More details: ARM DEN0029B - Server Base System Architecture (SBSA)
To compile this driver as module, choose M here: The module
will be called sbsa_gwdt.
config AT91RM9200_WATCHDOG tristate "AT91RM9200 watchdog" depends on SOC_AT91RM9200 && MFD_SYSCON diff --git a/drivers/watchdog/Makefile b/drivers/watchdog/Makefile index 59ea9a1..be8e7c5 100644 --- a/drivers/watchdog/Makefile +++ b/drivers/watchdog/Makefile @@ -30,6 +30,7 @@ obj-$(CONFIG_USBPCWATCHDOG) += pcwd_usb.o # ARM Architecture obj-$(CONFIG_ARM_SP805_WATCHDOG) += sp805_wdt.o +obj-$(CONFIG_ARM_SBSA_WATCHDOG) += sbsa_gwdt.o obj-$(CONFIG_AT91RM9200_WATCHDOG) += at91rm9200_wdt.o obj-$(CONFIG_AT91SAM9X_WATCHDOG) += at91sam9_wdt.o obj-$(CONFIG_CADENCE_WATCHDOG) += cadence_wdt.o diff --git a/drivers/watchdog/sbsa_gwdt.c b/drivers/watchdog/sbsa_gwdt.c new file mode 100644 index 0000000..7ae45cc --- /dev/null +++ b/drivers/watchdog/sbsa_gwdt.c @@ -0,0 +1,459 @@ +/*
- SBSA(Server Base System Architecture) Generic Watchdog driver
- Copyright (c) 2015, Linaro Ltd.
- Author: Fu Wei fu.wei@linaro.org
Suravee Suthikulpanit <Suravee.Suthikulpanit@amd.com>
- This program is free software; you can redistribute it and/or modify
- it under the terms of the GNU General Public License 2 as published
- by the Free Software Foundation.
- This program is distributed in the hope that it will be useful,
- but WITHOUT ANY WARRANTY; without even the implied warranty of
- MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- GNU General Public License for more details.
- The SBSA Generic watchdog driver is compatible with the pretimeout
- concept of Linux kernel.
- The timeout and pretimeout are determined by WCV or WOR.
- The first watch period is set by writing WCV directly, that can
- support more than 10s timeout at the maximum system counter
- frequency (400MHz).
- When WS0 is triggered, the second watch period (pretimeout) is
- determined by one of these registers:
- (1)WOR: 32bit register, this gives a maximum watch period of
- around 10s at the maximum system counter frequency. It's loaded
- automatically by hardware.
- (2)WCV: If the pretimeout value is greater then "max_wor_timeout",
- it will be loaded in WS0 interrupt routine. If system is in
- ws0_mode (reboot by kexec/kdump in panic with watchdog enabled
- and WS0 == true), the ping operation will only reload WCV.
Below is the field comment about ws0_mode, it says ws0_mode is only for rebooting in second stage timeout, but kexec/kdump can reboot in either first or second stage * @ws0_mode: indicate the system boot in the second stage timeout.
- More details about the hardware specification of this device:
- ARM DEN0029B - Server Base System Architecture (SBSA)
- Kernel/API: P------------------| pretimeout
|----------------------------------------T timeout
- SBSA GWDT: P---WOR (or WCV)---WS1 pretimeout
|-------WCV----------WS0~~~(ws0_mode)~~~~T timeout
- */
+#include <linux/io.h> +#include <linux/interrupt.h> +#include <linux/module.h> +#include <linux/moduleparam.h> +#include <linux/of.h> +#include <linux/of_device.h> +#include <linux/platform_device.h> +#include <linux/uaccess.h> +#include <linux/watchdog.h> +#include <asm/arch_timer.h>
+/* SBSA Generic Watchdog register definitions */ +/* refresh frame */ +#define SBSA_GWDT_WRR 0x000
+/* control frame */ +#define SBSA_GWDT_WCS 0x000 +#define SBSA_GWDT_WOR 0x008 +#define SBSA_GWDT_WCV_LO 0x010 +#define SBSA_GWDT_WCV_HI 0x014
+/* refresh/control frame */ +#define SBSA_GWDT_W_IIDR 0xfcc +#define SBSA_GWDT_IDR 0xfd0
+/* Watchdog Control and Status Register */ +#define SBSA_GWDT_WCS_EN BIT(0) +#define SBSA_GWDT_WCS_WS0 BIT(1) +#define SBSA_GWDT_WCS_WS1 BIT(2)
+/**
- struct sbsa_gwdt - Internal representation of the SBSA GWDT
- @wdd: kernel watchdog_device structure
- @clk: store the System Counter clock frequency, in Hz.
- @ws0_mode: indicate the system boot in the second stage timeout.
- @max_wor_timeout: the maximum timeout value for WOR (in seconds).
- @refresh_base: Virtual address of the watchdog refresh frame
- @control_base: Virtual address of the watchdog control frame
- */
+struct sbsa_gwdt {
- struct watchdog_device wdd;
- u32 clk;
- bool ws0_mode;
- int max_wor_timeout;
- void __iomem *refresh_base;
- void __iomem *control_base;
+};
+#define to_sbsa_gwdt(e) container_of(e, struct sbsa_gwdt, wdd)
+#define DEFAULT_TIMEOUT 30 /* seconds, the 1st + 2nd watch periods*/ +#define DEFAULT_PRETIMEOUT 10 /* seconds, the 2nd watch period*/
+static unsigned int timeout; +module_param(timeout, uint, 0); +MODULE_PARM_DESC(timeout,
"Watchdog timeout in seconds. (>=0, default="
__MODULE_STRING(DEFAULT_TIMEOUT) ")");
+static unsigned int pretimeout; +module_param(pretimeout, uint, 0); +MODULE_PARM_DESC(pretimeout,
"Watchdog pretimeout in seconds. (>=0, default="
__MODULE_STRING(DEFAULT_PRETIMEOUT) ")");
+static bool nowayout = WATCHDOG_NOWAYOUT; +module_param(nowayout, bool, S_IRUGO); +MODULE_PARM_DESC(nowayout,
"Watchdog cannot be stopped once started (default="
__MODULE_STRING(WATCHDOG_NOWAYOUT) ")");
+/*
- help functions for accessing 64bit WCV register
- */
+static u64 sbsa_gwdt_get_wcv(struct watchdog_device *wdd) +{
- u32 wcv_lo, wcv_hi;
- struct sbsa_gwdt *gwdt = to_sbsa_gwdt(wdd);
- do {
wcv_hi = readl_relaxed(gwdt->control_base + SBSA_GWDT_WCV_HI);
wcv_lo = readl_relaxed(gwdt->control_base + SBSA_GWDT_WCV_LO);
- } while (wcv_hi != readl_relaxed(gwdt->control_base +
SBSA_GWDT_WCV_HI));
- return (((u64)wcv_hi << 32) | wcv_lo);
+}
+static void sbsa_gwdt_set_wcv(struct watchdog_device *wdd, unsigned int t) +{
- struct sbsa_gwdt *gwdt = to_sbsa_gwdt(wdd);
- u64 wcv;
- wcv = arch_counter_get_cntvct() + (u64)t * gwdt->clk;
- writel_relaxed(upper_32_bits(wcv),
gwdt->control_base + SBSA_GWDT_WCV_HI);
- writel_relaxed(lower_32_bits(wcv),
gwdt->control_base + SBSA_GWDT_WCV_LO);
+}
+/*
- inline functions for reloading 64bit WCV register
- */
+static inline void reload_pretimeout_to_wcv(struct watchdog_device *wdd) +{
- sbsa_gwdt_set_wcv(wdd, wdd->pretimeout);
+}
+static inline void reload_first_stage_to_wcv(struct watchdog_device *wdd) +{
- sbsa_gwdt_set_wcv(wdd, wdd->timeout - wdd->pretimeout);
+}
+/*
- watchdog operation functions
- */
+static int sbsa_gwdt_set_timeout(struct watchdog_device *wdd,
unsigned int timeout)
+{
- wdd->timeout = timeout;
- return 0;
+}
+static int sbsa_gwdt_set_pretimeout(struct watchdog_device *wdd,
unsigned int pretimeout)
+{
- struct sbsa_gwdt *gwdt = to_sbsa_gwdt(wdd);
- u32 wor;
- wdd->pretimeout = pretimeout;
- /* If ws0_mode == true, we won't touch WOR */
- if (!gwdt->ws0_mode) {
if (!pretimeout)
/*
* If pretimeout is 0, it gives driver a timeslot (1s)
* to update WCV after an explicit refresh
* (sbsa_gwdt_start)
*/
wor = gwdt->clk;
else
if (pretimeout > gwdt->max_wor_timeout)
wor = U32_MAX;
else
wor = pretimeout * gwdt->clk;
/* wtite WOR, that will cause an explicit watchdog refresh */
writel_relaxed(wor, gwdt->control_base + SBSA_GWDT_WOR);
- }
- return 0;
+}
+static unsigned int sbsa_gwdt_get_timeleft(struct watchdog_device *wdd) +{
- struct sbsa_gwdt *gwdt = to_sbsa_gwdt(wdd);
- u64 timeleft = sbsa_gwdt_get_wcv(wdd) - arch_counter_get_cntvct();
- do_div(timeleft, gwdt->clk);
- return timeleft;
+}
+static int sbsa_gwdt_keepalive(struct watchdog_device *wdd) +{
- struct sbsa_gwdt *gwdt = to_sbsa_gwdt(wdd);
- if (gwdt->ws0_mode)
reload_pretimeout_to_wcv(wdd);
- else
reload_first_stage_to_wcv(wdd);
- return 0;
+}
+static int sbsa_gwdt_start(struct watchdog_device *wdd) +{
- struct sbsa_gwdt *gwdt = to_sbsa_gwdt(wdd);
- /* If ws0_mode == true, the watchdog is enabled */
- if (!gwdt->ws0_mode)
/* writing WCS will cause an explicit watchdog refresh */
writel_relaxed(SBSA_GWDT_WCS_EN,
gwdt->control_base + SBSA_GWDT_WCS);
- return sbsa_gwdt_keepalive(wdd);
+}
+static int sbsa_gwdt_stop(struct watchdog_device *wdd) +{
- struct sbsa_gwdt *gwdt = to_sbsa_gwdt(wdd);
- writel_relaxed(0, gwdt->control_base + SBSA_GWDT_WCS);
- /*
* Writing WCS has caused an explicit watchdog refresh.
* Both watchdog signals are deasserted, so clean ws0_mode flag.
*/
- gwdt->ws0_mode = false;
- return 0;
+}
+static irqreturn_t sbsa_gwdt_interrupt(int irq, void *dev_id) +{
- struct sbsa_gwdt *gwdt = (struct sbsa_gwdt *)dev_id;
- struct watchdog_device *wdd = &gwdt->wdd;
- /* We don't use pretimeout, trigger WS1 now */
- if (!wdd->pretimeout)
sbsa_gwdt_set_wcv(wdd, 0);
- /*
* The pretimeout is valid, go panic
* If pretimeout is greater then "max_wor_timeout",
* reload the right value to WCV, then panic
*/
- if (wdd->pretimeout > gwdt->max_wor_timeout)
reload_pretimeout_to_wcv(wdd);
- panic("SBSA Watchdog pre-timeout");
- return IRQ_HANDLED;
+}
+static struct watchdog_info sbsa_gwdt_info = {
- .identity = "SBSA Generic Watchdog",
- .options = WDIOF_SETTIMEOUT |
WDIOF_KEEPALIVEPING |
WDIOF_MAGICCLOSE |
WDIOF_PRETIMEOUT |
WDIOF_CARDRESET,
+};
+static struct watchdog_ops sbsa_gwdt_ops = {
- .owner = THIS_MODULE,
- .start = sbsa_gwdt_start,
- .stop = sbsa_gwdt_stop,
- .ping = sbsa_gwdt_keepalive,
- .set_timeout = sbsa_gwdt_set_timeout,
- .set_pretimeout = sbsa_gwdt_set_pretimeout,
- .get_timeleft = sbsa_gwdt_get_timeleft,
+};
+static int sbsa_gwdt_probe(struct platform_device *pdev) +{
- void __iomem *rf_base, *cf_base;
- struct device *dev = &pdev->dev;
- struct watchdog_device *wdd;
- struct sbsa_gwdt *gwdt;
- struct resource *res;
- int ret, irq;
- u32 status;
- gwdt = devm_kzalloc(dev, sizeof(*gwdt), GFP_KERNEL);
- if (!gwdt)
return -ENOMEM;
- platform_set_drvdata(pdev, gwdt);
- res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
- cf_base = devm_ioremap_resource(dev, res);
- if (IS_ERR(cf_base))
return PTR_ERR(cf_base);
- res = platform_get_resource(pdev, IORESOURCE_MEM, 1);
- rf_base = devm_ioremap_resource(dev, res);
- if (IS_ERR(rf_base))
return PTR_ERR(rf_base);
- irq = platform_get_irq(pdev, 0);
- if (irq < 0) {
dev_err(dev, "unable to get ws0 interrupt.\n");
return irq;
- }
- /*
* Get the frequency of system counter from the cp15 interface of ARM
* Generic timer. We don't need to check it, because if it returns "0",
* system would panic in very early stage.
*/
- gwdt->clk = arch_timer_get_cntfrq();
- gwdt->refresh_base = rf_base;
- gwdt->control_base = cf_base;
- gwdt->max_wor_timeout = U32_MAX / gwdt->clk;
- gwdt->ws0_mode = false;
- wdd = &gwdt->wdd;
- wdd->parent = dev;
- wdd->info = &sbsa_gwdt_info;
- wdd->ops = &sbsa_gwdt_ops;
- watchdog_set_drvdata(wdd, gwdt);
- watchdog_set_nowayout(wdd, nowayout);
- wdd->min_pretimeout = 0;
- wdd->min_timeout = 1;
- /*
* Because the maximum of gwdt->clk is 400MHz and the maximum of WCV is
* U64_MAX, so the result of (U64_MAX / gwdt->clk) is always greater
* than U32_MAX. And the maximum of "unsigned int" is U32_MAX on ARM64.
* So we set the maximum value of pretimeout and timeout below.
*/
- wdd->max_pretimeout = U32_MAX - 1;
- wdd->max_timeout = U32_MAX;
- wdd->pretimeout = DEFAULT_PRETIMEOUT;
- wdd->timeout = DEFAULT_TIMEOUT;
- watchdog_init_timeouts(wdd, pretimeout, timeout, dev);
- status = readl_relaxed(gwdt->control_base + SBSA_GWDT_WCS);
- if (status & SBSA_GWDT_WCS_WS1) {
dev_warn(dev, "System reset by WDT.\n");
wdd->bootstatus |= WDIOF_CARDRESET;
- } else if (status == (SBSA_GWDT_WCS_WS0 | SBSA_GWDT_WCS_EN)) {
gwdt->ws0_mode = true;
- }
- ret = devm_request_irq(dev, irq, sbsa_gwdt_interrupt, 0,
pdev->name, gwdt);
- if (ret) {
dev_err(dev, "unable to request IRQ %d\n", irq);
return ret;
- }
- ret = watchdog_register_device(wdd);
- if (ret)
return ret;
- /* If ws0_mode == true, the line won't update WOR */
- sbsa_gwdt_set_pretimeout(wdd, wdd->pretimeout);
- /*
* If watchdog is already enabled, do a ping operation
* to keep system running
*/
- if (status & SBSA_GWDT_WCS_EN)
sbsa_gwdt_keepalive(wdd);
- dev_info(dev, "Initialized with %ds timeout, %ds pretimeout @ %u Hz%s\n",
wdd->timeout, wdd->pretimeout, gwdt->clk,
status & SBSA_GWDT_WCS_EN ?
gwdt->ws0_mode ? " [second stage]" : " [enabled]" :
"");
- return 0;
+}
+static void sbsa_gwdt_shutdown(struct platform_device *pdev) +{
- struct sbsa_gwdt *gwdt = platform_get_drvdata(pdev);
- sbsa_gwdt_stop(&gwdt->wdd);
+}
+static int sbsa_gwdt_remove(struct platform_device *pdev) +{
- struct sbsa_gwdt *gwdt = platform_get_drvdata(pdev);
- watchdog_unregister_device(&gwdt->wdd);
- return 0;
+}
+/* Disable watchdog if it is active during suspend */ +static int __maybe_unused sbsa_gwdt_suspend(struct device *dev) +{
- struct sbsa_gwdt *gwdt = dev_get_drvdata(dev);
- if (watchdog_active(&gwdt->wdd))
sbsa_gwdt_stop(&gwdt->wdd);
- return 0;
+}
+/* Enable watchdog and configure it if necessary */ +static int __maybe_unused sbsa_gwdt_resume(struct device *dev) +{
- struct sbsa_gwdt *gwdt = dev_get_drvdata(dev);
- if (watchdog_active(&gwdt->wdd))
sbsa_gwdt_start(&gwdt->wdd);
- return 0;
+}
+static const struct dev_pm_ops sbsa_gwdt_pm_ops = {
- SET_SYSTEM_SLEEP_PM_OPS(sbsa_gwdt_suspend, sbsa_gwdt_resume)
+};
+static const struct of_device_id sbsa_gwdt_of_match[] = {
- { .compatible = "arm,sbsa-gwdt", },
- {},
+}; +MODULE_DEVICE_TABLE(of, sbsa_gwdt_of_match);
+static const struct platform_device_id sbsa_gwdt_pdev_match[] = {
- { .name = "sbsa-gwdt", },
- {},
+}; +MODULE_DEVICE_TABLE(platform, sbsa_gwdt_pdev_match);
+static struct platform_driver sbsa_gwdt_driver = {
- .driver = {
.name = "sbsa-gwdt",
.pm = &sbsa_gwdt_pm_ops,
.of_match_table = sbsa_gwdt_of_match,
- },
- .probe = sbsa_gwdt_probe,
- .remove = sbsa_gwdt_remove,
- .shutdown = sbsa_gwdt_shutdown,
- .id_table = sbsa_gwdt_pdev_match,
+};
+module_platform_driver(sbsa_gwdt_driver);
+MODULE_DESCRIPTION("SBSA Generic Watchdog Driver"); +MODULE_AUTHOR("Fu Wei fu.wei@linaro.org"); +MODULE_AUTHOR("Suravee Suthikulpanit Suravee.Suthikulpanit@amd.com");
+MODULE_LICENSE("GPL v2");
2.4.3
Hi Dave,
On 15 September 2015 at 16:38, Dave Young dyoung@redhat.com wrote:
On 08/25/15 at 01:01am, fu.wei@linaro.org wrote:
From: Fu Wei fu.wei@linaro.org
This driver bases on linux kernel watchdog framework, and use "pretimeout" in the framework. It supports getting timeout and pretimeout from parameter and FDT at the driver init stage. In first timeout, the interrupt routine run panic to save system context.
Signed-off-by: Fu Wei fu.wei@linaro.org
drivers/watchdog/Kconfig | 14 ++ drivers/watchdog/Makefile | 1 + drivers/watchdog/sbsa_gwdt.c | 459 +++++++++++++++++++++++++++++++++++++++++++ 3 files changed, 474 insertions(+)
diff --git a/drivers/watchdog/Kconfig b/drivers/watchdog/Kconfig index 241fafd..b2734f0 100644 --- a/drivers/watchdog/Kconfig +++ b/drivers/watchdog/Kconfig @@ -173,6 +173,20 @@ config ARM_SP805_WATCHDOG ARM Primecell SP805 Watchdog timer. This will reboot your system when the timeout is reached.
+config ARM_SBSA_WATCHDOG
tristate "ARM SBSA Generic Watchdog"
depends on ARM64
depends on ARM_ARCH_TIMER
select WATCHDOG_CORE
help
ARM SBSA Generic Watchdog. This watchdog has two Watchdog timeouts.
The first timeout will trigger a panic; the second timeout will
trigger a system reset.
More details: ARM DEN0029B - Server Base System Architecture (SBSA)
To compile this driver as module, choose M here: The module
will be called sbsa_gwdt.
config AT91RM9200_WATCHDOG tristate "AT91RM9200 watchdog" depends on SOC_AT91RM9200 && MFD_SYSCON diff --git a/drivers/watchdog/Makefile b/drivers/watchdog/Makefile index 59ea9a1..be8e7c5 100644 --- a/drivers/watchdog/Makefile +++ b/drivers/watchdog/Makefile @@ -30,6 +30,7 @@ obj-$(CONFIG_USBPCWATCHDOG) += pcwd_usb.o
# ARM Architecture obj-$(CONFIG_ARM_SP805_WATCHDOG) += sp805_wdt.o +obj-$(CONFIG_ARM_SBSA_WATCHDOG) += sbsa_gwdt.o obj-$(CONFIG_AT91RM9200_WATCHDOG) += at91rm9200_wdt.o obj-$(CONFIG_AT91SAM9X_WATCHDOG) += at91sam9_wdt.o obj-$(CONFIG_CADENCE_WATCHDOG) += cadence_wdt.o diff --git a/drivers/watchdog/sbsa_gwdt.c b/drivers/watchdog/sbsa_gwdt.c new file mode 100644 index 0000000..7ae45cc --- /dev/null +++ b/drivers/watchdog/sbsa_gwdt.c @@ -0,0 +1,459 @@ +/*
- SBSA(Server Base System Architecture) Generic Watchdog driver
- Copyright (c) 2015, Linaro Ltd.
- Author: Fu Wei fu.wei@linaro.org
Suravee Suthikulpanit <Suravee.Suthikulpanit@amd.com>
- This program is free software; you can redistribute it and/or modify
- it under the terms of the GNU General Public License 2 as published
- by the Free Software Foundation.
- This program is distributed in the hope that it will be useful,
- but WITHOUT ANY WARRANTY; without even the implied warranty of
- MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- GNU General Public License for more details.
- The SBSA Generic watchdog driver is compatible with the pretimeout
- concept of Linux kernel.
- The timeout and pretimeout are determined by WCV or WOR.
- The first watch period is set by writing WCV directly, that can
- support more than 10s timeout at the maximum system counter
- frequency (400MHz).
- When WS0 is triggered, the second watch period (pretimeout) is
- determined by one of these registers:
- (1)WOR: 32bit register, this gives a maximum watch period of
- around 10s at the maximum system counter frequency. It's loaded
- automatically by hardware.
- (2)WCV: If the pretimeout value is greater then "max_wor_timeout",
- it will be loaded in WS0 interrupt routine. If system is in
- ws0_mode (reboot by kexec/kdump in panic with watchdog enabled
- and WS0 == true), the ping operation will only reload WCV.
Below is the field comment about ws0_mode, it says ws0_mode is only for rebooting in second stage timeout, but kexec/kdump can reboot in either first or second stage
Great thanks for your feedback.
yes, if kexec/kdump reboot the system before the WS0, ws0_mode may not be set. in this case, if WS0 is triggered during the reboot(AFAIK, panic will disable irq, and in the early boot stage of system, irq is disabled, too.), ws0_mode will be set at the next "open" in kdump kernel if WS0 haven't triggered until the watchdog is opened again in kdump kernel , ws0_mode won't be set.
ws0_mode doesn't indicate if the system is in the kdump kernel, it indicates that if WS0 is triggered, when the watchdog is initialized.
Do I answer your question?
- @ws0_mode: indicate the system boot in the second stage timeout.
- More details about the hardware specification of this device:
- ARM DEN0029B - Server Base System Architecture (SBSA)
- Kernel/API: P------------------| pretimeout
|----------------------------------------T timeout
- SBSA GWDT: P---WOR (or WCV)---WS1 pretimeout
|-------WCV----------WS0~~~(ws0_mode)~~~~T timeout
- */
+#include <linux/io.h> +#include <linux/interrupt.h> +#include <linux/module.h> +#include <linux/moduleparam.h> +#include <linux/of.h> +#include <linux/of_device.h> +#include <linux/platform_device.h> +#include <linux/uaccess.h> +#include <linux/watchdog.h> +#include <asm/arch_timer.h>
+/* SBSA Generic Watchdog register definitions */ +/* refresh frame */ +#define SBSA_GWDT_WRR 0x000
+/* control frame */ +#define SBSA_GWDT_WCS 0x000 +#define SBSA_GWDT_WOR 0x008 +#define SBSA_GWDT_WCV_LO 0x010 +#define SBSA_GWDT_WCV_HI 0x014
+/* refresh/control frame */ +#define SBSA_GWDT_W_IIDR 0xfcc +#define SBSA_GWDT_IDR 0xfd0
+/* Watchdog Control and Status Register */ +#define SBSA_GWDT_WCS_EN BIT(0) +#define SBSA_GWDT_WCS_WS0 BIT(1) +#define SBSA_GWDT_WCS_WS1 BIT(2)
+/**
- struct sbsa_gwdt - Internal representation of the SBSA GWDT
- @wdd: kernel watchdog_device structure
- @clk: store the System Counter clock frequency, in Hz.
- @ws0_mode: indicate the system boot in the second stage timeout.
- @max_wor_timeout: the maximum timeout value for WOR (in seconds).
- @refresh_base: Virtual address of the watchdog refresh frame
- @control_base: Virtual address of the watchdog control frame
- */
+struct sbsa_gwdt {
struct watchdog_device wdd;
u32 clk;
bool ws0_mode;
int max_wor_timeout;
void __iomem *refresh_base;
void __iomem *control_base;
+};
+#define to_sbsa_gwdt(e) container_of(e, struct sbsa_gwdt, wdd)
+#define DEFAULT_TIMEOUT 30 /* seconds, the 1st + 2nd watch periods*/ +#define DEFAULT_PRETIMEOUT 10 /* seconds, the 2nd watch period*/
+static unsigned int timeout; +module_param(timeout, uint, 0); +MODULE_PARM_DESC(timeout,
"Watchdog timeout in seconds. (>=0, default="
__MODULE_STRING(DEFAULT_TIMEOUT) ")");
+static unsigned int pretimeout; +module_param(pretimeout, uint, 0); +MODULE_PARM_DESC(pretimeout,
"Watchdog pretimeout in seconds. (>=0, default="
__MODULE_STRING(DEFAULT_PRETIMEOUT) ")");
+static bool nowayout = WATCHDOG_NOWAYOUT; +module_param(nowayout, bool, S_IRUGO); +MODULE_PARM_DESC(nowayout,
"Watchdog cannot be stopped once started (default="
__MODULE_STRING(WATCHDOG_NOWAYOUT) ")");
+/*
- help functions for accessing 64bit WCV register
- */
+static u64 sbsa_gwdt_get_wcv(struct watchdog_device *wdd) +{
u32 wcv_lo, wcv_hi;
struct sbsa_gwdt *gwdt = to_sbsa_gwdt(wdd);
do {
wcv_hi = readl_relaxed(gwdt->control_base + SBSA_GWDT_WCV_HI);
wcv_lo = readl_relaxed(gwdt->control_base + SBSA_GWDT_WCV_LO);
} while (wcv_hi != readl_relaxed(gwdt->control_base +
SBSA_GWDT_WCV_HI));
return (((u64)wcv_hi << 32) | wcv_lo);
+}
+static void sbsa_gwdt_set_wcv(struct watchdog_device *wdd, unsigned int t) +{
struct sbsa_gwdt *gwdt = to_sbsa_gwdt(wdd);
u64 wcv;
wcv = arch_counter_get_cntvct() + (u64)t * gwdt->clk;
writel_relaxed(upper_32_bits(wcv),
gwdt->control_base + SBSA_GWDT_WCV_HI);
writel_relaxed(lower_32_bits(wcv),
gwdt->control_base + SBSA_GWDT_WCV_LO);
+}
+/*
- inline functions for reloading 64bit WCV register
- */
+static inline void reload_pretimeout_to_wcv(struct watchdog_device *wdd) +{
sbsa_gwdt_set_wcv(wdd, wdd->pretimeout);
+}
+static inline void reload_first_stage_to_wcv(struct watchdog_device *wdd) +{
sbsa_gwdt_set_wcv(wdd, wdd->timeout - wdd->pretimeout);
+}
+/*
- watchdog operation functions
- */
+static int sbsa_gwdt_set_timeout(struct watchdog_device *wdd,
unsigned int timeout)
+{
wdd->timeout = timeout;
return 0;
+}
+static int sbsa_gwdt_set_pretimeout(struct watchdog_device *wdd,
unsigned int pretimeout)
+{
struct sbsa_gwdt *gwdt = to_sbsa_gwdt(wdd);
u32 wor;
wdd->pretimeout = pretimeout;
/* If ws0_mode == true, we won't touch WOR */
if (!gwdt->ws0_mode) {
if (!pretimeout)
/*
* If pretimeout is 0, it gives driver a timeslot (1s)
* to update WCV after an explicit refresh
* (sbsa_gwdt_start)
*/
wor = gwdt->clk;
else
if (pretimeout > gwdt->max_wor_timeout)
wor = U32_MAX;
else
wor = pretimeout * gwdt->clk;
/* wtite WOR, that will cause an explicit watchdog refresh */
writel_relaxed(wor, gwdt->control_base + SBSA_GWDT_WOR);
}
return 0;
+}
+static unsigned int sbsa_gwdt_get_timeleft(struct watchdog_device *wdd) +{
struct sbsa_gwdt *gwdt = to_sbsa_gwdt(wdd);
u64 timeleft = sbsa_gwdt_get_wcv(wdd) - arch_counter_get_cntvct();
do_div(timeleft, gwdt->clk);
return timeleft;
+}
+static int sbsa_gwdt_keepalive(struct watchdog_device *wdd) +{
struct sbsa_gwdt *gwdt = to_sbsa_gwdt(wdd);
if (gwdt->ws0_mode)
reload_pretimeout_to_wcv(wdd);
else
reload_first_stage_to_wcv(wdd);
return 0;
+}
+static int sbsa_gwdt_start(struct watchdog_device *wdd) +{
struct sbsa_gwdt *gwdt = to_sbsa_gwdt(wdd);
/* If ws0_mode == true, the watchdog is enabled */
if (!gwdt->ws0_mode)
/* writing WCS will cause an explicit watchdog refresh */
writel_relaxed(SBSA_GWDT_WCS_EN,
gwdt->control_base + SBSA_GWDT_WCS);
return sbsa_gwdt_keepalive(wdd);
+}
+static int sbsa_gwdt_stop(struct watchdog_device *wdd) +{
struct sbsa_gwdt *gwdt = to_sbsa_gwdt(wdd);
writel_relaxed(0, gwdt->control_base + SBSA_GWDT_WCS);
/*
* Writing WCS has caused an explicit watchdog refresh.
* Both watchdog signals are deasserted, so clean ws0_mode flag.
*/
gwdt->ws0_mode = false;
return 0;
+}
+static irqreturn_t sbsa_gwdt_interrupt(int irq, void *dev_id) +{
struct sbsa_gwdt *gwdt = (struct sbsa_gwdt *)dev_id;
struct watchdog_device *wdd = &gwdt->wdd;
/* We don't use pretimeout, trigger WS1 now */
if (!wdd->pretimeout)
sbsa_gwdt_set_wcv(wdd, 0);
/*
* The pretimeout is valid, go panic
* If pretimeout is greater then "max_wor_timeout",
* reload the right value to WCV, then panic
*/
if (wdd->pretimeout > gwdt->max_wor_timeout)
reload_pretimeout_to_wcv(wdd);
panic("SBSA Watchdog pre-timeout");
return IRQ_HANDLED;
+}
+static struct watchdog_info sbsa_gwdt_info = {
.identity = "SBSA Generic Watchdog",
.options = WDIOF_SETTIMEOUT |
WDIOF_KEEPALIVEPING |
WDIOF_MAGICCLOSE |
WDIOF_PRETIMEOUT |
WDIOF_CARDRESET,
+};
+static struct watchdog_ops sbsa_gwdt_ops = {
.owner = THIS_MODULE,
.start = sbsa_gwdt_start,
.stop = sbsa_gwdt_stop,
.ping = sbsa_gwdt_keepalive,
.set_timeout = sbsa_gwdt_set_timeout,
.set_pretimeout = sbsa_gwdt_set_pretimeout,
.get_timeleft = sbsa_gwdt_get_timeleft,
+};
+static int sbsa_gwdt_probe(struct platform_device *pdev) +{
void __iomem *rf_base, *cf_base;
struct device *dev = &pdev->dev;
struct watchdog_device *wdd;
struct sbsa_gwdt *gwdt;
struct resource *res;
int ret, irq;
u32 status;
gwdt = devm_kzalloc(dev, sizeof(*gwdt), GFP_KERNEL);
if (!gwdt)
return -ENOMEM;
platform_set_drvdata(pdev, gwdt);
res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
cf_base = devm_ioremap_resource(dev, res);
if (IS_ERR(cf_base))
return PTR_ERR(cf_base);
res = platform_get_resource(pdev, IORESOURCE_MEM, 1);
rf_base = devm_ioremap_resource(dev, res);
if (IS_ERR(rf_base))
return PTR_ERR(rf_base);
irq = platform_get_irq(pdev, 0);
if (irq < 0) {
dev_err(dev, "unable to get ws0 interrupt.\n");
return irq;
}
/*
* Get the frequency of system counter from the cp15 interface of ARM
* Generic timer. We don't need to check it, because if it returns "0",
* system would panic in very early stage.
*/
gwdt->clk = arch_timer_get_cntfrq();
gwdt->refresh_base = rf_base;
gwdt->control_base = cf_base;
gwdt->max_wor_timeout = U32_MAX / gwdt->clk;
gwdt->ws0_mode = false;
wdd = &gwdt->wdd;
wdd->parent = dev;
wdd->info = &sbsa_gwdt_info;
wdd->ops = &sbsa_gwdt_ops;
watchdog_set_drvdata(wdd, gwdt);
watchdog_set_nowayout(wdd, nowayout);
wdd->min_pretimeout = 0;
wdd->min_timeout = 1;
/*
* Because the maximum of gwdt->clk is 400MHz and the maximum of WCV is
* U64_MAX, so the result of (U64_MAX / gwdt->clk) is always greater
* than U32_MAX. And the maximum of "unsigned int" is U32_MAX on ARM64.
* So we set the maximum value of pretimeout and timeout below.
*/
wdd->max_pretimeout = U32_MAX - 1;
wdd->max_timeout = U32_MAX;
wdd->pretimeout = DEFAULT_PRETIMEOUT;
wdd->timeout = DEFAULT_TIMEOUT;
watchdog_init_timeouts(wdd, pretimeout, timeout, dev);
status = readl_relaxed(gwdt->control_base + SBSA_GWDT_WCS);
if (status & SBSA_GWDT_WCS_WS1) {
dev_warn(dev, "System reset by WDT.\n");
wdd->bootstatus |= WDIOF_CARDRESET;
} else if (status == (SBSA_GWDT_WCS_WS0 | SBSA_GWDT_WCS_EN)) {
gwdt->ws0_mode = true;
}
ret = devm_request_irq(dev, irq, sbsa_gwdt_interrupt, 0,
pdev->name, gwdt);
if (ret) {
dev_err(dev, "unable to request IRQ %d\n", irq);
return ret;
}
ret = watchdog_register_device(wdd);
if (ret)
return ret;
/* If ws0_mode == true, the line won't update WOR */
sbsa_gwdt_set_pretimeout(wdd, wdd->pretimeout);
/*
* If watchdog is already enabled, do a ping operation
* to keep system running
*/
if (status & SBSA_GWDT_WCS_EN)
sbsa_gwdt_keepalive(wdd);
dev_info(dev, "Initialized with %ds timeout, %ds pretimeout @ %u Hz%s\n",
wdd->timeout, wdd->pretimeout, gwdt->clk,
status & SBSA_GWDT_WCS_EN ?
gwdt->ws0_mode ? " [second stage]" : " [enabled]" :
"");
return 0;
+}
+static void sbsa_gwdt_shutdown(struct platform_device *pdev) +{
struct sbsa_gwdt *gwdt = platform_get_drvdata(pdev);
sbsa_gwdt_stop(&gwdt->wdd);
+}
+static int sbsa_gwdt_remove(struct platform_device *pdev) +{
struct sbsa_gwdt *gwdt = platform_get_drvdata(pdev);
watchdog_unregister_device(&gwdt->wdd);
return 0;
+}
+/* Disable watchdog if it is active during suspend */ +static int __maybe_unused sbsa_gwdt_suspend(struct device *dev) +{
struct sbsa_gwdt *gwdt = dev_get_drvdata(dev);
if (watchdog_active(&gwdt->wdd))
sbsa_gwdt_stop(&gwdt->wdd);
return 0;
+}
+/* Enable watchdog and configure it if necessary */ +static int __maybe_unused sbsa_gwdt_resume(struct device *dev) +{
struct sbsa_gwdt *gwdt = dev_get_drvdata(dev);
if (watchdog_active(&gwdt->wdd))
sbsa_gwdt_start(&gwdt->wdd);
return 0;
+}
+static const struct dev_pm_ops sbsa_gwdt_pm_ops = {
SET_SYSTEM_SLEEP_PM_OPS(sbsa_gwdt_suspend, sbsa_gwdt_resume)
+};
+static const struct of_device_id sbsa_gwdt_of_match[] = {
{ .compatible = "arm,sbsa-gwdt", },
{},
+}; +MODULE_DEVICE_TABLE(of, sbsa_gwdt_of_match);
+static const struct platform_device_id sbsa_gwdt_pdev_match[] = {
{ .name = "sbsa-gwdt", },
{},
+}; +MODULE_DEVICE_TABLE(platform, sbsa_gwdt_pdev_match);
+static struct platform_driver sbsa_gwdt_driver = {
.driver = {
.name = "sbsa-gwdt",
.pm = &sbsa_gwdt_pm_ops,
.of_match_table = sbsa_gwdt_of_match,
},
.probe = sbsa_gwdt_probe,
.remove = sbsa_gwdt_remove,
.shutdown = sbsa_gwdt_shutdown,
.id_table = sbsa_gwdt_pdev_match,
+};
+module_platform_driver(sbsa_gwdt_driver);
+MODULE_DESCRIPTION("SBSA Generic Watchdog Driver"); +MODULE_AUTHOR("Fu Wei fu.wei@linaro.org"); +MODULE_AUTHOR("Suravee Suthikulpanit Suravee.Suthikulpanit@amd.com");
+MODULE_LICENSE("GPL v2");
2.4.3
diff --git a/drivers/watchdog/sbsa_gwdt.c b/drivers/watchdog/sbsa_gwdt.c new file mode 100644 index 0000000..7ae45cc --- /dev/null +++ b/drivers/watchdog/sbsa_gwdt.c @@ -0,0 +1,459 @@ +/*
- SBSA(Server Base System Architecture) Generic Watchdog driver
- Copyright (c) 2015, Linaro Ltd.
- Author: Fu Wei fu.wei@linaro.org
Suravee Suthikulpanit <Suravee.Suthikulpanit@amd.com>
- This program is free software; you can redistribute it and/or modify
- it under the terms of the GNU General Public License 2 as published
- by the Free Software Foundation.
- This program is distributed in the hope that it will be useful,
- but WITHOUT ANY WARRANTY; without even the implied warranty of
- MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- GNU General Public License for more details.
- The SBSA Generic watchdog driver is compatible with the pretimeout
- concept of Linux kernel.
- The timeout and pretimeout are determined by WCV or WOR.
- The first watch period is set by writing WCV directly, that can
- support more than 10s timeout at the maximum system counter
- frequency (400MHz).
- When WS0 is triggered, the second watch period (pretimeout) is
- determined by one of these registers:
- (1)WOR: 32bit register, this gives a maximum watch period of
- around 10s at the maximum system counter frequency. It's loaded
- automatically by hardware.
- (2)WCV: If the pretimeout value is greater then "max_wor_timeout",
- it will be loaded in WS0 interrupt routine. If system is in
- ws0_mode (reboot by kexec/kdump in panic with watchdog enabled
- and WS0 == true), the ping operation will only reload WCV.
Below is the field comment about ws0_mode, it says ws0_mode is only for rebooting in second stage timeout, but kexec/kdump can reboot in either first or second stage
Great thanks for your feedback.
yes, if kexec/kdump reboot the system before the WS0, ws0_mode may not be set. in this case, if WS0 is triggered during the reboot(AFAIK, panic will disable irq, and in the early boot stage of system, irq is disabled, too.), ws0_mode will be set at the next "open" in kdump kernel if WS0 haven't triggered until the watchdog is opened again in kdump kernel , ws0_mode won't be set.
ws0_mode doesn't indicate if the system is in the kdump kernel, it indicates that if WS0 is triggered, when the watchdog is initialized.
Do I answer your question?
Yes, thanks for explanation. So it sounds better to change the comment like below? from (reboot by kexec/kdump in panic with watchdog enabled and WS0 == true) to (reboot in the pre-timeout stage and WS0 == true)
Thanks Dave
Hi Dave,
On 16 September 2015 at 09:57, Dave Young dyoung@redhat.com wrote:
diff --git a/drivers/watchdog/sbsa_gwdt.c b/drivers/watchdog/sbsa_gwdt.c new file mode 100644 index 0000000..7ae45cc --- /dev/null +++ b/drivers/watchdog/sbsa_gwdt.c @@ -0,0 +1,459 @@ +/*
- SBSA(Server Base System Architecture) Generic Watchdog driver
- Copyright (c) 2015, Linaro Ltd.
- Author: Fu Wei fu.wei@linaro.org
Suravee Suthikulpanit <Suravee.Suthikulpanit@amd.com>
- This program is free software; you can redistribute it and/or modify
- it under the terms of the GNU General Public License 2 as published
- by the Free Software Foundation.
- This program is distributed in the hope that it will be useful,
- but WITHOUT ANY WARRANTY; without even the implied warranty of
- MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- GNU General Public License for more details.
- The SBSA Generic watchdog driver is compatible with the pretimeout
- concept of Linux kernel.
- The timeout and pretimeout are determined by WCV or WOR.
- The first watch period is set by writing WCV directly, that can
- support more than 10s timeout at the maximum system counter
- frequency (400MHz).
- When WS0 is triggered, the second watch period (pretimeout) is
- determined by one of these registers:
- (1)WOR: 32bit register, this gives a maximum watch period of
- around 10s at the maximum system counter frequency. It's loaded
- automatically by hardware.
- (2)WCV: If the pretimeout value is greater then "max_wor_timeout",
- it will be loaded in WS0 interrupt routine. If system is in
- ws0_mode (reboot by kexec/kdump in panic with watchdog enabled
- and WS0 == true), the ping operation will only reload WCV.
Below is the field comment about ws0_mode, it says ws0_mode is only for rebooting in second stage timeout, but kexec/kdump can reboot in either first or second stage
Great thanks for your feedback.
yes, if kexec/kdump reboot the system before the WS0, ws0_mode may not be set. in this case, if WS0 is triggered during the reboot(AFAIK, panic will disable irq, and in the early boot stage of system, irq is disabled, too.), ws0_mode will be set at the next "open" in kdump kernel if WS0 haven't triggered until the watchdog is opened again in kdump kernel , ws0_mode won't be set.
ws0_mode doesn't indicate if the system is in the kdump kernel, it indicates that if WS0 is triggered, when the watchdog is initialized.
Do I answer your question?
Yes, thanks for explanation. So it sounds better to change the comment like below? from (reboot by kexec/kdump in panic with watchdog enabled and WS0 == true) to (reboot in the pre-timeout stage and WS0 == true)
" in the pre-timeout stage" means " WS0 == true", so I think we should say: (reboot with watchdog enabled and WS0 == true)
Thanks for your suggestion.
Thanks Dave
From: Fu Wei fu.wei@linaro.org
This driver adds support for parsing SBSA Generic Watchdog Structure in GTDT, and creating a platform device with that information. This allows the operating system to obtain device data from the resource of platform device.
The platform device named "sbsa-gwdt" can be used by the ARM SBSA Generic Watchdog driver.
Signed-off-by: Fu Wei fu.wei@linaro.org Signed-off-by: Hanjun Guo hanjun.guo@linaro.org --- drivers/acpi/Kconfig | 9 ++++ drivers/acpi/Makefile | 1 + drivers/acpi/gtdt.c | 135 ++++++++++++++++++++++++++++++++++++++++++++++++++ 3 files changed, 145 insertions(+)
diff --git a/drivers/acpi/Kconfig b/drivers/acpi/Kconfig index 114cf48..2e7e162 100644 --- a/drivers/acpi/Kconfig +++ b/drivers/acpi/Kconfig @@ -479,4 +479,13 @@ config XPOWER_PMIC_OPREGION
endif
+config ACPI_GTDT + bool "ACPI GTDT Support" + depends on ARM64 + help + GTDT (Generic Timer Description Table) provides information + for per-processor timers and Platform (memory-mapped) timers + for ARM platforms. Select this option to provide information + needed for the timers init. + endif # ACPI diff --git a/drivers/acpi/Makefile b/drivers/acpi/Makefile index 8321430..9a7966e 100644 --- a/drivers/acpi/Makefile +++ b/drivers/acpi/Makefile @@ -93,5 +93,6 @@ obj-$(CONFIG_ACPI_EXTLOG) += acpi_extlog.o obj-$(CONFIG_PMIC_OPREGION) += pmic/intel_pmic.o obj-$(CONFIG_CRC_PMIC_OPREGION) += pmic/intel_pmic_crc.o obj-$(CONFIG_XPOWER_PMIC_OPREGION) += pmic/intel_pmic_xpower.o +obj-$(CONFIG_ACPI_GTDT) += gtdt.o
video-objs += acpi_video.o video_detect.o diff --git a/drivers/acpi/gtdt.c b/drivers/acpi/gtdt.c new file mode 100644 index 0000000..bbe3a2e --- /dev/null +++ b/drivers/acpi/gtdt.c @@ -0,0 +1,135 @@ +/* + * ARM Specific GTDT table Support + * + * Copyright (C) 2015, Linaro Ltd. + * Author: Fu Wei fu.wei@linaro.org + * Hanjun Guo hanjun.guo@linaro.org + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. + */ + +#include <linux/acpi.h> +#include <linux/device.h> +#include <linux/init.h> +#include <linux/kernel.h> +#include <linux/module.h> +#include <linux/platform_device.h> + +static int __init map_generic_timer_interrupt(u32 interrupt, u32 flags) +{ + int trigger, polarity; + + if (!interrupt) + return 0; + + trigger = (flags & ACPI_GTDT_INTERRUPT_MODE) ? ACPI_EDGE_SENSITIVE + : ACPI_LEVEL_SENSITIVE; + + polarity = (flags & ACPI_GTDT_INTERRUPT_POLARITY) ? ACPI_ACTIVE_LOW + : ACPI_ACTIVE_HIGH; + + return acpi_register_gsi(NULL, interrupt, trigger, polarity); +} + +/* + * Initialize a SBSA generic Watchdog platform device info from GTDT + * According to SBSA specification the size of refresh and control + * frames of SBSA Generic Watchdog is SZ_4K(Offset 0x000 – 0xFFF). + */ +static int __init gtdt_import_sbsa_gwdt(struct acpi_gtdt_watchdog *wd, + int index) +{ + struct platform_device *pdev; + int irq = map_generic_timer_interrupt(wd->timer_interrupt, + wd->timer_flags); + struct resource res[] = { + DEFINE_RES_IRQ(irq), + DEFINE_RES_MEM(wd->control_frame_address, SZ_4K), + DEFINE_RES_MEM(wd->refresh_frame_address, SZ_4K), + }; + + pr_debug("GTDT: a Watchdog GT(0x%llx/0x%llx gsi:%u flags:0x%x)\n", + wd->refresh_frame_address, wd->control_frame_address, + wd->timer_interrupt, wd->timer_flags); + + if (!(wd->refresh_frame_address && + wd->control_frame_address && + wd->timer_interrupt)) { + pr_err("GTDT: failed geting the device info.\n"); + return -EINVAL; + } + + if (irq < 0) { + pr_err("GTDT: failed to register GSI of the Watchdog GT.\n"); + return -EINVAL; + } + + /* + * Add a platform device named "sbsa-gwdt" to match the platform driver. + * "sbsa-gwdt": SBSA(Server Base System Architecture) Generic Watchdog + * The platform driver (like drivers/watchdog/sbsa_gwdt.c)can get device + * info below by matching this name. + */ + pdev = platform_device_register_simple("sbsa-gwdt", index, res, + ARRAY_SIZE(res)); + if (IS_ERR(pdev)) { + acpi_unregister_gsi(wd->timer_interrupt); + return PTR_ERR(pdev); + } + + return 0; +} + +static int __init gtdt_platform_timer_parse(struct acpi_table_header *table) +{ + struct acpi_gtdt_header *header; + struct acpi_table_gtdt *gtdt; + void *gtdt_subtable; + int i, gwdt_index; + int ret = 0; + + if (table->revision < 2) { + pr_warn("GTDT: Revision:%d doesn't support Platform Timers.\n", + table->revision); + return 0; + } + + gtdt = container_of(table, struct acpi_table_gtdt, header); + if (!gtdt->platform_timer_count) { + pr_info("GTDT: No Platform Timer structures.\n"); + return 0; + } + + gtdt_subtable = (void *)gtdt + gtdt->platform_timer_offset; + + for (i = 0, gwdt_index = 0; i < gtdt->platform_timer_count; i++) { + if (gtdt_subtable > (void *)table + table->length) { + pr_err("GTDT: subtable pointer overflows, bad table\n"); + return -EINVAL; + } + header = (struct acpi_gtdt_header *)gtdt_subtable; + if (header->type == ACPI_GTDT_TYPE_WATCHDOG) { + ret = gtdt_import_sbsa_gwdt(gtdt_subtable, gwdt_index); + if (ret) + pr_err("GTDT: failed to import subtable %d\n", + i); + else + gwdt_index++; + } + gtdt_subtable += header->length; + } + + return ret; +} + +static int __init gtdt_platform_timer_init(void) +{ + if (acpi_disabled) + return 0; + + return acpi_table_parse(ACPI_SIG_GTDT, gtdt_platform_timer_parse); +} + +device_initcall(gtdt_platform_timer_init);
From: Fu Wei fu.wei@linaro.org
This patch enables ACPI GTDT support for ARM SBSA watchdog driver automatically, if ACPI support is enabled.
Signed-off-by: Fu Wei fu.wei@linaro.org --- drivers/watchdog/Kconfig | 1 + 1 file changed, 1 insertion(+)
diff --git a/drivers/watchdog/Kconfig b/drivers/watchdog/Kconfig index b2734f0..2719093 100644 --- a/drivers/watchdog/Kconfig +++ b/drivers/watchdog/Kconfig @@ -178,6 +178,7 @@ config ARM_SBSA_WATCHDOG depends on ARM64 depends on ARM_ARCH_TIMER select WATCHDOG_CORE + select ACPI_GTDT if ACPI help ARM SBSA Generic Watchdog. This watchdog has two Watchdog timeouts. The first timeout will trigger a panic; the second timeout will
From: Fu Wei fu.wei@linaro.org
The patch update arm_arch_timer driver to use the function provided by the new GTDT driver of ACPI. By this way, arm_arch_timer.c can be simplified, and separate all the ACPI GTDT knowledge from this timer driver.
Signed-off-by: Fu Wei fu.wei@linaro.org Signed-off-by: Hanjun Guo hanjun.guo@linaro.org --- arch/arm64/kernel/time.c | 4 +-- drivers/acpi/gtdt.c | 43 ++++++++++++++++++++++++++ drivers/clocksource/Kconfig | 1 + drivers/clocksource/arm_arch_timer.c | 60 +++++++----------------------------- include/clocksource/arm_arch_timer.h | 8 +++++ include/linux/acpi.h | 5 +++ include/linux/clocksource.h | 4 +-- 7 files changed, 72 insertions(+), 53 deletions(-)
diff --git a/arch/arm64/kernel/time.c b/arch/arm64/kernel/time.c index 42f9195..2cabea6 100644 --- a/arch/arm64/kernel/time.c +++ b/arch/arm64/kernel/time.c @@ -75,9 +75,9 @@ void __init time_init(void)
/* * Since ACPI or FDT will only one be available in the system, - * we can use acpi_generic_timer_init() here safely + * we can use arch_timer_acpi_init() here safely */ - acpi_generic_timer_init(); + arch_timer_acpi_init();
arch_timer_rate = arch_timer_get_rate(); if (!arch_timer_rate) diff --git a/drivers/acpi/gtdt.c b/drivers/acpi/gtdt.c index bbe3a2e..3559babf 100644 --- a/drivers/acpi/gtdt.c +++ b/drivers/acpi/gtdt.c @@ -17,6 +17,8 @@ #include <linux/module.h> #include <linux/platform_device.h>
+#include <clocksource/arm_arch_timer.h> + static int __init map_generic_timer_interrupt(u32 interrupt, u32 flags) { int trigger, polarity; @@ -33,6 +35,47 @@ static int __init map_generic_timer_interrupt(u32 interrupt, u32 flags) return acpi_register_gsi(NULL, interrupt, trigger, polarity); }
+static struct arch_timer_data __initdata *arch_timer_data_p; + +static int __init arch_timer_data_init(struct acpi_table_header *table) +{ + struct acpi_table_gtdt *gtdt; + + gtdt = container_of(table, struct acpi_table_gtdt, header); + + arch_timer_data_p->phys_secure_ppi = + map_generic_timer_interrupt(gtdt->secure_el1_interrupt, + gtdt->secure_el1_flags); + + arch_timer_data_p->phys_nonsecure_ppi = + map_generic_timer_interrupt(gtdt->non_secure_el1_interrupt, + gtdt->non_secure_el1_flags); + + arch_timer_data_p->virt_ppi = + map_generic_timer_interrupt(gtdt->virtual_timer_interrupt, + gtdt->virtual_timer_flags); + + arch_timer_data_p->hyp_ppi = + map_generic_timer_interrupt(gtdt->non_secure_el2_interrupt, + gtdt->non_secure_el2_flags); + + arch_timer_data_p->c3stop = !(gtdt->non_secure_el1_flags & + ACPI_GTDT_ALWAYS_ON); + + return 0; +} + +/* Initialize the arch_timer_data struct for arm_arch_timer by GTDT info */ +int __init gtdt_arch_timer_data_init(struct arch_timer_data *data) +{ + if (acpi_disabled || !data) + return -EINVAL; + + arch_timer_data_p = data; + + return acpi_table_parse(ACPI_SIG_GTDT, arch_timer_data_init); +} + /* * Initialize a SBSA generic Watchdog platform device info from GTDT * According to SBSA specification the size of refresh and control diff --git a/drivers/clocksource/Kconfig b/drivers/clocksource/Kconfig index 4e57730..e111025 100644 --- a/drivers/clocksource/Kconfig +++ b/drivers/clocksource/Kconfig @@ -119,6 +119,7 @@ config CLKSRC_STM32 config ARM_ARCH_TIMER bool select CLKSRC_OF if OF + select ACPI_GTDT if ACPI
config ARM_ARCH_TIMER_EVTSTREAM bool "Support for ARM architected timer event stream generation" diff --git a/drivers/clocksource/arm_arch_timer.c b/drivers/clocksource/arm_arch_timer.c index 0aa135d..99505bb 100644 --- a/drivers/clocksource/arm_arch_timer.c +++ b/drivers/clocksource/arm_arch_timer.c @@ -817,68 +817,30 @@ CLOCKSOURCE_OF_DECLARE(armv7_arch_timer_mem, "arm,armv7-timer-mem", arch_timer_mem_init);
#ifdef CONFIG_ACPI -static int __init map_generic_timer_interrupt(u32 interrupt, u32 flags) -{ - int trigger, polarity; - - if (!interrupt) - return 0; - - trigger = (flags & ACPI_GTDT_INTERRUPT_MODE) ? ACPI_EDGE_SENSITIVE - : ACPI_LEVEL_SENSITIVE; - - polarity = (flags & ACPI_GTDT_INTERRUPT_POLARITY) ? ACPI_ACTIVE_LOW - : ACPI_ACTIVE_HIGH; - - return acpi_register_gsi(NULL, interrupt, trigger, polarity); -} - /* Initialize per-processor generic timer */ -static int __init arch_timer_acpi_init(struct acpi_table_header *table) +void __init arch_timer_acpi_init(void) { - struct acpi_table_gtdt *gtdt; + struct arch_timer_data data;
if (arch_timers_present & ARCH_CP15_TIMER) { pr_warn("arch_timer: already initialized, skipping\n"); - return -EINVAL; + return; }
- gtdt = container_of(table, struct acpi_table_gtdt, header); - arch_timers_present |= ARCH_CP15_TIMER;
- arch_timer_ppi[PHYS_SECURE_PPI] = - map_generic_timer_interrupt(gtdt->secure_el1_interrupt, - gtdt->secure_el1_flags); - - arch_timer_ppi[PHYS_NONSECURE_PPI] = - map_generic_timer_interrupt(gtdt->non_secure_el1_interrupt, - gtdt->non_secure_el1_flags); - - arch_timer_ppi[VIRT_PPI] = - map_generic_timer_interrupt(gtdt->virtual_timer_interrupt, - gtdt->virtual_timer_flags); + if (gtdt_arch_timer_data_init(&data)) + return;
- arch_timer_ppi[HYP_PPI] = - map_generic_timer_interrupt(gtdt->non_secure_el2_interrupt, - gtdt->non_secure_el2_flags); + arch_timer_ppi[PHYS_SECURE_PPI] = data.phys_secure_ppi; + arch_timer_ppi[PHYS_NONSECURE_PPI] = data.phys_nonsecure_ppi; + arch_timer_ppi[VIRT_PPI] = data.virt_ppi; + arch_timer_ppi[HYP_PPI] = data.hyp_ppi; + /* Always-on capability */ + arch_timer_c3stop = data.c3stop;
/* Get the frequency from CNTFRQ */ arch_timer_detect_rate(NULL, NULL); - - /* Always-on capability */ - arch_timer_c3stop = !(gtdt->non_secure_el1_flags & ACPI_GTDT_ALWAYS_ON); - arch_timer_init(); - return 0; -} - -/* Initialize all the generic timers presented in GTDT */ -void __init acpi_generic_timer_init(void) -{ - if (acpi_disabled) - return; - - acpi_table_parse(ACPI_SIG_GTDT, arch_timer_acpi_init); } #endif diff --git a/include/clocksource/arm_arch_timer.h b/include/clocksource/arm_arch_timer.h index 9916d0e..5deed9d 100644 --- a/include/clocksource/arm_arch_timer.h +++ b/include/clocksource/arm_arch_timer.h @@ -43,6 +43,14 @@ enum arch_timer_reg {
#define ARCH_TIMER_EVT_STREAM_FREQ 10000 /* 100us */
+struct arch_timer_data { + int phys_secure_ppi; + int phys_nonsecure_ppi; + int virt_ppi; + int hyp_ppi; + bool c3stop; +}; + #ifdef CONFIG_ARM_ARCH_TIMER
extern u32 arch_timer_get_rate(void); diff --git a/include/linux/acpi.h b/include/linux/acpi.h index 57c13df..6d7a290 100644 --- a/include/linux/acpi.h +++ b/include/linux/acpi.h @@ -449,6 +449,11 @@ void acpi_walk_dep_device_list(acpi_handle handle); struct platform_device *acpi_create_platform_device(struct acpi_device *); #define ACPI_PTR(_ptr) (_ptr)
+#ifdef CONFIG_ACPI_GTDT +struct arch_timer_data; +int __init gtdt_arch_timer_data_init(struct arch_timer_data *data); +#endif + #else /* !CONFIG_ACPI */
#define acpi_disabled 1 diff --git a/include/linux/clocksource.h b/include/linux/clocksource.h index 278dd27..b250b75 100644 --- a/include/linux/clocksource.h +++ b/include/linux/clocksource.h @@ -253,9 +253,9 @@ static inline void clocksource_of_init(void) {} #endif
#ifdef CONFIG_ACPI -void acpi_generic_timer_init(void); +void arch_timer_acpi_init(void); #else -static inline void acpi_generic_timer_init(void) { } +static inline void arch_timer_acpi_init(void) { } #endif
#endif /* _LINUX_CLOCKSOURCE_H */
On Tue, 25 Aug 2015, fu.wei@linaro.org wrote:
You Cc the world and some more on your patch, but you fail to add the maintainers of the clocksource code to the Cc list. Sigh.
From: Fu Wei fu.wei@linaro.org
The patch update arm_arch_timer driver to use the function provided by the new GTDT driver of ACPI. By this way, arm_arch_timer.c can be simplified, and separate all the ACPI GTDT knowledge from this timer driver.
That's not a proper changelog and this patch want's to be split in two:
1) Implement the new ACPI function
2) Make use of it
index 0aa135d..99505bb 100644 --- a/drivers/clocksource/arm_arch_timer.c +++ b/drivers/clocksource/arm_arch_timer.c @@ -817,68 +817,30 @@ CLOCKSOURCE_OF_DECLARE(armv7_arch_timer_mem, "arm,armv7-timer-mem", arch_timer_mem_init); #ifdef CONFIG_ACPI -static int __init map_generic_timer_interrupt(u32 interrupt, u32 flags) -{
- int trigger, polarity;
- if (!interrupt)
return 0;
- trigger = (flags & ACPI_GTDT_INTERRUPT_MODE) ? ACPI_EDGE_SENSITIVE
: ACPI_LEVEL_SENSITIVE;
- polarity = (flags & ACPI_GTDT_INTERRUPT_POLARITY) ? ACPI_ACTIVE_LOW
: ACPI_ACTIVE_HIGH;
- return acpi_register_gsi(NULL, interrupt, trigger, polarity);
-}
/* Initialize per-processor generic timer */ -static int __init arch_timer_acpi_init(struct acpi_table_header *table) +void __init arch_timer_acpi_init(void) {
And how is that supposed to work when we have next generation CPUs which implement a different timer? You break multisystem kernels that way.
Thanks,
tglx
Hi Thomas,
On 25 August 2015 at 01:50, Thomas Gleixner tglx@linutronix.de wrote:
On Tue, 25 Aug 2015, fu.wei@linaro.org wrote:
You Cc the world and some more on your patch, but you fail to add the maintainers of the clocksource code to the Cc list. Sigh.
my fault So sorry for that, I will add the maintainers of clocksource into cc list.
From: Fu Wei fu.wei@linaro.org
The patch update arm_arch_timer driver to use the function provided by the new GTDT driver of ACPI. By this way, arm_arch_timer.c can be simplified, and separate all the ACPI GTDT knowledge from this timer driver.
That's not a proper changelog and this patch want's to be split in two:
Implement the new ACPI function
Make use of it
Yes, you are right , will improve this
index 0aa135d..99505bb 100644 --- a/drivers/clocksource/arm_arch_timer.c +++ b/drivers/clocksource/arm_arch_timer.c @@ -817,68 +817,30 @@ CLOCKSOURCE_OF_DECLARE(armv7_arch_timer_mem, "arm,armv7-timer-mem", arch_timer_mem_init);
#ifdef CONFIG_ACPI -static int __init map_generic_timer_interrupt(u32 interrupt, u32 flags) -{
int trigger, polarity;
if (!interrupt)
return 0;
trigger = (flags & ACPI_GTDT_INTERRUPT_MODE) ? ACPI_EDGE_SENSITIVE
: ACPI_LEVEL_SENSITIVE;
polarity = (flags & ACPI_GTDT_INTERRUPT_POLARITY) ? ACPI_ACTIVE_LOW
: ACPI_ACTIVE_HIGH;
return acpi_register_gsi(NULL, interrupt, trigger, polarity);
-}
/* Initialize per-processor generic timer */ -static int __init arch_timer_acpi_init(struct acpi_table_header *table) +void __init arch_timer_acpi_init(void) {
And how is that supposed to work when we have next generation CPUs which implement a different timer? You break multisystem kernels that way.
yes, you are right, If there is a next generation CPUs which implement a different timer, (maybe) this driver can not work. we may need a new timer driver.
But, (1) for now, aarch64 core always has the arch timer(this timer is part of aarch64 architecture). and the existing code make ARM64 kernel "select ARM_ARCH_TIMER " (2) GTDT is designed for generic timer, so in this call " arch_timer_acpi_init" we parse the gtdt info.
(3) once we have a ARM64 CPUs which implement a different timer, we may need to select a right timer in the config stage. and this timer may not be described in GTDT. So we can implement another arch_timer_acpi_init by that time in new timer driver.. if the new time still uses GTDT(or new version GTDT), we may need to update gtdt.c for new timer by that time.
but before we really have this new timer, I think this code is OK to use.
Do I understand your comment correctly? :-)
Thanks,
tglx
On Wed, 26 Aug 2015, Fu Wei wrote:
/* Initialize per-processor generic timer */ -static int __init arch_timer_acpi_init(struct acpi_table_header *table) +void __init arch_timer_acpi_init(void) {
And how is that supposed to work when we have next generation CPUs which implement a different timer? You break multisystem kernels that way.
yes, you are right, If there is a next generation CPUs which implement a different timer, (maybe) this driver can not work. we may need a new timer driver.
But, (1) for now, aarch64 core always has the arch timer(this timer is part of aarch64 architecture). and the existing code make ARM64 kernel "select ARM_ARCH_TIMER " (2) GTDT is designed for generic timer, so in this call " arch_timer_acpi_init" we parse the gtdt info. (3) once we have a ARM64 CPUs which implement a different timer, we may need to select a right timer in the config stage. and this timer may not be described in GTDT. So we can implement another arch_timer_acpi_init by that time in new timer driver.. if the new time still uses GTDT(or new version GTDT), we may need to update gtdt.c for new timer by that time.
That's simply wrong. You want to build kernels which run on both cpus and the selection of the timer happens at runtime depending on the ACPI info. We do the same thing with device tree.
but before we really have this new timer, I think this code is OK to use.
I don't think so, but I leave this decision to the ARM64 maintainers.
Thanks,
tglx
Hi Thomas,
Thanks for the comments, I got some questions and reply below.
On 08/26/2015 03:17 AM, Thomas Gleixner wrote:
On Wed, 26 Aug 2015, Fu Wei wrote:
/* Initialize per-processor generic timer */ -static int __init arch_timer_acpi_init(struct acpi_table_header *table) +void __init arch_timer_acpi_init(void) {
And how is that supposed to work when we have next generation CPUs which implement a different timer? You break multisystem kernels that way.
Sorry, I think I missed some context here that I don't understand why the code here will break multisystem kernels? I'm trying to understand the problem here and update the code :)
yes, you are right, If there is a next generation CPUs which implement a different timer, (maybe) this driver can not work. we may need a new timer driver.
But, (1) for now, aarch64 core always has the arch timer(this timer is part of aarch64 architecture). and the existing code make ARM64 kernel "select ARM_ARCH_TIMER " (2) GTDT is designed for generic timer, so in this call " arch_timer_acpi_init" we parse the gtdt info. (3) once we have a ARM64 CPUs which implement a different timer, we may need to select a right timer in the config stage. and this timer may not be described in GTDT. So we can implement another arch_timer_acpi_init by that time in new timer driver.. if the new time still uses GTDT(or new version GTDT), we may need to update gtdt.c for new timer by that time.
That's simply wrong. You want to build kernels which run on both cpus and the selection of the timer happens at runtime depending on the ACPI info. We do the same thing with device tree.
I think the code can do that if I understand correctly. The code for now is that we only support arch timer on ARM64, and this patch set is adding SBSA watchdog timer support which need same function in arch timer, so we move that function to common place.
We will load the driver (arch timer, memory mapped timer) when the ACPI table defines them, which when new timer is coming, that will defined in the ACPI table and load the driver as needed.
Please correct me if I misse something, thanks.
Hanjun
On Thu, 27 Aug 2015, Hanjun Guo wrote:
On 08/26/2015 03:17 AM, Thomas Gleixner wrote:
On Wed, 26 Aug 2015, Fu Wei wrote:
/* Initialize per-processor generic timer */ -static int __init arch_timer_acpi_init(struct acpi_table_header *table) +void __init arch_timer_acpi_init(void) {
And how is that supposed to work when we have next generation CPUs which implement a different timer? You break multisystem kernels that way.
Sorry, I think I missed some context here that I don't understand why the code here will break multisystem kernels? I'm trying to understand the problem here and update the code :)
yes, you are right, If there is a next generation CPUs which implement a different timer, (maybe) this driver can not work. we may need a new timer driver.
But, (1) for now, aarch64 core always has the arch timer(this timer is part of aarch64 architecture). and the existing code make ARM64 kernel "select ARM_ARCH_TIMER " (2) GTDT is designed for generic timer, so in this call " arch_timer_acpi_init" we parse the gtdt info. (3) once we have a ARM64 CPUs which implement a different timer, we may need to select a right timer in the config stage. and this timer may not be described in GTDT. So we can implement another arch_timer_acpi_init by that time in new timer driver.. if the new time still uses GTDT(or new version GTDT), we may need to update gtdt.c for new timer by that time.
That's simply wrong. You want to build kernels which run on both cpus and the selection of the timer happens at runtime depending on the ACPI info. We do the same thing with device tree.
I think the code can do that if I understand correctly. The code for now is that we only support arch timer on ARM64, and this patch set is adding SBSA watchdog timer support which need same function in arch timer, so we move that function to common place.
We will load the driver (arch timer, memory mapped timer) when the ACPI table defines them, which when new timer is coming, that will defined in the ACPI table and load the driver as needed.
Please correct me if I misse something, thanks.
arch_timer_acpi_init() is called from the architecture boot code. So how is that supposed to work with different timers?
Are you going to have bla_timer_acpi_init() and foo_timer_acpi_init() calls as well?
Why not having a something like DT has: DECLARE_....
and the arch_timer_acpi_init() using that to figure out which of the timers to initialize.
Thanks,
tglx
On 08/27/2015 08:08 PM, Thomas Gleixner wrote:
On Thu, 27 Aug 2015, Hanjun Guo wrote:
On 08/26/2015 03:17 AM, Thomas Gleixner wrote:
On Wed, 26 Aug 2015, Fu Wei wrote:
/* Initialize per-processor generic timer */ -static int __init arch_timer_acpi_init(struct acpi_table_header *table) +void __init arch_timer_acpi_init(void) {
And how is that supposed to work when we have next generation CPUs which implement a different timer? You break multisystem kernels that way.
Sorry, I think I missed some context here that I don't understand why the code here will break multisystem kernels? I'm trying to understand the problem here and update the code :)
yes, you are right, If there is a next generation CPUs which implement a different timer, (maybe) this driver can not work. we may need a new timer driver.
But, (1) for now, aarch64 core always has the arch timer(this timer is part of aarch64 architecture). and the existing code make ARM64 kernel "select ARM_ARCH_TIMER " (2) GTDT is designed for generic timer, so in this call " arch_timer_acpi_init" we parse the gtdt info. (3) once we have a ARM64 CPUs which implement a different timer, we may need to select a right timer in the config stage. and this timer may not be described in GTDT. So we can implement another arch_timer_acpi_init by that time in new timer driver.. if the new time still uses GTDT(or new version GTDT), we may need to update gtdt.c for new timer by that time.
That's simply wrong. You want to build kernels which run on both cpus and the selection of the timer happens at runtime depending on the ACPI info. We do the same thing with device tree.
I think the code can do that if I understand correctly. The code for now is that we only support arch timer on ARM64, and this patch set is adding SBSA watchdog timer support which need same function in arch timer, so we move that function to common place.
We will load the driver (arch timer, memory mapped timer) when the ACPI table defines them, which when new timer is coming, that will defined in the ACPI table and load the driver as needed.
Please correct me if I misse something, thanks.
arch_timer_acpi_init() is called from the architecture boot code. So how is that supposed to work with different timers?
Are you going to have bla_timer_acpi_init() and foo_timer_acpi_init() calls as well?
Why not having a something like DT has: DECLARE_....
and the arch_timer_acpi_init() using that to figure out which of the timers to initialize.
Ah, ok, I can fully understand you now, thanks for your patience.
Yes, I agree with you, so this is not a problem for this patch, but for the code implementation of previous code. Actually we are on the road to do as you suggested, we introduced something like #define ACPI_DECLARE(table, name, table_id, subtable, data, fn) [1] in the GICv3 and GIC self probe patch set, and I said that infrastructure can be used as clock declare too, we just trying to not add such dependence on that patch set (it's still on discussion),
[1]: https://lkml.org/lkml/2015/7/29/236
If that is ok with you, we will introduce similar DECLARE_ thing for clock declare.
Thanks Hanjun
On 08/27/2015 08:28 PM, Hanjun Guo wrote:
On 08/27/2015 08:08 PM, Thomas Gleixner wrote:
On Thu, 27 Aug 2015, Hanjun Guo wrote:
On 08/26/2015 03:17 AM, Thomas Gleixner wrote:
On Wed, 26 Aug 2015, Fu Wei wrote:
> /* Initialize per-processor generic timer */ > -static int __init arch_timer_acpi_init(struct acpi_table_header > *table) > +void __init arch_timer_acpi_init(void) > {
And how is that supposed to work when we have next generation CPUs which implement a different timer? You break multisystem kernels that way.
Sorry, I think I missed some context here that I don't understand why the code here will break multisystem kernels? I'm trying to understand the problem here and update the code :)
yes, you are right, If there is a next generation CPUs which implement a different timer, (maybe) this driver can not work. we may need a new timer driver.
But, (1) for now, aarch64 core always has the arch timer(this timer is part of aarch64 architecture). and the existing code make ARM64 kernel "select ARM_ARCH_TIMER " (2) GTDT is designed for generic timer, so in this call " arch_timer_acpi_init" we parse the gtdt info. (3) once we have a ARM64 CPUs which implement a different timer, we may need to select a right timer in the config stage. and this timer may not be described in GTDT. So we can implement another arch_timer_acpi_init by that time in new timer driver.. if the new time still uses GTDT(or new version GTDT), we may need to update gtdt.c for new timer by that time.
That's simply wrong. You want to build kernels which run on both cpus and the selection of the timer happens at runtime depending on the ACPI info. We do the same thing with device tree.
I think the code can do that if I understand correctly. The code for now is that we only support arch timer on ARM64, and this patch set is adding SBSA watchdog timer support which need same function in arch timer, so we move that function to common place.
We will load the driver (arch timer, memory mapped timer) when the ACPI table defines them, which when new timer is coming, that will defined in the ACPI table and load the driver as needed.
Please correct me if I misse something, thanks.
arch_timer_acpi_init() is called from the architecture boot code. So how is that supposed to work with different timers?
Are you going to have bla_timer_acpi_init() and foo_timer_acpi_init() calls as well?
Why not having a something like DT has: DECLARE_....
and the arch_timer_acpi_init() using that to figure out which of the timers to initialize.
Ah, ok, I can fully understand you now, thanks for your patience.
Yes, I agree with you, so this is not a problem for this patch, but for the code implementation of previous code. Actually we are on the road to do as you suggested, we introduced something like #define ACPI_DECLARE(table, name, table_id, subtable, data, fn) [1] in the GICv3 and GIC self probe patch set, and I said that infrastructure can be used as clock declare too, we just trying to not add such dependence on that patch set (it's still on discussion),
If that is ok with you, we will introduce similar DECLARE_ thing for clock declare.
Or we can drop this patch from this patch set, and clean up this patch when the ACPI_DECLARE() infrastructure is ready for upstream.
Thanks Hanjun
On Thu, 27 Aug 2015, Hanjun Guo wrote:
If that is ok with you, we will introduce similar DECLARE_ thing for clock declare.
Yes.
Or we can drop this patch from this patch set, and clean up this patch when the ACPI_DECLARE() infrastructure is ready for upstream.
Works either way. I just noticed that hard coded init thing and decided to rant about it :)
Thanks,
tglx
Hi Thomas, Hanjun
On 27 August 2015 at 21:40, Thomas Gleixner tglx@linutronix.de wrote:
On Thu, 27 Aug 2015, Hanjun Guo wrote:
If that is ok with you, we will introduce similar DECLARE_ thing for clock declare.
Yes.
Thanks
Or we can drop this patch from this patch set, and clean up this patch when the ACPI_DECLARE() infrastructure is ready for upstream.
Works either way. I just noticed that hard coded init thing and decided to rant about it :)
OK, good idea, this patch will be improve by DECLARE_ thing, then upstream. drop this from this patchset.
Great thanks for your help
Thanks,
tglx
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On 27/08/15 14:51, Fu Wei wrote:
Hi Thomas, Hanjun
On 27 August 2015 at 21:40, Thomas Gleixner tglx@linutronix.de wrote:
On Thu, 27 Aug 2015, Hanjun Guo wrote:
If that is ok with you, we will introduce similar DECLARE_ thing for clock declare.
Yes.
Thanks
Or we can drop this patch from this patch set, and clean up this patch when the ACPI_DECLARE() infrastructure is ready for upstream.
Works either way. I just noticed that hard coded init thing and decided to rant about it :)
OK, good idea, this patch will be improve by DECLARE_ thing, then upstream. drop this from this patchset.
Great thanks for your help
You probably want to keep an eye on this:
https://lwn.net/Articles/657238/
which implements the necessary infrastructure. I'd appreciate if you could give it a go to find out if it works for you.
Thanks,
M.
Hi Fu Wei,
On 25/08/2015:01:01:15 AM, fu.wei@linaro.org wrote:
From: Fu Wei fu.wei@linaro.org
This patchset: (1)Introduce Documentation/devicetree/bindings/watchdog/sbsa-gwdt.txt for FDT info of SBSA Generic Watchdog, and give two examples of adding SBSA Generic Watchdog device node into the dts files: foundation-v8.dts and amd-seattle-soc.dtsi.
(2)Introduce "pretimeout" into the watchdog framework, and update Documentation/watchdog/watchdog-kernel-api.txt to introduce: (1)the new elements in the watchdog_device and watchdog_ops struct; (2)the new API "watchdog_init_timeouts". (3)Introduce ARM SBSA watchdog driver: a.Use linux kernel watchdog framework; b.Work with FDT on ARM64; c.Use "pretimeout" in watchdog framework; d.Support getting timeout and pretimeout from parameter and FDT at the driver init stage. e.In the first timeout, do panic to save system context; f.In the second stage, user can still feed the dog without cleaning WS0. By this feature, we can avoid the panic infinite loops, while backing up a large system context in a server. g.In the second stage, can trigger WS1 by setting pretimeout = 0 if necessary. (4)Introduce ACPI GTDT parser: drivers/acpi/gtdt.c Parse SBSA Generic Watchdog Structure in GTDT table of ACPI, and create a platform device with that information. This platform device can be used by This Watchdog driver. drivers/clocksource/arm_arch_timer.c is simplified by this GTDT support.
This patchset has been tested with watchdog daemon (ACPI/FDT, module/build-in) on the following platforms: (1)ARM Foundation v8 model
I tested it with kdump on fedora-arm64 Seattle platform. I enabled watchdog using systemd (with 30s timeout), insured that watchdog is active and then crashed the system. I can see that kdump kernel loads sbsa_wdt and activates watchdog, still vmcore copy is done successfully. My test kernel is here [1]
~Pratyush
[1] https://github.com/pratyushanand/linux/commits/wdt/sbsa-test-kexec
Hi Pratyush,
Great thanks for your testing, this info is very helpful. :-) my new patchset will come out soon.
On 30 September 2015 at 13:13, Pratyush Anand panand@redhat.com wrote:
Hi Fu Wei,
On 25/08/2015:01:01:15 AM, fu.wei@linaro.org wrote:
From: Fu Wei fu.wei@linaro.org
This patchset: (1)Introduce Documentation/devicetree/bindings/watchdog/sbsa-gwdt.txt for FDT info of SBSA Generic Watchdog, and give two examples of adding SBSA Generic Watchdog device node into the dts files: foundation-v8.dts and amd-seattle-soc.dtsi.
(2)Introduce "pretimeout" into the watchdog framework, and update Documentation/watchdog/watchdog-kernel-api.txt to introduce: (1)the new elements in the watchdog_device and watchdog_ops struct; (2)the new API "watchdog_init_timeouts". (3)Introduce ARM SBSA watchdog driver: a.Use linux kernel watchdog framework; b.Work with FDT on ARM64; c.Use "pretimeout" in watchdog framework; d.Support getting timeout and pretimeout from parameter and FDT at the driver init stage. e.In the first timeout, do panic to save system context; f.In the second stage, user can still feed the dog without cleaning WS0. By this feature, we can avoid the panic infinite loops, while backing up a large system context in a server. g.In the second stage, can trigger WS1 by setting pretimeout = 0 if necessary. (4)Introduce ACPI GTDT parser: drivers/acpi/gtdt.c Parse SBSA Generic Watchdog Structure in GTDT table of ACPI, and create a platform device with that information. This platform device can be used by This Watchdog driver. drivers/clocksource/arm_arch_timer.c is simplified by this GTDT support.
This patchset has been tested with watchdog daemon (ACPI/FDT, module/build-in) on the following platforms: (1)ARM Foundation v8 model
I tested it with kdump on fedora-arm64 Seattle platform. I enabled watchdog using systemd (with 30s timeout), insured that watchdog is active and then crashed the system. I can see that kdump kernel loads sbsa_wdt and activates watchdog, still vmcore copy is done successfully. My test kernel is here [1]
~Pratyush
[1] https://github.com/pratyushanand/linux/commits/wdt/sbsa-test-kexec