From: Mark Brown <broonie(a)linaro.org>
Reported-by: Laurent Pinchart <laurent.pinchart(a)ideasonboard.com>
Signed-off-by: Mark Brown <broonie(a)linaro.org>
---
Documentation/devicetree/bindings/regulator/gpio-regulator.txt | 2 ++
1 file changed, 2 insertions(+)
diff --git a/Documentation/devicetree/bindings/regulator/gpio-regulator.txt b/Documentation/devicetree/bindings/regulator/gpio-regulator.txt
index 63c659800c03..aaf5f66e66fb 100644
--- a/Documentation/devicetree/bindings/regulator/gpio-regulator.txt
+++ b/Documentation/devicetree/bindings/regulator/gpio-regulator.txt
@@ -10,6 +10,8 @@ Optional properties:
- gpios : GPIO group used to control voltage.
- startup-delay-us : Startup time in microseconds.
- enable-active-high : Polarity of GPIO is active high (default is low).
+- regulator-type : Specifies what is being regulated, must be either
+ "voltage" or "current"
Any property defined as part of the core regulator binding defined in
regulator.txt can also be used.
--
1.8.5.1
From: Al Stone <al.stone(a)linaro.org>
Correct "coolign" to "cooling" and "*_ptg" to "*_pctg" as intended.
This changes comment text only.
Signed-off-by: Al Stone <al.stone(a)linaro.org>
---
drivers/acpi/processor_thermal.c | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/drivers/acpi/processor_thermal.c b/drivers/acpi/processor_thermal.c
index d1d2e7f..1ea79739 100644
--- a/drivers/acpi/processor_thermal.c
+++ b/drivers/acpi/processor_thermal.c
@@ -186,14 +186,14 @@ static int cpufreq_set_cur_state(unsigned int cpu, int state)
#endif
-/* thermal coolign device callbacks */
+/* thermal cooling device callbacks */
static int acpi_processor_max_state(struct acpi_processor *pr)
{
int max_state = 0;
/*
* There exists four states according to
- * cpufreq_thermal_reduction_ptg. 0, 1, 2, 3
+ * cpufreq_thermal_reduction_pctg. 0, 1, 2, 3
*/
max_state += cpufreq_get_max_state(pr->id);
if (pr->flags.throttling)
--
1.8.3.1
From: Mark Brown <broonie(a)linaro.org>
While testing the upcoming dmaengine conversion for the driver Padma
noticed that the DMA data for the secondard DAI is not being correctly
initialised and provided a fix on top of the conversion. Also do this
fix for mainline.
Reported-by: Padmavathi Venna <padma.v(a)samsung.com>
Signed-off-by: Mark Brown <broonie(a)linaro.org>
Cc: stable(a)vger.kernel.org
---
Compile tested only, I don't have hardware to test.
sound/soc/samsung/i2s.c | 5 ++++-
1 file changed, 4 insertions(+), 1 deletion(-)
diff --git a/sound/soc/samsung/i2s.c b/sound/soc/samsung/i2s.c
index a5cbdb4f1655..f9f2227421ea 100644
--- a/sound/soc/samsung/i2s.c
+++ b/sound/soc/samsung/i2s.c
@@ -946,8 +946,11 @@ static int samsung_i2s_dai_probe(struct snd_soc_dai *dai)
struct i2s_dai *i2s = to_info(dai);
struct i2s_dai *other = i2s->pri_dai ? : i2s->sec_dai;
- if (other && other->clk) /* If this is probe on secondary */
+ if (other && other->clk) { /* If this is probe on secondary */
+ snd_soc_dai_init_dma_data(dai, &other->sec_dai->dma_playback,
+ NULL);
goto probe_exit;
+ }
i2s->addr = ioremap(i2s->base, 0x100);
if (i2s->addr == NULL) {
--
1.8.5.1
This is the last part of patch set for core of ARM64 ACPI, and is based
on the patch set part2 "Using ACPI MADT table to initialise SMP and GIC".
ACPI GTDT (Generic Timer Description Table) is used for ARM/ARM64 only,
and contains the information for arch timer initialisation.
This patch trys to convert the arch timer to ACPI using GTDT.
After this patch set was posted, we already finished the SMP, GIC and
arch timer initialisation, which all are essential for ARM64 core system
running, then we will focus on converting the device drivers to ACPI.
Here is the GTDT ASL code I used:
---
platforms/foundation-v8.acpi/gtdt.asl | 35 ++++++++++++++++++++++-----------
1 file changed, 23 insertions(+), 12 deletions(-)
diff --git a/platforms/foundation-v8.acpi/gtdt.asl b/platforms/foundation-v8.acpi/gtdt.asl
index 18c821a..714d61c 100644
--- a/platforms/foundation-v8.acpi/gtdt.asl
+++ b/platforms/foundation-v8.acpi/gtdt.asl
@@ -1,5 +1,6 @@
/*
* Copyright (c) 2013, Al Stone <al.stone(a)linaro.org>
+ * Hanjun Guo <hanjun.guo(a)linaro.org>
*
* [GTDT] Generic Timer Description Table
* Format: [ByteLength] FieldName : HexFieldValue
@@ -21,22 +22,32 @@
[0004] Flags (decoded below) : 00000001
Memory Present : 1
-[0004] Secure PL1 Interrupt : 00000000
-[0004] SPL1 Flags (decoded below) : 00000000
- Trigger Mode : 0
+/* In Foundation model's dts file, the last cell of interrupts
+ * is 0xff01, it means its cpu mask is FF, and trigger type
+ * and flag is 1 = low-to-high edge triggered.
+ *
+ * so in ACPI the Trigger Mode is 1 - Edge triggered, and
+ * Polarity is 0 - Active high as ACPI spec describled.
+ *
+ * using direct mapping for hwirqs, it means that we using
+ * ID [16, 31] for PPI, not [0, 15] used in FDT.
+ */
+[0004] Secure PL1 Interrupt : 0000001d
+[0004] SPL1 Flags (decoded below) : 00000001
+ Trigger Mode : 1
Polarity : 0
-[0004] Non-Secure PL1 Interrupt : 00000000
-[0004] NSPL1 Flags (decoded below) : 00000000
- Trigger Mode : 0
+[0004] Non-Secure PL1 Interrupt : 0000001e
+[0004] NSPL1 Flags (decoded below) : 00000001
+ Trigger Mode : 1
Polarity : 0
-[0004] Virtual Timer Interrupt : 00000000
-[0004] VT Flags (decoded below) : 00000000
- Trigger Mode : 0
+[0004] Virtual Timer Interrupt : 0000001b
+[0004] VT Flags (decoded below) : 00000001
+ Trigger Mode : 1
Polarity : 0
-[0004] Non-Secure PL2 Interrupt : 00000000
-[0004] NSPL2 Flags (decoded below) : 00000000
- Trigger Mode : 0
+[0004] Non-Secure PL2 Interrupt : 0000001a
+[0004] NSPL2 Flags (decoded below) : 00000001
+ Trigger Mode : 1
Polarity : 0
Hanjun Guo (2):
clocksource / arch_timer: Use ACPI GTDT table to initialize arch
timer
ARM64 / clocksource: Use arch_timer_acpi_init()
arch/arm64/kernel/time.c | 4 ++
drivers/clocksource/arm_arch_timer.c | 129 ++++++++++++++++++++++++++++++----
include/clocksource/arm_arch_timer.h | 7 +-
3 files changed, 124 insertions(+), 16 deletions(-)
--
1.7.9.5
