linaro-kernel April 2013

linaro-kernel@lists.linaro.org

91 participants
94 discussions

by Leo Yan

hi Nico & all, We are do some profiling on TC2 board for low power mode, and found there have some long latency for the core/cluster's power on sequence, so want to confirm below questions: 1. From our profiling result, we found if the core_A send IPI to core_B and the core_B run into the function bL_entry_point (or the function mcpm_entry_point in your later patches for mainline) will take about 954us, it's really a long interval. Now we use the firmware is 13.01's version (with has supported BX_ADDRx registers); so the cluster level's power on sequence should be: a) DCC to detect the nIRQOUT/nFIQOUT asserting; b) DCC power on the according cluster; c) the core run into boot monitor code and finally it will use the BX_ADDRx register to jump to the function *bL_entry_point*; Due upper flows are black box for us, so we suspect the time will be consumed by one of these steps; could u or ARM guys can help confirm this question? 2. When we read the spec DAI0318D_v2p_ca15_a7_power_management.pdf and get confirm from ARM support, we know there only have cluster level's power down with CA15_PWRDN_EN/CA7_PWRDN_EN bits. For the core level, we can NOT independently to power off the core if other cores in the same cluster are still powered on. But this is conflicting with TC2's power management code in tc2_pm.c. We can see in the function *tc2_pm_down()*, it will call gic_cpu_if_down() to disable GIC's cpu interface; that means the core cannot receive interrupts anymore and the core will run into WFI. After the core run into WFI, if DCC/SPC detect there have interrupts from GIC's nIRQOUT/nFIQOUT pins, then the DCC/SPC will power on the core (or reset the core) to let the core to resume back, then s/w need enable the GIC's cpu interface for itself. Here the questions are: a) in the function *tc2_pm_down()*, after the core run into WFI state, though DCC/SPC cannot power off the core if the core is NOT the last man of the cluster, but DCC/SPC will reset the core, right? b) how DCC/SPC decide the core is want to run into C1 state or only "WFI" state? DCC/SPC will use the WAKE_INT_MASK bits as the flag? -- Thx, Leo Yan

11 years, 10 months

[PATCH v7] sched: fix init NOHZ_IDLE flag

by Vincent Guittot

11 years, 10 months

[RFC] arm64: Early printk support for virtio-mmio console devices.

by PranavkumarSawargaonkar

From: Pranavkumar Sawargaonkar <pranavkumar(a)linaro.org> This patch implements early printk support for virtio-mmio console devices without using any hypercalls. The current virtio early printk code in kernel expects that hypervisor will provide some mechanism generally a hypercall to support early printk. This patch does not break existing hypercall based early print support. This implementation adds: 1. Early read-write register named early_rw in virtio console's config space. 2. Two host feature flags namely VIRTIO_CONSOLE_F_EARLY_READ and VIRTIO_CONSOLE_F_EARLY_WRITE for telling guest about early-read and early-write capability in console device. Early write mechanism: 1. When a guest wants to out some character, it has to simply write the character to early_rw register in config space of virtio console device. Early read mechanism: 1. When a guest wants to in some character, it has to simply read the early_rw register in config space of virtio console device. Lets say we get 32-bit value X. 2. If most significant bit of X is set (i.e. X & 0x80000000 == 0x80000000) then least significant 8 bits of X represents input charaacter else guest need to try again reading early_rw register. Note: This patch only includes kernel side changes for early printk, the host/hypervisor side emulation of early_rw register is out of scope here. Signed-off-by: Anup Patel <anup.patel(a)linaro.org> --- arch/arm64/kernel/early_printk.c | 24 ++++++++++++++++++++++++ include/uapi/linux/virtio_console.h | 4 ++++ 2 files changed, 28 insertions(+) diff --git a/arch/arm64/kernel/early_printk.c b/arch/arm64/kernel/early_printk.c index ac974f4..a82b5aa 100644 --- a/arch/arm64/kernel/early_printk.c +++ b/arch/arm64/kernel/early_printk.c @@ -25,6 +25,9 @@ #include <linux/amba/serial.h> #include <linux/serial_reg.h> +#include <linux/virtio_ids.h> +#include <linux/virtio_mmio.h> +#include <linux/virtio_console.h> static void __iomem *early_base; static void (*printch)(char ch); @@ -53,6 +56,26 @@ static void smh_printch(char ch) } /* + * VIRTIO MMIO based debug console. + */ +static void virtio_console_early_printch(char ch) +{ + u32 tmp; + struct virtio_console_config *p = early_base + VIRTIO_MMIO_CONFIG; + + tmp = readl_relaxed(early_base + VIRTIO_MMIO_DEVICE_ID); + if (tmp != VIRTIO_ID_CONSOLE) { + return; + } + + tmp = readl_relaxed(early_base + VIRTIO_MMIO_HOST_FEATURES); + if (!(tmp & (1 << VIRTIO_CONSOLE_F_EARLY_WRITE))) { + return; + } + writeb_relaxed(ch, &p->early_rw); +} + +/* * 8250/16550 (8-bit aligned registers) single character TX. */ static void uart8250_8bit_printch(char ch) @@ -82,6 +105,7 @@ static const struct earlycon_match earlycon_match[] __initconst = { { .name = "smh", .printch = smh_printch, }, { .name = "uart8250-8bit", .printch = uart8250_8bit_printch, }, { .name = "uart8250-32bit", .printch = uart8250_32bit_printch, }, + { .name = "virtio-console", .printch = virtio_console_early_printch, }, {} }; diff --git a/include/uapi/linux/virtio_console.h b/include/uapi/linux/virtio_console.h index ee13ab6..1171cb4 100644 --- a/include/uapi/linux/virtio_console.h +++ b/include/uapi/linux/virtio_console.h @@ -38,6 +38,8 @@ /* Feature bits */ #define VIRTIO_CONSOLE_F_SIZE 0 /* Does host provide console size? */ #define VIRTIO_CONSOLE_F_MULTIPORT 1 /* Does host provide multiple ports? */ +#define VIRTIO_CONSOLE_F_EARLY_READ 2 /* Does host support early read? */ +#define VIRTIO_CONSOLE_F_EARLY_WRITE 3 /* Does host support early write? */ #define VIRTIO_CONSOLE_BAD_ID (~(u32)0) @@ -48,6 +50,8 @@ struct virtio_console_config { __u16 rows; /* max. number of ports this device can hold */ __u32 max_nr_ports; + /* early read/write register */ + __u32 early_rw; } __attribute__((packed)); /* -- 1.7.9.5

11 years, 10 months

[PATCH v3] drm/exynos: enable FIMD clocks

by Vikas Sajjan

While migrating to common clock framework (CCF), found that the FIMD clocks were pulled down by the CCF. If CCF finds any clock(s) which has NOT been claimed by any of the drivers, then such clock(s) are PULLed low by CCF. By calling clk_prepare_enable() for FIMD clocks fixes the issue. this patch also replaces clk_disable() with clk_disable_unprepare() during exit. Signed-off-by: Vikas Sajjan <vikas.sajjan(a)linaro.org> --- Changes since v2: - moved clk_prepare_enable() and clk_disable_unprepare() from fimd_probe() to fimd_clock() as suggested by Inki Dae <inki.dae(a)samsung.com> Changes since v1: - added error checking for clk_prepare_enable() and also replaced clk_disable() with clk_disable_unprepare() during exit. --- drivers/gpu/drm/exynos/exynos_drm_fimd.c | 14 +++++++------- 1 file changed, 7 insertions(+), 7 deletions(-) diff --git a/drivers/gpu/drm/exynos/exynos_drm_fimd.c b/drivers/gpu/drm/exynos/exynos_drm_fimd.c index 9537761..f2400c8 100644 --- a/drivers/gpu/drm/exynos/exynos_drm_fimd.c +++ b/drivers/gpu/drm/exynos/exynos_drm_fimd.c @@ -799,18 +799,18 @@ static int fimd_clock(struct fimd_context *ctx, bool enable) if (enable) { int ret; - ret = clk_enable(ctx->bus_clk); + ret = clk_prepare_enable(ctx->bus_clk); if (ret < 0) return ret; - ret = clk_enable(ctx->lcd_clk); + ret = clk_prepare_enable(ctx->lcd_clk); if (ret < 0) { - clk_disable(ctx->bus_clk); + clk_disable_unprepare(ctx->bus_clk); return ret; } } else { - clk_disable(ctx->lcd_clk); - clk_disable(ctx->bus_clk); + clk_disable_unprepare(ctx->lcd_clk); + clk_disable_unprepare(ctx->bus_clk); } return 0; @@ -981,8 +981,8 @@ static int fimd_remove(struct platform_device *pdev) if (ctx->suspended) goto out; - clk_disable(ctx->lcd_clk); - clk_disable(ctx->bus_clk); + clk_disable_unprepare(ctx->lcd_clk); + clk_disable_unprepare(ctx->bus_clk); pm_runtime_set_suspended(dev); pm_runtime_put_sync(dev); -- 1.7.9.5

11 years, 10 months

[PATCH v6] sched: fix init NOHZ_IDLE flag

by Vincent Guittot

On my smp platform which is made of 5 cores in 2 clusters, I have the nr_busy_cpu field of sched_group_power struct that is not null when the platform is fully idle. The root cause is: During the boot sequence, some CPUs reach the idle loop and set their NOHZ_IDLE flag while waiting for others CPUs to boot. But the nr_busy_cpus field is initialized later with the assumption that all CPUs are in the busy state whereas some CPUs have already set their NOHZ_IDLE flag. More generally, the NOHZ_IDLE flag must be initialized when new sched_domains are created in order to ensure that NOHZ_IDLE and nr_busy_cpus are aligned. This condition can be ensured by adding a synchronize_rcu between the destruction of old sched_domains and the creation of new ones so the NOHZ_IDLE flag will not be updated with old sched_domain once it has been initialized. But this solution introduces a additionnal latency in the rebuild sequence that is called during cpu hotplug. As suggested by Frederic Weisbecker, another solution is to have the same rcu lifecycle for both NOHZ_IDLE and sched_domain struct. I have introduce a new sched_domain_rq struct that is the entry point for both sched_domains and objects that must follow the same lifecycle like NOHZ_IDLE flags. They will share the same RCU lifecycle and will be always synchronized. The synchronization is done at the cost of : - an additional indirection for accessing the first sched_domain level - an additional indirection and a rcu_dereference before accessing to the NOHZ_IDLE flag. Change since v5: - minor variable and function name change. - remove a useless null check before kfree - fix a compilation error when NO_HZ is not set. Change since v4: - link both sched_domain and NOHZ_IDLE flag in one RCU object so their states are always synchronized. Change since V3; - NOHZ flag is not cleared if a NULL domain is attached to the CPU - Remove patch 2/2 which becomes useless with latest modifications Change since V2: - change the initialization to idle state instead of busy state so a CPU that enters idle during the build of the sched_domain will not corrupt the initialization state Change since V1: - remove the patch for SCHED softirq on an idle core use case as it was a side effect of the other use cases. Signed-off-by: Vincent Guittot <vincent.guittot(a)linaro.org> --- include/linux/sched.h | 12 ++++++ kernel/sched/core.c | 106 ++++++++++++++++++++++++++++++++++++++++++++----- kernel/sched/fair.c | 35 +++++++++++----- kernel/sched/sched.h | 24 +++++++++-- 4 files changed, 152 insertions(+), 25 deletions(-) diff --git a/include/linux/sched.h b/include/linux/sched.h index d35d2b6..61ad5f1 100644 --- a/include/linux/sched.h +++ b/include/linux/sched.h @@ -959,6 +959,18 @@ struct sched_domain { unsigned long span[0]; }; +/* + * Some flags must stay synchronized with fields of sched_group_power and as a + * consequence they must follow the same lifecycle for the lockless scheme. + * sched_domain_rq encapsulates those flags and sched_domains in one RCU + * object. + */ +struct sched_domain_rq { + struct sched_domain *sd; + unsigned long flags; + struct rcu_head rcu; /* used during destruction */ +}; + static inline struct cpumask *sched_domain_span(struct sched_domain *sd) { return to_cpumask(sd->span); diff --git a/kernel/sched/core.c b/kernel/sched/core.c index 67d0465..d0d3020 100644 --- a/kernel/sched/core.c +++ b/kernel/sched/core.c @@ -5604,6 +5604,15 @@ static void destroy_sched_domains(struct sched_domain *sd, int cpu) destroy_sched_domain(sd, cpu); } +static void destroy_sched_domain_rq(struct sched_domain_rq *sd_rq, int cpu) +{ + if (!sd_rq) + return; + + destroy_sched_domains(sd_rq->sd, cpu); + kfree_rcu(sd_rq, rcu); +} + /* * Keep a special pointer to the highest sched_domain that has * SD_SHARE_PKG_RESOURCE set (Last Level Cache Domain) for this @@ -5634,10 +5643,23 @@ static void update_top_cache_domain(int cpu) * hold the hotplug lock. */ static void -cpu_attach_domain(struct sched_domain *sd, struct root_domain *rd, int cpu) +cpu_attach_domain(struct sched_domain_rq *sd_rq, struct root_domain *rd, + int cpu) { struct rq *rq = cpu_rq(cpu); - struct sched_domain *tmp; + struct sched_domain_rq *old_sd_rq; + struct sched_domain *tmp, *sd = NULL; + + /* + * If we don't have any sched_domain and associated object, we can + * directly jump to the attach sequence otherwise we try to degenerate + * the sched_domain + */ + if (!sd_rq) + goto attach; + + /* Get a pointer to the 1st sched_domain */ + sd = sd_rq->sd; /* Remove the sched domains which do not contribute to scheduling. */ for (tmp = sd; tmp; ) { @@ -5660,14 +5682,17 @@ cpu_attach_domain(struct sched_domain *sd, struct root_domain *rd, int cpu) destroy_sched_domain(tmp, cpu); if (sd) sd->child = NULL; + /* update sched_domain_rq */ + sd_rq->sd = sd; } +attach: sched_domain_debug(sd, cpu); rq_attach_root(rq, rd); - tmp = rq->sd; - rcu_assign_pointer(rq->sd, sd); - destroy_sched_domains(tmp, cpu); + old_sd_rq = rq->sd_rq; + rcu_assign_pointer(rq->sd_rq, sd_rq); + destroy_sched_domain_rq(old_sd_rq, cpu); update_top_cache_domain(cpu); } @@ -5697,12 +5722,14 @@ struct sd_data { }; struct s_data { + struct sched_domain_rq ** __percpu sd_rq; struct sched_domain ** __percpu sd; struct root_domain *rd; }; enum s_alloc { sa_rootdomain, + sa_sd_rq, sa_sd, sa_sd_storage, sa_none, @@ -5937,7 +5964,7 @@ static void init_sched_groups_power(int cpu, struct sched_domain *sd) return; update_group_power(sd, cpu); - atomic_set(&sg->sgp->nr_busy_cpus, sg->group_weight); + atomic_set(&sg->sgp->nr_busy_cpus, 0); } int __weak arch_sd_sibling_asym_packing(void) @@ -6013,6 +6040,8 @@ static void set_domain_attribute(struct sched_domain *sd, static void __sdt_free(const struct cpumask *cpu_map); static int __sdt_alloc(const struct cpumask *cpu_map); +static void __sdrq_free(const struct cpumask *cpu_map, struct s_data *d); +static int __sdrq_alloc(const struct cpumask *cpu_map, struct s_data *d); static void __free_domain_allocs(struct s_data *d, enum s_alloc what, const struct cpumask *cpu_map) @@ -6021,6 +6050,9 @@ static void __free_domain_allocs(struct s_data *d, enum s_alloc what, case sa_rootdomain: if (!atomic_read(&d->rd->refcount)) free_rootdomain(&d->rd->rcu); /* fall through */ + case sa_sd_rq: + __sdrq_free(cpu_map, d); /* fall through */ + free_percpu(d->sd_rq); /* fall through */ case sa_sd: free_percpu(d->sd); /* fall through */ case sa_sd_storage: @@ -6040,9 +6072,14 @@ static enum s_alloc __visit_domain_allocation_hell(struct s_data *d, d->sd = alloc_percpu(struct sched_domain *); if (!d->sd) return sa_sd_storage; + d->sd_rq = alloc_percpu(struct sched_domain_rq *); + if (!d->sd_rq) + return sa_sd; + if (__sdrq_alloc(cpu_map, d)) + return sa_sd_rq; d->rd = alloc_rootdomain(); if (!d->rd) - return sa_sd; + return sa_sd_rq; return sa_rootdomain; } @@ -6468,6 +6505,47 @@ static void __sdt_free(const struct cpumask *cpu_map) } } +static int __sdrq_alloc(const struct cpumask *cpu_map, struct s_data *d) +{ + int j; + + for_each_cpu(j, cpu_map) { + struct sched_domain_rq *sd_rq; + + sd_rq = kzalloc_node(sizeof(struct sched_domain_rq), + GFP_KERNEL, cpu_to_node(j)); + if (!sd_rq) + return -ENOMEM; + + *per_cpu_ptr(d->sd_rq, j) = sd_rq; + } + + return 0; +} + +static void __sdrq_free(const struct cpumask *cpu_map, struct s_data *d) +{ + int j; + + for_each_cpu(j, cpu_map) + kfree(*per_cpu_ptr(d->sd_rq, j)); +} + +static void build_sched_domain_rq(struct s_data *d, int cpu) +{ + struct sched_domain_rq *sd_rq; + struct sched_domain *sd; + + /* Attach sched_domain to sched_domain_rq */ + sd = *per_cpu_ptr(d->sd, cpu); + sd_rq = *per_cpu_ptr(d->sd_rq, cpu); + sd_rq->sd = sd; +#ifdef NO_HZ + /* Init flags */ + set_bit(NOHZ_IDLE, rq_domain_flags(sd_rq)); +#endif +} + struct sched_domain *build_sched_domain(struct sched_domain_topology_level *tl, struct s_data *d, const struct cpumask *cpu_map, struct sched_domain_attr *attr, struct sched_domain *child, @@ -6497,6 +6575,7 @@ static int build_sched_domains(const struct cpumask *cpu_map, struct sched_domain_attr *attr) { enum s_alloc alloc_state = sa_none; + struct sched_domain_rq *sd_rq; struct sched_domain *sd; struct s_data d; int i, ret = -ENOMEM; @@ -6549,11 +6628,18 @@ static int build_sched_domains(const struct cpumask *cpu_map, } } + /* Init objects that must follow the sched_domain lifecycle */ + for_each_cpu(i, cpu_map) { + build_sched_domain_rq(&d, i); + } + /* Attach the domains */ rcu_read_lock(); for_each_cpu(i, cpu_map) { - sd = *per_cpu_ptr(d.sd, i); - cpu_attach_domain(sd, d.rd, i); + sd_rq = *per_cpu_ptr(d.sd_rq, i); + cpu_attach_domain(sd_rq, d.rd, i); + /* claim allocation of sched_domain_rq object */ + *per_cpu_ptr(d.sd_rq, i) = NULL; } rcu_read_unlock(); @@ -6984,7 +7070,7 @@ void __init sched_init(void) rq->last_load_update_tick = jiffies; #ifdef CONFIG_SMP - rq->sd = NULL; + rq->sd_rq = NULL; rq->rd = NULL; rq->cpu_power = SCHED_POWER_SCALE; rq->post_schedule = 0; diff --git a/kernel/sched/fair.c b/kernel/sched/fair.c index 7a33e59..2b294f1 100644 --- a/kernel/sched/fair.c +++ b/kernel/sched/fair.c @@ -5392,31 +5392,39 @@ static inline void nohz_balance_exit_idle(int cpu) static inline void set_cpu_sd_state_busy(void) { + struct sched_domain_rq *sd_rq; struct sched_domain *sd; int cpu = smp_processor_id(); - if (!test_bit(NOHZ_IDLE, nohz_flags(cpu))) - return; - clear_bit(NOHZ_IDLE, nohz_flags(cpu)); - rcu_read_lock(); - for_each_domain(cpu, sd) + sd_rq = rcu_dereference_domain_rq(cpu); + + if (!sd_rq || !test_bit(NOHZ_IDLE, rq_domain_flags(sd_rq))) + goto unlock; + clear_bit(NOHZ_IDLE, rq_domain_flags(sd_rq)); + + for_each_domain_from_rq(sd_rq, sd) atomic_inc(&sd->groups->sgp->nr_busy_cpus); +unlock: rcu_read_unlock(); } void set_cpu_sd_state_idle(void) { + struct sched_domain_rq *sd_rq; struct sched_domain *sd; int cpu = smp_processor_id(); - if (test_bit(NOHZ_IDLE, nohz_flags(cpu))) - return; - set_bit(NOHZ_IDLE, nohz_flags(cpu)); - rcu_read_lock(); - for_each_domain(cpu, sd) + sd_rq = rcu_dereference_domain_rq(cpu); + + if (!sd_rq || test_bit(NOHZ_IDLE, rq_domain_flags(sd_rq))) + goto unlock; + set_bit(NOHZ_IDLE, rq_domain_flags(sd_rq)); + + for_each_domain_from_rq(sd_rq, sd) atomic_dec(&sd->groups->sgp->nr_busy_cpus); +unlock: rcu_read_unlock(); } @@ -5673,7 +5681,12 @@ static void run_rebalance_domains(struct softirq_action *h) static inline int on_null_domain(int cpu) { - return !rcu_dereference_sched(cpu_rq(cpu)->sd); + struct sched_domain_rq *sd_rq = + rcu_dereference_sched(cpu_rq(cpu)->sd_rq); + struct sched_domain *sd = NULL; + if (sd_rq) + sd = sd_rq->sd; + return !sd; } /* diff --git a/kernel/sched/sched.h b/kernel/sched/sched.h index cc03cfd..ce27e3b 100644 --- a/kernel/sched/sched.h +++ b/kernel/sched/sched.h @@ -417,7 +417,7 @@ struct rq { #ifdef CONFIG_SMP struct root_domain *rd; - struct sched_domain *sd; + struct sched_domain_rq *sd_rq; unsigned long cpu_power; @@ -505,21 +505,37 @@ DECLARE_PER_CPU(struct rq, runqueues); #ifdef CONFIG_SMP -#define rcu_dereference_check_sched_domain(p) \ +#define rcu_dereference_check_sched_domain_rq(p) \ rcu_dereference_check((p), \ lockdep_is_held(&sched_domains_mutex)) +#define rcu_dereference_domain_rq(cpu) \ + rcu_dereference_check_sched_domain_rq(cpu_rq(cpu)->sd_rq) + +#define rcu_dereference_check_sched_domain(cpu) ({ \ + struct sched_domain_rq *__sd_rq = rcu_dereference_domain_rq(cpu); \ + struct sched_domain *__sd = NULL; \ + if (__sd_rq) \ + __sd = __sd_rq->sd; \ + __sd; \ +}) + +#define rq_domain_flags(sd_rq) (&sd_rq->flags) + /* - * The domain tree (rq->sd) is protected by RCU's quiescent state transition. + * The domain tree (rq->sd_rq) is protected by RCU's quiescent state transition. * See detach_destroy_domains: synchronize_sched for details. * * The domain tree of any CPU may only be accessed from within * preempt-disabled sections. */ #define for_each_domain(cpu, __sd) \ - for (__sd = rcu_dereference_check_sched_domain(cpu_rq(cpu)->sd); \ + for (__sd = rcu_dereference_check_sched_domain(cpu); \ __sd; __sd = __sd->parent) +#define for_each_domain_from_rq(sd_rq, __sd) \ + for (__sd = sd_rq->sd; __sd; __sd = __sd->parent) + #define for_each_lower_domain(sd) for (; sd; sd = sd->child) /** -- 1.7.9.5

11 years, 10 months

Exynos 4210 oops on linux-linaro kernel

by Daniel Lezcano

Hi, I compiled and booted the latest linaro kernel on exynos4 but it oops at boot time [1]. I used the config file from /proc/config.gz coming from a working kernel [2]. [1] https://pastebin.linaro.org/view/7ee664a0 [2] https://pastebin.linaro.org/view/69133311 -- <http://www.linaro.org/> Linaro.org │ Open source software for ARM SoCs Follow Linaro: <http://www.facebook.com/pages/Linaro> Facebook | <http://twitter.com/#!/linaroorg> Twitter | <http://www.linaro.org/linaro-blog/> Blog

11 years, 10 months

Re: linux-next: Tree for Apr 9 [cpufreq: NULL pointer deref]

by Viresh Kumar

On 10 April 2013 11:44, Sedat Dilek <sedat.dilek(a)gmail.com> wrote: > I found this "[RFC PATCH] kbuild: Build linux-tools package with 'make > deb-pkg'" from February 2012. > Can't say what happened to it... Sedat, Sorry for being late. I am down with Fever and throat infection since few days. Still struggling with it.. There are few things i tried. Firstly the tag: next-20130326 is bad as there are some bad commits in cpufreq core in it. I then tried latest linux-next/master on my Thinkpad (model name : Intel(R) Core(TM) i7-2640M CPU @ 2.80GHz) and couldn't boot it up. My ubuntu just hanged. Then i tried Rafael's linux-next branch 079576f Merge branch 'pm-cpufreq-next' into linux-next And couldn't find any issues with it. I am easily able to remove/add cpus at runtime.. Can you give this branch a try? -- viresh

11 years, 10 months

[Patch] configs: Add config fragments for big LITTLE IKS

by Naresh Kamboju

Hi, This patch is to add config fragments used to enable most of the features used by big LITTLE IKS. Signed-off-by: Naresh Kamboju <naresh.kamboju(a)linaro.org> CC: Viresh Kumar <viresh.kumar(a)linaro.org> CC: Andrey Konovalov <andrey.konovalov(a)linaro.org> commit b547e2d829d13bb391b062dfd9837bdd17a8450c Author: Naresh Kamboju <naresh.kamboju(a)linaro.org> AuthorDate: Mon Apr 22 12:57:05 2013 +0530 Commit: Naresh Kamboju <naresh.kamboju(a)linaro.org> CommitDate: Mon Apr 22 12:57:05 2013 +0530 configs: Add config fragments for big LITTLE IKS This patch adds config fragments used to enable most of the features used by big LITTLE IKS. Signed-off-by: Naresh Kamboju <naresh.kamboju(a)linaro.org> diff --git a/linaro/configs/big-LITTLE-IKS.conf b/linaro/configs/big-LITTLE-IKS.conf new file mode 100644 index 0000000..b067fde --- /dev/null +++ b/linaro/configs/big-LITTLE-IKS.conf @@ -0,0 +1,5 @@ +CONFIG_BIG_LITTLE=y +CONFIG_BL_SWITCHER=y +CONFIG_ARM_DT_BL_CPUFREQ=y +CONFIG_ARM_VEXPRESS_BL_CPUFREQ=y +CONFIG_CPU_FREQ_GOV_USERSPACE=y

11 years, 10 months

[PATCH 00/18] cpuidle: code consolidation

by Daniel Lezcano

This patchset series provide some code consolidation across the different cpuidle drivers. It contains two parts, the first one is the removal of the time keeping flag and the second one, is a common initialization routine. All the drivers use the en_core_tk_irqen flag, which means it is not necessary to make the time computation optional. We can remove this flag and assume the cpuidle framework always manage this operation. The cpuidle code initialization is duplicated across the different drivers in the same manner. The repeating pattern is: SMP: cpuidle_register_driver(drv); for_each_possible_cpu(cpu) { dev = per_cpu(cpuidle_device, cpu); cpuidle_register_device(dev); } UP: cpuidle_register_driver(drv); cpuidle_register_device(dev); As on a UP machine the macro 'for_each_cpu' is a one iteration loop, using the initialization loop from SMP to UP works. The patchset does some cleanup for different drivers in order to make the init code the same. Then it introduces a generic function: cpuidle_register(struct cpuidle_driver *drv, struct cpumask *cpumask) The cpumask is for the coupled idle states. The drivers are then modified to take into account this new function and to remove the duplicated code. The benefit is observable in the diffstat: 332 lines of code removed. Tested-on: u8500 Tested-on: at91 Tested-on: intel i5 Tested-on: OMAP4 Compiled with and without CPU_IDLE for: u8500, at91, davinci, exynos, imx5, imx6, kirkwood, multi_v7 (for calxeda), omap2plus, s3c64, tegra1, tegra2, tegra3 Daniel Lezcano (18): ARM: OMAP3: remove cpuidle_wrap_enter cpuidle: remove en_core_tk_irqen flag ARM: ux500: cpuidle: replace for_each_online_cpu by for_each_possible_cpu ARM: imx: cpuidle: create separate drivers for imx5/imx6 cpuidle: make a single register function for all ARM: ux500: cpuidle: use init/exit common routine ARM: at91: cpuidle: use init/exit common routine ARM: OMAP3: cpuidle: use init/exit common routine ARM: s3c64xx: cpuidle: use init/exit common routine ARM: tegra1: cpuidle: use init/exit common routine ARM: shmobile: cpuidle: use init/exit common routine ARM: OMAP4: cpuidle: use init/exit common routine ARM: tegra2: cpuidle: use init/exit common routine ARM: tegra3: cpuidle: use init/exit common routine ARM: calxeda: cpuidle: use init/exit common routine ARM: kirkwood: cpuidle: use init/exit common routine ARM: davinci: cpuidle: use init/exit common routine ARM: imx: cpuidle: use init/exit common routine arch/arm/mach-at91/cpuidle.c | 18 +-- arch/arm/mach-davinci/cpuidle.c | 21 +--- arch/arm/mach-exynos/cpuidle.c | 1 - arch/arm/mach-imx/Makefile | 1 + arch/arm/mach-imx/cpuidle-imx5.c | 40 +++++++ arch/arm/mach-imx/cpuidle-imx6q.c | 3 +- arch/arm/mach-imx/cpuidle.c | 80 ------------- arch/arm/mach-imx/cpuidle.h | 10 +- arch/arm/mach-imx/pm-imx5.c | 30 +---- arch/arm/mach-omap2/cpuidle34xx.c | 49 ++------ arch/arm/mach-omap2/cpuidle44xx.c | 23 +--- arch/arm/mach-s3c64xx/cpuidle.c | 15 +-- arch/arm/mach-shmobile/cpuidle.c | 11 +- arch/arm/mach-shmobile/pm-sh7372.c | 1 - arch/arm/mach-tegra/cpuidle-tegra114.c | 27 +---- arch/arm/mach-tegra/cpuidle-tegra20.c | 34 +----- arch/arm/mach-tegra/cpuidle-tegra30.c | 28 +---- arch/arm/mach-ux500/cpuidle.c | 33 +----- arch/powerpc/platforms/pseries/processor_idle.c | 1 - arch/sh/kernel/cpu/shmobile/cpuidle.c | 1 - arch/x86/kernel/apm_32.c | 1 - drivers/acpi/processor_idle.c | 1 - drivers/cpuidle/cpuidle-calxeda.c | 53 +-------- drivers/cpuidle/cpuidle-kirkwood.c | 18 +-- drivers/cpuidle/cpuidle.c | 137 ++++++++++++++--------- drivers/idle/intel_idle.c | 1 - include/linux/cpuidle.h | 20 ++-- 27 files changed, 162 insertions(+), 496 deletions(-) create mode 100644 arch/arm/mach-imx/cpuidle-imx5.c delete mode 100644 arch/arm/mach-imx/cpuidle.c -- 1.7.9.5

11 years, 10 months

[PATCH 1/2] cpufreq: ARM big LITTLE: put DT nodes after using them

by Viresh Kumar

DT nodes should be put using of_node_put() to balance their usage counts. This is not done properly in ARM's big LITTLE driver. Fix it. Signed-off-by: Viresh Kumar <viresh.kumar(a)linaro.org> --- Hi Rafael, These are fixes for 3.10 drivers/cpufreq/arm_big_little_dt.c | 43 +++++++++++++++++++++++++------------ 1 file changed, 29 insertions(+), 14 deletions(-) diff --git a/drivers/cpufreq/arm_big_little_dt.c b/drivers/cpufreq/arm_big_little_dt.c index 452ff46..44be311 100644 --- a/drivers/cpufreq/arm_big_little_dt.c +++ b/drivers/cpufreq/arm_big_little_dt.c @@ -31,22 +31,28 @@ static int dt_init_opp_table(struct device *cpu_dev) { - struct device_node *np = NULL; + struct device_node *np, *parent; int count = 0, ret; - for_each_child_of_node(of_find_node_by_path("/cpus"), np) { + parent = of_find_node_by_path("/cpus"); + if (!parent) { + pr_err("failed to find OF /cpus\n"); + return -ENOENT; + } + + for_each_child_of_node(parent, np) { if (count++ != cpu_dev->id) continue; - if (!of_get_property(np, "operating-points", NULL)) - return -ENODATA; - - cpu_dev->of_node = np; - - ret = of_init_opp_table(cpu_dev); - if (ret) - return ret; - - return 0; + if (!of_get_property(np, "operating-points", NULL)) { + ret = -ENODATA; + } else { + cpu_dev->of_node = np; + ret = of_init_opp_table(cpu_dev); + } + of_node_put(np); + of_node_put(parent); + + return ret; } return -ENODEV; @@ -54,15 +60,24 @@ static int dt_init_opp_table(struct device *cpu_dev) static int dt_get_transition_latency(struct device *cpu_dev) { - struct device_node *np = NULL; + struct device_node *np, *parent; u32 transition_latency = CPUFREQ_ETERNAL; int count = 0; - for_each_child_of_node(of_find_node_by_path("/cpus"), np) { + parent = of_find_node_by_path("/cpus"); + if (!parent) { + pr_err("failed to find OF /cpus\n"); + return -ENOENT; + } + + for_each_child_of_node(parent, np) { if (count++ != cpu_dev->id) continue; of_property_read_u32(np, "clock-latency", &transition_latency); + of_node_put(np); + of_node_put(parent); + return 0; } -- 1.7.12.rc2.18.g61b472e

11 years, 10 months

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linaro-kernel April 2013