changes since v2:
- split the 5250 related modifications into a separate patch.
- placed the RTC node as per the alphabetical order in the DTS file as
suggested by Kukjin Kim <kgene(a)kernel.org>.
changes since v1:
- made DT node status as "okay" in the dtsi file itself.
-
Vikas Sajjan (2):
ARM: dts: Add RTC DT node to Exynos5420 SoC
ARM: dts: Fix the RTC DT node name for Exynos5250 SoC
arch/arm/boot/dts/exynos5.dtsi | 2 +-
arch/arm/boot/dts/exynos5250.dtsi | 3 ++-
arch/arm/boot/dts/exynos5420.dtsi | 6 ++++++
3 files changed, 9 insertions(+), 2 deletions(-)
--
1.7.9.5
Systems with large external L3-cache (few MBs), might have dirty
content belonging to the guest page in L3-cache. To tackle this,
we need to flush such dirty content from d-cache so that guest
will see correct contents of guest page when guest MMU is disabled.
The patch fixes coherent_icache_guest_page() for external L3-cache.
Signed-off-by: Pranavkumar Sawargaonkar <pranavkumar(a)linaro.org>
Signed-off-by: Anup Patel <anup.patel(a)linaro.org>
---
arch/arm64/include/asm/kvm_mmu.h | 2 ++
1 file changed, 2 insertions(+)
diff --git a/arch/arm64/include/asm/kvm_mmu.h b/arch/arm64/include/asm/kvm_mmu.h
index efe609c..5129038 100644
--- a/arch/arm64/include/asm/kvm_mmu.h
+++ b/arch/arm64/include/asm/kvm_mmu.h
@@ -123,6 +123,8 @@ static inline void coherent_icache_guest_page(struct kvm *kvm, gfn_t gfn)
if (!icache_is_aliasing()) { /* PIPT */
unsigned long hva = gfn_to_hva(kvm, gfn);
flush_icache_range(hva, hva + PAGE_SIZE);
+ /* Flush d-cache for systems with external caches. */
+ __flush_dcache_area((void *) hva, PAGE_SIZE);
} else if (!icache_is_aivivt()) { /* non ASID-tagged VIVT */
/* any kind of VIPT cache */
__flush_icache_all();
--
1.7.9.5
From: Mark Brown <broonie(a)linaro.org>
The Arndale has a SMSC USB3503 connected in hardware only mode like a PHY,
support it using the usb-nop-xceiv binding.
Note that due to a regrettable decision to use a regulator to represent
the reset signal this uses a fixed voltage regulator to do that, there
is a plan to use the reset controller binding once that is merged so it
does not seem worthwhile to fix the usb-nop-xceiv driver at this point.
Signed-off-by: Mark Brown <broonie(a)linaro.org>
---
This doesn't 100% work right now since we don't yet have a solution to
ensure that this gets started after the USB controller but those
modifications are small (or can be done at runtime with module loading).
arch/arm/boot/dts/exynos5250-arndale.dts | 18 ++++++++++++++++++
1 file changed, 18 insertions(+)
diff --git a/arch/arm/boot/dts/exynos5250-arndale.dts b/arch/arm/boot/dts/exynos5250-arndale.dts
index 96d528d..e477e23 100644
--- a/arch/arm/boot/dts/exynos5250-arndale.dts
+++ b/arch/arm/boot/dts/exynos5250-arndale.dts
@@ -539,4 +539,22 @@
rtc {
status = "okay";
};
+
+ usb_hub_bus {
+ compatible = "simple-bus";
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ // SMSC USB3503 connected in hardware only mode as a PHY
+ usb_hub: usb_hub {
+ compatible = "smsc,usb3503a";
+
+ reset-gpios = <&gpx3 5 1>;
+ connect-gpios = <&gpd1 7 1>;
+ };
+ };
+
+ usb@12110000 {
+ usb-phy = <&usb2_phy>;
+ };
};
--
1.8.4.rc2
E.g. in a Makefile to have
obj-$(CONFIG_FOO) += common-thing.o foo.o
obj-$(CONFIG_BAR) += common-thing.o bar.o
where both FOO and BAR can be enabled at the same time?
Looks a bit suspect to me. My instinct would be to invent CONFIG_BAZ to
compile common-thing.o and make FOO and BAR select it. Or possibly some
makefile conditional OR expression I can't think of off the top of my
head.
--
Tixy
In case of BE8 kernel data is in BE order whereas code stays in LE
order. sigreturn_codes array initializer need to use macros from
<asm/opcodes.h> to setup instructions code in endian neutral way.
Problem was discovered during ltp testing of BE system: all rt_sig*
tests failed. Tested against the same tests in both BE and LE modes.
Signed-off-by: Victor Kamensky <victor.kamensky(a)linaro.org>
---
arch/arm/kernel/signal.c | 13 +++++++------
1 file changed, 7 insertions(+), 6 deletions(-)
diff --git a/arch/arm/kernel/signal.c b/arch/arm/kernel/signal.c
index ab33042..333a67f 100644
--- a/arch/arm/kernel/signal.c
+++ b/arch/arm/kernel/signal.c
@@ -20,25 +20,26 @@
#include <asm/ucontext.h>
#include <asm/unistd.h>
#include <asm/vfp.h>
+#include <asm/opcodes.h>
/*
* For ARM syscalls, we encode the syscall number into the instruction.
*/
-#define SWI_SYS_SIGRETURN (0xef000000|(__NR_sigreturn)|(__NR_OABI_SYSCALL_BASE))
-#define SWI_SYS_RT_SIGRETURN (0xef000000|(__NR_rt_sigreturn)|(__NR_OABI_SYSCALL_BASE))
+#define SWI_SYS_SIGRETURN (__opcode_to_mem_arm(0xef000000|(__NR_sigreturn)|(__NR_OABI_SYSCALL_BASE)))
+#define SWI_SYS_RT_SIGRETURN (__opcode_to_mem_arm(0xef000000|(__NR_rt_sigreturn)|(__NR_OABI_SYSCALL_BASE)))
/*
* With EABI, the syscall number has to be loaded into r7.
*/
-#define MOV_R7_NR_SIGRETURN (0xe3a07000 | (__NR_sigreturn - __NR_SYSCALL_BASE))
-#define MOV_R7_NR_RT_SIGRETURN (0xe3a07000 | (__NR_rt_sigreturn - __NR_SYSCALL_BASE))
+#define MOV_R7_NR_SIGRETURN (__opcode_to_mem_arm(0xe3a07000 | (__NR_sigreturn - __NR_SYSCALL_BASE)))
+#define MOV_R7_NR_RT_SIGRETURN (__opcode_to_mem_arm(0xe3a07000 | (__NR_rt_sigreturn - __NR_SYSCALL_BASE)))
/*
* For Thumb syscalls, we pass the syscall number via r7. We therefore
* need two 16-bit instructions.
*/
-#define SWI_THUMB_SIGRETURN (0xdf00 << 16 | 0x2700 | (__NR_sigreturn - __NR_SYSCALL_BASE))
-#define SWI_THUMB_RT_SIGRETURN (0xdf00 << 16 | 0x2700 | (__NR_rt_sigreturn - __NR_SYSCALL_BASE))
+#define SWI_THUMB_SIGRETURN (__opcode_to_mem_arm(0xdf00 << 16 | 0x2700 | (__NR_sigreturn - __NR_SYSCALL_BASE)))
+#define SWI_THUMB_RT_SIGRETURN (__opcode_to_mem_arm(0xdf00 << 16 | 0x2700 | (__NR_rt_sigreturn - __NR_SYSCALL_BASE)))
static const unsigned long sigreturn_codes[7] = {
MOV_R7_NR_SIGRETURN, SWI_SYS_SIGRETURN, SWI_THUMB_SIGRETURN,
--
1.8.1.4
Hi Rafael,
The following changes since commit d4e4ab86bcba5a72779c43dc1459f71fea3d89c8:
Linux 3.11-rc5 (2013-08-11 18:04:20 -0700)
are available in the git repository at:
git://git.linaro.org/people/vireshk/linux.git cpufreq-fixes
for you to fetch changes up to 45e12086263a53f16b489fc7f4f8f6348a688661:
cpufreq: fix EXYNOS drivers selection (2013-08-12 12:00:21 +0530)
----------------------------------------------------------------
Amit Daniel Kachhap (1):
cpufreq: exynos5440: Fix to skip when new frequency same as current
Bartlomiej Zolnierkiewicz (1):
cpufreq: fix EXYNOS drivers selection
drivers/cpufreq/Kconfig.arm | 36 ++++++++++++++++++++++++------------
drivers/cpufreq/exynos-cpufreq.c | 1 -
drivers/cpufreq/exynos-cpufreq.h | 21 +++++++++++++++++++++
drivers/cpufreq/exynos5440-cpufreq.c | 3 +++
4 files changed, 48 insertions(+), 13 deletions(-)
--
viresh