On 7 August 2013 17:00, Sudeep KarkadaNagesha
<Sudeep.KarkadaNagesha(a)arm.com> wrote:
> Any particular reason we need this check in all drivers after your
> commit: 5a1c0228 "cpufreq: Avoid calling cpufreq driver's target()
> routine if target_freq == policy->cur"
>
> I think it can removed from all drivers, am I missing something ?
Yeah.. Just a bit though :)
So, cpufreq core checks this when we call target for any frequency.
Now, cpufreq driver actually does a cpufreq_frequency_table_target()
and so the frequency may vary than what is requested, in case
requested frequency isn't picked from the table.
In such cases we check it again to be sure that we aren't at this
frequency already..
Earlier I thought of calling cpufreq_frequency_table_target() in the
core before calling target but dropped the idea as I wasn't sure of
the side effects.
@Rafael: Do you see why we shouldn't/can't call
cpufreq_frequency_table_target() from the core itself and so drivers
never need to do it?
From: Mark Brown <broonie(a)linaro.org>
If someone provided meaningful error codes from reset() we should tell the
user what they were.
Signed-off-by: Mark Brown <broonie(a)linaro.org>
---
drivers/usb/core/hcd.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/usb/core/hcd.c b/drivers/usb/core/hcd.c
index dc1346f..c7fdf10 100644
--- a/drivers/usb/core/hcd.c
+++ b/drivers/usb/core/hcd.c
@@ -2580,7 +2580,7 @@ int usb_add_hcd(struct usb_hcd *hcd,
* should already have been reset (and boot firmware kicked off etc).
*/
if (hcd->driver->reset && (retval = hcd->driver->reset(hcd)) < 0) {
- dev_err(hcd->self.controller, "can't setup\n");
+ dev_err(hcd->self.controller, "can't setup: %d\n", retval);
goto err_hcd_driver_setup;
}
hcd->rh_pollable = 1;
--
1.8.4.rc1
From: root <root(a)si-cspbld63.lge.net>
This patch adds a Kconfig dependency on MACH_KS8695,MACH_CM* or MACH_IM*
being available before PCI can be enabled. Without this patch,build system
can lead to issues. This was discovered during randconfig testing,
without PCI if any one of MACH_KS8695,MACH_CM* or MACH_IM* being enabled,
leading to the following error:
LD init/built-in.o
arch/arm/mach-ks8695/built-in.o: In function `og_register_pci':
arch/arm/mach-ks8695/board-og.c:47:undefined reference to `ks8695_init_pci'
make: *** [vmlinux] Error 1
Signed-off-by: Manjunath Goudar <manjunath.goudar(a)linaro.org>
Cc: Arnd Bergmann <arnd(a)arndb.de>
Cc: Deepak Saxena <dsaxena(a)linaro.org>
Cc: Greg Ungerer <gerg(a)uclinux.org>
Cc: linux-arm-kernel(a)lists.infradead.org
---
arch/arm/mach-ks8695/Kconfig | 5 +++++
1 file changed, 5 insertions(+)
diff --git a/arch/arm/mach-ks8695/Kconfig b/arch/arm/mach-ks8695/Kconfig
index a545976..29d7d9f 100644
--- a/arch/arm/mach-ks8695/Kconfig
+++ b/arch/arm/mach-ks8695/Kconfig
@@ -5,6 +5,7 @@ menu "Kendin/Micrel KS8695 Implementations"
config MACH_KS8695
bool "KS8695 development board"
select MIGHT_HAVE_PCI
+ depends on PCI
help
Say 'Y' here if you want your kernel to run on the original
Kendin-Micrel KS8695 development board.
@@ -53,6 +54,7 @@ config MACH_CM4002
config MACH_CM4008
bool "OpenGear CM4008"
select MIGHT_HAVE_PCI
+ depends on PCI
help
Say 'Y' here if you want your kernel to support the OpenGear
CM4008 Console Server. See http://www.opengear.com for more
@@ -61,6 +63,7 @@ config MACH_CM4008
config MACH_CM41xx
bool "OpenGear CM41xx"
select MIGHT_HAVE_PCI
+ depends on PCI
help
Say 'Y' here if you want your kernel to support the OpenGear
CM4016 or CM4048 Console Servers. See http://www.opengear.com for
@@ -69,6 +72,7 @@ config MACH_CM41xx
config MACH_IM4004
bool "OpenGear IM4004"
select MIGHT_HAVE_PCI
+ depends on PCI
help
Say 'Y' here if you want your kernel to support the OpenGear
IM4004 Secure Access Server. See http://www.opengear.com for
@@ -77,6 +81,7 @@ config MACH_IM4004
config MACH_IM42xx
bool "OpenGear IM42xx"
select MIGHT_HAVE_PCI
+ depends on PCI
help
Say 'Y' here if you want your kernel to support the OpenGear
IM4216 or IM4248 Console Servers. See http://www.opengear.com for
--
1.8.1.2
While trying to get boot-logo up on exynos5420 SMDK which has eDP panel
connected with resolution 2560x1600, following error occured even with
IOMMU enabled:
[0.880000] [drm:lowlevel_buffer_allocate] *ERROR* failed to allocate buffer.
[0.890000] [drm] Initialized exynos 1.0.0 20110530 on minor 0
To address the cases where physically contiguous memory MAY NOT be a
mandatory requirement for fb, the patch adds a feature to get non physically
contiguous memory for fb if physically contiguous memory allocation fails
and if IOMMU is supported.
Signed-off-by: Vikas Sajjan <vikas.sajjan(a)linaro.org>
Signed-off-by: Arun Kumar <arun.kk(a)samsung.com>
Reviewed-by: Rob Clark <robdclark(a)gmail.com>
---
changes since v3:
- addressed nits pointed out by Sylwester Nawrocki <s.nawrocki(a)samsung.com>
and Sachin Kamat <sachin.kamat(a)linaro.org>.
changes since v2:
- addressed comments given by Tomasz Figa <tomasz.figa(a)gmail.com>.
changes since v1:
- Modified to add the fallback patch if CONTIG alloc fails as suggested
by Rob Clark robdclark(a)gmail.com and Tomasz Figa <tomasz.figa(a)gmail.com>.
- changed the commit message.
---
drivers/gpu/drm/exynos/exynos_drm_fbdev.c | 15 +++++++++++++--
1 file changed, 13 insertions(+), 2 deletions(-)
diff --git a/drivers/gpu/drm/exynos/exynos_drm_fbdev.c b/drivers/gpu/drm/exynos/exynos_drm_fbdev.c
index 8e60bd6..5292fc7 100644
--- a/drivers/gpu/drm/exynos/exynos_drm_fbdev.c
+++ b/drivers/gpu/drm/exynos/exynos_drm_fbdev.c
@@ -16,6 +16,7 @@
#include <drm/drm_crtc.h>
#include <drm/drm_fb_helper.h>
#include <drm/drm_crtc_helper.h>
+#include <drm/exynos_drm.h>
#include "exynos_drm_drv.h"
#include "exynos_drm_fb.h"
@@ -165,8 +166,18 @@ static int exynos_drm_fbdev_create(struct drm_fb_helper *helper,
size = mode_cmd.pitches[0] * mode_cmd.height;
- /* 0 means to allocate physically continuous memory */
- exynos_gem_obj = exynos_drm_gem_create(dev, 0, size);
+ exynos_gem_obj = exynos_drm_gem_create(dev, EXYNOS_BO_CONTIG, size);
+ /*
+ * If physically contiguous memory allocation fails and if IOMMU is
+ * supported then try to get buffer from non physically contiguous
+ * memory area.
+ */
+ if (IS_ERR(exynos_gem_obj) && is_drm_iommu_supported(dev)) {
+ dev_warn(&pdev->dev, "contiguous FB allocation failed, falling back to non-contiguous\n");
+ exynos_gem_obj = exynos_drm_gem_create(dev, EXYNOS_BO_NONCONTIG,
+ size);
+ }
+
if (IS_ERR(exynos_gem_obj)) {
ret = PTR_ERR(exynos_gem_obj);
goto err_release_framebuffer;
--
1.7.9.5
Added linaro-kernel & patches(a)linaro.org in cc list..
On 6 August 2013 09:27, Shaojie Sun <shaojie.sun(a)linaro.org> wrote:
> By default gate clock could be enable and disable. but
> in some debug condition, must keep clock on, and never be closed.
> setting this flag then gate clock never be closed.
Consider rewriting it as:
By default gate clk can be enabled/disabled but during debugging we
may want to disable clk-disabling feature.
This patch adds a flag for it..
> Signed-off-by: Shaojie Sun <shaojie.sun(a)linaro.com>
> ---
> drivers/clk/clk-gate.c | 24 ++++++++++++++++++++++++
> include/linux/clk-provider.h | 4 ++++
> 2 files changed, 28 insertions(+)
Honestly speaking, I am not sure if this patch is really required or not.
And so Mike can decide on that. I will do a simple code review in
that time.
> diff --git a/drivers/clk/clk-gate.c b/drivers/clk/clk-gate.c
> index 790306e..cc2b00e 100644
> --- a/drivers/clk/clk-gate.c
> +++ b/drivers/clk/clk-gate.c
> @@ -15,6 +15,7 @@
> #include <linux/io.h>
> #include <linux/err.h>
> #include <linux/string.h>
> +#include <linux/device.h>
why?
> /**
> * DOC: basic gatable clock which can gate and ungate it's ouput
> @@ -48,6 +49,9 @@ static void clk_gate_endisable(struct clk_hw *hw, int enable)
> unsigned long flags = 0;
> u32 reg;
>
> + if (!enable && (gate->flags & CLK_GATE_ALWAYS_ON))
> + return;
> +
> set ^= enable;
>
> if (gate->lock)
> @@ -159,5 +163,25 @@ struct clk *clk_register_gate(struct device *dev, const char *name,
> if (IS_ERR(clk))
> kfree(gate);
>
> + if (clk_gate_flags & CLK_GATE_ALWAYS_ON) {
> + int ret;
> + if (flags & CLK_SET_PARENT_GATE)
> + pr_debug("%s: %salways on, but need parent gate.\n",
> + __func__, name);
> +
> + ret = clk_prepare(clk);
> + if (ret) {
> + pr_debug("%s: %s could not be prepared.\n",
> + __func__, name);
> + return clk;
> + }
> + ret = clk_enable(clk);
> + if (ret) {
> + pr_debug("%s: %s could not be enabled.\n",
> + __func__, name);
> + clk_unprepare(clk);
> + }
Call clk_prepare_enable instead.
> + }
> +
> return clk;
> }
> diff --git a/include/linux/clk-provider.h b/include/linux/clk-provider.h
> index 1ec14a7..641422c 100644
> --- a/include/linux/clk-provider.h
> +++ b/include/linux/clk-provider.h
> @@ -214,6 +214,9 @@ void of_fixed_clk_setup(struct device_node *np);
> * of this register, and mask of gate bits are in higher 16-bit of this
> * register. While setting the gate bits, higher 16-bit should also be
> * updated to indicate changing gate bits.
> + * CLK_GATE_ALWAYS_ON - by default this clock could be enable and disable. but
> + * in some debug condition, must keep this clock on, and never be closed.
> + * setting this flag then this clock never be closed.
Copy some part from the commit log I just suggested..
If this flag is only for debugging we may name it that way.
Maybe: CLK_GATE_DBG_ALWAYS_ON ??
The PAR was exported as CRn == 7 and CRm == 0, but in fact the primary
coprocessor register number was determined by CRm for 64-bit coprocessor
registers as the user space API was modelled after the coprocessor
access instructions (see the ARM ARM rev. C - B3-1445).
However, just changing the CRn to CRm breaks the sorting check when
booting the kernel, because the internal kernel logic always treats CRn
as the primary register number, and it makes the table sorting
impossible to understand for humans.
Alternatively we could change the logic to always have CRn == CRm, but
that becomes unclear in the number of ways we do lookup of a coprocessor
register. We could also have a separate 64-bit table but that feels
somewhat over-engineerd. Instead, keep CRn the primary representation
of the primary corproc. register number in-kernel and always export the
primary number as CRm as per the existing user space ABI.
Note: The TTBR registers just magically worked because they happened to
follow the CRn(0) regs and were considered CRn(0) in the in-kernel
representation.
Signed-off-by: Christoffer Dall <christoffer.dall(a)linaro.org>
---
arch/arm/kvm/coproc.c | 23 +++++++++++++++++------
arch/arm/kvm/coproc.h | 2 ++
arch/arm/kvm/coproc_a15.c | 5 ++++-
3 files changed, 23 insertions(+), 7 deletions(-)
diff --git a/arch/arm/kvm/coproc.c b/arch/arm/kvm/coproc.c
index 4a51990..fc5fec2 100644
--- a/arch/arm/kvm/coproc.c
+++ b/arch/arm/kvm/coproc.c
@@ -146,7 +146,10 @@ static bool pm_fake(struct kvm_vcpu *vcpu,
#define access_pmintenclr pm_fake
/* Architected CP15 registers.
- * Important: Must be sorted ascending by CRn, CRM, Op1, Op2
+ * CRn denotes the primary register number, but is copied to the CRm in the
+ * user space API in line with the terminology used in the ARM ARM.
+ * Important: Must be sorted ascending by CRn, CRM, Op1, Op2 and with 64-bit
+ * registers preceeding 32-bit ones.
*/
static const struct coproc_reg cp15_regs[] = {
/* CSSELR: swapped by interrupt.S. */
@@ -154,8 +157,8 @@ static const struct coproc_reg cp15_regs[] = {
NULL, reset_unknown, c0_CSSELR },
/* TTBR0/TTBR1: swapped by interrupt.S. */
- { CRm( 2), Op1( 0), is64, NULL, reset_unknown64, c2_TTBR0 },
- { CRm( 2), Op1( 1), is64, NULL, reset_unknown64, c2_TTBR1 },
+ { CRn( 2), Op1( 0), is64, NULL, reset_unknown64, c2_TTBR0 },
+ { CRn( 2), Op1( 1), is64, NULL, reset_unknown64, c2_TTBR1 },
/* TTBCR: swapped by interrupt.S. */
{ CRn( 2), CRm( 0), Op1( 0), Op2( 2), is32,
@@ -399,12 +402,13 @@ static bool index_to_params(u64 id, struct coproc_params *params)
| KVM_REG_ARM_OPC1_MASK))
return false;
params->is_64bit = true;
- params->CRm = ((id & KVM_REG_ARM_CRM_MASK)
+ /* CRm to CRn: see cp15_to_index for details */
+ params->CRn = ((id & KVM_REG_ARM_CRM_MASK)
>> KVM_REG_ARM_CRM_SHIFT);
params->Op1 = ((id & KVM_REG_ARM_OPC1_MASK)
>> KVM_REG_ARM_OPC1_SHIFT);
params->Op2 = 0;
- params->CRn = 0;
+ params->CRm = 0;
return true;
default:
return false;
@@ -898,7 +902,14 @@ static u64 cp15_to_index(const struct coproc_reg *reg)
if (reg->is_64) {
val |= KVM_REG_SIZE_U64;
val |= (reg->Op1 << KVM_REG_ARM_OPC1_SHIFT);
- val |= (reg->CRm << KVM_REG_ARM_CRM_SHIFT);
+ /*
+ * CRn always denotes the primary coproc. reg. nr. for the
+ * in-kernel representation, but the user space API uses the
+ * CRm for the encoding, because it is modelled after the
+ * MRRC/MCRR instructions: see the ARM ARM rev. c page
+ * B3-1445
+ */
+ val |= (reg->CRn << KVM_REG_ARM_CRM_SHIFT);
} else {
val |= KVM_REG_SIZE_U32;
val |= (reg->Op1 << KVM_REG_ARM_OPC1_SHIFT);
diff --git a/arch/arm/kvm/coproc.h b/arch/arm/kvm/coproc.h
index b7301d3..dccb904 100644
--- a/arch/arm/kvm/coproc.h
+++ b/arch/arm/kvm/coproc.h
@@ -135,6 +135,8 @@ static inline int cmp_reg(const struct coproc_reg *i1,
return -1;
if (i1->CRn != i2->CRn)
return i1->CRn - i2->CRn;
+ if (i1->is_64 != i2->is_64)
+ return i2->is_64 - i1->is_64;
if (i1->CRm != i2->CRm)
return i1->CRm - i2->CRm;
if (i1->Op1 != i2->Op1)
diff --git a/arch/arm/kvm/coproc_a15.c b/arch/arm/kvm/coproc_a15.c
index 685063a..3d8f61f 100644
--- a/arch/arm/kvm/coproc_a15.c
+++ b/arch/arm/kvm/coproc_a15.c
@@ -114,7 +114,10 @@ static bool access_l2ectlr(struct kvm_vcpu *vcpu,
/*
* A15-specific CP15 registers.
- * Important: Must be sorted ascending by CRn, CRM, Op1, Op2
+ * CRn denotes the primary register number, but is copied to the CRm in the
+ * user space API in line with the terminology used in the ARM ARM.
+ * Important: Must be sorted ascending by CRn, CRM, Op1, Op2 and with 64-bit
+ * registers preceeding 32-bit ones.
*/
static const struct coproc_reg a15_regs[] = {
/* MPIDR: we use VMPIDR for guest access. */
--
1.7.10.4
Hi Rafael,
This patchset tries to fix & cleanup many existing cpufreq core issues. First
four patches tries to cleanup basic problems in cpufreq core. Its first patch
was earlier sent separately but now is part of this series.
Fifth patch was also sent earlier as reply to your patches and was reviewed by
Srivatsa. Sixth patch was picked from Lukasz's patchset on introducing software
"boost" feature in core. It will be used by this patchset.
And last four are the most significant part of this set. They try to make many
things simple and robust.
This is rebased of your bleeding-edge branch + two patches from you:
18a6b03 cpufreq: Avoid double kobject_put() for the same kobject in error code path
d0cde63 cpufreq: Do not hold driver module references for additional policy CPUs
abe513f Merge branch 'acpi-sleep-next' into linux-next
They are also pushed in my cpufreq-next branch
--
viresh
Lukasz Majewski (1):
cpufreq: Store cpufreq policies in a list
Viresh Kumar (9):
cpufreq: Cleanup header files included in core
cpufreq: Re-arrange declarations in cpufreq.h
cpufreq: Give consistent names for struct cpufreq_policy *
cpufreq: Use sizeof(*ptr) form for finding size of a struct
cpufreq: Pass policy to cpufreq_add_policy_cpu()
cpufreq: Use cpufreq_policy_list for iterating over policies
cpufreq: Fix broken usage of governor->owner's refcount
cpufreq: Don't use cpufreq_driver->owner's refcount to protect
critical sections
cpufreq: Remove struct cpufreq_driver's owner field
Documentation/cpu-freq/cpu-drivers.txt | 2 -
drivers/cpufreq/acpi-cpufreq.c | 5 +-
drivers/cpufreq/at32ap-cpufreq.c | 1 -
drivers/cpufreq/blackfin-cpufreq.c | 1 -
drivers/cpufreq/cpufreq-nforce2.c | 1 -
drivers/cpufreq/cpufreq.c | 389 +++++++++++++++------------------
drivers/cpufreq/cpufreq_conservative.c | 14 +-
drivers/cpufreq/cpufreq_governor.c | 6 -
drivers/cpufreq/cpufreq_governor.h | 7 +-
drivers/cpufreq/cpufreq_ondemand.c | 24 +-
drivers/cpufreq/cpufreq_performance.c | 3 +-
drivers/cpufreq/cpufreq_powersave.c | 3 +-
drivers/cpufreq/cpufreq_stats.c | 25 +--
drivers/cpufreq/cris-artpec3-cpufreq.c | 1 -
drivers/cpufreq/cris-etraxfs-cpufreq.c | 1 -
drivers/cpufreq/e_powersaver.c | 5 +-
drivers/cpufreq/elanfreq.c | 1 -
drivers/cpufreq/exynos-cpufreq.c | 2 +-
drivers/cpufreq/freq_table.c | 4 +-
drivers/cpufreq/gx-suspmod.c | 3 +-
drivers/cpufreq/ia64-acpi-cpufreq.c | 5 +-
drivers/cpufreq/intel_pstate.c | 1 -
drivers/cpufreq/kirkwood-cpufreq.c | 1 -
drivers/cpufreq/longhaul.c | 1 -
drivers/cpufreq/longrun.c | 1 -
drivers/cpufreq/loongson2_cpufreq.c | 1 -
drivers/cpufreq/maple-cpufreq.c | 1 -
drivers/cpufreq/p4-clockmod.c | 1 -
drivers/cpufreq/pasemi-cpufreq.c | 1 -
drivers/cpufreq/pcc-cpufreq.c | 1 -
drivers/cpufreq/pmac32-cpufreq.c | 1 -
drivers/cpufreq/pmac64-cpufreq.c | 6 +-
drivers/cpufreq/powernow-k6.c | 1 -
drivers/cpufreq/powernow-k7.c | 14 +-
drivers/cpufreq/powernow-k8.c | 7 +-
drivers/cpufreq/ppc-corenet-cpufreq.c | 1 -
drivers/cpufreq/ppc_cbe_cpufreq.c | 1 -
drivers/cpufreq/s3c2416-cpufreq.c | 1 -
drivers/cpufreq/s3c24xx-cpufreq.c | 6 +-
drivers/cpufreq/s3c64xx-cpufreq.c | 1 -
drivers/cpufreq/sc520_freq.c | 1 -
drivers/cpufreq/sh-cpufreq.c | 1 -
drivers/cpufreq/sparc-us2e-cpufreq.c | 6 +-
drivers/cpufreq/sparc-us3-cpufreq.c | 6 +-
drivers/cpufreq/speedstep-centrino.c | 1 -
drivers/cpufreq/speedstep-ich.c | 1 -
drivers/cpufreq/speedstep-smi.c | 1 -
include/linux/cpufreq.h | 383 +++++++++++++++-----------------
48 files changed, 409 insertions(+), 542 deletions(-)
--
1.7.12.rc2.18.g61b472e