linaro-kernel January 2014

linaro-kernel@lists.linaro.org

112 participants
241 discussions

[PATCH] ARM: OMAP4: sleep: byteswap data for big-endian

by Taras Kondratiuk

From: Victor Kamensky <victor.kamensky(a)linaro.org> Assembler functions defined in sleep44xx.S need to byteswap values after read / before write from h/w register if code compiled in big endian mode. Simple change to do 'rev x, x' before str instruction and after ldr instruction that deals with h/w registers. Signed-off-by: Victor Kamensky <victor.kamensky(a)linaro.org> Signed-off-by: Taras Kondratiuk <taras.kondratiuk(a)linaro.org> --- This is a part of RFC series [1]. Based on v3.13-rc8. [1] http://www.spinics.net/lists/linux-omap/msg99927.html arch/arm/mach-omap2/sleep44xx.S | 17 +++++++++++++++++ 1 file changed, 17 insertions(+) diff --git a/arch/arm/mach-omap2/sleep44xx.S b/arch/arm/mach-omap2/sleep44xx.S index 9086ce0..8017016 100644 --- a/arch/arm/mach-omap2/sleep44xx.S +++ b/arch/arm/mach-omap2/sleep44xx.S @@ -12,6 +12,7 @@ #include <linux/linkage.h> #include <asm/smp_scu.h> #include <asm/memory.h> +#include <asm/assembler.h> #include <asm/hardware/cache-l2x0.h> #include "omap-secure.h" @@ -74,6 +75,7 @@ ENTRY(omap4_finish_suspend) */ bl omap4_get_sar_ram_base ldr r9, [r0, #OMAP_TYPE_OFFSET] +ARM_BE8(rev r9, r9) cmp r9, #0x1 @ Check for HS device bne skip_secure_l1_clean mov r0, #SCU_PM_NORMAL @@ -113,12 +115,14 @@ skip_secure_l1_clean: bl omap4_get_sar_ram_base mov r8, r0 ldr r9, [r8, #OMAP_TYPE_OFFSET] +ARM_BE8(rev r9, r9) cmp r9, #0x1 @ Check for HS device bne scu_gp_set mrc p15, 0, r0, c0, c0, 5 @ Read MPIDR ands r0, r0, #0x0f ldreq r0, [r8, #SCU_OFFSET0] ldrne r0, [r8, #SCU_OFFSET1] +ARM_BE8(rev r0, r0) mov r1, #0x00 stmfd r13!, {r4-r12, r14} ldr r12, =OMAP4_MON_SCU_PWR_INDEX @@ -130,6 +134,7 @@ scu_gp_set: ands r0, r0, #0x0f ldreq r1, [r8, #SCU_OFFSET0] ldrne r1, [r8, #SCU_OFFSET1] +ARM_BE8(rev r1, r1) bl omap4_get_scu_base bl scu_power_mode skip_scu_gp_set: @@ -157,6 +162,7 @@ skip_scu_gp_set: ands r5, r5, #0x0f ldreq r0, [r8, #L2X0_SAVE_OFFSET0] @ Retrieve L2 state from SAR ldrne r0, [r8, #L2X0_SAVE_OFFSET1] @ memory. +ARM_BE8(rev r0, r0) cmp r0, #3 bne do_WFI #ifdef CONFIG_PL310_ERRATA_727915 @@ -167,9 +173,11 @@ skip_scu_gp_set: bl omap4_get_l2cache_base mov r2, r0 ldr r0, =0xffff +ARM_BE8(rev r0, r0) str r0, [r2, #L2X0_CLEAN_INV_WAY] wait: ldr r0, [r2, #L2X0_CLEAN_INV_WAY] +ARM_BE8(rev r0, r0) ldr r1, =0xffff ands r0, r0, r1 bne wait @@ -182,9 +190,11 @@ l2x_sync: bl omap4_get_l2cache_base mov r2, r0 mov r0, #0x0 +ARM_BE8(rev r0, r0) str r0, [r2, #L2X0_CACHE_SYNC] sync: ldr r0, [r2, #L2X0_CACHE_SYNC] +ARM_BE8(rev r0, r0) ands r0, r0, #0x1 bne sync #endif @@ -216,6 +226,7 @@ do_WFI: bl omap4_get_sar_ram_base mov r8, r0 ldr r9, [r8, #OMAP_TYPE_OFFSET] +ARM_BE8(rev r9, r9) cmp r9, #0x1 @ Check for HS device bne scu_gp_clear mov r0, #SCU_PM_NORMAL @@ -258,6 +269,7 @@ ENTRY(omap4_cpu_resume) */ ldr r8, =OMAP44XX_SAR_RAM_BASE ldr r9, [r8, #OMAP_TYPE_OFFSET] +ARM_BE8(rev r9, r9) cmp r9, #0x1 @ Skip if GP device bne skip_ns_smp_enable mrc p15, 0, r0, c0, c0, 5 @@ -292,16 +304,19 @@ skip_ns_smp_enable: */ ldr r2, =OMAP44XX_L2CACHE_BASE ldr r0, [r2, #L2X0_CTRL] +ARM_BE8(rev r0, r0) and r0, #0x0f cmp r0, #1 beq skip_l2en @ Skip if already enabled ldr r3, =OMAP44XX_SAR_RAM_BASE ldr r1, [r3, #OMAP_TYPE_OFFSET] +ARM_BE8(rev r1, r1) cmp r1, #0x1 @ Check for HS device bne set_gp_por ldr r0, =OMAP4_PPA_L2_POR_INDEX ldr r1, =OMAP44XX_SAR_RAM_BASE ldr r4, [r1, #L2X0_PREFETCH_CTRL_OFFSET] +ARM_BE8(rev r4, r4) adr r3, ppa_por_params str r4, [r3, #0x04] mov r1, #0x0 @ Process ID @@ -313,11 +328,13 @@ skip_ns_smp_enable: set_gp_por: ldr r1, =OMAP44XX_SAR_RAM_BASE ldr r0, [r1, #L2X0_PREFETCH_CTRL_OFFSET] +ARM_BE8(rev r0, r0) ldr r12, =OMAP4_MON_L2X0_PREFETCH_INDEX @ Setup L2 PREFETCH DO_SMC set_aux_ctrl: ldr r1, =OMAP44XX_SAR_RAM_BASE ldr r0, [r1, #L2X0_AUXCTRL_OFFSET] +ARM_BE8(rev r0, r0) ldr r12, =OMAP4_MON_L2X0_AUXCTRL_INDEX @ Setup L2 AUXCTRL DO_SMC mov r0, #0x1 -- 1.7.9.5

10 years, 2 months

[PATCH Resend] PM: Remove unnecessary !!

by Viresh Kumar

Double ! or !! are normally required to get 0 or 1 out of a expression. A comparision always returns 0 or 1 and hence there is no need to apply double ! over it again. Signed-off-by: Viresh Kumar <viresh.kumar(a)linaro.org> --- kernel/power/suspend.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/kernel/power/suspend.c b/kernel/power/suspend.c index 62ee437..90b3d93 100644 --- a/kernel/power/suspend.c +++ b/kernel/power/suspend.c @@ -39,7 +39,7 @@ static const struct platform_suspend_ops *suspend_ops; static bool need_suspend_ops(suspend_state_t state) { - return !!(state > PM_SUSPEND_FREEZE); + return state > PM_SUSPEND_FREEZE; } static DECLARE_WAIT_QUEUE_HEAD(suspend_freeze_wait_head); -- 1.7.12.rc2.18.g61b472e

10 years, 2 months

Re: Is it ok for deferrable timer wakeup the idle cpu?

by Viresh Kumar

On 23 January 2014 11:11, Lei Wen <adrian.wenl(a)gmail.com> wrote: > On Wed, Jan 22, 2014 at 10:07 PM, Thomas Gleixner <tglx(a)linutronix.de> wrote: >> On Wed, 22 Jan 2014, Lei Wen wrote: >>> Recently I want to do the experiment for cpu isolation over 3.10 kernel. >>> But I find the isolated one is periodically waken up by IPI interrupt. >>> >>> By checking the trace, I find those IPI is generated by add_timer_on, >>> which would calls wake_up_nohz_cpu, and wake up the already idle cpu. >>> >>> With further checking, I find this timer is added by on_demand governor of >>> cpufreq. It would periodically check each cores' state. >>> The problem I see here is cpufreq_governor using INIT_DEFERRABLE_WORK >>> as the tool, while timer is made as deferrable anyway. >>> And what is more that cpufreq checking is very frequent. In my case, the >>> isolated cpu is wakenup by IPI every 5ms. >>> >>> So why kernel need to wake the remote processor when mount the deferrable >>> timer? As per my understanding, we'd better keep cpu as idle when use >>> the deferrable timer. >> >> Indeed, we can avoid the wakeup of the remote cpu when the timer is >> deferrable. > > Glad to hear that we could fix this unwanted wakeup. > Do you have related patches already? > >> >> Though you really want to figure out why the cpufreq governor is >> arming timers on other cores every 5ms. That smells like an utterly >> stupid approach. > > Not sure why cpufreq choose such frequent profiling over each cpu. > As my understanding, since kernel is smp, launching profiler over one cpu > would be enough... Hi Guys, So the first question is why cpufreq needs it and is it really stupid? Yes, it is stupid but that's how its implemented since a long time. It does so to get data about the load on CPUs, so that freq can be scaled up/down. Though there is a solution in discussion currently, which will take inputs from scheduler and so these background timers would go away. But we need to wait until that time. Now, why do we need that for every cpu, while that for a single cpu might be enough? The answer is cpuidle here: What if the cpu responsible for running timer goes to sleep? Who will evaluate the load then? And if we make this timer run on one cpu in non-deferrable mode then that cpu would be waken up again and again from idle. So, it was decided to have a per-cpu deferrable timer. Though to improve efficiency, once it is fired on any cpu, timer for all other CPUs are rescheduled, so that they don't fire before 5ms (sampling time).. I think below diff might get this fixed for you, though I am not sure if it breaks something else. Probably Thomas/Frederic can answer here. If this looks fine I will send it formally again: diff --git a/kernel/timer.c b/kernel/timer.c index accfd24..3a2c7fa 100644 --- a/kernel/timer.c +++ b/kernel/timer.c @@ -940,7 +940,8 @@ void add_timer_on(struct timer_list *timer, int cpu) * makes sure that a CPU on the way to stop its tick can not * evaluate the timer wheel. */ - wake_up_nohz_cpu(cpu); + if (!tbase_get_deferrable(timer->base)) + wake_up_nohz_cpu(cpu); spin_unlock_irqrestore(&base->lock, flags); } EXPORT_SYMBOL_GPL(add_timer_on);

10 years, 2 months

[RFC PATCH 0/3] cpuidle/sched: move main idle function in the idle.c

by Daniel Lezcano

This patchset relies on the "setting the table for integration of cpuidle with the scheduler" from Nicolas Pitre where the idle.c file has been moved into the sched directory. It encapsulate the cpuidle main code into three exported functions which are used by the cpuidle_idle_call function. This one is then moved into the idle.c file. The third patch shows an example on how integrating cpuidle information in the scheduler is easier. Daniel Lezcano (3): cpuidle: split cpuidle_idle_call main function into functions cpuidle: move the cpuidle_idle_call function to idle.c idle: store the idle state index in the struct rq drivers/cpuidle/cpuidle.c | 80 +++++++++++++++++++++++++-------------------- include/linux/cpuidle.h | 9 +++-- kernel/sched/idle.c | 53 ++++++++++++++++++++++++++++++ kernel/sched/sched.h | 3 ++ 4 files changed, 108 insertions(+), 37 deletions(-) -- 1.7.9.5

10 years, 2 months

[PATCH v2 0/6] setting the table for integration of cpuidle with the scheduler

by Nicolas Pitre

As everyone should know by now, we want to integrate the cpuidle governor with the scheduler for a more efficient idling of CPUs. In order to help the transition, this small patch series moves the existing interaction with cpuidle from architecture code to generic core code. The ARM, PPC, SH and X86 architectures are concerned. No functional change should have occurred yet. @peterz: Are you willing to pick up those patches? Change from v1: - dropped removal of arch_cpu_idle_prepare() arch/arm/kernel/process.c | 16 +++------ arch/powerpc/platforms/pseries/processor_idle.c | 5 +++ arch/powerpc/platforms/pseries/setup.c | 34 ++++++++----------- arch/sh/kernel/idle.c | 4 +-- arch/x86/kernel/process.c | 5 +-- kernel/Makefile | 1 - kernel/cpu/Makefile | 1 - kernel/sched/Makefile | 2 +- kernel/{cpu => sched}/idle.c | 4 ++- 9 files changed, 30 insertions(+), 42 deletions(-) Nicolas

10 years, 2 months

next boot: 34 pass, 5 fail (next-20140122)

by Kevin's boot bot

Automated DT boot report for various ARM defconfigs. Tree/Branch: next Git describe: next-20140122 Failed boot tests (console logs at the end) =========================================== omap3-tobi,3730storm: FAIL: omap2plus_defconfig armada-xp-openblocks-ax3-4: FAIL: mvebu_defconfig omap4-panda-es: FAIL: multi_v7_defconfig armada-xp-openblocks-ax3-4: FAIL: multi_v7_defconfig omap3-tobi,3730storm: FAIL: multi_v7_defconfig Full Report =========== omap2plus_defconfig ------------------- am335x-boneblack PASS: 0 min 26.2 sec omap3-beagle-xm PASS: 1 min 1.3 sec am335x-bone PASS: 0 min 27.7 sec omap3-tobi,3530overo PASS: 0 min 23.1 sec omap4-panda PASS: 1 min 8.9 sec omap5-uevm PASS: 0 min 56.7 sec omap4-panda-es PASS: 1 min 5.9 sec omap3-tobi,3730storm FAIL: 1 min 17.8 sec omap3-beagle PASS: 0 min 35.6 sec multi_lpae_defconfig -------------------- omap5-uevm PASS: 1 min 43.2 sec sun7i-a20-cubieboard2 PASS: 0 min 14.3 sec tegra_defconfig --------------- tegra30-beaver PASS: 0 min 17.0 sec imx_v6_v7_defconfig ------------------- imx6dl-wandboard,wand-dual PASS: 0 min 17.7 sec imx6dl-wandboard,wand-solo PASS: 0 min 17.7 sec imx6q-wandboard PASS: 0 min 16.4 sec sunxi_defconfig --------------- sun7i-a20-cubieboard2 PASS: 0 min 12.0 sec sun4i-a10-cubieboard PASS: 0 min 17.8 sec mvebu_defconfig --------------- armada-xp-openblocks-ax3-4 FAIL: 0 min 20.4 sec armada-370-mirabox PASS: 0 min 20.2 sec exynos_defconfig ---------------- exynos5250-arndale PASS: 0 min 29.1 sec multi_v7_defconfig ------------------ ste-snowball PASS: 1 min 17.2 sec tegra30-beaver PASS: 0 min 16.8 sec am335x-boneblack PASS: 0 min 23.5 sec omap3-beagle-xm PASS: 0 min 52.5 sec sun7i-a20-cubieboard2 PASS: 0 min 19.6 sec armada-370-mirabox PASS: 0 min 21.5 sec omap4-panda PASS: 0 min 55.2 sec omap4-panda-es FAIL: 1 min 48.8 sec armada-xp-openblocks-ax3-4 FAIL: 0 min 22.4 sec sun4i-a10-cubieboard PASS: 0 min 19.2 sec imx6dl-wandboard,wand-solo PASS: 0 min 17.9 sec omap3-tobi,3530overo PASS: 0 min 23.0 sec am335x-bone PASS: 0 min 26.2 sec imx6q-wandboard PASS: 0 min 17.4 sec omap3-tobi,3730storm FAIL: 0 min 30.0 sec imx6dl-wandboard,wand-dual PASS: 0 min 18.4 sec omap3-beagle PASS: 0 min 41.6 sec u8500_defconfig --------------- ste-snowball PASS: 0 min 30.1 sec sama5_defconfig --------------- sama5d35ek PASS: 0 min 17.5 sec Console logs for failures ========================= omap2plus_defconfig ------------------- omap3-tobi,3730storm: FAIL: last 24 lines of boot log: ------------------------------------------------------ [ 6.068756] [<c008fbc0>] (generic_handle_irq) from [<c000eda8>] (handle_IRQ+0x4c/0xb4) [ 6.077087] [<c000eda8>] (handle_IRQ) from [<c00085b4>] (omap3_intc_handle_irq+0x60/0x74) [ 6.085723] [<c00085b4>] (omap3_intc_handle_irq) from [<c054bda4>] (__irq_svc+0x44/0x5c) [ 6.094268] Exception stack(0xde0efcc0 to 0xde0efd08) [ 6.099609] fcc0: de515480 01003000 fa0b4000 34020001 de0efd2c de515000 de515000 00008002 [ 6.108215] fce0: de2ac646 de2ac640 de0efde6 00000000 00000000 de0efd08 c044f608 c0438554 [ 6.116851] fd00: 20000113 ffffffff [ 6.120544] [<c054bda4>] (__irq_svc) from [<c0438554>] (mmc_start_request+0xc4/0xe0) [ 6.128723] [<c0438554>] (mmc_start_request) from [<c043867c>] (__mmc_start_req+0x54/0x84) [ 6.137420] [<c043867c>] (__mmc_start_req) from [<c0438b1c>] (mmc_wait_for_cmd+0x58/0x88) [ 6.146057] [<c0438b1c>] (mmc_wait_for_cmd) from [<c0442618>] (mmc_io_rw_direct_host+0xa4/0x13c) [ 6.155334] [<c0442618>] (mmc_io_rw_direct_host) from [<c04433dc>] (sdio_read_cis+0x168/0x298) [ 6.164428] [<c04433dc>] (sdio_read_cis) from [<c04418c0>] (mmc_sdio_init_card+0x3e0/0xaa4) [ 6.173217] [<c04418c0>] (mmc_sdio_init_card) from [<c044228c>] (mmc_attach_sdio+0x78/0x360) [ 6.182128] [<c044228c>] (mmc_attach_sdio) from [<c043addc>] (mmc_rescan+0x260/0x2e8) [ 6.190399] [<c043addc>] (mmc_rescan) from [<c00590bc>] (process_one_work+0x1ac/0x4c4) [ 6.198760] [<c00590bc>] (process_one_work) from [<c0059f54>] (worker_thread+0x114/0x3b4) [ 6.207366] [<c0059f54>] (worker_thread) from [<c005fb48>] (kthread+0xcc/0xe8) [ 6.214996] [<c005fb48>] (kthread) from [<c000e548>] (ret_from_fork+0x14/0x2c) [ 6.222625] ---[ end trace 0f858337cb4b2be9 ]--- ~$off # PYBOOT: Exception: kernel: ERROR: failed to boot: <class 'pexpect.TIMEOUT'> # PYBOOT: Time: 77.85 seconds. # PYBOOT: Result: FAIL mvebu_defconfig --------------- armada-xp-openblocks-ax3-4: FAIL: last 24 lines of boot log: ------------------------------------------------------------ [<c04cfc40>] (kernel_init_freeable) from [<c03a2124>] (kernel_init+0x8/0x120) [<c03a2124>] (kernel_init) from [<c000e278>] (ret_from_fork+0x14/0x3c) Code: 8a000012 ebfff583 e2840054 f57ff05b (e1903f9f) ---[ end trace ef63c24d4a59005c ]--- Kernel panic - not syncing: Attempted to kill init! exitcode=0x0000000b CPU1: stopping CPU: 1 PID: 0 Comm: swapper/1 Tainted: G D 3.13.0-next-20140122 #1 [<c0014824>] (unwind_backtrace) from [<c00110d4>] (show_stack+0x10/0x14) [<c00110d4>] (show_stack) from [<c03a694c>] (dump_stack+0x80/0x90) [<c03a694c>] (dump_stack) from [<c0013be4>] (handle_IPI+0x148/0x170) [<c0013be4>] (handle_IPI) from [<c00085ac>] (armada_370_xp_handle_irq+0xac/0xb0) [<c00085ac>] (armada_370_xp_handle_irq) from [<c0011c00>] (__irq_svc+0x40/0x50) Exception stack(0xee877fa0 to 0xee877fe8) 7fa0: eefe65b8 00000000 000009a4 00000000 ee876000 c05044ac c03ad9c8 ee876000 7fc0: c0531ab6 00000001 c0531ab6 ee876000 00000000 ee877fe8 c000edec c00556ac 7fe0: 60000113 ffffffff [<c0011c00>] (__irq_svc) from [<c00556ac>] (cpu_startup_entry+0xf4/0x134) [<c00556ac>] (cpu_startup_entry) from [<00008644>] (0x8644) ~$off # PYBOOT: Exception: kernel: Unable to handle kernel NULL pointer dereference at virtual address 00000054 # PYBOOT: Time: 20.35 seconds. # PYBOOT: Result: FAIL multi_v7_defconfig ------------------ omap4-panda-es: FAIL: last 24 lines of boot log: ------------------------------------------------ [ 1.622222] OMAP4 PM: u-boot >= v2012.07 is required for full PM support [ 1.629333] Registering SWP/SWPB emulation handler [ 1.635345] vwl1271: 1800 mV [ 1.642517] Skipping twl internal clock init and using bootloader value (unknown osc rate) [ 1.651733] twl 0-0048: PIH (irq 39) nested IRQs [ 1.657897] twl_rtc rtc.11: Enabling TWL-RTC [ 1.664733] twl_rtc rtc.11: rtc core: registered rtc.11 as rtc0 [ 1.671997] VAUX1_6030: 1000 <--> 3000 mV at 2800 mV [ 1.677978] VAUX2_6030: 1200 <--> 2800 mV at 1800 mV [ 1.683990] VAUX3_6030: 1000 <--> 3000 mV at 1200 mV [ 1.689941] VMMC: 1200 <--> 3000 mV at 3000 mV [ 1.695404] VPP: 1800 <--> 2500 mV at 1900 mV [ 1.700714] VUSIM: 1200 <--> 2900 mV at 1800 mV [ 1.706085] VDAC: 1800 mV [ 1.706085] VANA: 2100 mV [ 1.712768] VCXIO: 1800 mV [ 1.712768] VUSB: 3300 mV [ 1.719512] V1V8: 1800 mV [ 1.722991] V2V1: 2100 mV [ 1.729919] omap_i2c 48070000.i2c: bus 0 rev0.11 at 400 kHz ~$off # PYBOOT: Exception: kernel: ERROR: failed to boot: <class 'pexpect.TIMEOUT'> # PYBOOT: Time: 108.77 seconds. # PYBOOT: Result: FAIL armada-xp-openblocks-ax3-4: FAIL: last 24 lines of boot log: ------------------------------------------------------------ [ 1.315916] [<c0810c48>] (kernel_init_freeable) from [<c0586094>] (kernel_init+0x8/0x120) [ 1.324119] [<c0586094>] (kernel_init) from [<c000e578>] (ret_from_fork+0x14/0x3c) [ 1.331710] Code: 8a000012 ebfff583 e2840054 f57ff05b (e1903f9f) [ 1.337853] ---[ end trace f86f26e87e9cb445 ]--- [ 1.342491] Kernel panic - not syncing: Attempted to kill init! exitcode=0x0000000b [ 1.342491] [ 1.351652] CPU1: stopping [ 1.354370] CPU: 1 PID: 0 Comm: swapper/1 Tainted: G D 3.13.0-next-20140122 #1 [ 1.362491] [<c001584c>] (unwind_backtrace) from [<c00113fc>] (show_stack+0x10/0x14) [ 1.370262] [<c00113fc>] (show_stack) from [<c058bbd8>] (dump_stack+0x84/0x94) [ 1.377506] [<c058bbd8>] (dump_stack) from [<c0014120>] (handle_IPI+0x148/0x174) [ 1.384923] [<c0014120>] (handle_IPI) from [<c00086fc>] (armada_370_xp_handle_irq+0xa8/0x114) [ 1.393471] [<c00086fc>] (armada_370_xp_handle_irq) from [<c0011f80>] (__irq_svc+0x40/0x50) [ 1.401841] Exception stack(0xed077fa0 to 0xed077fe8) [ 1.406908] 7fa0: ffffffed 2d74f000 c089b4e0 00000000 c089a4cc ed076000 c089a450 c093b88b [ 1.415108] 7fc0: c0596128 ed076000 c093b88b ed076000 00000000 ed077fe8 c000f118 c0080fc0 [ 1.423305] 7fe0: 60000113 ffffffff [ 1.426808] [<c0011f80>] (__irq_svc) from [<c0080fc0>] (cpu_startup_entry+0x100/0x144) [ 1.434747] [<c0080fc0>] (cpu_startup_entry) from [<00008944>] (0x8944) ~$off # PYBOOT: Exception: kernel: Unable to handle kernel NULL pointer dereference at virtual address 00000054 # PYBOOT: Time: 22.45 seconds. # PYBOOT: Result: FAIL omap3-tobi,3730storm: FAIL: last 24 lines of boot log: ------------------------------------------------------ done Bytes transferred = 56692 (dd74 hex) Overo # printenv bootargs printenv bootargs bootargs=console=ttyO2,115200n8 earlyprintk rw root=/dev/mmcblk0p2 rootwait rootfstype=ext4 ip=192.168.1.159:192.168.1.2:192.168.1.254:255.255.255.0::::192.168.1.254:none Overo # bootz ${loadaddr} 0x81000000 0x81f00000 bootz ${loadaddr} 0x81000000 0x81f00000 ## Loading init Ramdisk from Legacy Image at 81000000 ... Image Name: Image Type: ARM Linux RAMDisk Image (uncompressed) Data Size: 639744 Bytes = 624.8 KiB Load Address: 81000000 Entry Point: 81000000 ## Flattened Device Tree blob at 81f00000 Booting using the fdt blob at 0x81f00000 Loading Ramdisk to 8ff63000, end 8ffff300 ... OK Loading Device Tree to 8ff52000, end 8ff62d73 ... OK Starting kernel ... ~$off # PYBOOT: Exception: kernel: ERROR: did not start booting. # PYBOOT: Time: 30.01 seconds. # PYBOOT: Result: FAIL

10 years, 2 months

[PATCH] spi: Add a timeout when waiting for transfers

by Mark Brown

From: Mark Brown <broonie(a)linaro.org> Don't wait indefinitely for transfers to complete but time out after 10ms more than we expect the transfer to take on the wire. Signed-off-by: Mark Brown <broonie(a)linaro.org> --- drivers/spi/spi.c | 12 +++++++++++- 1 file changed, 11 insertions(+), 1 deletion(-) diff --git a/drivers/spi/spi.c b/drivers/spi/spi.c index 7f23cf9afa79..1826a50c2aaf 100644 --- a/drivers/spi/spi.c +++ b/drivers/spi/spi.c @@ -710,6 +710,7 @@ static int spi_transfer_one_message(struct spi_master *master, bool cur_cs = true; bool keep_cs = false; int ret = 0; + int ms = 1; spi_set_cs(msg->spi, true); @@ -727,7 +728,16 @@ static int spi_transfer_one_message(struct spi_master *master, if (ret > 0) { ret = 0; - wait_for_completion(&master->xfer_completion); + ms = xfer->len * 8 * 1000 / xfer->speed_hz; + ms += 10; /* some tolerance */ + + ms = wait_for_completion_timeout(&master->xfer_completion, + msecs_to_jiffies(ms)); + } + + if (ms == 0) { + dev_err(&msg->spi->dev, "SPI transfer timed out\n"); + msg->status = -ETIMEDOUT; } trace_spi_transfer_stop(msg, xfer); -- 1.9.rc1

10 years, 3 months

[PATCH v5 0/4] perf: AARCH64 arch support

by Jean Pihet

Add AARCH64 specific support. This includes the following: - AARCH64 perf registers definition and hooks, - compat mode registers use, i.e. profiling a 32-bit binary on a 64-bit system, - unwinding using the dwarf information from the .debug_frame section of the ELF binary, - unwinding using the frame pointer information; in 64-bit and compat modes. Note: support for unwinding using the dwarf information in compat mode requires some changes to the libunwind code. Those changes have been submitted on the libunwind ML and are in discussion. Tested on ARMv7, ARMv8 and x86_64 platforms. The compat mode has been tested on ARMv8 using statically built 32-bit binaries. Jean Pihet (4): ARM64: perf: add support for perf registers API ARM64: perf: wire up perf_regs and unwind support ARM64: perf: add support for frame pointer unwinding in compat mode ARM64: perf: support dwarf unwinding in compat mode arch/arm64/Kconfig | 2 + arch/arm64/include/asm/compat.h | 2 +- arch/arm64/include/asm/ptrace.h | 3 +- arch/arm64/include/uapi/asm/Kbuild | 1 + arch/arm64/include/uapi/asm/perf_regs.h | 40 ++++++++++++++ arch/arm64/kernel/Makefile | 1 + arch/arm64/kernel/perf_event.c | 75 +++++++++++++++++++++++--- arch/arm64/kernel/perf_regs.c | 44 ++++++++++++++++ tools/perf/arch/arm64/Makefile | 7 +++ tools/perf/arch/arm64/include/perf_regs.h | 88 +++++++++++++++++++++++++++++++ tools/perf/arch/arm64/util/dwarf-regs.c | 80 ++++++++++++++++++++++++++++ tools/perf/arch/arm64/util/unwind.c | 82 ++++++++++++++++++++++++++++ tools/perf/config/Makefile | 8 ++- 13 files changed, 422 insertions(+), 11 deletions(-) create mode 100644 arch/arm64/include/uapi/asm/perf_regs.h create mode 100644 arch/arm64/kernel/perf_regs.c create mode 100644 tools/perf/arch/arm64/Makefile create mode 100644 tools/perf/arch/arm64/include/perf_regs.h create mode 100644 tools/perf/arch/arm64/util/dwarf-regs.c create mode 100644 tools/perf/arch/arm64/util/unwind.c -- 1.7.11.7

10 years, 3 months

[PATCH] regulator: core: Correct default return value for full constraints

by Mark Brown

From: Mark Brown <broonie(a)linaro.org> Once we have full constraints then all supply mappings should be known to the regulator API. This means that we should treat failed lookups as fatal rather than deferring in the hope of further registrations but this was broken by commit 9b92da1f1205bd25 "regulator: core: Fix default return value for _get()" which was targeted at DT systems but unintentionally broke non-DT systems by changing the default return value. Fix this by explicitly returning -EPROBE_DEFER from the DT lookup if we find a property but no corresponding regulator and by having the non-DT case default to -ENODEV when we have full constraints. Fixes: 9b92da1f1205bd25 "regulator: core: Fix default return value for _get()" Signed-off-by: Mark Brown <broonie(a)linaro.org> --- drivers/regulator/core.c | 9 ++++++++- 1 file changed, 8 insertions(+), 1 deletion(-) diff --git a/drivers/regulator/core.c b/drivers/regulator/core.c index b38a6b669e8c..16a309e5c024 100644 --- a/drivers/regulator/core.c +++ b/drivers/regulator/core.c @@ -1272,6 +1272,8 @@ static struct regulator_dev *regulator_dev_lookup(struct device *dev, if (r->dev.parent && node == r->dev.of_node) return r; + *ret = -EPROBE_DEFER; + return NULL; } else { /* * If we couldn't even get the node then it's @@ -1312,7 +1314,7 @@ static struct regulator *_regulator_get(struct device *dev, const char *id, struct regulator_dev *rdev; struct regulator *regulator = ERR_PTR(-EPROBE_DEFER); const char *devname = NULL; - int ret = -EPROBE_DEFER; + int ret; if (id == NULL) { pr_err("get() with no identifier\n"); @@ -1322,6 +1324,11 @@ static struct regulator *_regulator_get(struct device *dev, const char *id, if (dev) devname = dev_name(dev); + if (have_full_constraints()) + ret = -ENODEV; + else + ret = -EPROBE_DEFER; + mutex_lock(&regulator_list_mutex); rdev = regulator_dev_lookup(dev, id, &ret); -- 1.8.5.3

10 years, 3 months

Possible stable fix for decompressor speed

by Mark Brown

The changes in patch 1431574a1c4c (lib/decompressors: fix "no limit" output buffer length) avoid doing decompression a byte at a time when decompressing into high physical addresses using a small, well isolated change. The patch can give a very noticable improvement in kernel boot times on affected systems, for example with one ARM system this reduces the total time to boot the kernel by more than a third. Would you consider this patch for stable? It doesn't quite fit within the criteria but you've indicated in the past that such isolated and well supported changs can be acceptable anyway. If it's not OK for stable it seems like it should be a good candidate for LTSI.

10 years, 3 months

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linaro-kernel January 2014