This patchset implements "kiosk" mode for KDB debugger and is a
continuation of previous work by Anton Vorontsov (dating back to late
2012).
When kiosk mode is engaged several kdb commands become disabled leaving
only status reporting functions working normally. In particular arbitrary
memory read/write is prevented and it is no longer possible to alter
program flow.
Note that the commands that remain enabled are sufficient to run the
post-mortem macro commands, dumpcommon, dumpall and dumpcpu. One of the
motivating use-cases for this work is to realize post-mortem on embedded
devices (such as phones) without allowing the debug facility to be easily
exploited to compromise user privacy. In principle this means the feature
can be enabled on production devices.
There are a few patches, some are just cleanups, some are churn-ish
cleanups, but inevitable. And the rest implements the mode -- after all
the preparations, everything is pretty straightforward. The first patch
is actually a pure bug fix (arguably unrelated to kiosk mode) but
collides with the kiosk code to honour the sysrq mask so I have included
it here.
Changes since v1 (circa 2012):
* ef (Display exception frame) is essentially an overly complex peek
and has therefore been marked unsafe
* bt (Stack traceback) has been marked safe only with no arguments
* sr (Magic SysRq key) honours the sysrq mask when called in kiosk
mode
* Fixed over-zealous blocking of macro commands
* Symbol lookup is forbidden by kdbgetaddrarg (more robust, better
error reporting to user)
* Fix deadlock in sr (Magic SysRq key)
* Better help text in kiosk mode
* Default (kiosk on/off) can be changed From the config file.
Anton Vorontsov (7):
kdb: Remove currently unused kdbtab_t->cmd_flags
kdb: Rename kdb_repeat_t to kdb_cmdflags_t, cmd_repeat to cmd_flags
kdb: Rename kdb_register_repeat() to kdb_register_flags()
kdb: Use KDB_REPEAT_* values as flags
kdb: Remove KDB_REPEAT_NONE flag
kdb: Mark safe commands as KDB_SAFE and KDB_SAFE_NO_ARGS
kdb: Add kiosk mode
Daniel Thompson (3):
sysrq: Implement __handle_sysrq_nolock to avoid recursive locking in
kdb
kdb: Improve usability of help text when running in kiosk mode
kdb: Allow access to sensitive commands to be restricted by default
drivers/tty/sysrq.c | 11 ++-
include/linux/kdb.h | 20 ++--
include/linux/sysrq.h | 1 +
kernel/debug/kdb/kdb_bp.c | 22 ++---
kernel/debug/kdb/kdb_main.c | 207 +++++++++++++++++++++++------------------
kernel/debug/kdb/kdb_private.h | 3 +-
kernel/trace/trace_kdb.c | 4 +-
lib/Kconfig.kgdb | 21 +++++
8 files changed, 172 insertions(+), 117 deletions(-)
--
1.9.0
Part of this patchset was previously part of the larger tasks packing patchset
[1]. I have splitted the latter in 3 different patchsets (at least) to make the
thing easier.
-configuration of sched_domain topology [2]
-update and consolidation of cpu_power (this patchset)
-tasks packing algorithm
SMT system is no more the only system that can have a CPUs with an original
capacity that is different from the default value. We need to extend the use of
cpu_power_orig to all kind of platform so the scheduler will have both the
maximum capacity (cpu_power_orig/power_orig) and the current capacity
(cpu_power/power) of CPUs and sched_groups. A new function arch_scale_cpu_power
has been created and replace arch_scale_smt_power, which is SMT specifc in the
computation of the capapcity of a CPU.
During load balance, the scheduler evaluates the number of tasks that a group
of CPUs can handle. The current method assumes that tasks have a fix load of
SCHED_LOAD_SCALE and CPUs have a default capacity of SCHED_POWER_SCALE.
This assumption generates wrong decision by creating ghost cores and by
removing real ones when the original capacity of CPUs is different from the
default SCHED_POWER_SCALE.
Now that we have the original capacity of a CPUS and its activity/utilization,
we can evaluate more accuratly the capacity of a group of CPUs.
This patchset mainly replaces the old capacity method by a new one and has kept
the policy almost unchanged whereas we can certainly take advantage of this new
statistic in several other places of the load balance.
TODO:
- align variable's and field's name with the renaming [3]
Tests results:
I have put below results of 2 tests:
- hackbench -l 500 -s 4096
- scp of 100MB file on the platform
on a dual cortex-A7
hackbench scp
tip/master 25.75s(+/-0.25) 5.16MB/s(+/-1.49)
+ patches 1,2 25.89s(+/-0.31) 5.18MB/s(+/-1.45)
+ patches 3-10 25.68s(+/-0.22) 7.00MB/s(+/-1.88)
+ irq accounting 25.80s(+/-0.25) 8.06MB/s(+/-0.05)
on a quad cortex-A15
hackbench scp
tip/master 15.69s(+/-0.16) 9.70MB/s(+/-0.04)
+ patches 1,2 15.53s(+/-0.13) 9.72MB/s(+/-0.05)
+ patches 3-10 15.56s(+/-0.22) 9.88MB/s(+/-0.05)
+ irq accounting 15.99s(+/-0.08) 10.37MB/s(+/-0.03)
The improvement of scp bandwidth happens when tasks and irq are using
different CPU which is a bit random without irq accounting config
Change since V1:
- add 3 fixes
- correct some commit messages
- replace capacity computation by activity
- take into account current cpu capacity
[1] https://lkml.org/lkml/2013/10/18/121
[2] https://lkml.org/lkml/2014/3/19/377
[3] https://lkml.org/lkml/2014/5/14/622
Vincent Guittot (11):
sched: fix imbalance flag reset
sched: remove a wake_affine condition
sched: fix avg_load computation
sched: Allow all archs to set the power_orig
ARM: topology: use new cpu_power interface
sched: add per rq cpu_power_orig
Revert "sched: Put rq's sched_avg under CONFIG_FAIR_GROUP_SCHED"
sched: get CPU's activity statistic
sched: test the cpu's capacity in wake affine
sched: move cfs task on a CPU with higher capacity
sched: replace capacity by activity
arch/arm/kernel/topology.c | 4 +-
kernel/sched/core.c | 2 +-
kernel/sched/fair.c | 229 ++++++++++++++++++++++-----------------------
kernel/sched/sched.h | 5 +-
4 files changed, 118 insertions(+), 122 deletions(-)
--
1.9.1
When building a multi_v7_defconfig kernel it is not possible to configure
DEBUG_LL to use any serial device except a ARM Primecell PL01X, or more
accurately and worse, it is possible to configure a different serial
device but KConfig does not honour this request.
The happens because the multi-platform mode may include ARCH_SPEAR13XX
and this forcibly engages DEBUG_UART_PL01X to provide some kind of
compatibility with single platform builds (SPEAr supports both single and
multi-platform). This in turn causes DEBUG_LL_INCLUDE to wedge at
debug/pl01x.S.
Problem is fixed by only deploying the compatibility options for SPEAr
when ARCH_MULTIPLATFORM is not set.
Signed-off-by: Daniel Thompson <daniel.thompson(a)linaro.org>
---
arch/arm/Kconfig.debug | 6 +++---
1 file changed, 3 insertions(+), 3 deletions(-)
diff --git a/arch/arm/Kconfig.debug b/arch/arm/Kconfig.debug
index 0531da8..f10c784 100644
--- a/arch/arm/Kconfig.debug
+++ b/arch/arm/Kconfig.debug
@@ -991,9 +991,9 @@ config DEBUG_LL_INCLUDE
config DEBUG_UART_PL01X
def_bool ARCH_EP93XX || \
ARCH_INTEGRATOR || \
- ARCH_SPEAR3XX || \
- ARCH_SPEAR6XX || \
- ARCH_SPEAR13XX || \
+ (ARCH_SPEAR3XX && !ARCH_MULTIPLATFORM) || \
+ (ARCH_SPEAR6XX && !ARCH_MULTIPLATFORM) || \
+ (ARCH_SPEAR13XX && !ARCH_MULTIPLATFORM) || \
ARCH_VERSATILE
# Compatibility options for 8250
--
1.9.0
This patchset makes it possible to use the kgdb NMI infrastructure
on ARM platforms.
The kgdb NMI infrastructure works by re-routing an UARTs interrupt
signal from IRQ to FIQ. The UART will no longer function normally
and will instead be managed by kgdb using the polled I/O functions.
Any character delivered to the UART causes the kgdb handler function
to be called. Each serial driver explicitly consents (or not) to this
abuse by calling the appropriate registration functions.
[PATCH 1/8] arm: fiq: Allow EOI to be communicated to the intc
[PATCH 2/8] irqchip: gic: Provide support for interrupt grouping
Both these patches lay the ground work to allow modern ARM
interrupt controllers to support FIQ correctly.
[PATCH 3/8] ARM: Move some macros from entry-armv to entry-header
[PATCH 4/8] ARM: Add KGDB/KDB FIQ debugger generic code
This is the heart of the patch series, allowing FIQs to be
registered with KGDB and handled by KGDB.
[PATCH 5/8] serial: amba-pl011: Pass on FIQ information to KGDB.
[PATCH 6/8] serial: asc: Add support for KGDB's FIQ/NMI mode
Extend to UART drivers to allow the register the appropriate FIQ
(implicitly promising to behave properly when their own IRQ handler
is cut off).
[PATCH 7/8] ARM: VIC: Add vic_set_fiq function to select if an...
[PATCH 8/8] arm: fiq: Hack FIQ routing backdoors into GIC and VIC
Here we hit the serious request-for-comment section. It is not
clear what the best way to get the interrupt controller to re-route
an interrupt source from the IRQ signal to the FIQ signal.
Clearly the approach here is wrong but it has been enough for me
to test my work so far.
Anton Vorontsov (2):
ARM: Move some macros from entry-armv to entry-header
ARM: Add KGDB/KDB FIQ debugger generic code
Arve Hjønnevåg (1):
ARM: VIC: Add vic_set_fiq function to select if an interrupt should
generate an IRQ or FIQ
Daniel Thompson (5):
arm: fiq: Allow EOI to be communicated to the intc
irqchip: gic: Provide support for interrupt grouping
serial: amba-pl011: Pass on FIQ information to KGDB.
serial: asc: Add support for KGDB's FIQ/NMI mode
arm: fiq: Hack FIQ routing backdoors into GIC and VIC
arch/arm/Kconfig | 2 +
arch/arm/Kconfig.debug | 18 ++++
arch/arm/boot/dts/stih416.dtsi | 2 +-
arch/arm/boot/dts/vexpress-v2m-rs1.dtsi | 2 +-
arch/arm/include/asm/fiq.h | 1 +
arch/arm/include/asm/kgdb.h | 7 ++
arch/arm/kernel/Makefile | 1 +
arch/arm/kernel/entry-armv.S | 151 +----------------------------
arch/arm/kernel/entry-header.S | 164 ++++++++++++++++++++++++++++++++
arch/arm/kernel/fiq.c | 50 ++++++++++
arch/arm/kernel/kgdb_fiq.c | 117 +++++++++++++++++++++++
arch/arm/kernel/kgdb_fiq_entry.S | 87 +++++++++++++++++
drivers/irqchip/irq-gic.c | 62 +++++++++++-
drivers/irqchip/irq-vic.c | 23 +++++
drivers/tty/serial/amba-pl011.c | 18 +++-
drivers/tty/serial/st-asc.c | 25 +++++
include/linux/irqchip/arm-gic.h | 3 +
include/linux/irqchip/arm-vic.h | 1 +
18 files changed, 576 insertions(+), 158 deletions(-)
create mode 100644 arch/arm/kernel/kgdb_fiq.c
create mode 100644 arch/arm/kernel/kgdb_fiq_entry.S
--
1.9.0
This patchset started out as a simple patch to introduce the irqs
command from Android's FIQ debugger to kdb. However it has since grown
more powerful because allowing kdb to reuse existing kernel
infrastructure gives us extra opportunities.
Based on the comments at the top of irqdesc.h (plotting to take the
irq_desc structure private to kernel/irq) and the relative similarity
between FIQ debugger's irqs command and the contents /proc/interrupts
we start by adding a kdb feature to print seq_files. This forms the
foundation for a new command, interrupts.
I have also been able to implement a much more generic command,
seq_file, that can display a good number of files from pseudo
filesystems. This command is very powerful although that power does mean
care must be taken to deploy it safely. It is deliberately and by
default aimed at your foot!
Note that the risk associated with the seq_file command is why I
implemented the interrupts command in C (in principle it could have been
a kdb macro). Doing it in C codifies the need for show_interrupts() to
continue using spin locks as its locking strategy.
To give an idea of what can be done with this command. The following
seq_operations structures worked correctly and report no errors:
cpuinfo_op
extfrag_op
fragmentation_op
gpiolib_seq_ops
int_seq_ops (a.k.a. /proc/interrupts)
pagetypeinfo_op
unusable_op
vmalloc_op
zoneinfo_op
The following display the information correctly but triggered errors
(sleeping function called from invalid context) with lock debugging
enabled:
consoles_op
crypto_seq_ops
diskstats_op
partitions_op
slabinfo_op
vmstat_op
All tests are run on an ARM multi_v7_defconfig kernel (plus lots of
debug features) and halted using magic SysRq so that kdb has interrupt
context. Note also that some of the seq_operations structures hook into
driver supplied code that will only be called if that driver is enabled
so the test above are useful but cannot be exhaustive.
Daniel Thompson (3):
kdb: Add framework to display sequence files
proc: Provide access to /proc/interrupts from kdb
kdb: Implement seq_file command
fs/proc/interrupts.c | 10 +++++++++
include/linux/kdb.h | 3 +++
kernel/debug/kdb/kdb_io.c | 51 +++++++++++++++++++++++++++++++++++++++++++++
kernel/debug/kdb/kdb_main.c | 28 +++++++++++++++++++++++++
4 files changed, 92 insertions(+)
--
1.9.0
The following driver is for exynos4210. I did not yet finished the other boards, so
I created a specific driver for 4210 which could be merged later.
The driver is based on Colin Cross's driver found at:
https://android.googlesource.com/kernel/exynos/+/e686b1ec67423c40b4fdf811f9…
This one was based on a 3.4 kernel and an old API.
It has been refreshed, simplified and based on the recent code cleanup I sent
today.
The AFTR could be entered when all the cpus (except cpu0) are down. In order to
reach this situation, the couple idle states are used.
There is a sync barrier at the entry and the exit of the low power function. So
all cpus will enter and exit the function at the same time.
At this point, CPU0 knows the other cpu will power down itself. CPU0 waits for
the CPU1 to be powered down and then initiate the AFTR power down sequence.
No interrupts are handled by CPU1, this is why we switch to the timer broadcast
even if the local timer is not impacted by the idle state.
When CPU0 wakes up, it powers up CPU1 and waits for it to boot. Then they both
exit the idle function.
This driver allows the exynos4210 to have the same power consumption at idle
time than the one when we have to unplug CPU1 in order to let CPU0 to reach
the AFTR state.
This patch is a RFC because, we have to find a way to remove the macros
definitions and cpu powerdown function without pulling the arch dependent
headers.
Signed-off-by: Daniel Lezcano <daniel.lezcano(a)linaro.org>
---
arch/arm/mach-exynos/common.c | 11 +-
drivers/cpuidle/Kconfig.arm | 8 ++
drivers/cpuidle/Makefile | 1 +
drivers/cpuidle/cpuidle-exynos4210.c | 226 ++++++++++++++++++++++++++++++++++
4 files changed, 245 insertions(+), 1 deletion(-)
create mode 100644 drivers/cpuidle/cpuidle-exynos4210.c
diff --git a/arch/arm/mach-exynos/common.c b/arch/arm/mach-exynos/common.c
index d5fa21e..1765a98 100644
--- a/arch/arm/mach-exynos/common.c
+++ b/arch/arm/mach-exynos/common.c
@@ -299,9 +299,18 @@ static struct platform_device exynos_cpuidle = {
.id = -1,
};
+static struct platform_device exynos4210_cpuidle = {
+ .name = "exynos4210-cpuidle",
+ .dev.platform_data = exynos_sys_powerdown_aftr,
+ .id = -1,
+};
+
void __init exynos_cpuidle_init(void)
{
- platform_device_register(&exynos_cpuidle);
+ if (soc_is_exynos4210())
+ platform_device_register(&exynos4210_cpuidle);
+ else
+ platform_device_register(&exynos_cpuidle);
}
void __init exynos_cpufreq_init(void)
diff --git a/drivers/cpuidle/Kconfig.arm b/drivers/cpuidle/Kconfig.arm
index 92f0c12..2772130 100644
--- a/drivers/cpuidle/Kconfig.arm
+++ b/drivers/cpuidle/Kconfig.arm
@@ -51,3 +51,11 @@ config ARM_EXYNOS_CPUIDLE
depends on ARCH_EXYNOS
help
Select this to enable cpuidle for Exynos processors
+
+config ARM_EXYNOS4210_CPUIDLE
+ bool "Cpu Idle Driver for the Exynos 4210 processor"
+ default y
+ depends on ARCH_EXYNOS
+ select ARCH_NEEDS_CPU_IDLE_COUPLED if SMP
+ help
+ Select this to enable cpuidle for the Exynos 4210 processors
diff --git a/drivers/cpuidle/Makefile b/drivers/cpuidle/Makefile
index 0d1540a..e0ec9bc 100644
--- a/drivers/cpuidle/Makefile
+++ b/drivers/cpuidle/Makefile
@@ -14,6 +14,7 @@ obj-$(CONFIG_ARM_ZYNQ_CPUIDLE) += cpuidle-zynq.o
obj-$(CONFIG_ARM_U8500_CPUIDLE) += cpuidle-ux500.o
obj-$(CONFIG_ARM_AT91_CPUIDLE) += cpuidle-at91.o
obj-$(CONFIG_ARM_EXYNOS_CPUIDLE) += cpuidle-exynos.o
+obj-$(CONFIG_ARM_EXYNOS4210_CPUIDLE) += cpuidle-exynos4210.o
###############################################################################
# POWERPC drivers
diff --git a/drivers/cpuidle/cpuidle-exynos4210.c b/drivers/cpuidle/cpuidle-exynos4210.c
new file mode 100644
index 0000000..56f6d51
--- /dev/null
+++ b/drivers/cpuidle/cpuidle-exynos4210.c
@@ -0,0 +1,226 @@
+/*
+ * Copyright (c) 2014 Samsung Electronics Co., Ltd.
+ * http://www.samsung.com
+ *
+ * Copyright (c) 2014 Linaro : Daniel Lezcano <daniel.lezcano(a)linaro.org>
+ * http://www.linaro.org
+ *
+ * Based on the work of Colin Cross <ccross(a)android.com>
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ */
+
+#include <linux/cpuidle.h>
+#include <linux/cpu_pm.h>
+#include <linux/io.h>
+#include <linux/platform_device.h>
+
+#include <asm/proc-fns.h>
+#include <asm/suspend.h>
+#include <asm/cpuidle.h>
+
+#include <plat/pm.h>
+#include <plat/cpu.h>
+#include <plat/map-base.h>
+#include <plat/map-s5p.h>
+
+static atomic_t exynos_idle_barrier;
+static atomic_t cpu1_wakeup = ATOMIC_INIT(0);
+
+#define BOOT_VECTOR S5P_VA_SYSRAM
+#define S5P_VA_PMU S3C_ADDR(0x02180000)
+#define S5P_PMUREG(x) (S5P_VA_PMU + (x))
+#define S5P_ARM_CORE1_CONFIGURATION S5P_PMUREG(0x2080)
+#define S5P_ARM_CORE1_STATUS S5P_PMUREG(0x2084)
+
+static void (*exynos_aftr)(void);
+
+static int cpu_suspend_finish(unsigned long flags)
+{
+ if (flags)
+ exynos_aftr();
+
+ cpu_do_idle();
+
+ return -1;
+}
+
+static int exynos_cpu0_enter_aftr(void)
+{
+ int ret = -1;
+
+ /*
+ * If the other cpu is powered on, we have to power it off, because
+ * the AFTR state won't work otherwise
+ */
+ if (cpu_online(1)) {
+
+ /*
+ * We reach a sync point with the coupled idle state, we know
+ * the other cpu will power down itself or will abort the
+ * sequence, let's wait for one of these to happen
+ */
+ while (__raw_readl(S5P_ARM_CORE1_STATUS) & 3) {
+
+ /*
+ * The other cpu may skip idle and boot back
+ * up again
+ */
+ if (atomic_read(&cpu1_wakeup))
+ goto abort;
+
+ /*
+ * The other cpu may bounce through idle and
+ * boot back up again, getting stuck in the
+ * boot rom code
+ */
+ if (__raw_readl(BOOT_VECTOR) == 0)
+ goto abort;
+
+ cpu_relax();
+ }
+ }
+
+ cpu_pm_enter();
+
+ ret = cpu_suspend(1, cpu_suspend_finish);
+
+ cpu_pm_exit();
+
+abort:
+ if (cpu_online(1)) {
+ /*
+ * Set the boot vector to something non-zero
+ */
+ __raw_writel(virt_to_phys(s3c_cpu_resume),
+ BOOT_VECTOR);
+ dsb();
+
+ /*
+ * Turn on cpu1 and wait for it to be on
+ */
+ __raw_writel(0x3, S5P_ARM_CORE1_CONFIGURATION);
+ while ((__raw_readl(S5P_ARM_CORE1_STATUS) & 3) != 3)
+ cpu_relax();
+
+ /*
+ * Wait for cpu1 to get stuck in the boot rom
+ */
+ while ((__raw_readl(BOOT_VECTOR) != 0) &&
+ !atomic_read(&cpu1_wakeup))
+ cpu_relax();
+
+ if (!atomic_read(&cpu1_wakeup)) {
+ /*
+ * Poke cpu1 out of the boot rom
+ */
+ __raw_writel(virt_to_phys(s3c_cpu_resume),
+ BOOT_VECTOR);
+ dsb_sev();
+ }
+
+ /*
+ * Wait for cpu1 to finish booting
+ */
+ while (!atomic_read(&cpu1_wakeup))
+ cpu_relax();
+ }
+
+ return ret;
+}
+
+static int exynos_powerdown_cpu1(void)
+{
+ int ret = -1;
+
+ /*
+ * Idle sequence for cpu1
+ */
+ if (cpu_pm_enter())
+ goto cpu1_aborted;
+
+ /*
+ * Turn off cpu 1
+ */
+ __raw_writel(0, S5P_ARM_CORE1_CONFIGURATION);
+
+ ret = cpu_suspend(0, cpu_suspend_finish);
+
+ cpu_pm_exit();
+
+cpu1_aborted:
+ dsb();
+ /*
+ * Notify cpu 0 that cpu 1 is awake
+ */
+ atomic_set(&cpu1_wakeup, 1);
+
+ return ret;
+}
+
+static int exynos_enter_aftr(struct cpuidle_device *dev,
+ struct cpuidle_driver *drv, int index)
+{
+ int ret;
+
+ __raw_writel(virt_to_phys(s3c_cpu_resume), BOOT_VECTOR);
+
+ /*
+ * Waiting all cpus to reach this point at the same moment
+ */
+ cpuidle_coupled_parallel_barrier(dev, &exynos_idle_barrier);
+
+ /*
+ * Both cpus will reach this point at the same time
+ */
+ ret = dev->cpu ? exynos_powerdown_cpu1() : exynos_cpu0_enter_aftr();
+ if (ret)
+ index = ret;
+
+ /*
+ * Waiting all cpus to finish the power sequence before going further
+ */
+ cpuidle_coupled_parallel_barrier(dev, &exynos_idle_barrier);
+
+ atomic_set(&cpu1_wakeup, 0);
+
+ return index;
+}
+
+static struct cpuidle_driver exynos_idle_driver = {
+ .name = "exynos4210_idle",
+ .owner = THIS_MODULE,
+ .states = {
+ ARM_CPUIDLE_WFI_STATE,
+ [1] = {
+ .enter = exynos_enter_aftr,
+ .exit_latency = 5000,
+ .target_residency = 10000,
+ .flags = CPUIDLE_FLAG_TIME_VALID |
+ CPUIDLE_FLAG_COUPLED | CPUIDLE_FLAG_TIMER_STOP,
+ .name = "C1",
+ .desc = "ARM power down",
+ },
+ },
+ .state_count = 2,
+ .safe_state_index = 0,
+};
+
+static int exynos_cpuidle_probe(struct platform_device *pdev)
+{
+ exynos_aftr = (void *)(pdev->dev.platform_data);
+
+ return cpuidle_register(&exynos_idle_driver, cpu_possible_mask);
+}
+
+static struct platform_driver exynos_cpuidle_driver = {
+ .driver = {
+ .name = "exynos4210-cpuidle",
+ .owner = THIS_MODULE,
+ },
+ .probe = exynos_cpuidle_probe,
+};
+
+module_platform_driver(exynos_cpuidle_driver);
--
1.7.9.5
I'm dropping the RFC tag now as I have the feeling that we are starting to have something in
a good shape that can be pushed for more testing in near future.
This is v7 of my attempt to add support for a generic pci_host_bridge controller created
from a description passed in the device tree.
Changes from v6:
- Made pci_register_io_range() return an error if PCI_IOBASE is not defined. When the
cleanup of PCI_IOBASE use is going to happen, that will catch all those architectures
that don't use virtual mapping of I/O ranges (like x86) or don't support PCI at all.
- Improved the error handling in of_pci_range_to_resource() and made it propagate the
error as well.
- Bail out of the parsing of PCI ranges if of_pci_range_to_resource() fails.
Changes from v5:
- Tested by Tanmay Inamdar, thanks Tanmay!
- dropped v5 5/7 pci: Use parent domain number when allocating child busses.
- Added weak implementation of pcibios_fixup_bridge_ranges() in drivers/pci/host-bridge.c
so that architectures that enable CONFIG_OF and CONFIG_PCI don't suddenly get compilation
errors. While at this, changed the signature of the function so that an error can be
returned.
- With the new error code in pcibios_fixup_bridge_ranges(), reworked the error handling
in pci_host_bridge_of_get_ranges() and of_create_pci_host_bridge().
- Add linux/slab.h to the #include list
- Revisit the error path in pci_create_root_bus[_in_domain]() and fixed the case where
failing to allocate the bus will not return an error.
Changes from v4:
- Export pci_find_host_bridge() to be used by arch code. There is scope for
making the arch/arm64 version of pci_domain_nr the default weak implementation
but that would double the size of this series in order to handle all #define
versions of the pci_domain_nr() function, so I suggest keeping that for a separate
cleanup series.
Changes from v3:
- Dynamically allocate bus_range resource in of_create_pci_host_bridge()
- Fix the domain number used when creating child busses.
- Changed domain number allocator to use atomic operations.
- Use ERR_PTR() to propagate the error out of pci_create_root_bus_in_domain()
and of_create_pci_host_bridge().
Changes from v2:
- Use range->cpu_addr when calling pci_address_to_pio()
- Introduce pci_register_io_range() helper function in order to register
io ranges ahead of their conversion to PIO values. This is needed as no
information is being stored yet regarding the range mapping, making
pci_address_to_pio() fail. Default weak implementation does nothing,
to cover the default weak implementation of pci_address_to_pio() that
expects direct mapping of physical addresses into PIO values (x86 view).
Changes from v1:
- Add patch to fix conversion of IO ranges into IO resources.
- Added a domain_nr member to pci_host_bridge structure, and a new function
to create a root bus in a given domain number. In order to facilitate that
I propose changing the order of initialisation between pci_host_bridge and
it's related bus in pci_create_root_bus() as sort of a rever of 7b5436635800.
This is done in patch 1/4 and 2/4.
- Added a simple allocator of domain numbers in drivers/pci/host-bridge.c. The
code will first try to get a domain id from of_alias_get_id(..., "pci-domain")
and if that fails assign the next unallocated domain id.
- Changed the name of the function that creates the generic host bridge from
pci_host_bridge_of_init to of_create_pci_host_bridge and exported as GPL symbol.
v6 thread here: https://lkml.org/lkml/2014/3/5/179
v5 thread here: https://lkml.org/lkml/2014/3/4/318
v4 thread here: https://lkml.org/lkml/2014/3/3/301
v3 thread here: https://lkml.org/lkml/2014/2/28/216
v2 thread here: https://lkml.org/lkml/2014/2/27/245
v1 thread here: https://lkml.org/lkml/2014/2/3/380
Best regards,
Liviu
Liviu Dudau (6):
pci: Introduce pci_register_io_range() helper function.
pci: OF: Fix the conversion of IO ranges into IO resources.
pci: Create pci_host_bridge before its associated bus in pci_create_root_bus.
pci: Introduce a domain number for pci_host_bridge.
pci: Export find_pci_host_bridge() function.
pci: Add support for creating a generic host_bridge from device tree
drivers/of/address.c | 49 +++++++++++
drivers/pci/host-bridge.c | 161 ++++++++++++++++++++++++++++++++++-
drivers/pci/probe.c | 73 ++++++++++------
include/linux/of_address.h | 14 +--
include/linux/pci.h | 17 ++++
5 files changed, 278 insertions(+), 36 deletions(-)
--
1.9.0
Changelog:
V5:
* Removed patch : "Move clock setup to pm.c"
* Added patch : "Move arm core power down clock to exynos5250 common code"
V4:
* Took into account Tomasz's comments
* Fixed missing call in for central suspend
* Passed parameter to the wakeup mask function
* Moved wakeup mask, boot vector and aftr state into a single
function
* Used this function as callback for platform data
* Moved S5P_CHECK_AFTR/S5P_CHECK_SLEEP into pm.c
* Set boot vector only one time
* Splitted some patches to make them more readable
V3:
* Added patch : "ARM: exynos: cpuidle: Disable cpuidle for 5440"
* Removed patch : "ARM: exynos: config: Enable cpuidle"
* Removed default ARM_EXYNOS4210_CPUIDLE=y
* Added comment about bug fix side effect 'for_each_possible_cpu'
V2:
* Added comment in changelog for calls order (5/17)
* Call the powerdown only for cpu0 in the pm notifier
* Set the pm notifier for all boards
V1: initial post
This patchset relies on the cpm_pm notifier to initiate the powerdown sequence
operations from pm.c instead cpuidle.c. Thus the cpuidle driver is no longer
dependent from arch specific code as everything is called from the pm.c file.
The patchset applies on top of linux-samsung/for-next.
Tested on exynos4: 4210
Tested on exynos5: 5250 (without AFTR)
Amit Daniel Kachhap (1):
ARM: EXYNOS: Move arm core power down clock to exynos5250 common
clock
Daniel Lezcano (19):
ARM: exynos: cpuidle: Prevent forward declaration
ARM: exynos: cpuidle: Use cpuidle_register
ARM: exynos: cpuidle: Change function name prefix
ARM: exynos: cpuidle: Encapsulate register access inside a function
ARM: exynos: cpuidle: Move some code inside the idle_finisher
ARM: exynos: cpuidle: Fix S5P_WAKEUP_STAT call
ARM: exynos: cpuidle: Use the cpu_pm notifier
ARM: exynos: cpuidle: Move scu_enable in the cpu_pm notifier
ARM: exynos: cpuidle: Remove ifdef for scu_enable
ARM: exynos: cpuidle: Pass wakeup mask parameter to function
ARM: exynos: cpuidle: Encapsulate boot vector code into a function
ARM: exynos: cpuidle: Disable cpuidle for 5440
ARM: exynos: cpuidle: Encapsulate the AFTR code into a function
ARM: exynos: cpuidle: Move the AFTR state function into pm.c
ARM: exynos: cpuidle: Move the power sequence call in the cpu_pm
notifier
ARM: exynos: cpuidle: Move S5P_CHECK_SLEEP into pm.c
ARM: exynos: cpuidle: Pass the AFTR callback to the platform_data
ARM: exynos: cpuidle: Cleanup all unneeded headers from cpuidle.c
ARM: exynos: cpuidle: Move the driver to drivers/cpuidle directory
arch/arm/mach-exynos/Makefile | 1 -
arch/arm/mach-exynos/common.h | 1 +
arch/arm/mach-exynos/cpuidle.c | 255 ----------------------------------
arch/arm/mach-exynos/exynos.c | 8 +-
arch/arm/mach-exynos/pm.c | 152 ++++++++++++++++----
arch/arm/mach-exynos/regs-pmu.h | 2 -
drivers/clk/samsung/clk-exynos5250.c | 42 ++++++
drivers/cpuidle/Kconfig.arm | 6 +
drivers/cpuidle/Makefile | 1 +
drivers/cpuidle/cpuidle-exynos.c | 98 +++++++++++++
10 files changed, 277 insertions(+), 289 deletions(-)
delete mode 100644 arch/arm/mach-exynos/cpuidle.c
create mode 100644 drivers/cpuidle/cpuidle-exynos.c
--
1.7.9.5
This patch enables secure computing (system call filtering) on arm64.
System calls can be allowed or denied by loaded bpf-style rules.
Architecture specific part is to run secure_computing() on syscall entry
and check the result. See [1/2]
Prerequisites are:
* "arm64: Add audit support" patch
* "arm64: make a single hook to syscall_trace() for all syscall features" patch
This code is tested on ARMv8 fast model using libseccomp v2.1.1 with
modifications for arm64 and verified by its "live" tests, 20, 21 and 24.
AKASHI Takahiro (2):
arm64: Add seccomp support
arm64: is_compat_task is defined both in asm/compat.h and
linux/compat.h
arch/arm64/Kconfig | 17 +++++++++++++++++
arch/arm64/include/asm/compat.h | 2 ++
arch/arm64/include/asm/seccomp.h | 28 ++++++++++++++++++++++++++++
arch/arm64/include/asm/unistd.h | 3 +++
arch/arm64/kernel/entry.S | 4 ++++
arch/arm64/kernel/ptrace.c | 5 +++++
6 files changed, 59 insertions(+)
create mode 100644 arch/arm64/include/asm/seccomp.h
--
1.7.9.5