linaro-kernel March 2016

linaro-kernel@lists.linaro.org

30 participants
150 discussions

[PATCH V3 00/16] PM / OPP: Introduce APIs to transition OPPs

by Viresh Kumar

Hi Guys, This patchset add APIs in OPP layer to allow OPPs transitioning from within OPP layer. Currently all OPP users need to replicate the same code to switch between OPPs. While the same can be handled easily by OPP-core. The first 7 patches update the OPP core to introduce the new APIs and the next Nine patches update cpufreq-dt for the same. 11 out of 17 are already Reviewed by Stephen, only few are left :) I hope this is the last version of the series :) Testing: - Tested on exynos 5250-arndale (dual-cortex-A15) - Tested for both Old-V1 bindings and New V2 bindings - Tested with regulator names as: 'cpu-supply' and 'cpu0-supply' - Tested with Unsupported supply ranges as well, to check the opp-disable logic V2->V3: - Very minor updates. - find_supply_name() doesn't return an error value now, and so its callers don't check for it. - And so we don't need to initialize name to NULL Viresh Kumar (16): PM / OPP: get/put regulators from OPP core PM / OPP: Disable OPPs that aren't supported by the regulator PM / OPP: Introduce dev_pm_opp_get_max_volt_latency() PM / OPP: Introduce dev_pm_opp_get_max_transition_latency() PM / OPP: Parse clock-latency and voltage-tolerance for v1 bindings PM / OPP: Manage device clk PM / OPP: Add dev_pm_opp_set_rate() cpufreq: dt: Convert few pr_debug/err() calls to dev_dbg/err() cpufreq: dt: Rename 'need_update' to 'opp_v1' cpufreq: dt: OPP layers handles clock-latency for V1 bindings as well cpufreq: dt: Pass regulator name to the OPP core cpufreq: dt: Unsupported OPPs are already disabled cpufreq: dt: Reuse dev_pm_opp_get_max_transition_latency() cpufreq: dt: Use dev_pm_opp_set_rate() to switch frequency cpufreq: dt: No need to fetch voltage-tolerance cpufreq: dt: No need to allocate resources anymore drivers/base/power/opp/core.c | 420 ++++++++++++++++++++++++++++++++++++++++++ drivers/base/power/opp/opp.h | 13 ++ drivers/cpufreq/cpufreq-dt.c | 300 +++++++++++------------------- include/linux/pm_opp.h | 27 +++ 4 files changed, 565 insertions(+), 195 deletions(-) -- 2.7.1.370.gb2aa7f8

6 years, 5 months

[PATCH 00/34] CPUFreq: Move freq change notifications out of drivers

by Viresh Kumar

Another 452 lines gone :) Total stats upto now for all the 5 patchsets: Viresh Kumar (186): ... 69 files changed, 700 insertions(+), 2451 deletions(-) Net: 1751 lines gone.. -----x-------------x---------------- Most of the drivers do following in their ->target_index() routines: struct cpufreq_freqs freqs; freqs.old = old freq... freqs.new = new freq... cpufreq_notify_transition(policy, &freqs, CPUFREQ_PRECHANGE); /* Change rate here */ cpufreq_notify_transition(policy, &freqs, CPUFREQ_POSTCHANGE); This is replicated over all cpufreq drivers today and there doesn't exists a good enough reason why this shouldn't be moved to cpufreq core instead. There are few special cases though, like exynos5440, which doesn't do everything on the call to ->target_index() routine and call some kind of bottom halves for doing this work, work/tasklet/etc.. They may continue doing notification from their own code and so this patch introduces another flag: CPUFREQ_NO_NOTIFICATION, which will be set by such drivers. This is Fifth part of my cleanup work for CPUFreq, first three are (And obviously its rebased over them): 1: cpufreq: Introduce cpufreq_table_validate_and_show() https://lkml.org/lkml/2013/8/8/263 2: cpufreq: define generic routines for cpufreq drivers https://lkml.org/lkml/2013/8/10/48 3. CPUFreq: Implement light weight ->target(): for 3.13 https://lkml.org/lkml/2013/8/13/349 4. CPUFreq: set policy->cur in cpufreq core instead of drivers https://lkml.org/lkml/2013/8/14/288 All these are pushed here: https://git.linaro.org/gitweb?p=people/vireshk/linux.git;a=shortlog;h=refs/… -- viresh Cc: Andrew Lunn <andrew(a)lunn.ch> Cc: David S. Miller <davem(a)davemloft.net> Cc: Dmitry Eremin-Solenikov <dbaryshkov(a)gmail.com> Cc: Eric Miao <eric.y.miao(a)gmail.com> Cc: Hans-Christian Egtvedt <egtvedt(a)samfundet.no> Cc: Jesper Nilsson <jesper.nilsson(a)axis.com> Cc: John Crispin <blogic(a)openwrt.org> Cc: Kukjin Kim <kgene.kim(a)samsung.com> Cc: Linus Walleij <linus.walleij(a)linaro.org> Cc: linux-cris-kernel(a)axis.com Cc: Mikael Starvik <starvik(a)axis.com> Cc: Russell King <linux(a)arm.linux.org.uk> Cc: Santosh Shilimkar <santosh.shilimkar(a)ti.com> Cc: Sekhar Nori <nsekhar(a)ti.com> Cc: Shawn Guo <shawn.guo(a)linaro.org> Cc: sparclinux(a)vger.kernel.org Cc: spear-devel(a)list.st.com Cc: Stephen Warren <swarren(a)nvidia.com> Cc: Steven Miao <realmz6(a)gmail.com> Cc: Tony Luck <tony.luck(a)intel.com> Viresh Kumar (34): cpufreq: move freq change notifications to cpufreq core cpufreq: acpi: remove calls to cpufreq_notify_transition() cpufreq: arm_big_little: remove calls to cpufreq_notify_transition() cpufreq: at32ap: remove calls to cpufreq_notify_transition() cpufreq: blackfin: remove calls to cpufreq_notify_transition() cpufreq: cpu0: remove calls to cpufreq_notify_transition() cpufreq: cris: remove calls to cpufreq_notify_transition() cpufreq: davinci: remove calls to cpufreq_notify_transition() cpufreq: dbx500: remove calls to cpufreq_notify_transition() cpufreq: e_powersaver: remove calls to cpufreq_notify_transition() cpufreq: elanfreq: remove calls to cpufreq_notify_transition() cpufreq: exynos: remove calls to cpufreq_notify_transition() cpufreq: exynos5440: set CPUFREQ_NO_NOTIFICATION flag cpufreq: ia64-acpi: remove calls to cpufreq_notify_transition() cpufreq: imx6q: remove calls to cpufreq_notify_transition() cpufreq: kirkwood: remove calls to cpufreq_notify_transition() cpufreq: longhaul: set CPUFREQ_NO_NOTIFICATION flag cpufreq: loongson2: remove calls to cpufreq_notify_transition() cpufreq: maple: remove calls to cpufreq_notify_transition() cpufreq: omap: remove calls to cpufreq_notify_transition() cpufreq: p4-clockmod: remove calls to cpufreq_notify_transition() cpufreq: pasemi: remove calls to cpufreq_notify_transition() cpufreq: pmac: remove calls to cpufreq_notify_transition() cpufreq: powernow: remove calls to cpufreq_notify_transition() cpufreq: ppc: remove calls to cpufreq_notify_transition() cpufreq: pxa: remove calls to cpufreq_notify_transition() cpufreq: s3c: remove calls to cpufreq_notify_transition() cpufreq: s5pv210: remove calls to cpufreq_notify_transition() cpufreq: sa11x0: remove calls to cpufreq_notify_transition() cpufreq: sc520: remove calls to cpufreq_notify_transition() cpufreq: sparc: remove calls to cpufreq_notify_transition() cpufreq: SPEAr: remove calls to cpufreq_notify_transition() cpufreq: speedstep: remove calls to cpufreq_notify_transition() cpufreq: tegra: remove calls to cpufreq_notify_transition() drivers/cpufreq/acpi-cpufreq.c | 14 ++------- drivers/cpufreq/arm_big_little.c | 25 ++-------------- drivers/cpufreq/at32ap-cpufreq.c | 22 ++++++-------- drivers/cpufreq/blackfin-cpufreq.c | 22 +++++--------- drivers/cpufreq/cpufreq-cpu0.c | 33 ++++++++------------- drivers/cpufreq/cpufreq.c | 34 +++++++++++++++++++++ drivers/cpufreq/cris-artpec3-cpufreq.c | 8 ----- drivers/cpufreq/cris-etraxfs-cpufreq.c | 8 ----- drivers/cpufreq/davinci-cpufreq.c | 30 +++++++------------ drivers/cpufreq/dbx500-cpufreq.c | 22 +------------- drivers/cpufreq/e_powersaver.c | 23 ++------------- drivers/cpufreq/elanfreq.c | 13 -------- drivers/cpufreq/exynos-cpufreq.c | 28 +++++------------- drivers/cpufreq/exynos5440-cpufreq.c | 2 +- drivers/cpufreq/ia64-acpi-cpufreq.c | 19 ------------ drivers/cpufreq/imx6q-cpufreq.c | 39 ++++++++++-------------- drivers/cpufreq/kirkwood-cpufreq.c | 54 +++++++++++++--------------------- drivers/cpufreq/longhaul.c | 1 + drivers/cpufreq/loongson2_cpufreq.c | 16 ---------- drivers/cpufreq/maple-cpufreq.c | 18 +----------- drivers/cpufreq/omap-cpufreq.c | 39 +++++++++--------------- drivers/cpufreq/p4-clockmod.c | 10 ------- drivers/cpufreq/pasemi-cpufreq.c | 14 +-------- drivers/cpufreq/pmac32-cpufreq.c | 20 +++---------- drivers/cpufreq/pmac64-cpufreq.c | 18 +----------- drivers/cpufreq/powernow-k6.c | 8 ----- drivers/cpufreq/powernow-k7.c | 11 +------ drivers/cpufreq/powernow-k8.c | 15 +--------- drivers/cpufreq/ppc-corenet-cpufreq.c | 19 +----------- drivers/cpufreq/ppc_cbe_cpufreq.c | 19 +----------- drivers/cpufreq/pxa2xx-cpufreq.c | 27 ++++------------- drivers/cpufreq/pxa3xx-cpufreq.c | 12 -------- drivers/cpufreq/s3c2416-cpufreq.c | 21 +++---------- drivers/cpufreq/s3c64xx-cpufreq.c | 48 ++++++++++-------------------- drivers/cpufreq/s5pv210-cpufreq.c | 16 ++++------ drivers/cpufreq/sa1100-cpufreq.c | 17 ++++------- drivers/cpufreq/sa1110-cpufreq.c | 12 ++------ drivers/cpufreq/sc520_freq.c | 11 ------- drivers/cpufreq/sparc-us2e-cpufreq.c | 7 ----- drivers/cpufreq/sparc-us3-cpufreq.c | 7 ----- drivers/cpufreq/spear-cpufreq.c | 13 +------- drivers/cpufreq/speedstep-centrino.c | 20 +------------ drivers/cpufreq/speedstep-ich.c | 9 ------ drivers/cpufreq/speedstep-smi.c | 7 ----- drivers/cpufreq/tegra-cpufreq.c | 25 ++++------------ include/linux/cpufreq.h | 6 ++++ 46 files changed, 205 insertions(+), 657 deletions(-) -- 1.7.12.rc2.18.g61b472e

7 years, 2 months

[PATCH v6] clk: mediatek: Export CPU mux clocks for CPU frequency control

by Pi-Cheng Chen

From: "pi-cheng.chen" <pi-cheng.chen(a)linaro.org> This patch adds CPU mux clocks which are used by Mediatek cpufreq driver for intermediate clock source switching. Signed-off-by: Pi-Cheng Chen <pi-cheng.chen(a)linaro.org> --- Changes in v6: - Relace __clk_get_num_parents with clk_hw_get_num_parents to reflect API change Changes in v5: - Replace __initdata with __initconst to fix compiling error Changes in v4: - Fix some minor issues for v3 - Rebase to the patch that adds 13mhz clock for MT8173[1] Changes in v3: - Rebase to 4.2-rc1 - Fix some issues of v2 Changes in v2: - Remove use of .determine_rate callback --- drivers/clk/mediatek/Makefile | 2 +- drivers/clk/mediatek/clk-cpumux.c | 127 +++++++++++++++++++++++++++++++++ drivers/clk/mediatek/clk-cpumux.h | 22 ++++++ drivers/clk/mediatek/clk-mt8173.c | 23 ++++++ include/dt-bindings/clock/mt8173-clk.h | 4 +- 5 files changed, 176 insertions(+), 2 deletions(-) create mode 100644 drivers/clk/mediatek/clk-cpumux.c create mode 100644 drivers/clk/mediatek/clk-cpumux.h diff --git a/drivers/clk/mediatek/Makefile b/drivers/clk/mediatek/Makefile index 8e4b2a4..299917a 100644 --- a/drivers/clk/mediatek/Makefile +++ b/drivers/clk/mediatek/Makefile @@ -1,4 +1,4 @@ -obj-y += clk-mtk.o clk-pll.o clk-gate.o +obj-y += clk-mtk.o clk-pll.o clk-gate.o clk-cpumux.o obj-$(CONFIG_RESET_CONTROLLER) += reset.o obj-y += clk-mt8135.o obj-y += clk-mt8173.o diff --git a/drivers/clk/mediatek/clk-cpumux.c b/drivers/clk/mediatek/clk-cpumux.c new file mode 100644 index 0000000..91b5238 --- /dev/null +++ b/drivers/clk/mediatek/clk-cpumux.c @@ -0,0 +1,127 @@ +/* + * Copyright (c) 2015 Linaro Ltd. + * Author: Pi-Cheng Chen <pi-cheng.chen(a)linaro.org> + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + */ + +#include <linux/clk-provider.h> +#include <linux/mfd/syscon.h> +#include <linux/slab.h> + +#include "clk-mtk.h" +#include "clk-cpumux.h" + +struct mtk_clk_cpumux { + struct clk_hw hw; + struct regmap *regmap; + u32 reg; + u32 mask; + u8 shift; +}; + +static inline struct mtk_clk_cpumux *to_clk_mux(struct clk_hw *_hw) +{ + return container_of(_hw, struct mtk_clk_cpumux, hw); +} + +static u8 clk_cpumux_get_parent(struct clk_hw *hw) +{ + struct mtk_clk_cpumux *mux = to_clk_mux(hw); + int num_parents = clk_hw_get_num_parents(hw); + unsigned int val; + + regmap_read(mux->regmap, mux->reg, &val); + + val >>= mux->shift; + val &= mux->mask; + + if (val >= num_parents) + return -EINVAL; + + return val; +} + +static int clk_cpumux_set_parent(struct clk_hw *hw, u8 index) +{ + struct mtk_clk_cpumux *mux = to_clk_mux(hw); + u32 mask, val; + + val = index << mux->shift; + mask = mux->mask << mux->shift; + + return regmap_update_bits(mux->regmap, mux->reg, mask, val); +} + +static const struct clk_ops clk_cpumux_ops = { + .get_parent = clk_cpumux_get_parent, + .set_parent = clk_cpumux_set_parent, +}; + +static struct clk __init *mtk_clk_register_cpumux(const struct mtk_composite *mux, + struct regmap *regmap) +{ + struct mtk_clk_cpumux *cpumux; + struct clk *clk; + struct clk_init_data init; + + cpumux = kzalloc(sizeof(*cpumux), GFP_KERNEL); + if (!cpumux) + return ERR_PTR(-ENOMEM); + + init.name = mux->name; + init.ops = &clk_cpumux_ops; + init.parent_names = mux->parent_names; + init.num_parents = mux->num_parents; + init.flags = mux->flags; + + cpumux->reg = mux->mux_reg; + cpumux->shift = mux->mux_shift; + cpumux->mask = BIT(mux->mux_width) - 1; + cpumux->regmap = regmap; + cpumux->hw.init = &init; + + clk = clk_register(NULL, &cpumux->hw); + if (IS_ERR(clk)) + kfree(cpumux); + + return clk; +} + +int __init mtk_clk_register_cpumuxes(struct device_node *node, + const struct mtk_composite *clks, int num, + struct clk_onecell_data *clk_data) +{ + int i; + struct clk *clk; + struct regmap *regmap; + + regmap = syscon_node_to_regmap(node); + if (IS_ERR(regmap)) { + pr_err("Cannot find regmap for %s: %ld\n", node->full_name, + PTR_ERR(regmap)); + return PTR_ERR(regmap); + } + + for (i = 0; i < num; i++) { + const struct mtk_composite *mux = &clks[i]; + + clk = mtk_clk_register_cpumux(mux, regmap); + if (IS_ERR(clk)) { + pr_err("Failed to register clk %s: %ld\n", + mux->name, PTR_ERR(clk)); + continue; + } + + clk_data->clks[mux->id] = clk; + } + + return 0; +} diff --git a/drivers/clk/mediatek/clk-cpumux.h b/drivers/clk/mediatek/clk-cpumux.h new file mode 100644 index 0000000..52c769f --- /dev/null +++ b/drivers/clk/mediatek/clk-cpumux.h @@ -0,0 +1,22 @@ +/* + * Copyright (c) 2015 Linaro Ltd. + * Author: Pi-Cheng Chen <pi-cheng.chen(a)linaro.org> + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + */ + +#ifndef __DRV_CLK_CPUMUX_H +#define __DRV_CLK_CPUMUX_H + +int mtk_clk_register_cpumuxes(struct device_node *node, + const struct mtk_composite *clks, int num, + struct clk_onecell_data *clk_data); + +#endif /* __DRV_CLK_CPUMUX_H */ diff --git a/drivers/clk/mediatek/clk-mt8173.c b/drivers/clk/mediatek/clk-mt8173.c index 9ea6aa1..b02d310 100644 --- a/drivers/clk/mediatek/clk-mt8173.c +++ b/drivers/clk/mediatek/clk-mt8173.c @@ -20,6 +20,7 @@ #include "clk-mtk.h" #include "clk-gate.h" +#include "clk-cpumux.h" #include <dt-bindings/clock/mt8173-clk.h> @@ -518,6 +519,25 @@ static const char * const i2s3_b_ck_parents[] __initconst = { "apll2_div5" }; +static const char * const ca53_parents[] __initconst = { + "clk26m", + "armca7pll", + "mainpll", + "univpll" +}; + +static const char * const ca57_parents[] __initconst = { + "clk26m", + "armca15pll", + "mainpll", + "univpll" +}; + +static const struct mtk_composite cpu_muxes[] __initconst = { + MUX(CLK_INFRA_CA53SEL, "infra_ca53_sel", ca53_parents, 0x0000, 0, 2), + MUX(CLK_INFRA_CA57SEL, "infra_ca57_sel", ca57_parents, 0x0000, 2, 2), +}; + static const struct mtk_composite top_muxes[] __initconst = { /* CLK_CFG_0 */ MUX(CLK_TOP_AXI_SEL, "axi_sel", axi_parents, 0x0040, 0, 3), @@ -760,6 +780,9 @@ static void __init mtk_infrasys_init(struct device_node *node) clk_data); mtk_clk_register_factors(infra_divs, ARRAY_SIZE(infra_divs), clk_data); + mtk_clk_register_cpumuxes(node, cpu_muxes, ARRAY_SIZE(cpu_muxes), + clk_data); + r = of_clk_add_provider(node, of_clk_src_onecell_get, clk_data); if (r) pr_err("%s(): could not register clock provider: %d\n", diff --git a/include/dt-bindings/clock/mt8173-clk.h b/include/dt-bindings/clock/mt8173-clk.h index fa2a2bb..a17cbaa 100644 --- a/include/dt-bindings/clock/mt8173-clk.h +++ b/include/dt-bindings/clock/mt8173-clk.h @@ -188,7 +188,9 @@ #define CLK_INFRA_PMICSPI 10 #define CLK_INFRA_PMICWRAP 11 #define CLK_INFRA_CLK_13M 12 -#define CLK_INFRA_NR_CLK 13 +#define CLK_INFRA_CA53SEL 13 +#define CLK_INFRA_CA57SEL 14 +#define CLK_INFRA_NR_CLK 15 /* PERI_SYS */ -- 1.9.1

7 years, 10 months

[RESEND PATCH] arm64: kgdb: fix single stepping

by AKASHI Takahiro

Jason, Could you please review my patch below? See also arm64 maintainer's comment: http://lists.infradead.org/pipermail/linux-arm-kernel/2015-January/313712.h… Thanks, -Takahiro AKASHI I tried to verify kgdb in vanilla kernel on fast model, but it seems that the single stepping with kgdb doesn't work correctly since its first appearance at v3.15. On v3.15, 'stepi' command after breaking the kernel at some breakpoint steps forward to the next instruction, but the succeeding 'stepi' never goes beyond that. On v3.16, 'stepi' moves forward and stops at the next instruction just after enable_dbg in el1_dbg, and never goes beyond that. This variance of behavior seems to come in with the following patch in v3.16: commit 2a2830703a23 ("arm64: debug: avoid accessing mdscr_el1 on fault paths where possible") This patch (1) moves kgdb_disable_single_step() from 'c' command handling to single step handler. This makes sure that single stepping gets effective at every 's' command. Please note that, under the current implementation, single step bit in spsr, which is cleared by the first single stepping, will not be set again for the consecutive 's' commands because single step bit in mdscr is still kept on (that is, kernel_active_single_step() in kgdb_arch_handle_exception() is true). (2) re-implements kgdb_roundup_cpus() because the current implementation enabled interrupts naively. See below. (3) removes 'enable_dbg' in el1_dbg. Single step bit in mdscr is turned on in do_handle_exception()-> kgdb_handle_expection() before returning to debugged context, and if debug exception is enabled in el1_dbg, we will see unexpected single- stepping in el1_dbg. Since v3.18, the following patch does the same: commit 1059c6bf8534 ("arm64: debug: don't re-enable debug exceptions on return from el1_dbg) (4) masks interrupts while single-stepping one instruction. If an interrupt is caught during processing a single-stepping, debug exception is unintentionally enabled by el1_irq's 'enable_dbg' before returning to debugged context. Thus, like in (2), we will see unexpected single-stepping in el1_irq. Basically (1) and (2) are for v3.15, (3) and (4) for v3.1[67]. * issue fixed by (2): Without (2), we would see another problem if a breakpoint is set at interrupt-sensible places, like gic_handle_irq(): KGDB: re-enter error: breakpoint removed ffffffc000081258 ------------[ cut here ]------------ WARNING: CPU: 0 PID: 650 at kernel/debug/debug_core.c:435 kgdb_handle_exception+0x1dc/0x1f4() Modules linked in: CPU: 0 PID: 650 Comm: sh Not tainted 3.17.0-rc2+ #177 Call trace: [<ffffffc000087fac>] dump_backtrace+0x0/0x130 [<ffffffc0000880ec>] show_stack+0x10/0x1c [<ffffffc0004d683c>] dump_stack+0x74/0xb8 [<ffffffc0000ab824>] warn_slowpath_common+0x8c/0xb4 [<ffffffc0000ab90c>] warn_slowpath_null+0x14/0x20 [<ffffffc000121bfc>] kgdb_handle_exception+0x1d8/0x1f4 [<ffffffc000092ffc>] kgdb_brk_fn+0x18/0x28 [<ffffffc0000821c8>] brk_handler+0x9c/0xe8 [<ffffffc0000811e8>] do_debug_exception+0x3c/0xac Exception stack(0xffffffc07e027650 to 0xffffffc07e027770) ... [<ffffffc000083cac>] el1_dbg+0x14/0x68 [<ffffffc00012178c>] kgdb_cpu_enter+0x464/0x5c0 [<ffffffc000121bb4>] kgdb_handle_exception+0x190/0x1f4 [<ffffffc000092ffc>] kgdb_brk_fn+0x18/0x28 [<ffffffc0000821c8>] brk_handler+0x9c/0xe8 [<ffffffc0000811e8>] do_debug_exception+0x3c/0xac Exception stack(0xffffffc07e027ac0 to 0xffffffc07e027be0) ... [<ffffffc000083cac>] el1_dbg+0x14/0x68 [<ffffffc00032e4b4>] __handle_sysrq+0x11c/0x190 [<ffffffc00032e93c>] write_sysrq_trigger+0x4c/0x60 [<ffffffc0001e7d58>] proc_reg_write+0x54/0x84 [<ffffffc000192fa4>] vfs_write+0x98/0x1c8 [<ffffffc0001939b0>] SyS_write+0x40/0xa0 Once some interrupt occurs, a breakpoint at gic_handle_irq() triggers kgdb. Kgdb then calls kgdb_roundup_cpus() to sync with other cpus. Current kgdb_roundup_cpus() unmasks interrupts temporarily to use smp_call_function(). This eventually allows another interrupt to occur and likely results in hitting a breakpoint at gic_handle_irq() again since debug exception is always enabled in el1_irq. We can avoid this issue by specifying "nokgdbroundup" in kernel parameter, but this will also leave other cpus be in unknown state in terms of kgdb, and may result in interfering with kgdb activity. Signed-off-by: AKASHI Takahiro <takahiro.akashi(a)linaro.org> --- arch/arm64/kernel/kgdb.c | 60 +++++++++++++++++++++++++++++++++++----------- 1 file changed, 46 insertions(+), 14 deletions(-) diff --git a/arch/arm64/kernel/kgdb.c b/arch/arm64/kernel/kgdb.c index a0d10c5..81b5910 100644 --- a/arch/arm64/kernel/kgdb.c +++ b/arch/arm64/kernel/kgdb.c @@ -19,9 +19,13 @@ * along with this program. If not, see <http://www.gnu.org/licenses/>. */ +#include <linux/cpumask.h> #include <linux/irq.h> +#include <linux/irq_work.h> #include <linux/kdebug.h> #include <linux/kgdb.h> +#include <linux/percpu.h> +#include <asm/ptrace.h> #include <asm/traps.h> struct dbg_reg_def_t dbg_reg_def[DBG_MAX_REG_NUM] = { @@ -95,6 +99,9 @@ struct dbg_reg_def_t dbg_reg_def[DBG_MAX_REG_NUM] = { { "fpcr", 4, -1 }, }; +static DEFINE_PER_CPU(unsigned int, kgdb_pstate); +static DEFINE_PER_CPU(struct irq_work, kgdb_irq_work); + char *dbg_get_reg(int regno, void *mem, struct pt_regs *regs) { if (regno >= DBG_MAX_REG_NUM || regno < 0) @@ -176,18 +183,14 @@ int kgdb_arch_handle_exception(int exception_vector, int signo, * over and over again. */ kgdb_arch_update_addr(linux_regs, remcom_in_buffer); - atomic_set(&kgdb_cpu_doing_single_step, -1); - kgdb_single_step = 0; - - /* - * Received continue command, disable single step - */ - if (kernel_active_single_step()) - kernel_disable_single_step(); err = 0; break; case 's': + /* mask interrupts while single stepping */ + __this_cpu_write(kgdb_pstate, linux_regs->pstate); + linux_regs->pstate |= PSR_I_BIT; + /* * Update step address value with address passed * with step packet. @@ -198,8 +201,6 @@ int kgdb_arch_handle_exception(int exception_vector, int signo, */ kgdb_arch_update_addr(linux_regs, remcom_in_buffer); atomic_set(&kgdb_cpu_doing_single_step, raw_smp_processor_id()); - kgdb_single_step = 1; - /* * Enable single step handling */ @@ -229,6 +230,18 @@ static int kgdb_compiled_brk_fn(struct pt_regs *regs, unsigned int esr) static int kgdb_step_brk_fn(struct pt_regs *regs, unsigned int esr) { + unsigned int pstate; + + kernel_disable_single_step(); + atomic_set(&kgdb_cpu_doing_single_step, -1); + + /* restore interrupt mask status */ + pstate = __this_cpu_read(kgdb_pstate); + if (pstate & PSR_I_BIT) + regs->pstate |= PSR_I_BIT; + else + regs->pstate &= ~PSR_I_BIT; + kgdb_handle_exception(1, SIGTRAP, 0, regs); return 0; } @@ -249,16 +262,27 @@ static struct step_hook kgdb_step_hook = { .fn = kgdb_step_brk_fn }; -static void kgdb_call_nmi_hook(void *ignored) +static void kgdb_roundup_hook(struct irq_work *work) { kgdb_nmicallback(raw_smp_processor_id(), get_irq_regs()); } void kgdb_roundup_cpus(unsigned long flags) { - local_irq_enable(); - smp_call_function(kgdb_call_nmi_hook, NULL, 0); - local_irq_disable(); + int cpu; + struct cpumask mask; + struct irq_work *work; + + mask = *cpu_online_mask; + cpumask_clear_cpu(smp_processor_id(), &mask); + cpu = cpumask_first(&mask); + if (cpu >= nr_cpu_ids) + return; + + for_each_cpu(cpu, &mask) { + work = per_cpu_ptr(&kgdb_irq_work, cpu); + irq_work_queue_on(work, cpu); + } } static int __kgdb_notify(struct die_args *args, unsigned long cmd) @@ -299,6 +323,8 @@ static struct notifier_block kgdb_notifier = { int kgdb_arch_init(void) { int ret = register_die_notifier(&kgdb_notifier); + int cpu; + struct irq_work *work; if (ret != 0) return ret; @@ -306,6 +332,12 @@ int kgdb_arch_init(void) register_break_hook(&kgdb_brkpt_hook); register_break_hook(&kgdb_compiled_brkpt_hook); register_step_hook(&kgdb_step_hook); + + for_each_possible_cpu(cpu) { + work = per_cpu_ptr(&kgdb_irq_work, cpu); + init_irq_work(work, kgdb_roundup_hook); + } + return 0; } -- 1.7.9.5

8 years, 3 months

[PATCH 4.2-rc1 v21 0/6] irq/arm: Implement arch_trigger_all_cpu_backtrace

by Daniel Thompson

This patchset modifies the GIC driver to allow it, on supported platforms, to route IPI interrupts to FIQ. It then uses this feature to implement arch_trigger_all_cpu_backtrace for arm. In order to neatly deliver the changes for the arm we also rearrange some of the existing x86 NMI code to make it architecture neutral. The patches have been runtime tested on both a system capable of supporting FIQ (Freescale i.MX6) and one that cannot (Qualcomm Snapdragon 600). In addition older versions of this patchset have been tested on STiH416 and vexpress-a9. The changes to the x86 logic were tested using qemu. v21: * Change the way SGIs are raised to try to increase robustness starting secondary cores. This is a theoretic fix for a regression reported by Mark Rutland on vexpress-tc2 but it also allows us to remove igroup0_shadow entirely since it is no longer needed. * Fix a couple of variable names and add comments to describe the hardware behavior better (Mark Rutland). * Improved MULTI_IRQ_HANDLER support by clearing FIQs using handle_arch_irq (Marc Zygnier). * Fix gic_cpu_if_down() to ensure group 1 interrupts are disabled then the interface is brought down. For changes in v20 and earlier see: http://thread.gmane.org/gmane.linux.kernel/1928465 Daniel Thompson (6): irqchip: gic: Optimize locking in gic_raise_softirq irqchip: gic: Make gic_raise_softirq FIQ-safe irqchip: gic: Introduce plumbing for IPI FIQ printk: Simple implementation for NMI backtracing x86/nmi: Use common printk functions ARM: Add support for on-demand backtrace of other CPUs arch/arm/Kconfig | 1 + arch/arm/include/asm/hardirq.h | 2 +- arch/arm/include/asm/irq.h | 5 + arch/arm/include/asm/smp.h | 3 + arch/arm/kernel/smp.c | 82 +++++++++++++++ arch/arm/kernel/traps.c | 13 ++- arch/x86/Kconfig | 1 + arch/x86/kernel/apic/hw_nmi.c | 104 ++----------------- drivers/irqchip/irq-gic.c | 220 +++++++++++++++++++++++++++++++++++++--- include/linux/irqchip/arm-gic.h | 6 ++ include/linux/printk.h | 20 ++++ init/Kconfig | 3 + kernel/printk/Makefile | 1 + kernel/printk/nmi_backtrace.c | 147 +++++++++++++++++++++++++++ 14 files changed, 495 insertions(+), 113 deletions(-) create mode 100644 kernel/printk/nmi_backtrace.c -- 2.4.3

8 years, 4 months

[PATCH V3 0/4] cpufreq: dt: Create platform device from generic code

by Viresh Kumar

Multiple platforms are using the generic cpufreq-dt driver now, and all of them are required to create a platform device with name "cpufreq-dt", in order to get the cpufreq-dt probed. Many of them do it from platform code, others have special drivers just to do that. It would be more sensible to do this at a generic place, where all such platform can mark their entries. The first patch fixes an issue that came up with an earlier version of patch 2/4, but its still worth fixing it. The second one creates a new driver to create platform-device based on current platform and the last two converts exynos platform to use this common infrastructure. I will migrate rest of the platforms after this is accepted as the right way ahead. V2->V3: - 2/3 is very lightweight now and doesn't support cpufreq-dt platform-data and an extra depends_on from Kconfig is dropped as well. - 3/3 is separated into two patches. Viresh Kumar (4): cpufreq: dt: Include types.h from cpufreq-dt.h cpufreq: dt: Add generic platform-device creation support ARM: exynos: exynos-cpufreq platform device isn't supported anymore cpufreq: exynos: Use generic platdev driver arch/arm/mach-exynos/exynos.c | 29 ------------------------- drivers/cpufreq/Kconfig | 10 +++++++++ drivers/cpufreq/Makefile | 1 + drivers/cpufreq/cpufreq-dt-platdev.c | 41 ++++++++++++++++++++++++++++++++++++ include/linux/cpufreq-dt.h | 2 ++ 5 files changed, 54 insertions(+), 29 deletions(-) create mode 100644 drivers/cpufreq/cpufreq-dt-platdev.c -- 2.7.1.410.g6faf27b

8 years, 8 months

[RESEND PATCH 0/3 v6] Add Mediatek MT8173 cpufreq driver

by Pi-Cheng Chen

MT8173 is a ARMv8 based SoC with 2 clusters. All CPUs in a single cluster share the same power and clock domain. This series tries to add cpufreq support for MT8173 SoC. The v6 of this series is resent with Acks added. changes in v6: - Move clock and regulator consumer properties document to the device tree bindings documents of MT8173 CPU DVFS clock driver - Add change log to describe what is implemented in the MT8173 cpufreq driver - Add missed rcu_read_unlock() in the error path - Move of_init_opp_table() call to make sure all required hardware resources are already there before it is called - Add comments to describe why both platform driver and deivce registration codes are put in the initcall function - Use the term "voltage tracking" instead of "voltage trace" according to an internal SoC document changes in v5: - Move resource allocation code from init() into probe() and remove some unused functions due to this change - Fix descriptions for device tree binding document - Address review comments for last version - Register CPU cooling device Changes in v4: - Add bindings for MT8173 cpufreq driver - Move OPP table back into device tree - Address comments for last version Changes in v3: - Implement MT8173 specific standalone cpufreq driver instead of using cpufreq-dt driver - Define OPP table in the driver source code until new OPP binding is ready Changes in v2: - Add intermediate frequency support in cpufreq-dt driver - Use voltage scaling code of cpufreq-dt for little cluster instead of implementaion in notifier of mtk-cpufreq driver - Code refinement for mtk-cpufreq driver Pi-Cheng Chen (3): dt-bindings: mediatek: Add MT8173 CPU DVFS clock bindings cpufreq: mediatek: Add MT8173 cpufreq driver arm64: dts: mt8173: Add mt8173 cpufreq driver support .../devicetree/bindings/clock/mt8173-cpu-dvfs.txt | 83 ++++ arch/arm64/boot/dts/mediatek/mt8173-evb.dts | 18 + arch/arm64/boot/dts/mediatek/mt8173.dtsi | 64 +++ drivers/cpufreq/Kconfig.arm | 7 + drivers/cpufreq/Makefile | 1 + drivers/cpufreq/mt8173-cpufreq.c | 524 +++++++++++++++++++++ 6 files changed, 697 insertions(+) create mode 100644 Documentation/devicetree/bindings/clock/mt8173-cpu-dvfs.txt create mode 100644 drivers/cpufreq/mt8173-cpufreq.c -- 1.9.1

8 years, 8 months

[PATCH V2 0/3] cpufreq: dt: Create platform device from generic code

by Viresh Kumar

Multiple platforms are using the generic cpufreq-dt driver now, and all of them are required to create a platform device with name "cpufreq-dt", in order to get the cpufreq-dt probed. Many of them do it from platform code, others have special drivers just to do that. It would be more sensible to do this at a generic place, where all such platform can mark their entries. The first patch fixes an issue that becomes visible only after the second patch is applied. The second one creates a new driver to create platform-device based on current platform and the last one converts exynos platform to use this common infrastructure. I will migrate rest of the platforms after this is accepted as the right way ahead. V1->V2: - Updated 3/3 to rebase on top of latest exynos changes - Reviewed-by tags added Viresh Kumar (3): cpufreq: dt: Include types.h from cpufreq-dt.h cpufreq: dt: Add generic platform-device creation support cpufreq: exynos: Use generic platdev driver arch/arm/mach-exynos/exynos.c | 29 ------------------ drivers/cpufreq/Kconfig | 11 +++++++ drivers/cpufreq/Makefile | 1 + drivers/cpufreq/cpufreq-dt-platdev.c | 57 ++++++++++++++++++++++++++++++++++++ include/linux/cpufreq-dt.h | 2 ++ 5 files changed, 71 insertions(+), 29 deletions(-) create mode 100644 drivers/cpufreq/cpufreq-dt-platdev.c -- 2.7.1.410.g6faf27b

8 years, 8 months

[GIT PULL] [lsk-v4.1-android] linaro-android v4.1 topic branch updates

by Amit Pundir

Hi Alex, Please consider following linaro-android pull request for "linux-linaro-lsk-v4.1-android" LSK branch. This pull request contain patches cherry-picked from android-4.1 branch of https://android.googlesource.com/kernel/common. aosp/android-4.1 test merge into lsk-v4.1-android branch had quiet a few complicated merge conflicts and it was easier to just cherry-pick the AOSP only changes for this pull request and skip the upstream or backported patches from AOSP which are already pulled by LTS. Just a heads up that x86/x86_64, allmodconfig + config_of=n, is still broken. Regards, Amit Pundir The following changes since commit 3e492f24e3c5a76d99dfd65a8a1fd2282101d313: Merge branch 'linux-linaro-lsk-v4.1' into linux-linaro-lsk-v4.1-android (2016-03-22 14:51:35 +0800) are available in the git repository at: git://android.git.linaro.org/kernel/linaro-android.git lsk-v4.1-android for you to fetch changes up to efb9cd23d1de2f3a51157e92a30e79de5dcd0216: ANDROID: dm: Mounting root as linear device when verity disabled (2016-03-28 15:51:27 +0530) ---------------------------------------------------------------- Badhri Jagan Sridharan (6): ANDROID: dm: Add android verity target ANDROID: dm-android-verity: Rebase on top of 4.1 ANDROID: dm: Rebase on top of 4.1 ANDROID: recommended.cfg: Setup verity root for A/B ANDROID: usb: gadget: Add support for MTP OS desc ANDROID: dm: Mounting root as linear device when verity disabled Brian Norris (1): FROMLIST: pstore-ram: fix NULL reference when used with pdata Daniel Campello (3): Included sdcardfs source code for kernel 3.0 Port of sdcardfs to 4.1 Changed type-casting in packagelist management Daniel Rosenberg (5): sdcardfs: Bring up to date with Android M permissions: vfs: add d_canonical_path for stacked filesystem support sdcardfs: Add support for d_canonical_path inotify: Fix erroneous update of bit count sdcardfs: remove effectless config option Dmitry Shmidt (2): Revert "mmc: core: Hold a wake lock accross delayed work + mmc rescan" Revert "mmc: Extend wakelock if bus is dead" Eliad Peller (1): UPSTREAM: wl18xx: fallback to default conf in case of invalid conf file Eric Dumazet (2): ipv6: inet6_sk() should use sk_fullsock() net: diag: support v4mapped sockets in inet_diag_find_one_icsk() Guenter Roeck (1): fs: sdcardfs: Declare LOOKUP_CASE_INSENSITIVE unconditionally Lorenzo Colitti (5): net: diag: split inet_diag_dump_one_icsk into two net: diag: Add the ability to destroy a socket. net: diag: Support SOCK_DESTROY for inet sockets. net: diag: Support destroying TCP sockets. net: tcp: deal with listen sockets properly in tcp_abort. Mark Kuo (4): CHROMIUM: usb: gadget: f_mtp: Add SuperSpeed support CHROMIUM: usb: gadget: f_mtp: fix usb_ss_ep_comp_descriptor CHROMIUM: usb: gadget: audio_source: add .free_func callback CHROMIUM: usb: gadget: f_accessory: add .raw_request callback Mark Salyzyn (1): android: base-cfg: Add CONFIG_IP_MULTICAST Matthew Moeller (1): ANDROID: usb: u_ether: Add missing rx_work init Rasmus Villemoes (1): UPSTREAM: lib/string.c: introduce strreplace() Sami Tolvanen (7): UPSTREAM: dm verity: clean up duplicate hashing code UPSTREAM: dm verity: separate function for parsing opt args UPSTREAM: dm verity: move dm-verity.c to dm-verity-target.c BACKPORT: dm verity: factor out structures and functions useful to separate object UPSTREAM: dm verity: factor out verity_for_bv_block() BACKPORT: dm verity: add support for forward error correction UPSTREAM: dm verity: add ignore_zero_blocks feature Thierry Strudel (1): trace: cpufreq: fix typo in min/max cpufreq Tim Murray (2): ANDROID: mmc: move to a SCHED_FIFO thread ANDROID: dm-crypt: run in a WQ_HIGHPRI workqueue Will Deacon (1): UPSTREAM: arm64: cpu hotplug: ensure we mask out CPU_TASKS_FROZEN in notifiers Will Drewry (1): CHROMIUM: dm: boot time specification of dm= dcashman (2): FROMLIST: drivers: char: random: add get_random_long() FROMLIST: mm: ASLR: use get_random_long() Documentation/device-mapper/boot.txt | 42 +++++ Documentation/device-mapper/verity.txt | 40 ++++- Documentation/kernel-parameters.txt | 6 + android/configs/android-base.cfg | 1 + android/configs/android-recommended.cfg | 7 + arch/arm/mm/mmap.c | 2 +- arch/arm64/kernel/debug-monitors.c | 2 +- arch/arm64/kernel/hw_breakpoint.c | 2 +- arch/arm64/mm/mmap.c | 4 +- arch/mips/mm/mmap.c | 4 +- arch/powerpc/kernel/process.c | 4 +- arch/powerpc/mm/mmap.c | 4 +- arch/sparc/kernel/sys_sparc_64.c | 2 +- arch/x86/mm/mmap.c | 6 +- drivers/char/random.c | 22 +++ drivers/md/Kconfig | 28 ++++ drivers/md/Makefile | 9 ++ drivers/md/dm-android-verity.c | 858 ++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++ drivers/md/dm-android-verity.h | 95 +++++++++++ drivers/md/dm-crypt.c | 14 +- drivers/md/dm-ioctl.c | 39 +++++ drivers/md/dm-linear.c | 2 +- drivers/md/dm-table.c | 1 + drivers/md/dm-verity-fec.c | 818 +++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++ drivers/md/dm-verity-fec.h | 152 ++++++++++++++++++ drivers/md/{dm-verity.c => dm-verity-target.c} | 616 ++++++++++++++++++++++++++++++++++++++++------------------------------ drivers/md/dm-verity.h | 144 +++++++++++++++++ drivers/mmc/card/queue.c | 6 + drivers/mmc/core/core.c | 23 +-- drivers/net/wireless/ti/wl18xx/main.c | 45 +++--- drivers/usb/gadget/function/f_accessory.c | 7 + drivers/usb/gadget/function/f_audio_source.c | 6 + drivers/usb/gadget/function/f_mtp.c | 103 +++++++++++- drivers/usb/gadget/function/u_ether.c | 1 + fs/Kconfig | 1 + fs/Makefile | 5 +- fs/binfmt_elf.c | 2 +- fs/notify/inotify/inotify_user.c | 15 +- fs/pstore/ram.c | 3 +- fs/sdcardfs/Kconfig | 13 ++ fs/sdcardfs/Makefile | 7 + fs/sdcardfs/dentry.c | 182 +++++++++++++++++++++ fs/sdcardfs/derived_perm.c | 265 ++++++++++++++++++++++++++++++ fs/sdcardfs/file.c | 356 +++++++++++++++++++++++++++++++++++++++++ fs/sdcardfs/inode.c | 804 +++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++ fs/sdcardfs/lookup.c | 384 ++++++++++++++++++++++++++++++++++++++++++++ fs/sdcardfs/main.c | 404 ++++++++++++++++++++++++++++++++++++++++++++++ fs/sdcardfs/mmap.c | 81 ++++++++++ fs/sdcardfs/multiuser.h | 37 +++++ fs/sdcardfs/packagelist.c | 440 ++++++++++++++++++++++++++++++++++++++++++++++++++ fs/sdcardfs/sdcardfs.h | 530 ++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++ fs/sdcardfs/super.c | 222 ++++++++++++++++++++++++++ include/linux/dcache.h | 1 + include/linux/device-mapper.h | 6 + include/linux/inet_diag.h | 9 ++ include/linux/ipv6.h | 4 +- include/linux/namei.h | 2 + include/linux/random.h | 1 + include/linux/sock_diag.h | 2 + include/linux/string.h | 1 + include/net/sock.h | 1 + include/net/tcp.h | 2 + include/trace/events/power.h | 2 +- include/uapi/linux/magic.h | 2 + include/uapi/linux/sock_diag.h | 1 + init/Makefile | 1 + init/do_mounts.c | 1 + init/do_mounts.h | 10 ++ init/do_mounts_dm.c | 425 +++++++++++++++++++++++++++++++++++++++++++++++++ lib/string.c | 17 ++ net/core/sock_diag.c | 23 ++- net/ipv4/Kconfig | 13 ++ net/ipv4/inet_diag.c | 86 ++++++---- net/ipv4/tcp.c | 37 +++++ net/ipv4/tcp_diag.c | 19 +++ net/ipv4/tcp_ipv4.c | 1 + net/ipv6/tcp_ipv6.c | 1 + 77 files changed, 7168 insertions(+), 366 deletions(-) create mode 100644 Documentation/device-mapper/boot.txt create mode 100644 drivers/md/dm-android-verity.c create mode 100644 drivers/md/dm-android-verity.h create mode 100644 drivers/md/dm-verity-fec.c create mode 100644 drivers/md/dm-verity-fec.h rename drivers/md/{dm-verity.c => dm-verity-target.c} (68%) create mode 100644 drivers/md/dm-verity.h create mode 100644 fs/sdcardfs/Kconfig create mode 100644 fs/sdcardfs/Makefile create mode 100644 fs/sdcardfs/dentry.c create mode 100644 fs/sdcardfs/derived_perm.c create mode 100644 fs/sdcardfs/file.c create mode 100644 fs/sdcardfs/inode.c create mode 100644 fs/sdcardfs/lookup.c create mode 100644 fs/sdcardfs/main.c create mode 100644 fs/sdcardfs/mmap.c create mode 100644 fs/sdcardfs/multiuser.h create mode 100644 fs/sdcardfs/packagelist.c create mode 100644 fs/sdcardfs/sdcardfs.h create mode 100644 fs/sdcardfs/super.c create mode 100644 init/do_mounts_dm.c

8 years, 8 months

[PATCH v3] ARM64: ACPI: Update documentation for latest specification version

by Al Stone

The ACPI 6.1 specification was recently released at the end of January 2016, but the arm64 kernel documentation for the use of ACPI was written for the 5.1 version of the spec. There were significant additions to the spec that had not yet been mentioned -- for example, the 6.0 mechanisms added to make it easier to define processors and low power idle states, as well as the 6.1 addition allowing regular interrupts (not just from GPIO) be used to signal ACPI general purpose events. This patch reflects going back through and examining the specs in detail and updating content appropriately. Whilst there, a few odds and ends of typos were caught as well. This brings the documentation up to date with ACPI 6.1 for arm64. Changes for v3: -- Clarify use of _LPI/_RDI (Vikas Sajjan) -- Whitespace cleanup as pointed out by checkpatch Changes for v2: -- Clean up white space (Harb Abdulhahmid) -- Clarification on _CCA usage (Harb Abdulhamid) -- IORT moved to required from recommended (Hanjun Guo) -- Clarify IORT description (Hanjun Guo) Signed-off-by: Al Stone <al.stone(a)linaro.org> Cc: Catalin Marinas <catalin.marinas(a)arm.com> Cc: Will Deacon <will.deacon(a)arm.com> Cc: Jonathan Corbet <corbet(a)lwn.net> --- Documentation/arm64/acpi_object_usage.txt | 446 ++++++++++++++++++++++-------- Documentation/arm64/arm-acpi.txt | 28 +- 2 files changed, 357 insertions(+), 117 deletions(-) diff --git a/Documentation/arm64/acpi_object_usage.txt b/Documentation/arm64/acpi_object_usage.txt index a6e1a18..756d2f8 100644 --- a/Documentation/arm64/acpi_object_usage.txt +++ b/Documentation/arm64/acpi_object_usage.txt @@ -11,15 +11,16 @@ outside of the UEFI Forum (see Section 5.2.6 of the specification). For ACPI on arm64, tables also fall into the following categories: - -- Required: DSDT, FADT, GTDT, MADT, MCFG, RSDP, SPCR, XSDT + -- Required: DSDT, FADT, GTDT, IORT, MADT, MCFG, RSDP, SPCR, XSDT - -- Recommended: BERT, EINJ, ERST, HEST, SSDT + -- Recommended: BERT, EINJ, ERST, HEST, PCCT, SSDT - -- Optional: BGRT, CPEP, CSRT, DRTM, ECDT, FACS, FPDT, MCHI, MPST, - MSCT, RASF, SBST, SLIT, SPMI, SRAT, TCPA, TPM2, UEFI + -- Optional: BGRT, CPEP, CSRT, DBG2, DRTM, ECDT, FACS, FPDT, MCHI, + MPST, MSCT, NFIT, PMTT, RASF, SBST, SLIT, SPMI, SRAT, STAO, TCPA, + TPM2, UEFI, XENV - -- Not supported: BOOT, DBG2, DBGP, DMAR, ETDT, HPET, IBFT, IVRS, - LPIT, MSDM, RSDT, SLIC, WAET, WDAT, WDRT, WPBT + -- Not supported: BOOT, DBGP, DMAR, ETDT, HPET, IBFT, IVRS, LPIT, + MSDM, OEMx, PSDT, RSDT, SLIC, WAET, WDAT, WDRT, WPBT Table Usage for ARMv8 Linux @@ -50,7 +51,8 @@ CSRT Signature Reserved (signature == "CSRT") DBG2 Signature Reserved (signature == "DBG2") == DeBuG port table 2 == - Microsoft only table, will not be supported. + License has changed and should be usable. Optional if used instead + of earlycon=<device> on the command line. DBGP Signature Reserved (signature == "DBGP") == DeBuG Port table == @@ -133,10 +135,11 @@ GTDT Section 5.2.24 (signature == "GTDT") HEST Section 18.3.2 (signature == "HEST") == Hardware Error Source Table == - Until further error source types are defined, use only types 6 (AER - Root Port), 7 (AER Endpoint), 8 (AER Bridge), or 9 (Generic Hardware - Error Source). Firmware first error handling is possible if and only - if Trusted Firmware is being used on arm64. + ARM-specific error sources have been defined; please use those or the + PCI types such as type 6 (AER Root Port), 7 (AER Endpoint), or 8 (AER + Bridge), or use type 9 (Generic Hardware Error Source). Firmware first + error handling is possible if and only if Trusted Firmware is being + used on arm64. Must be supplied if RAS support is provided by the platform. It is recommended this table be supplied. @@ -149,20 +152,27 @@ IBFT Signature Reserved (signature == "IBFT") == iSCSI Boot Firmware Table == Microsoft defined table, support TBD. +IORT Signature Reserved (signature == "IORT") + == Input Output Remapping Table == + arm64 only table, required in order to describe IO topology, SMMUs, + and GIC ITSs, and how those various components are connected together, + such as identifying which components are behind which SMMUs/ITSs. + IVRS Signature Reserved (signature == "IVRS") == I/O Virtualization Reporting Structure == x86_64 (AMD) only table, will not be supported. LPIT Signature Reserved (signature == "LPIT") == Low Power Idle Table == - x86 only table as of ACPI 5.1; future versions have been adapted for - use with ARM and will be recommended in order to support ACPI power - management. + x86 only table as of ACPI 5.1; starting with ACPI 6.0, processor + descriptions and power states on ARM platforms should use the DSDT + and define processor container devices (_HID ACPI0010, Section 8.4, + and more specifically 8.4.3 and and 8.4.4). MADT Section 5.2.12 (signature == "APIC") == Multiple APIC Description Table == Required for arm64. Only the GIC interrupt controller structures - should be used (types 0xA - 0xE). + should be used (types 0xA - 0xF). MCFG Signature Reserved (signature == "MCFG") == Memory-mapped ConFiGuration space == @@ -176,14 +186,38 @@ MPST Section 5.2.21 (signature == "MPST") == Memory Power State Table == Optional, not currently supported. +MSCT Section 5.2.19 (signature == "MSCT") + == Maximum System Characteristic Table == + Optional, not currently supported. + MSDM Signature Reserved (signature == "MSDM") == Microsoft Data Management table == Microsoft only table, will not be supported. -MSCT Section 5.2.19 (signature == "MSCT") - == Maximum System Characteristic Table == +NFIT Section 5.2.25 (signature == "NFIT") + == NVDIMM Firmware Interface Table == Optional, not currently supported. +OEMx Signature of "OEMx" only + == OEM Specific Tables == + All tables starting with a signature of "OEM" are reserved for OEM + use. Since these are not meant to be of general use but are limited + to very specific end users, they are not recommended for use and are + not supported by the kernel for arm64. + +PCCT Section 14.1 (signature == "PCCT) + == Platform Communications Channel Table == + Recommend for use on arm64, and required when using CPPC to control + power on the platform. + +PMTT Section 5.2.21.12 (signature == "PMTT") + == Platform Memory Topology Table == + Optional, but useful, but not currently supported. + +PSDT Section 5.2.11.3 (signature == "PSDT") + == Persistent System Description Table == + Obsolete table, will not be supported. + RASF Section 5.2.20 (signature == "RASF") == RAS Feature table == Optional, not currently supported. @@ -195,7 +229,7 @@ RSDP Section 5.2.5 (signature == "RSD PTR") RSDT Section 5.2.7 (signature == "RSDT") == Root System Description Table == Since this table can only provide 32-bit addresses, it is deprecated - on arm64, and will not be used. + on arm64, and will not be used. If provided, it will be ignored. SBST Section 5.2.14 (signature == "SBST") == Smart Battery Subsystem Table == @@ -207,7 +241,7 @@ SLIC Signature Reserved (signature == "SLIC") SLIT Section 5.2.17 (signature == "SLIT") == System Locality distance Information Table == - Optional in general, but required for NUMA systems. + Optional in general, but required for arm64 NUMA systems. SPCR Signature Reserved (signature == "SPCR") == Serial Port Console Redirection table == @@ -220,7 +254,7 @@ SPMI Signature Reserved (signature == "SPMI") SRAT Section 5.2.16 (signature == "SRAT") == System Resource Affinity Table == Optional, but if used, only the GICC Affinity structures are read. - To support NUMA, this table is required. + To support arm64 NUMA, this table is required. SSDT Section 5.2.11.2 (signature == "SSDT") == Secondary System Description Table == @@ -235,6 +269,11 @@ SSDT Section 5.2.11.2 (signature == "SSDT") These tables are optional, however. ACPI tables should contain only one DSDT but can contain many SSDTs. +STAO Signature Reserved (signature == "STAO") + == _STA Override table == + Optional, but only necessary in virtualized environments in order to + hide devices from guest OSs. + TCPA Signature Reserved (signature == "TCPA") == Trusted Computing Platform Alliance table == Optional, not currently supported, and may need changes to fully @@ -266,6 +305,10 @@ WPBT Signature Reserved (signature == "WPBT") == Windows Platform Binary Table == Microsoft only table, will not be supported. +XENV Signature Reserved (signature == "XENV") + == Xen project table == + Optional, used only by Xen at present. + XSDT Section 5.2.8 (signature == "XSDT") == eXtended System Description Table == Required for arm64. @@ -273,31 +316,57 @@ XSDT Section 5.2.8 (signature == "XSDT") ACPI Objects ------------ -The expectations on individual ACPI objects are discussed in the list that -follows: +The expectations on individual ACPI objects that are likely to be used are +shown in the list that follows: Name Section Usage for ARMv8 Linux ---- ------------ ------------------------------------------------- +_ACx 11.4.1 Use as needed. + _ADR 6.1.1 Use as needed. +_ALx 11.4.2 Use as needed. + +_ART 11.4.3 Use as needed. + _BBN 6.5.5 Use as needed; PCI-specific. -_BDN 6.5.3 Optional; not likely to be used on arm64. +_CCA 6.2.17 This method must be defined for all bus masters + on arm64 -- there are no assumptions made about + whether such devices are cache coherent or not. + The _CCA value is inherited by all descendants of + these devices so it does not need to be repeated. + Without _CCA on arm64, the kernel does not know what + to do about setting up DMA for the device. -_CCA 6.2.17 This method should be defined for all bus masters - on arm64. While cache coherency is assumed, making - it explicit ensures the kernel will set up DMA as - it should. + NB: this method provides default cache coherency + attributes; the presence of an SMMU can be used to + modify that, however. For example, a master could + default to non-coherent, but be made coherent with + the appropriate SMMU configuration (see Table 17 of + the IORT specification, ARM Document DEN 0049B). -_CDM 6.2.1 Optional, to be used only for processor devices. +_CDM 6.2.1 Use as needed, to be used only for processor devices. -_CID 6.1.2 Use as needed. +_CID 6.1.2 Use as needed, see also _HID. -_CLS 6.1.3 Use as needed. +_CLS 6.1.3 Use as needed, see also _HID. + +_CPC 8.4.7.1 Use as needed; power management specific. CPPC is + recommended on arm64. + +_CR3 11.4.5 Use as needed. _CRS 6.2.2 Required on arm64. -_DCK 6.5.2 Optional; not likely to be used on arm64. +_CRT 11.4.4 Use as needed. + +_CSD 8.4.2.2 Use as needed, used only in conjunction with _CST. + +_CST 8.4.2.1 Low power idle states (8.4.4) are recommended instead + of C-states. + +_CWS 9.18.6 Use as needed. _DDN 6.1.4 This field can be used for a device name. However, it is meant for DOS device names (e.g., COM1), so be @@ -305,11 +374,11 @@ _DDN 6.1.4 This field can be used for a device name. However, _DEP 6.5.8 Use as needed. -_DIS 6.2.3 Optional, for power management use. +_DIS 6.2.3 Use as needed, for power management use. -_DLM 5.7.5 Optional. +_DLM 5.7.5 Use as needed. -_DMA 6.2.4 Optional. +_DMA 6.2.4 Use as needed. _DSD 6.2.5 To be used with caution. If this object is used, try to use it within the constraints already defined by the @@ -325,19 +394,29 @@ _DSD 6.2.5 To be used with caution. If this object is used, try with the UEFI Forum; this may cause some iteration as more than one OS will be registering entries. -_DSM Do not use this method. It is not standardized, the +_DSM 9.1.1 Do not use this method. It is not standardized, the return values are not well documented, and it is currently a frequent source of error. -_DSW 7.2.1 Use as needed; power management specific. +_DSW 7.3.1 Use as needed; power management specific. -_EDL 6.3.1 Optional. +_DTI 11.4.6 Use as needed. -_EJD 6.3.2 Optional. +_EDL 6.3.1 Use as needed. -_EJx 6.3.3 Optional. +_EJD 6.3.2 Use as needed. -_FIX 6.2.7 x86 specific, not used on arm64. +_EJx 6.3.3 Use as needed. + +_FIF 11.3.1.1 Use as needed. + +_FPS 11.3.1.2 Use as needed. + +_FSL 11.3.1.3 Use as needed. + +_FST 11.3.1.4 Use as needed. + +_GCP 9.18.2 Use as needed. \_GL 5.7.1 This object is not to be used in hardware reduced mode, and therefore should not be used on arm64. @@ -349,35 +428,57 @@ _GLK 6.5.7 This object requires a global lock be defined; there \_GPE 5.3.1 This namespace is for x86 use only. Do not use it on arm64. -_GSB 6.2.7 Optional. +_GRT 9.18.3 Use as needed. + +_GSB 6.2.7 Use as needed. + +_GTF 9.9.1.1 Use as needed. + +_GWS 9.18.5 Use as needed. _HID 6.1.5 Use as needed. This is the primary object to use in device probing, though _CID and _CLS may also be used. -_HPP 6.2.8 Optional, PCI specific. +_HOT 11.4.7 Use as needed. + +_HPP 6.2.8 Use as needed, PCI specific. -_HPX 6.2.9 Optional, PCI specific. +_HPX 6.2.9 Use as needed, PCI specific. -_HRV 6.1.6 Optional, use as needed to clarify device behavior; in - some cases, this may be easier to use than _DSD. +_HRV 6.1.6 Use as needed, use as needed to clarify device + behavior; in some cases, this may be easier to use + than _DSD. _INI 6.5.1 Not required, but can be useful in setting up devices when UEFI leaves them in a state that may not be what the driver expects before it starts probing. -_IRC 7.2.15 Use as needed; power management specific. +_IRC 7.3.15 Use as needed; power management specific. + +_LCK 6.3.4 Use as needed. + +_LPI 8.4.4.3 Use as needed, but recommended for use with processor + definitions (_HID ACPI0010) on arm64. See also _RDI. -_LCK 6.3.4 Optional. +_MAT 6.2.10 Use as needed; see also the MADT. -_MAT 6.2.10 Optional; see also the MADT. +_MBM 9.13.2.1 Use as needed. -_MLS 6.1.7 Optional, but highly recommended for use in +_MLS 6.1.7 Use as needed, but highly recommended for use in internationalization. -_OFF 7.1.2 It is recommended to define this method for any device +_MSG 9.2.2 Use as needed. + +_MSM 9.13.2.2 Use as needed. + +_MTL 11.4.8 Use as needed. + +_NTT 11.4.9 Use as needed. + +_OFF 7.2.2 It is recommended to define this method for any device that can be turned on or off. -_ON 7.1.3 It is recommended to define this method for any device +_ON 7.2.3 It is recommended to define this method for any device that can be turned on or off. \_OS 5.7.3 This method will return "Linux" by default (this is @@ -405,115 +506,220 @@ _OSC 6.2.11 This method can be a global method in ACPI (i.e., being used or what functionality is provided. The _OSC method is to be used instead. -_OST 6.3.5 Optional. +_OST 6.3.5 Use as needed. + +_PCT 8.4.6.1 Use as needed; power management specific. _PDC 8.4.1 Deprecated, do not use on arm64. +_PDL 8.4.6.2 Use as needed; power management specific. + \_PIC 5.8.1 The method should not be used. On arm64, the only interrupt model available is GIC. -_PLD 6.1.8 Optional. +_PLD 6.1.8 Use as needed. + +_PPC 8.4.6.3 Use as needed; power management specific. + +_PPE 8.4.8 Use as needed. \_PR 5.3.1 This namespace is for x86 use only on legacy systems. Do not use it on arm64. -_PRS 6.2.12 Optional. +_PRE 7.3.12 Use as needed; power management specific. + +_PRR 7.3.26 Use as needed; power management specific. + +_PRS 6.2.12 Use as needed. _PRT 6.2.13 Required as part of the definition of all PCI root devices. -_PRW 7.2.13 Use as needed; power management specific. +_PRW 7.3.13 Use as needed; power management specific. -_PRx 7.2.8-11 Use as needed; power management specific. If _PR0 is +_PRx 7.3.8-11 Use as needed; power management specific. If _PR0 is defined, _PR3 must also be defined. -_PSC 7.2.6 Use as needed; power management specific. +_PSC 7.3.6 Use as needed; power management specific. + +_PSD 8.4.6.5 Use as needed; power management specific. -_PSE 7.2.7 Use as needed; power management specific. +_PSE 7.3.7 Use as needed; power management specific. -_PSW 7.2.14 Use as needed; power management specific. +_PSL 11.4.10 Use as needed. -_PSx 7.2.2-5 Use as needed; power management specific. If _PS0 is +_PSS 8.4.6.2 Use as needed; power management specific. + +_PSV 11.4.11 Use as needed. + +_PSW 7.3.14 Use as needed; power management specific. + +_PSx 7.3.2-5 Use as needed; power management specific. If _PS0 is defined, _PS3 must also be defined. If clocks or regulators need adjusting to be consistent with power usage, change them in these methods. -\_PTS 7.3.1 Use as needed; power management specific. +_PTC 8.4.5.1 Use as needed; power management specific. + +\_PTS 7.4.1 Use as needed; power management specific. + +_PUR 8.5.1.1 Use as needed. + +_PXM 6.2.14 Use as needed. -_PXM 6.2.14 Optional. +_RDI 8.4.4.4 Use as needed, but recommended for use with processor + definitions (_HID ACPI0010) on arm64. This should only + be used in conjunction with _LPI. _REG 6.5.4 Use as needed. \_REV 5.7.4 Always returns the latest version of ACPI supported. -_RMV 6.3.6 Optional. +_RMV 6.3.6 Use as needed. + +_RST 7.3.25 Use as needed; power management specific. + +_RTV 11.4.12 Use as needed. \_SB 5.3.1 Required on arm64; all devices must be defined in this namespace. +_SCP 11.4.13 Use as needed. + +_SDD 9.9.3.3.1 Use as needed. + _SEG 6.5.6 Use as needed; PCI-specific. -\_SI 5.3.1, Optional. - 9.1 +\_SI 5.3.1, Use as needed. + 9.2 + +_SLI 6.2.15 Use as needed; recommended when SLIT table is in use. -_SLI 6.2.15 Optional; recommended when SLIT table is in use. +_SRT 9.18.4 Use as needed. _STA 6.3.7, It is recommended to define this method for any device - 7.1.4 that can be turned on or off. + 7.2.4 that can be turned on or off. See also the STAO table + that provides overrides to hide devices in virtualized + environments. -_SRS 6.2.16 Optional; see also _PRS. +_SRS 6.2.16 Use as needed; see also _PRS. + +_SST 9.2.1 Use as needed. _STR 6.1.10 Recommended for conveying device names to end users; this is preferred over using _DDN. +_SST 9.2.1 Use as needed. + +_STP 9.18.7 Use as needed. + +_STV 9.18.8 Use as needed. + _SUB 6.1.9 Use as needed; _HID or _CID are preferred. -_SUN 6.1.11 Optional. +_SUN 6.1.11 Use as needed, but recommended. -\_Sx 7.3.2 Use as needed; power management specific. +\_Sx 7.4.2 Use as needed; power management specific. -_SxD 7.2.16-19 Use as needed; power management specific. +_SxD 7.3.16-19 Use as needed; power management specific. -_SxW 7.2.20-24 Use as needed; power management specific. +_SxW 7.3.20-24 Use as needed; power management specific. -_SWS 7.3.3 Use as needed; power management specific; this may +_SWS 7.4.3 Use as needed; power management specific; this may require specification changes for use on arm64. -\_TTS 7.3.4 Use as needed; power management specific. +_TC1 11.4.14 Use as needed. + +_TC2 11.4.15 Use as needed. + +_TDL 8.4.5.5 Use as needed; power management specific. + +_TFP 11.4.16 Use as needed. + +_TIP 9.18.9 Use as needed. + +_TIV 9.18.10 Use as needed. + +_TMP 11.4.17 Use as needed. + +_TPC 8.4.5.3 Use as needed; power management specific. -\_TZ 5.3.1 Optional. +_TPT 11.4.18 Use as needed. + +_TRT 11.4.19 Use as needed. + +_TSD 8.4.5.4 Use as needed; power management specific. + +_TSN 11.4.20 Use as needed. + +_TSP 11.4.21 Use as needed. + +_TSS 8.4.5.2 Use as needed; power management specific. + +_TST 11.4.22 Use as needed. + +\_TTS 7.4.4 Use as needed; power management specific. + +\_TZ 5.3.1 Use as needed. + +_TZD 11.4.23 Use as needed. + +_TZM 11.4.24 Use as needed. + +_TZP 11.4.25 Use as needed. _UID 6.1.12 Recommended for distinguishing devices of the same class; define it if at all possible. -\_WAK 7.3.5 Use as needed; power management specific. +_UPC 9.14 Use as needed. + +\_WAK 7.4.5 Use as needed; power management specific. + + ACPI Event Model ---------------- Do not use GPE block devices; these are not supported in the hardware reduced profile used by arm64. Since there are no GPE blocks defined for use on ARM -platforms, GPIO-signaled interrupts should be used for creating system events. +platforms, ACPI events must be signaled differently. + +There are two options: GPIO-signaled interrupts (Section 5.6.5), and +interrupt-signaled events (Section 5.6.9). Interrupt-signaled events are a +new feature in the ACPI 6.1 specification. Either -- or both -- can be used +on a given platform, and which to use may be dependent of limitations in any +given SoC. If possible, interrupt-signaled events are recommended. ACPI Processor Control ---------------------- -Section 8 of the ACPI specification is currently undergoing change that -should be completed in the 6.0 version of the specification. Processor -performance control will be handled differently for arm64 at that point -in time. Processor aggregator devices (section 8.5) will not be used, -for example, but another similar mechanism instead. - -While UEFI constrains what we can say until the release of 6.0, it is -recommended that CPPC (8.4.5) be used as the primary model. This will -still be useful into the future. C-states and P-states will still be -provided, but most of the current design work appears to favor CPPC. +Section 8 of the ACPI specification changed significantly in version 6.0. +Processors should now be defined as Device objects with _HID ACPI0007; do +not use the deprecated Processor statement in ASL. All multiprocessor systems +should also define a hierarchy of processors, done with Processor Container +Devices (see Section 8.4.3.1, _HID ACPI0010); do not use processor aggregator +devices (Section 8.5) to describe processor topology. Section 8.4 of the +specification describes the semantics of these object definitions and how +they interrelate. + +Most importantly, the processor hierarchy defined also defines the low power +idle states that are available to the platform, along with the rules for +determining which processors can be turned on or off and the circumstances +that control that. Without this information, the processors will run in +whatever power state they were left in by UEFI. + +Note too, that the processor Device objects defined and the entries in the +MADT for GICs are expected to be in sychronization. The _UID of the Device +object must correspond to processor IDs used in the MADT. + +It is recommended that CPPC (8.4.5) be used as the primary model for processor +performance control on arm64. C-states and P-states may become available at +some point in the future, but most current design work appears to favor CPPC. Further, it is essential that the ARMv8 SoC provide a fully functional implementation of PSCI; this will be the only mechanism supported by ACPI -to control CPU power state (including secondary CPU booting). - -More details will be provided on the release of the ACPI 6.0 specification. +to control CPU power state. Booting of secondary CPUs may be possible using +parking protocol, but only PSCI is to be used for ARM servers. ACPI System Address Map Interfaces @@ -535,21 +741,25 @@ used to indicate fatal errors that cannot be corrected, and require immediate attention. Since there is no direct equivalent of the x86 SCI or NMI, arm64 handles -these slightly differently. The SCI is handled as a normal GPIO-signaled -interrupt; given that these are corrected (or correctable) errors being -reported, this is sufficient. The NMI is emulated as the highest priority -GPIO-signaled interrupt possible. This implies some caution must be used -since there could be interrupts at higher privilege levels or even interrupts -at the same priority as the emulated NMI. In Linux, this should not be the -case but one should be aware it could happen. +these slightly differently. The SCI is handled as a high priority interrupt; +given that these are corrected (or correctable) errors being reported, this +is sufficient. The NMI is emulated as the highest priority interrupt +possible. This implies some caution must be used since there could be +interrupts at higher privilege levels or even interrupts at the same priority +as the emulated NMI. In Linux, this should not be the case but one should +be aware it could happen. ACPI Objects Not Supported on ARM64 ----------------------------------- While this may change in the future, there are several classes of objects that can be defined, but are not currently of general interest to ARM servers. +Some of these objects have x86 equivalents, and may actually make sense in ARM +servers. However, there is either no hardware available at present, or there +may not even be a non-ARM implementation yet. Hence, they are not currently +supported. -These are not supported: +The following classes of objects are not supported: -- Section 9.2: ambient light sensor devices @@ -571,16 +781,6 @@ These are not supported: -- Section 9.18: time and alarm devices (see 9.15) - -ACPI Objects Not Yet Implemented --------------------------------- -While these objects have x86 equivalents, and they do make some sense in ARM -servers, there is either no hardware available at present, or in some cases -there may not yet be a non-ARM implementation. Hence, they are currently not -implemented though that may change in the future. - -Not yet implemented are: - -- Section 10: power source and power meter devices -- Section 11: thermal management @@ -589,5 +789,31 @@ Not yet implemented are: -- Section 13: SMBus interfaces - -- Section 17: NUMA support (prototypes have been submitted for - review) + +This also mean that there is no support for the following objects: + +Name Section Name Section +---- ------------ ---- ------------ +_ALC 9.3.4 _FDM 9.10.3 +_ALI 9.3.2 _FIX 6.2.7 +_ALP 9.3.6 _GAI 10.4.5 +_ALR 9.3.5 _GHL 10.4.7 +_ALT 9.3.3 _GTM 9.9.2.1.1 +_BCT 10.2.2.10 _LID 9.5.1 +_BDN 6.5.3 _PAI 10.4.4 +_BIF 10.2.2.1 _PCL 10.3.2 +_BIX 10.2.2.1 _PIF 10.3.3 +_BLT 9.2.3 _PMC 10.4.1 +_BMA 10.2.2.4 _PMD 10.4.8 +_BMC 10.2.2.12 _PMM 10.4.3 +_BMD 10.2.2.11 _PRL 10.3.4 +_BMS 10.2.2.5 _PSR 10.3.1 +_BST 10.2.2.6 _PTP 10.4.2 +_BTH 10.2.2.7 _SBS 10.1.3 +_BTM 10.2.2.9 _SHL 10.4.6 +_BTP 10.2.2.8 _STM 9.9.2.1.1 +_DCK 6.5.2 _UPD 9.16.1 +_EC 12.12 _UPP 9.16.2 +_FDE 9.10.1 _WPC 10.5.2 +_FDI 9.10.2 _WPP 10.5.3 + diff --git a/Documentation/arm64/arm-acpi.txt b/Documentation/arm64/arm-acpi.txt index 570a4f8..12381c1 100644 --- a/Documentation/arm64/arm-acpi.txt +++ b/Documentation/arm64/arm-acpi.txt @@ -57,11 +57,11 @@ The short form of the rationale for ACPI on ARM is: -- The new ACPI governance process works well and Linux is now at the same table as hardware vendors and other OS vendors. In fact, there is no - longer any reason to feel that ACPI is only belongs to Windows or that + longer any reason to feel that ACPI only belongs to Windows or that Linux is in any way secondary to Microsoft in this arena. The move of ACPI governance into the UEFI forum has significantly opened up the specification development process, and currently, a large portion of the - changes being made to ACPI is being driven by Linux. + changes being made to ACPI are being driven by Linux. Key to the use of ACPI is the support model. For servers in general, the responsibility for hardware behaviour cannot solely be the domain of the @@ -159,7 +159,7 @@ Further, the ACPI core will only use the 64-bit address fields in the FADT (Fixed ACPI Description Table). Any 32-bit address fields in the FADT will be ignored on arm64. -Hardware reduced mode (see Section 4.1 of the ACPI 5.1 specification) will +Hardware reduced mode (see Section 4.1 of the ACPI 6.1 specification) will be enforced by the ACPI core on arm64. Doing so allows the ACPI core to run less complex code since it no longer has to provide support for legacy hardware from other architectures. Any fields that are not to be used for @@ -167,7 +167,7 @@ hardware reduced mode must be set to zero. For the ACPI core to operate properly, and in turn provide the information the kernel needs to configure devices, it expects to find the following -tables (all section numbers refer to the ACPI 5.1 specfication): +tables (all section numbers refer to the ACPI 6.1 specfication): -- RSDP (Root System Description Pointer), section 5.2.5 @@ -185,9 +185,22 @@ tables (all section numbers refer to the ACPI 5.1 specfication): -- If PCI is supported, the MCFG (Memory mapped ConFiGuration Table), section 5.2.6, specifically Table 5-31. + -- If booting without a console=<device> kernel parameter is + supported, the SPCR (Serial Port Console Redirection table), + section 5.2.6, specifically Table 5-31. + + -- If virtualization is supported, the IORT (Input Output Remapping + Table, section 5.2.6, specifically Table 5-31. + + -- If NUMA is supported, the SRAT (System Resource Affinity Table) + and SLIT (System Locality distance Information Table), sections + 5.2.16 and 5.2.17, respectively. + If the above tables are not all present, the kernel may or may not be able to boot properly since it may not be able to configure all of the -devices available. +devices available. This list of tables is not meant to be all inclusive; +in some environments other tables may be needed (e.g., any of the APEI +tables from section 18) to support specific functionality. ACPI Detection @@ -233,7 +246,7 @@ that looks like this: Name(KEY0, "value0"). An ACPI device driver would then retrieve the value of the property by evaluating the KEY0 object. However, using Name() this way has multiple problems: (1) ACPI limits names ("KEY0") to four characters unlike DT; (2) there is no industry -wide registry that maintains a list of names, minimzing re-use; (3) +wide registry that maintains a list of names, minimizing re-use; (3) there is also no registry for the definition of property values ("value0"), again making re-use difficult; and (4) how does one maintain backward compatibility as new hardware comes out? The _DSD method was created @@ -434,7 +447,8 @@ The ACPI specification changes regularly. During the year 2014, for instance, version 5.1 was released and version 6.0 substantially completed, with most of the changes being driven by ARM-specific requirements. Proposed changes are presented and discussed in the ASWG (ACPI Specification Working Group) which -is a part of the UEFI Forum. +is a part of the UEFI Forum. The current version of the ACPI specification +is 6.1 release in January 2016. Participation in this group is open to all UEFI members. Please see http://www.uefi.org/workinggroup for details on group membership. -- 2.5.5

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linaro-kernel March 2016