Hi Guys,
This patchset add APIs in OPP layer to allow OPPs transitioning from
within OPP layer. Currently all OPP users need to replicate the same
code to switch between OPPs. While the same can be handled easily by
OPP-core.
The first 7 patches update the OPP core to introduce the new APIs and
the next Nine patches update cpufreq-dt for the same.
11 out of 17 are already Reviewed by Stephen, only few are left :)
I hope this is the last version of the series :)
Testing:
- Tested on exynos 5250-arndale (dual-cortex-A15)
- Tested for both Old-V1 bindings and New V2 bindings
- Tested with regulator names as: 'cpu-supply' and 'cpu0-supply'
- Tested with Unsupported supply ranges as well, to check the
opp-disable logic
V2->V3:
- Very minor updates.
- find_supply_name() doesn't return an error value now, and so its
callers don't check for it.
- And so we don't need to initialize name to NULL
Viresh Kumar (16):
PM / OPP: get/put regulators from OPP core
PM / OPP: Disable OPPs that aren't supported by the regulator
PM / OPP: Introduce dev_pm_opp_get_max_volt_latency()
PM / OPP: Introduce dev_pm_opp_get_max_transition_latency()
PM / OPP: Parse clock-latency and voltage-tolerance for v1 bindings
PM / OPP: Manage device clk
PM / OPP: Add dev_pm_opp_set_rate()
cpufreq: dt: Convert few pr_debug/err() calls to dev_dbg/err()
cpufreq: dt: Rename 'need_update' to 'opp_v1'
cpufreq: dt: OPP layers handles clock-latency for V1 bindings as well
cpufreq: dt: Pass regulator name to the OPP core
cpufreq: dt: Unsupported OPPs are already disabled
cpufreq: dt: Reuse dev_pm_opp_get_max_transition_latency()
cpufreq: dt: Use dev_pm_opp_set_rate() to switch frequency
cpufreq: dt: No need to fetch voltage-tolerance
cpufreq: dt: No need to allocate resources anymore
drivers/base/power/opp/core.c | 420 ++++++++++++++++++++++++++++++++++++++++++
drivers/base/power/opp/opp.h | 13 ++
drivers/cpufreq/cpufreq-dt.c | 300 +++++++++++-------------------
include/linux/pm_opp.h | 27 +++
4 files changed, 565 insertions(+), 195 deletions(-)
--
2.7.1.370.gb2aa7f8
Those patches aim to complete stm32 timer features support.
The last missing part is to be able to chain to timer blocks
which mean that one of timerX's trigger could be used as clock for timerY.
Since this operating is neither event or buffer triggered mode I would
like to introduce a hardware triggered mode in IIO core.
Benjamin Gaignard (2):
iio: add hardware triggered operating mode
iio: make stm32 trigger driver use INDIO_HARDWARE_TRIGGERED mode
.../ABI/testing/sysfs-bus-iio-timer-stm32 | 15 ++++++
drivers/iio/industrialio-core.c | 4 +-
drivers/iio/trigger/stm32-timer-trigger.c | 61 ++++++++++++++++++++++
include/linux/iio/iio.h | 6 +++
4 files changed, 84 insertions(+), 2 deletions(-)
--
1.9.1
Hi Guys,
The cpu_cooling driver is designed to use CPU frequency scaling to avoid
high thermal states for a platform. But it wasn't glued really well with
cpufreq core. For example clipped-cpus is copied from the policy
structure and its much better to use the policy->cpus (or related_cpus)
fields directly as they may have got updated. Not that things were
broken before this series, but they can be optimized a bit more.
This series tries to improve interactions between cpufreq core and
cpu_cooling driver and does some fixes/cleanups to the cpu_cooling
driver.
I have tested it on ARM 32 (exynos) and 64 bit (hikey) boards (haven't
tested the power specific bits).
Lukasz from ARM has been very generous in testing and finding out few
bugs in the earlier versions and getting those fixed. He has
successfully tested the new version on his ARM big LITTLE Juno board.
Pushed here as well:
git://git.kernel.org/pub/scm/linux/kernel/git/vireshk/pm.git thermal/cooling
V3->V4:
- The pointer to policy in the cpufreq notifier will have a different
address and so that address can't be used for comparison. Compare
policy->cpu instead.
- max_level field was used for the newly created power-freq table, but
few places I have used < max_level instead of <= max_level and that
caused the trouble.
- Added Tested-by from Lukasz.
V2->V3:
- Additional check to guarantee that policy is valid.
- Initialize freq-table and cpufreq_cdev->policy fields before they are
used by the power-cooling functionality.
- Thanks Lukasz for testing out and suggesting these changes.
V1->V2:
- Name cpufreq cooling dev as cpufreq_cdev everywhere (Eduardo).
--
viresh
Viresh Kumar (17):
thermal: cpu_cooling: Avoid accessing potentially freed structures
thermal: cpu_cooling: rearrange globals
thermal: cpu_cooling: Name cpufreq cooling devices as cpufreq_cdev
thermal: cpu_cooling: replace cool_dev with cdev
thermal: cpu_cooling: remove cpufreq_cooling_get_level()
thermal: cpu_cooling: get rid of a variable in cpufreq_set_cur_state()
thermal: cpu_cooling: use cpufreq_policy to register cooling device
cpufreq: create cpufreq_table_count_valid_entries()
thermal: cpu_cooling: store cpufreq policy
thermal: cpu_cooling: OPPs are registered for all CPUs
thermal: cpu_cooling: get rid of 'allowed_cpus'
thermal: cpu_cooling: merge frequency and power tables
thermal: cpu_cooling: create structure for idle time stats
thermal: cpu_cooling: get_level() can't fail
thermal: cpu_cooling: don't store cpu_dev in cpufreq_cdev
thermal: cpu_cooling: 'freq' can't be zero in cpufreq_state2power()
thermal: cpu_cooling: Rearrange struct cpufreq_cooling_device
drivers/cpufreq/arm_big_little.c | 2 +-
drivers/cpufreq/cpufreq-dt.c | 2 +-
drivers/cpufreq/cpufreq_stats.c | 13 +-
drivers/cpufreq/dbx500-cpufreq.c | 2 +-
drivers/cpufreq/mt8173-cpufreq.c | 4 +-
drivers/cpufreq/qoriq-cpufreq.c | 3 +-
drivers/thermal/cpu_cooling.c | 606 +++++++++------------
drivers/thermal/imx_thermal.c | 22 +-
drivers/thermal/ti-soc-thermal/ti-thermal-common.c | 22 +-
include/linux/cpu_cooling.h | 32 +-
include/linux/cpufreq.h | 14 +
11 files changed, 315 insertions(+), 407 deletions(-)
--
2.12.0.432.g71c3a4f4ba37
Compiling the DT file with W=1, DTC warns like follows:
Warning (unit_address_vs_reg): Node /opp_table0/opp@1000000000 has a
unit name, but no reg property
Fix this by replacing '@' with '-' as the OPP nodes will never have a
"reg" property.
This is rebased over arm-soc/for-next:
commit 6f714927c553 ("ARM: SoC: Document merges")
Platform maintainers shall apply patches touching their code.
V4->V5:
- Rebased on arm-soc/for-next. Couldn't do that on linux-next/master as
it still had the V3 patch via the PM tree (which will be dropped
today).
- Some more OPP entries got the update as they were present only in
next.
V3->V4:
- split it per platform
V2->V3:
- Rebased over 4.11-rc7 and fixed a merge conflict for sun8i.
--
Viresh
Viresh Kumar (7):
PM / OPP: Use - instead of @ for DT entries
ARM: TI: Use - instead of @ for DT OPP entries
ARM: exynos: Use - instead of @ for DT OPP entries
ARM: pxa: Use - instead of @ for DT OPP entries
ARM: sun8i: Use - instead of @ for DT OPP entries
ARM: uniphier: Use - instead of @ for DT OPP entries
ARM: ZTE: Use - instead of @ for DT OPP entries
.../devicetree/bindings/cpufreq/ti-cpufreq.txt | 20 +++----
.../devicetree/bindings/devfreq/exynos-bus.txt | 46 +++++++--------
Documentation/devicetree/bindings/opp/opp.txt | 38 ++++++-------
arch/arm/boot/dts/am335x-boneblack.dts | 2 +-
arch/arm/boot/dts/am33xx.dtsi | 20 +++----
arch/arm/boot/dts/am4372.dtsi | 10 ++--
arch/arm/boot/dts/dra7.dtsi | 4 +-
arch/arm/boot/dts/exynos3250.dtsi | 46 +++++++--------
arch/arm/boot/dts/exynos4210.dtsi | 32 +++++------
arch/arm/boot/dts/exynos4412-prime.dtsi | 4 +-
arch/arm/boot/dts/exynos4412.dtsi | 66 +++++++++++-----------
arch/arm/boot/dts/exynos5420.dtsi | 40 ++++++-------
arch/arm/boot/dts/exynos5800.dtsi | 56 +++++++++---------
arch/arm/boot/dts/pxa25x.dtsi | 8 +--
arch/arm/boot/dts/pxa27x.dtsi | 14 ++---
arch/arm/boot/dts/sun8i-a33-sinlinx-sina33.dts | 4 +-
arch/arm/boot/dts/sun8i-a33.dtsi | 30 +++++-----
arch/arm/boot/dts/uniphier-pro5.dtsi | 32 +++++------
arch/arm/boot/dts/uniphier-pxs2.dtsi | 16 +++---
arch/arm64/boot/dts/exynos/exynos5433-bus.dtsi | 48 ++++++++--------
arch/arm64/boot/dts/exynos/exynos5433.dtsi | 50 ++++++++--------
arch/arm64/boot/dts/socionext/uniphier-ld11.dtsi | 14 ++---
arch/arm64/boot/dts/socionext/uniphier-ld20.dtsi | 32 +++++------
arch/arm64/boot/dts/zte/zx296718.dtsi | 10 ++--
24 files changed, 321 insertions(+), 321 deletions(-)
--
2.12.0.432.g71c3a4f4ba37
Hi,
The main feedback I got for the V3 series came from Kevin, who suggested
that we should reuse OPP tables for genpd devices as well, instead of
creating a new table type. And that's what this version is trying to do.
Some platforms have the capability to configure the performance state of
their power domains. The process of configuring the performance state is
pretty much platform dependent and we may need to work with a wide range
of configurables. For some platforms, like Qcom, it can be a positive
integer value alone, while in other cases it can be voltage levels, etc.
The power-domain framework until now was only designed for the idle
state management of the device and this needs to change in order to
reuse the power-domain framework for active state management of the
devices.
This series adapts the genpd and OPP frameworks to allow OPP tables to
be used for the genpd devices as well.
The first 2 patches update the DT bindings of the power-domains and OPP
tables. And the other 7 patches implement the details in QoS, genpd and
OPP frameworks.
This is tested currently by hacking the kernel a bit with virtual
power-domains for the dual A15 exynos platform. The earlier version of
patches was also tested by Rajendra Nayak (Qcom) on *real* Qualcomm
hardware for which this work is getting done. And so this version should
work as well.
Here is sample DT and C code we need to write for platforms:
DT:
---
/ {
domain_opp_table: opp_table0 {
compatible = "operating-points-v2";
opp@1 {
domain-performance-state = <1>;
opp-microvolt = <975000 970000 985000>;
};
opp@2 {
domain-performance-state = <2>;
opp-microvolt = <1075000 1000000 1085000>;
};
};
foo_domain: power-controller@12340000 {
compatible = "foo,power-controller";
reg = <0x12340000 0x1000>;
#power-domain-cells = <0>;
operating-points-v2 = <&domain_opp_table>;
}
cpu0_opp_table: opp_table1 {
compatible = "operating-points-v2";
opp-shared;
opp@1000000000 {
opp-hz = /bits/ 64 <1000000000>;
domain-performance-state = <1>;
};
opp@1100000000 {
opp-hz = /bits/ 64 <1100000000>;
domain-performance-state = <2>;
};
opp@1200000000 {
opp-hz = /bits/ 64 <1200000000>;
domain-performance-state = <2>;
};
};
cpus {
#address-cells = <1>;
#size-cells = <0>;
cpu@0 {
compatible = "arm,cortex-a9";
reg = <0>;
clocks = <&clk_controller 0>;
clock-names = "cpu";
operating-points-v2 = <&cpu0_opp_table>;
power-domains = <&foo_domain>;
};
};
};
Driver code:
------------
static int pd_performance(struct generic_pm_domain *domain, unsigned int state)
{
struct dev_pm_opp *opp;
opp = dev_pm_opp_find_dps(&domain->dev, state, true);
/* Use OPP and state in platform specific way */
return 0;
}
static const struct of_device_id pm_domain_of_match[] __initconst = {
{ .compatible = "foo,genpd", },
{ },
};
static int __init genpd_test_init(void)
{
struct device *dev = get_cpu_device(0);
struct device_node *np;
const struct of_device_id *match;
int n;
int ret;
for_each_matching_node_and_match(np, pm_domain_of_match, &match) {
pd.name = kstrdup_const(strrchr(np->full_name, '/') + 1,
GFP_KERNEL);
if (!pd.name) {
of_node_put(np);
return -ENOMEM;
}
pd.set_performance_state = pd_performance;
pm_genpd_init(&pd, NULL, false);
of_genpd_add_provider_simple(np, &pd);
}
ret = dev_pm_domain_attach(dev, false);
return ret;
}
Pushed here as well:
https://git.linaro.org/people/viresh.kumar/linux.git/log/?h=opp/genpd-perfo…
V3->V4:
- Use OPP table for genpd devices as well.
- Add struct device to genpd, in order to reuse OPP infrastructure.
- Based over: https://marc.info/?l=linux-kernel&m=148972988002317&w=2
- Fixed examples in DT document to have voltage in target,min,max order.
V2->V3:
- Based over latest pm/linux-next
- Bindings and code are merged together
- Lots of updates in bindings
- the performance-states node is present within the power-domain now,
instead of its phandle.
- performance-level property is replaced by "reg".
- domain-performance-state property of the consumers contain an
integer value now instead of phandle.
- Lots of updates to the code as well
- Patch "PM / QOS: Add default case to the switch" is merged with
other patches and the code is changed a bit as well.
- Don't pass 'type' to dev_pm_qos_add_notifier(), rather handle all
notifiers with a single list. A new patch is added for that.
- The OPP framework patch can be applied now and has proper SoB from
me.
- Dropped "PM / domain: Save/restore performance state at runtime
suspend/resume".
- Drop all WARN().
- Tested-by Rajendra nayak.
V1->V2:
- Based over latest pm/linux-next
- It is mostly a resend of what is sent earlier as this series hasn't
got any reviews so far and Rafael suggested that its better I resend
it.
- Only the 4/6 patch got an update, which was shared earlier as reply to
V1 as well. It has got several fixes for taking care of power domain
hierarchy, etc.
--
viresh
Viresh Kumar (9):
PM / OPP: Allow OPP table to be used for power-domains
PM / Domains: Use OPP tables for power-domains
PM / QOS: Keep common notifier list for genpd constraints
PM / QOS: Add DEV_PM_QOS_PERFORMANCE request
PM / OPP: Add support to parse OPP table for power-domains
PM / OPP: Add dev_pm_opp_find_dps() helper
PM / domain: Register for PM QOS performance notifier
PM / Domain: Add struct device to genpd
PM / Domain: Add support to parse domain's OPP table
Documentation/devicetree/bindings/opp/opp.txt | 73 ++++++-
.../devicetree/bindings/power/power_domain.txt | 42 ++++
Documentation/power/pm_qos_interface.txt | 2 +-
drivers/base/power/domain.c | 183 ++++++++++++++--
drivers/base/power/opp/core.c | 229 +++++++++++++++++++--
drivers/base/power/opp/debugfs.c | 9 +-
drivers/base/power/opp/of.c | 80 ++++++-
drivers/base/power/opp/opp.h | 14 ++
drivers/base/power/qos.c | 36 +++-
include/linux/pm_domain.h | 6 +
include/linux/pm_opp.h | 8 +
include/linux/pm_qos.h | 17 ++
kernel/power/qos.c | 2 +-
13 files changed, 646 insertions(+), 55 deletions(-)
--
2.12.0.432.g71c3a4f4ba37
Hi,
Here is the 6th version of the series, which incorporates feedback from
Kevin and Sudeep:
- Use freq/voltage in OPP table as it is for power domain and don't
create "domain-performance-level" property
- Take care of domain providers that provide multiple domains
Here is a brief summary of the problem I am trying to solve.
Some platforms have the capability to configure the performance state of
their power domains. The process of configuring the performance state is
pretty much platform dependent and we may need to work with a wide range
of configurables. For some platforms, like Qcom, it can be a positive
integer value alone, while in other cases it can be voltage levels, etc.
The power-domain framework until now was only designed for the idle
state management of the device and this needs to change in order to
reuse the power-domain framework for active state management of the
devices.
This series adapts the genpd and OPP frameworks to allow OPP tables to
be used for the genpd devices as well.
The first 2 patches update the DT bindings of the power-domains and OPP
tables. And the other 7 patches implement the details in QoS, genpd and
OPP frameworks.
This is tested currently by hacking the kernel a bit with virtual
power-domains for the dual A15 exynos platform. The earlier version of
patches was also tested by Rajendra Nayak (Qcom) on *real* Qualcomm
hardware for which this work is getting done. Hope this version should
work as well.
Here is sample DT and C code we need to write for platforms:
DT:
---
/ {
domain_opp_table: opp_table0 {
compatible = "operating-points-v2";
domain_opp_1: opp-1 {
opp-hz = /bits/ 64 <1>;
opp-microvolt = <975000 970000 985000>;
};
domain_opp_2: opp-2 {
opp-hz = /bits/ 64 <2>;
opp-microvolt = <1075000 1000000 1085000>;
};
};
foo_domain: power-controller@12340000 {
compatible = "foo,power-controller";
reg = <0x12340000 0x1000>;
#power-domain-cells = <0>;
operating-points-v2 = <&domain_opp_table>;
}
cpu0_opp_table: opp_table1 {
compatible = "operating-points-v2";
opp-shared;
opp-1000000000 {
opp-hz = /bits/ 64 <1000000000>;
power-domain-opp = <&domain_opp_1>;
};
opp-1100000000 {
opp-hz = /bits/ 64 <1100000000>;
power-domain-opp = <&domain_opp_2>;
};
opp-1200000000 {
opp-hz = /bits/ 64 <1200000000>;
power-domain-opp = <&domain_opp_2>;
};
};
cpus {
#address-cells = <1>;
#size-cells = <0>;
cpu@0 {
compatible = "arm,cortex-a9";
reg = <0>;
clocks = <&clk_controller 0>;
clock-names = "cpu";
operating-points-v2 = <&cpu0_opp_table>;
power-domains = <&foo_domain>;
};
};
};
Driver code:
------------
static int pd_performance(struct generic_pm_domain *domain, unsigned int state)
{
struct dev_pm_opp *opp;
opp = dev_pm_opp_find_freq_exact(&domain->dev, state, true);
/* Use OPP and state in platform specific way */
return 0;
}
static const struct of_device_id pm_domain_of_match[] __initconst = {
{ .compatible = "foo,genpd", },
{ },
};
static int __init genpd_test_init(void)
{
struct device *dev = get_cpu_device(0);
struct device_node *np;
const struct of_device_id *match;
int n;
int ret;
for_each_matching_node_and_match(np, pm_domain_of_match, &match) {
pd.name = kstrdup_const(strrchr(np->full_name, '/') + 1,
GFP_KERNEL);
if (!pd.name) {
of_node_put(np);
return -ENOMEM;
}
pd.set_performance_state = pd_performance;
pm_genpd_init(&pd, NULL, false);
of_genpd_add_provider_simple(np, &pd);
}
ret = dev_pm_domain_attach(dev, false);
return ret;
}
Pushed here as well:
https://git.linaro.org/people/viresh.kumar/linux.git/log/?h=opp/genpd-perfo…
V5->V6:
- Use freq/voltage in OPP table as it is for power domain and don't
create "domain-performance-level" property
- Create new "power-domain-opp" property for the devices.
- Take care of domain providers that provide multiple domains and extend
"operating-points-v2" property to contain a list of phandles
- Update code according to those bindings.
V4->V5:
- Only 3 patches were resent and 2 of them are Acked from Ulf.
V3->V4:
- Use OPP table for genpd devices as well.
- Add struct device to genpd, in order to reuse OPP infrastructure.
- Based over: https://marc.info/?l=linux-kernel&m=148972988002317&w=2
- Fixed examples in DT document to have voltage in target,min,max order.
V2->V3:
- Based over latest pm/linux-next
- Bindings and code are merged together
- Lots of updates in bindings
- the performance-states node is present within the power-domain now,
instead of its phandle.
- performance-level property is replaced by "reg".
- domain-performance-state property of the consumers contain an
integer value now instead of phandle.
- Lots of updates to the code as well
- Patch "PM / QOS: Add default case to the switch" is merged with
other patches and the code is changed a bit as well.
- Don't pass 'type' to dev_pm_qos_add_notifier(), rather handle all
notifiers with a single list. A new patch is added for that.
- The OPP framework patch can be applied now and has proper SoB from
me.
- Dropped "PM / domain: Save/restore performance state at runtime
suspend/resume".
- Drop all WARN().
- Tested-by Rajendra nayak.
V1->V2:
- Based over latest pm/linux-next
- It is mostly a resend of what is sent earlier as this series hasn't
got any reviews so far and Rafael suggested that its better I resend
it.
- Only the 4/6 patch got an update, which was shared earlier as reply to
V1 as well. It has got several fixes for taking care of power domain
hierarchy, etc.
--
viresh
Viresh Kumar (9):
PM / OPP: Introduce "power-domain-opp" property
PM / Domains: Allow OPP table to be used for power-domains
PM / QOS: Keep common notifier list for genpd constraints
PM / QOS: Add DEV_PM_QOS_PERFORMANCE request
PM / OPP: Add support to parse "power-domain-opp" property
PM / OPP: Implement dev_pm_opp_of_add_table_indexed()
PM / domain: Register PM QOS performance notifier
PM / Domain: Add struct device to genpd
PM / Domain: Add support to parse domain's OPP table
Documentation/devicetree/bindings/opp/opp.txt | 74 ++++++-
.../devicetree/bindings/power/power_domain.txt | 106 ++++++++++
Documentation/power/pm_qos_interface.txt | 2 +-
drivers/base/power/domain.c | 222 +++++++++++++++++++--
drivers/base/power/opp/core.c | 72 +++++++
drivers/base/power/opp/debugfs.c | 3 +
drivers/base/power/opp/of.c | 123 +++++++++++-
drivers/base/power/opp/opp.h | 12 ++
drivers/base/power/qos.c | 36 +++-
include/linux/pm_domain.h | 6 +
include/linux/pm_opp.h | 6 +
include/linux/pm_qos.h | 16 ++
kernel/power/qos.c | 2 +-
13 files changed, 641 insertions(+), 39 deletions(-)
--
2.12.0.432.g71c3a4f4ba37
Now extcon-usb-gpio only supports for GPIO egdge trigger, but VBUS/ID
gpios' detection can be triggered by the level trigger on some platforms.
Thus intoduce one property 'extcon-gpio,level-trigger' to identify this
situation.
Signed-off-by: Baolin Wang <baolin.wang(a)linaro.org>
---
.../devicetree/bindings/extcon/extcon-usb-gpio.txt | 3 +++
1 file changed, 3 insertions(+)
diff --git a/Documentation/devicetree/bindings/extcon/extcon-usb-gpio.txt b/Documentation/devicetree/bindings/extcon/extcon-usb-gpio.txt
index dfc14f7..191504b 100644
--- a/Documentation/devicetree/bindings/extcon/extcon-usb-gpio.txt
+++ b/Documentation/devicetree/bindings/extcon/extcon-usb-gpio.txt
@@ -9,6 +9,9 @@ Required properties:
Either one of id-gpio or vbus-gpio must be present. Both can be present as well.
- id-gpio: gpio for USB ID pin. See gpio binding.
- vbus-gpio: gpio for USB VBUS pin.
+- extcon-gpio,level-trigger: Boolean, set this gpio's interrupt flag to
+level trigger. If not specified defaults to false, gpio's interrupt flag
+defaults to edge trigger.
Example: Examples of extcon-usb-gpio node in dra7-evm.dts as listed below:
extcon_usb1 {
--
1.7.9.5