This commit just past the kernel self testing. All results are good till now.
Btw, Mark, do we need to merge it with lsk?
Thanks Alex
发自我的 iPhone
在 2018年2月7日，上午6:45，Alex Shi alex.shi@linaro.org 写道：
Hi All,
I found out the previous booting issue which caused by 5ea5306c3235a1 arm64: alternatives: apply boot time fixups via the linear mapping
Correct, the boot failure is due to this commit missing.
After picked up this commit both hikey and qemu booted well, w and w/o kvm mode. but kernelci.org didn't give me result yet from yesterday. Anyway it should be fine to send out fore review.
The draft version backport is git://git.linaro.org/kernel/linux-linaro-stable.git lts-v4.9-kpti
The backport based on arm tree: https://git.kernel.org/pub/scm/linux/kernel/git/arm64/linux.git/log/?h=kpti
The following commit aren't included for couple reasons: a, bpf patch included in LTS; b falkor isn't supported in LTS c, PAN isn't supported on LTS;
bpf: prevent out-of-bounds speculation arm64: Implement branch predictor hardening for Falkor arm64: kpti: Fix the interaction between ASID switching and software PAN arm64: mm: Introduce TTBR_ASID_MASK for getting at the ASID in the TTBR perf: arm_spe: Fail device probe when arm64_kernel_unmapped_at_el0() arm64: erratum: Work around Falkor erratum #E1003 in trampoline code arm64: mm: Fix and re-enable ARM64_SW_TTBR0_PAN arm64: mm: Rename post_ttbr0_update_workaround arm64: mm: Remove pre_ttbr0_update_workaround for Falkor erratum #E1003 arm64: mm: Temporarily disable ARM64_SW_TTBR0_PAN
Any comments are appreciated!
Regards Alex
[PATCH 01/39] arm64: mm: Use non-global mappings for kernel space [PATCH 02/39] arm64: mm: Move ASID from TTBR0 to TTBR1 [PATCH 03/39] arm64: mm: Allocate ASIDs in pairs [PATCH 04/39] arm64: mm: Add arm64_kernel_unmapped_at_el0 helper [PATCH 05/39] arm64: mm: Invalidate both kernel and user ASIDs when [PATCH 06/39] arm64: factor out entry stack manipulation [PATCH 07/39] arm64: entry.S: move SError handling into a C function [PATCH 08/39] module: extend 'rodata=off' boot cmdline parameter to [PATCH 09/39] arm64: entry: Add exception trampoline page for [PATCH 10/39] arm64: mm: Map entry trampoline into trampoline and [PATCH 11/39] arm64: entry: Explicitly pass exception level to [PATCH 12/39] arm64: entry: Hook up entry trampoline to exception [PATCH 13/39] arm64: tls: Avoid unconditional zeroing of tpidrro_el0 [PATCH 14/39] arm64: entry: Add fake CPU feature for unmapping the [PATCH 15/39] arm64: Kconfig: Add CONFIG_UNMAP_KERNEL_AT_EL0 [PATCH 16/39] arm64: kaslr: Put kernel vectors address in separate [PATCH 17/39] arm64: cpufeature: Pass capability structure to [PATCH 18/39] arm64: Allow checking of a CPU-local erratum [PATCH 19/39] arm64: capabilities: Handle duplicate entries for a [PATCH 20/39] arm64: use RET instruction for exiting the trampoline [PATCH 21/39] arm64: Kconfig: Reword UNMAP_KERNEL_AT_EL0 kconfig [PATCH 22/39] arm64: Take into account ID_AA64PFR0_EL1.CSV3 [PATCH 23/39] drivers/firmware: Expose psci_get_version through [PATCH 24/39] arm64: alternatives: apply boot time fixups via the [PATCH 25/39] mm: Introduce lm_alias [PATCH 26/39] arm64: Move post_ttbr_update_workaround to C code [PATCH 27/39] arm64: KVM: Make PSCI_VERSION a fast path [PATCH 28/39] arm64: cpu_errata: Allow an erratum to be match for all [PATCH 29/39] arm64: cputype: Add missing MIDR values for Cortex-A72 [PATCH 30/39] arm64: Add skeleton to harden the branch predictor [PATCH 31/39] arm64: KVM: Use per-CPU vector when BP hardening is [PATCH 32/39] arm64: Implement branch predictor hardening for [PATCH 33/39] arm64: cputype: Add MIDR values for Cavium ThunderX2 [PATCH 34/39] arm: Add BTB invalidation on switch_mm for Cortex-A9, [PATCH 35/39] arm: KVM: Invalidate BTB on guest exit [PATCH 36/39] arm: Add icache invalidation on switch_mm for [PATCH 37/39] arm: KVM: Invalidate icache on guest exit for [PATCH 38/39] arm: Invalidate BTB on prefetch abort outside of user [PATCH 39/39] arm: Invalidate icache on prefetch abort outside of