Thanks, I certainly do need help in validating changes. I will keep you updated on this.
Thanks, Vaibhav
-----Original Message----- From: Ramakrishnan Muthukrishnan [mailto:ramakrmu@cisco.com] Sent: Monday, July 02, 2012 10:23 AM To: Hiremath, Vaibhav Cc: Sumit Semwal; Martin Ertsås; linaro-kernel@lists.linaro.org Subject: Re: /dev/video* not showing up
Thanks Vaibhav for the note. If I can be of any help in testing any changes that you make, I will be glad to help.
Thanks Ramakrishnan
On Friday 29 June 2012 11:31 PM, Hiremath, Vaibhav wrote:
Ramakrishnan,
Just wanted to clarify before it turns out to be some sort of commitment,
I
will be working on this depending on my bandwidth availability.
Just FYI, I wanted to work on this since long time now, and hopefully should be
able
to get some time in next week. I will keep you posted...
Thanks, Vaibhav
-----Original Message----- From: Ramakrishnan Muthukrishnan [mailto:ramakrmu@cisco.com] Sent: Friday, June 29, 2012 4:11 PM To: Sumit Semwal Cc: Martin Ertsås; linaro-kernel@lists.linaro.org; Hiremath, Vaibhav Subject: Re: /dev/video* not showing up
Thanks Sumit and Vaibhav.
Ramakrishnan
On Friday 29 June 2012 02:00 PM, Sumit Semwal wrote:
Hi Ramakrishnan,
+Vaibhav from TI (another team), who's the maintainer for omap_vout. He has kindly agreed to look into these issues.
Best regards, ~Sumit.
On 28 June 2012 17:27, Ramakrishnan Muthukrishnanramakrmu@cisco.com
wrote:
Hi Sumit,
Here is the log with "omapdss.debug=1 debug":
[ 3.533538] omap_sr_disable: omap_sr struct for sr_core not found [ 3.540222] Power Management for TI OMAP4XX/OMAP5XXX devices. [ 3.546386] hwmod gpmc not found [ 3.549896] sr_init: No PMIC hook to init smartreflex [ 3.555419] smartreflex smartreflex.0: omap_sr_probe: SmartReflex
driver
initialized [ 3.563720] smartreflex smartreflex.1: omap_sr_probe: SmartReflex
driver
initialized [ 3.572052] smartreflex smartreflex.2: omap_sr_probe: SmartReflex
driver
initialized [ 3.581359] SmartReflex Class3 initialized [ 3.590270] clock: disabling unused clocks to save power [ 3.598083] registered taskstats version 1 [ 3.602844] VANA: incomplete constraints, leaving on [ 3.609191] VDAC: incomplete constraints, leaving on [ 3.615203] VUSB: incomplete constraints, leaving on [ 3.621520] twl_rtc twl_rtc: setting system clock to 2000-01-01
00:00:00
UTC (946684800) [ 3.630187] omapdss: ENTER hdmi_panel_enable [ 3.634704] omapdss HDMI: ENTER hdmi_display_enable [ 3.639892] omapdss HDMI: hdmi_runtime_get [ 3.644256] omapdss DSS: dss_restore_context [ 3.648773] omapdss DSS: context restored [ 3.653045] omapdss DISPC: dispc_runtime_get [ 3.657562] omapdss DISPC: dispc_restore_context [ 3.662445] omapdss DISPC: ctx_loss_count: saved 0, current 1 [ 3.668548] omapdss DISPC: context restored [ 3.673004] omapdss HDMI: hdmi_power_on x_res= 640 y_res = 480 [ 3.679168] omapdss HDMI: M = 104 Mf = 234837 [ 3.683807] omapdss HDMI: range = 0 sd = 1 [ 3.688415] omapdss DISPC: FIFO merge enabled [ 3.693054] omapdss APPLY: dss_mgr_write_regs(1) [ 3.697906] omapdss APPLY: dss_ovl_write_regs(0) [ 3.702789] omapdss APPLY: dss_ovl_write_regs_extra(0) [ 3.708221] omapdss DISPC: dispc_enable_plane 0, 0 [ 3.713287] omapdss DISPC: fifo(0) threshold (bytes), old
20352/20464,
new 0/0 [ 3.720916] omapdss APPLY: dss_ovl_write_regs(1) [ 3.725799] omapdss APPLY: dss_ovl_write_regs_extra(1) [ 3.731231] omapdss DISPC: dispc_enable_plane 1, 0 [ 3.736297] omapdss DISPC: fifo(1) threshold (bytes), old
32640/32752,
new 0/0 [ 3.743927] omapdss APPLY: dss_ovl_write_regs(2) [ 3.748779] omapdss APPLY: dss_ovl_write_regs_extra(2) [ 3.754211] omapdss DISPC: dispc_enable_plane 2, 0 [ 3.759277] omapdss DISPC: fifo(2) threshold (bytes), old
32640/32752,
new 0/0 [ 3.766906] omapdss APPLY: dss_ovl_write_regs(3) [ 3.771789] omapdss APPLY: dss_ovl_write_regs_extra(3) [ 3.777221] omapdss DISPC: dispc_enable_plane 3, 0 [ 3.782287] omapdss DISPC: fifo(3) threshold (bytes), old
32640/32752,
new 0/0 [ 3.789916] omapdss APPLY: dss_mgr_write_regs_extra(1) [ 3.795349] omapdss DISPC: channel 1 xres 640 yres 480 [ 3.805419] omapdss: ENTER hdmi_panel_enable [ 3.809967] omap_vout omap_vout: 'hdmi' Display already enabled [ 3.816223] omapdss: ENTER hdmi_panel_enable [ 3.820739] omap_vout omap_vout: 'hdmi' Display already enabled [ 3.826995] omap_vout omap_vout: Buffer Size = 3686400 [ 3.833526] omap_vout omap_vout: : registered and initialized
video
device 0 [ 3.841033] omap_vout omap_vout: Buffer Size = 3686400 [ 3.847503] omap_vout omap_vout: : registered and initialized
video
device 1 [ 3.860870] dmm dmm: initialized all PAT entries [ 3.866851] omapdss APPLY: omap_dss_mgr_apply(lcd) [ 3.871948] omapdss APPLY: dss_mgr_write_regs(1) [ 3.876831] omapdss APPLY: dss_ovl_write_regs(0) [ 3.881713] omapdss APPLY: dss_ovl_write_regs_extra(0) [ 3.887145] omapdss APPLY: dss_ovl_write_regs(1) [ 3.891998] omapdss APPLY: dss_ovl_write_regs_extra(1) [ 3.897430] omapdss APPLY: dss_ovl_write_regs(2) [ 3.902313] omapdss APPLY: dss_ovl_write_regs_extra(2) [ 3.907745] omapdss APPLY: dss_ovl_write_regs(3) [ 3.912628] omapdss APPLY: dss_ovl_write_regs_extra(3) [ 3.918029] omapdss APPLY: dss_mgr_write_regs_extra(1) [ 3.923492] omapdss APPLY: omap_dss_mgr_apply(tv) [ 3.928466] omapdss APPLY: dss_mgr_write_regs(1) [ 3.933349] omapdss APPLY: dss_ovl_write_regs(0) [ 3.938232] omapdss APPLY: dss_ovl_write_regs_extra(0) [ 3.943664] omapdss APPLY: dss_ovl_write_regs(1) [ 3.948547] omapdss APPLY: dss_ovl_write_regs_extra(1) [ 3.953948] omapdss APPLY: dss_ovl_write_regs(2) [ 3.958831] omapdss APPLY: dss_ovl_write_regs_extra(2) [ 3.964263] omapdss APPLY: dss_ovl_write_regs(3) [ 3.969146] omapdss APPLY: dss_ovl_write_regs_extra(3) [ 3.974578] omapdss APPLY: dss_mgr_write_regs_extra(1) [ 3.980010] omapdss DISPC: GO DIGIT [ 3.983703] omapdss APPLY: omap_dss_mgr_apply(lcd2) [ 3.988861] omapdss APPLY: dss_mgr_write_regs(1) [ 3.993743] omapdss APPLY: dss_ovl_write_regs(0) [ 3.998626] omapdss APPLY: dss_ovl_write_regs_extra(0) [ 4.004058] omapdss APPLY: dss_ovl_write_regs(1) [ 4.008941] omapdss APPLY: dss_ovl_write_regs_extra(1) [ 4.014343] omapdss APPLY: dss_ovl_write_regs(2) [ 4.019226] omapdss APPLY: dss_ovl_write_regs_extra(2) [ 4.024658] omapdss APPLY: dss_ovl_write_regs(3) [ 4.029541] omapdss APPLY: dss_ovl_write_regs_extra(3) [ 4.034973] omapdss APPLY: dss_mgr_write_regs_extra(1) [ 4.040435] omapdss APPLY: dss_mgr_write_regs(1) [ 4.045318] omapdss APPLY: dss_ovl_write_regs(0) [ 4.050201] omapdss APPLY: dss_ovl_write_regs_extra(0) [ 4.055633] omapdss APPLY: dss_ovl_write_regs(1) [ 4.060485] omapdss APPLY: dss_ovl_write_regs_extra(1) [ 4.065917] omapdss APPLY: dss_ovl_write_regs(2) [ 4.070800] omapdss APPLY: dss_ovl_write_regs_extra(2) [ 4.076232] omapdss APPLY: dss_ovl_write_regs(3) [ 4.081085] omapdss APPLY: dss_ovl_write_regs_extra(3) [ 4.086517] omapdss APPLY: dss_mgr_write_regs_extra(1) [ 4.092712] omapdss HDMI: hdmi_runtime_get [ 4.097045] omapdss HDMI: hdmi_runtime_put [ 4.101684] omapdss HDMI: hdmi_runtime_get [ 4.106018] omapdss HDMI: hdmi_runtime_put [ 4.110351] omapdss HDMI: hdmi_runtime_get [ 4.147430] omapdss HDMI: hdmi_runtime_put [ 4.151916] omapdss: hdmi_check_timings [ 4.155975] omapdss HDMI: hdmi_get_code [ 4.160064] omapdss: hdmi_check_timings [ 4.164093] omapdss HDMI: hdmi_get_code [ 4.168182] omapdss HDMI: timing1_hsync = 144 timing1_vsync = 49timing2_hsync = 144 timing2_vsync = 49 [ 4.178039] omapdss: hdmi_check_timings [ 4.182067] omapdss HDMI: hdmi_get_code [ 4.186126] omapdss: hdmi_check_timings [ 4.190185] omapdss HDMI: hdmi_get_code [ 4.194244] omapdss HDMI: timing1_hsync = 830 timing1_vsync = 45timing2_hsync = 830 timing2_vsync = 45 [ 4.204101] omapdss: hdmi_check_timings [ 4.208160] omapdss HDMI: hdmi_get_code [ 4.212219] omapdss HDMI: timing1_hsync = 720 timing1_vsync = 45timing2_hsync = 830 timing2_vsync = 45 [ 4.222076] omapdss: hdmi_check_timings [ 4.226135] omapdss HDMI: hdmi_get_code [ 4.230194] omapdss HDMI: timing1_hsync = 700 timing1_vsync = 30timing2_hsync = 370 timing2_vsync = 30 [ 4.240051] omapdss HDMI: timing1_hsync = 700 timing1_vsync = 30timing2_hsync = 700 timing2_vsync = 30 [ 4.249908] omapdss: hdmi_check_timings [ 4.253967] omapdss HDMI: hdmi_get_code [ 4.258026] omapdss HDMI: timing1_hsync = 720 timing1_vsync = 45timing2_hsync = 280 timing2_vsync = 45 [ 4.267883] omapdss HDMI: timing1_hsync = 720 timing1_vsync = 45timing2_hsync = 720 timing2_vsync = 45 [ 4.277709] omapdss: hdmi_check_timings [ 4.281768] omapdss HDMI: hdmi_get_code [ 4.285827] omapdss HDMI: timing1_hsync = 160 timing1_vsync = 44timing2_hsync = 160 timing2_vsync = 44 [ 4.295684] omapdss: hdmi_check_timings [ 4.299743] omapdss HDMI: hdmi_get_code [ 4.303802] omapdss: hdmi_check_timings [ 4.307861] omapdss HDMI: hdmi_get_code [ 4.311920] omapdss HDMI: timing1_hsync = 370 timing1_vsync = 30timing2_hsync = 370 timing2_vsync = 30 [ 4.321777] omapdss: hdmi_check_timings [ 4.325836] omapdss HDMI: hdmi_get_code [ 4.329895] omapdss HDMI: timing1_hsync = 280 timing1_vsync = 45timing2_hsync = 830 timing2_vsync = 45 [ 4.339752] omapdss: hdmi_check_timings [ 4.343780] omapdss HDMI: hdmi_get_code [ 4.347869] omapdss HDMI: timing1_hsync = 280 timing1_vsync = 45timing2_hsync = 280 timing2_vsync = 45 [ 4.357696] omapdss: hdmi_check_timings [ 4.361755] omapdss HDMI: hdmi_get_code [ 4.365814] omapdss: hdmi_check_timings [ 4.369873] omapdss HDMI: hdmi_get_code [ 4.373931] omapdss HDMI: timing1_hsync = 320 timing1_vsync = 38timing2_hsync = 320 timing2_vsync = 38 [ 4.383789] omapdss: hdmi_check_timings [ 4.387847] omapdss HDMI: hdmi_get_code [ 4.391906] omapdss: hdmi_check_timings [ 4.395965] omapdss HDMI: hdmi_get_code [ 4.400024] omapdss: hdmi_check_timings [ 4.404083] omapdss HDMI: hdmi_get_code [ 4.408142] omapdss: hdmi_check_timings [ 4.412200] omapdss HDMI: hdmi_get_code [ 4.416259] omapdss HDMI: timing1_hsync = 160 timing1_vsync = 45timing2_hsync = 160 timing2_vsync = 45 [ 4.426116] omapdss: hdmi_check_timings [ 4.430175] omapdss HDMI: hdmi_get_code [ 4.434234] omapdss: hdmi_check_timings [ 4.438293] omapdss HDMI: hdmi_get_code [ 4.442352] omapdss HDMI: timing1_hsync = 256 timing1_vsync = 28timing2_hsync = 256 timing2_vsync = 28 [ 4.452209] omapdss: hdmi_check_timings [ 4.456237] omapdss HDMI: hdmi_get_code [ 4.460327] omapdss: hdmi_check_timings [ 4.464385] omapdss HDMI: hdmi_get_code [ 4.468444] omapdss: hdmi_check_timings [ 4.472503] omapdss HDMI: hdmi_get_code [ 4.476562] omapdss HDMI: timing1_hsync = 408 timing1_vsync = 42timing2_hsync = 408 timing2_vsync = 42 [ 4.486389] omapdss: hdmi_check_timings [ 4.490478] omapdss HDMI: hdmi_get_code [ 4.527099] [drm] Enabling DMM ywrap scrolling [ 4.532531] omapdss: hdmi_check_timings [ 4.532562] omapdss HDMI: hdmi_get_code [ 4.532562] omapdss HDMI: timing1_hsync = 720 timing1_vsync = 45timing2_hsync = 280 timing2_vsync = 45 [ 4.532562] omapdss HDMI: timing1_hsync = 720 timing1_vsync = 45timing2_hsync = 720 timing2_vsync = 45 [ 4.532592] omapdss: hdmi_set_timings [ 4.532592] omapdss HDMI: audio_disable [ 4.532592] omapdss HDMI: hdmi_get_code [ 4.532592] omapdss HDMI: timing1_hsync = 720 timing1_vsync = 45timing2_hsync = 280 timing2_vsync = 45 [ 4.532623] omapdss HDMI: timing1_hsync = 720 timing1_vsync = 45timing2_hsync = 720 timing2_vsync = 45 [ 4.537750] omapdss HDMI: hdmi_runtime_put [ 4.537780] omapdss DISPC: dispc_runtime_put [ 4.537811] omapdss DISPC: dispc_save_context [ 4.537872] omapdss DISPC: context saved, ctx_loss_count 1 [ 4.537933] omapdss DSS: dss_save_context [ 4.537933] omapdss DSS: context saved [ 4.537963] omapdss HDMI: hdmi_runtime_get [ 4.537994] omapdss DSS: dss_restore_context [ 4.537994] omapdss DSS: context restored [ 4.538024] omapdss DISPC: dispc_runtime_get [ 4.538024] omapdss DISPC: dispc_restore_context [ 4.538055] omapdss HDMI: hdmi_power_on x_res= 1920 y_res = 1080 [ 4.538055] omapdss HDMI: M = 618 Mf = 196608 [ 4.538055] omapdss HDMI: range = 1 sd = 6 [ 4.538330] omapdss APPLY: dss_mgr_write_regs(1) [ 4.538330] omapdss APPLY: dss_ovl_write_regs(0) [ 4.538360] omapdss APPLY: dss_ovl_write_regs_extra(0) [ 4.538360] omapdss DISPC: dispc_enable_plane 0, 0 [ 4.538360] omapdss DISPC: fifo(0) threshold (bytes), old 0/0, new
0/0
[ 4.538391] omapdss APPLY: dss_mgr_write_regs_extra(1) [ 4.538391] omapdss DISPC: channel 1 xres 1920 yres 1080 [ 4.577911] omapdss APPLY: omap_dss_mgr_apply(tv) [ 4.577911] omapdss APPLY: dss_mgr_write_regs(1) [ 4.577911] omapdss APPLY: dss_ovl_write_regs(0) [ 4.577941] omapdss APPLY: dss_ovl_write_regs_extra(0) [ 4.577941] omapdss APPLY: dss_mgr_write_regs_extra(1) [ 4.577941] omapdss APPLY: dss_mgr_write_regs(1) [ 4.577941] omapdss APPLY: dss_ovl_write_regs(0) [ 4.577972] omapdss APPLY: dss_ovl_write_regs_extra(0) [ 4.577972] omapdss DISPC: dispc_enable_plane 0, 0 [ 4.577972] omapdss DISPC: fifo(0) threshold (bytes), old 0/0, new 20352/118768 [ 4.578002] omapdss APPLY: dss_mgr_write_regs_extra(1) [ 4.578002] omapdss DISPC: GO DIGIT [ 4.597900] omapdss APPLY: dss_mgr_write_regs(1) [ 4.597900] omapdss APPLY: dss_ovl_write_regs(0) [ 4.597900] omapdss APPLY: dss_ovl_write_regs_extra(0) [ 4.597900] omapdss APPLY: dss_mgr_write_regs_extra(1) [ 4.597930] omapdss APPLY: dss_mgr_write_regs(1) [ 4.597930] omapdss APPLY: dss_ovl_write_regs(0) [ 4.597961] omapdss DISPC: dispc_ovl_setup 0, pa 7f790000, pa_uv 0,
sw
2048, 0,0, 1920x1080 -> 1920x1080, cmode 800, rot 0, mir 0, ilace 0
chan 1
repl 0 [ 4.597961] omapdss DISPC: calc_rot(0): scrw 2048, 1920x1080 [ 4.597991] omapdss DISPC: offset0 0, offset1 0, row_inc 513,
pix_inc 1
[ 4.597991] omapdss DISPC: 0,0 1920x1080 -> 1920x1080 [ 4.598022] omapdss APPLY: dss_ovl_write_regs_extra(0) [ 4.598022] omapdss DISPC: dispc_enable_plane 0, 1 [ 4.598022] omapdss DISPC: fifo(0) threshold (bytes), old
20352/118768,
new 20352/118768 [ 4.598022] omapdss APPLY: dss_mgr_write_regs_extra(1) [ 4.598052] omapdss DISPC: GO DIGIT [ 4.617889] omapdss APPLY: dss_mgr_write_regs(1) [ 4.617889] omapdss APPLY: dss_ovl_write_regs(0) [ 4.617889] omapdss APPLY: dss_ovl_write_regs_extra(0) [ 4.617919] omapdss APPLY: dss_mgr_write_regs_extra(1) [ 4.617919] omapdss APPLY: omap_dss_mgr_apply(tv) [ 4.617950] omapdss APPLY: dss_mgr_write_regs(1) [ 4.617950] omapdss APPLY: dss_ovl_write_regs(0) [ 4.617950] omapdss APPLY: dss_ovl_write_regs_extra(0) [ 4.617950] omapdss APPLY: dss_mgr_write_regs_extra(1) [ 4.644470] Console: switching to colour frame buffer device
240x67
[ 5.175567] fb0: omapdrm frame buffer device [ 5.183746] drm: registered panic notifier [ 5.191619] [drm] Supports vblank timestamp caching Rev 1
(10.10.2010).
[ 5.202301] [drm] No driver support for vblank timestamp query. ... ... [ 15.206634] omapdss HDMI: hdmi_runtime_get [ 15.267761] omapdss HDMI: hdmi_runtime_put [ 25.331604] omapdss HDMI: hdmi_runtime_get [ 25.394134] omapdss HDMI: hdmi_runtime_put [ 35.487823] omapdss HDMI: hdmi_runtime_get [ 35.549713] omapdss HDMI: hdmi_runtime_put