On 14 July 2014 15:51, Peter Zijlstra peterz@infradead.org wrote:
On Fri, Jul 11, 2014 at 05:17:44PM +0200, Vincent Guittot wrote:
In any case, its feels rather arbitrary to me. What about machines where there's no cache sharing at all (the traditional SMP systems). This thing you're trying to do still seems to make sense there.
ok, I thought that traditional SMP systems have this flag set at core level.
Yeah, with 1 core, so its effectively disabled.
I mean ARM platforms have the flag for CPUs in the same cluster (which include current ARM SMP system) and the corei7 of my laptop has the flag at the cores level.
So I can see 'small' parts reducing shared caches in order to improve idle performance.
The point being that LLC seems a somewhat arbitrary measure for this.
Can we try and see what happens if you remove the limit. Its always best to try the simpler things first and only make it more complex if we have to.
ok. i will remove the condition in the next version