== Thomas Abraham <thomas-ab> ==
=== Highlights ===
* Completed the power measurement with and without memory regions patches, but did not find any savings in power consumed.
* Did further testing at hardware level (with only u-boot executing, no linux) and found a issue with memory controller settings. After fixing the issue, there is about 60mA of savings when all the banks of the 4 DDR3 modules connected to one memory controller are kept in precharge power-down mode versus when read/write activity are active on them.
* Submitted third version of the clkdev patches.
=== Plans ===
* Re-run the tests with memory regions patches. Also find a test equipment that can provide average power consumed when a test case is executed.
On Mon, Jun 13, 2011 at 5:05 PM, Thomas Abraham thomas.abraham@linaro.org wrote:
== Thomas Abraham <thomas-ab> ==
=== Highlights ===
- Completed the power measurement with and without memory regions patches,
but did not find any savings in power consumed.
- Did further testing at hardware level (with only u-boot executing, no linux)
and found a issue with memory controller settings. After fixing the issue, there is about 60mA of savings when all the banks of the 4 DDR3 modules connected to one memory controller are kept in precharge power-down mode versus when read/write activity are active on them.
Hi Thomas,
Where can I find details about these measurements, patches, etc.? What is the latency in bring this memory back online?
/Amit
- Submitted third version of the clkdev patches.
=== Plans ===
- Re-run the tests with memory regions patches. Also find a test
equipment that can provide average power consumed when a test case is executed.
linaro-kernel mailing list linaro-kernel@lists.linaro.org http://lists.linaro.org/mailman/listinfo/linaro-kernel
Hi Amit,
On 13 June 2011 19:39, Amit Kucheria amit.kucheria@linaro.org wrote:
On Mon, Jun 13, 2011 at 5:05 PM, Thomas Abraham thomas.abraham@linaro.org wrote:
== Thomas Abraham <thomas-ab> ==
=== Highlights ===
- Completed the power measurement with and without memory regions patches,
but did not find any savings in power consumed.
- Did further testing at hardware level (with only u-boot executing, no linux)
and found a issue with memory controller settings. After fixing the issue, there is about 60mA of savings when all the banks of the 4 DDR3 modules connected to one memory controller are kept in precharge power-down mode versus when read/write activity are active on them.
Hi Thomas,
Where can I find details about these measurements, patches, etc.? What
The above test was more of a hardware level power measurement. There was no linux running on the board, only u-boot was running. The above test was a basic test at the hardware level to prove that by keeping the memory banks in precharge power-down mode, it is possible to save power. Since memory regions patches from IBM try to keep regions of memory idle most of the time, it can be implied that power can be saved by creating memory regions.
The test procedure was
1. Exynos4 processor has two dynamic memory controllers (DMC0 and DMC1). 2. Each DMC is connected with 1G of DDR3. 3. u-boot resides in the memory region controlled by DMC0. 4. Memory region controlled by DMC1 was kept idle (no read/write access). 5. Due to no read/write access, DMC1 puts all the banks of DDR3 in precharge power-down mode. (This is done automatically by the DMC when read/write access do no occur for a programmed number of clock cycles). 6. Measure the current. (It was 0.71mA). 7. Now write 4-byte word continuously at each 32MB boundary of the 1GB memory connected to DMC1. 8. Measure the current. (It was 0.77mA). 9. All the measurements are at the 5V power source. 10. To measure current at DDR3 level, some board rework is required, which I will try to do.
(For step 7, probably using DMA channels to write to memory would be better, instead of using the CPU).
This was the test procedure used. When I tested with memory regions patches, the workload was to compile the kernel on the smdkv310 board. But the reading on the multi-meter kept on varying during the entire build. So I could not deterministically measure the power consumed. Amit Daniel (amitdk) then suggested me to use a device that can provide average power consumed from time t1 to time t2. I will try doing this.
What is the latency in bring this memory back online?
I have not measured this. I will do this next.
Thomas.
/Amit
- Submitted third version of the clkdev patches.
=== Plans ===
- Re-run the tests with memory regions patches. Also find a test
equipment that can provide average power consumed when a test case is executed.
linaro-kernel mailing list linaro-kernel@lists.linaro.org http://lists.linaro.org/mailman/listinfo/linaro-kernel
On 13 June 2011 20:56, Thomas Abraham thomas.abraham@linaro.org wrote:
Hi Amit,
On 13 June 2011 19:39, Amit Kucheria amit.kucheria@linaro.org wrote:
On Mon, Jun 13, 2011 at 5:05 PM, Thomas Abraham thomas.abraham@linaro.org wrote:
== Thomas Abraham <thomas-ab> ==
=== Highlights ===
- Completed the power measurement with and without memory regions patches,
but did not find any savings in power consumed.
- Did further testing at hardware level (with only u-boot executing, no linux)
and found a issue with memory controller settings. After fixing the issue, there is about 60mA of savings when all the banks of the 4 DDR3 modules connected to one memory controller are kept in precharge power-down mode versus when read/write activity are active on them.
Hi Thomas,
Where can I find details about these measurements, patches, etc.? What
The above test was more of a hardware level power measurement. There was no linux running on the board, only u-boot was running. The above test was a basic test at the hardware level to prove that by keeping the memory banks in precharge power-down mode, it is possible to save power. Since memory regions patches from IBM try to keep regions of memory idle most of the time, it can be implied that power can be saved by creating memory regions.
The test procedure was
- Exynos4 processor has two dynamic memory controllers (DMC0 and DMC1).
- Each DMC is connected with 1G of DDR3.
- u-boot resides in the memory region controlled by DMC0.
- Memory region controlled by DMC1 was kept idle (no read/write access).
- Due to no read/write access, DMC1 puts all the banks of DDR3 in
precharge power-down mode. (This is done automatically by the DMC when read/write access do no occur for a programmed number of clock cycles).
Correcting the power measurement numbers below.
- 6. Measure the current. (It was 0.71mA). + 6. Measure the current. (It was 0.71A).
- Now write 4-byte word continuously at each 32MB boundary of the 1GB
memory connected to DMC1.
- 8. Measure the current. (It was 0.77mA). + 8. Measure the current. (It was 0.77A).
- All the measurements are at the 5V power source.
- To measure current at DDR3 level, some board rework is required,
which I will try to do.
(For step 7, probably using DMA channels to write to memory would be better, instead of using the CPU).
<snip>
On 06/13/2011 03:05 PM, Somebody in the thread at some point said:
== Thomas Abraham<thomas-ab> ==
=== Highlights ===
Completed the power measurement with and without memory regions patches, but did not find any savings in power consumed.
Did further testing at hardware level (with only u-boot executing, no linux) and found a issue with memory controller settings. After fixing the issue, there is about 60mA of savings when all the banks of the 4 DDR3 modules connected to one memory controller are kept in precharge power-down mode versus when read/write activity are active on them.
That's really cool.
It might be an idea to measure and report the power in Watts. 60mA on 1.5V DDR3 rail is very different than if you are measuring at the 5VDC in.
-Andy
Hi Andy,
On 13 June 2011 19:39, Andy Green andy.green@linaro.org wrote:
On 06/13/2011 03:05 PM, Somebody in the thread at some point said:
== Thomas Abraham<thomas-ab> ==
=== Highlights ===
- Completed the power measurement with and without memory regions patches,
but did not find any savings in power consumed.
- Did further testing at hardware level (with only u-boot executing, no
linux) and found a issue with memory controller settings. After fixing the issue, there is about 60mA of savings when all the banks of the 4 DDR3 modules connected to one memory controller are kept in precharge power-down mode versus when read/write activity are active on them.
That's really cool.
It might be an idea to measure and report the power in Watts. 60mA on 1.5V DDR3 rail is very different than if you are measuring at the 5VDC in.
I measured at the 5V power supply source. Some board re-work is required to measure at the 1.5V source for DDR3, which I will try to do next.
Thomas.
-Andy
linaro-kernel@lists.linaro.org
-
Amit Kucheria -
Andy Green -
Thomas Abraham