[PATCH v2 0/3] ARM64: dts: cpufreq: mt8173: Migrate mt8173-cpufreq to use OPPv2 bindings
This series tries to migrate mt8173-cpufreq driver to use operating-points-v2 bindings and add support for mt8173-cpufreq driver
v1->v2: - update dev_pm_opp_of_get_sharing_cpus() to setup bitfield of original CPU - rename OPP nodes in dts according to OPPv2 bindings in linux-next
Pi-Cheng Chen (3): PM/OPP: Don't skip cpu_dev->id when setting up cpumask cpufreq: mt8173: migrate to use operating-points-v2 bindings ARM64: dts: mt8173: Add CPU OPP, clock and regulator supply properties
arch/arm64/boot/dts/mediatek/mt8173-evb.dts | 18 ++++++ arch/arm64/boot/dts/mediatek/mt8173.dtsi | 90 +++++++++++++++++++++++++++++ drivers/base/power/opp/cpu.c | 4 -- drivers/cpufreq/mt8173-cpufreq.c | 17 ++++-- 4 files changed, 119 insertions(+), 10 deletions(-)
Don't skip cpu_dev->id when setting up cpumask for CPUs that share the same OPP table. This might be helpful when handling cpumask without the original CPU bitfield set.
Signed-off-by: Pi-Cheng Chen pi-cheng.chen@linaro.org --- drivers/base/power/opp/cpu.c | 4 ---- 1 file changed, 4 deletions(-)
diff --git a/drivers/base/power/opp/cpu.c b/drivers/base/power/opp/cpu.c index 7b445e8..4914a0d 100644 --- a/drivers/base/power/opp/cpu.c +++ b/drivers/base/power/opp/cpu.c @@ -214,7 +214,6 @@ EXPORT_SYMBOL_GPL(dev_pm_opp_of_cpumask_add_table); /* * Works only for OPP v2 bindings. * - * cpumask should be already set to mask of cpu_dev->id. * Returns -ENOENT if operating-points-v2 bindings aren't supported. */ int dev_pm_opp_of_get_sharing_cpus(struct device *cpu_dev, cpumask_var_t cpumask) @@ -235,9 +234,6 @@ int dev_pm_opp_of_get_sharing_cpus(struct device *cpu_dev, cpumask_var_t cpumask goto put_cpu_node;
for_each_possible_cpu(cpu) { - if (cpu == cpu_dev->id) - continue; - tcpu_dev = get_cpu_device(cpu); if (!tcpu_dev) { dev_err(cpu_dev, "%s: failed to get cpu%d device\n",
On 27-12-15, 14:21, Pi-Cheng Chen wrote:
Don't skip cpu_dev->id when setting up cpumask for CPUs that share the same OPP table. This might be helpful when handling cpumask without the original CPU bitfield set.
Signed-off-by: Pi-Cheng Chen pi-cheng.chen@linaro.org
drivers/base/power/opp/cpu.c | 4 ---- 1 file changed, 4 deletions(-)
diff --git a/drivers/base/power/opp/cpu.c b/drivers/base/power/opp/cpu.c index 7b445e8..4914a0d 100644 --- a/drivers/base/power/opp/cpu.c +++ b/drivers/base/power/opp/cpu.c @@ -214,7 +214,6 @@ EXPORT_SYMBOL_GPL(dev_pm_opp_of_cpumask_add_table); /*
- Works only for OPP v2 bindings.
*/
- cpumask should be already set to mask of cpu_dev->id.
- Returns -ENOENT if operating-points-v2 bindings aren't supported.
int dev_pm_opp_of_get_sharing_cpus(struct device *cpu_dev, cpumask_var_t cpumask) @@ -235,9 +234,6 @@ int dev_pm_opp_of_get_sharing_cpus(struct device *cpu_dev, cpumask_var_t cpumask goto put_cpu_node; for_each_possible_cpu(cpu) {
if (cpu == cpu_dev->id)continue;- tcpu_dev = get_cpu_device(cpu); if (!tcpu_dev) { dev_err(cpu_dev, "%s: failed to get cpu%d device\n",
Not this way. You should just set 'cpumask' to cpumask of cpu_dev->id at the top of the function.
Set cpu_dev->id in cpumask first when setting up cpumask for CPUs that share the same OPP table. This might be helpful when handling cpumask without the original CPU bitfield set.
Signed-off-by: Pi-Cheng Chen pi-cheng.chen@linaro.org --- v1->v2: - Set cpu_dev->id in cpumask at the top instead of skip it in the loop --- drivers/base/power/opp/cpu.c | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-)
diff --git a/drivers/base/power/opp/cpu.c b/drivers/base/power/opp/cpu.c index 7b445e8..9f0c155 100644 --- a/drivers/base/power/opp/cpu.c +++ b/drivers/base/power/opp/cpu.c @@ -214,7 +214,6 @@ EXPORT_SYMBOL_GPL(dev_pm_opp_of_cpumask_add_table); /* * Works only for OPP v2 bindings. * - * cpumask should be already set to mask of cpu_dev->id. * Returns -ENOENT if operating-points-v2 bindings aren't supported. */ int dev_pm_opp_of_get_sharing_cpus(struct device *cpu_dev, cpumask_var_t cpumask) @@ -230,6 +229,8 @@ int dev_pm_opp_of_get_sharing_cpus(struct device *cpu_dev, cpumask_var_t cpumask return -ENOENT; }
+ cpumask_set_cpu(cpu_dev->id, cpumask); + /* OPPs are shared ? */ if (!of_property_read_bool(np, "opp-shared")) goto put_cpu_node;
On 28-12-15, 21:06, Pi-Cheng Chen wrote:
Set cpu_dev->id in cpumask first when setting up cpumask for CPUs that share the same OPP table. This might be helpful when handling cpumask without the original CPU bitfield set.
Signed-off-by: Pi-Cheng Chen pi-cheng.chen@linaro.org
v1->v2:
- Set cpu_dev->id in cpumask at the top instead of skip it in the loop
drivers/base/power/opp/cpu.c | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-)
diff --git a/drivers/base/power/opp/cpu.c b/drivers/base/power/opp/cpu.c index 7b445e8..9f0c155 100644 --- a/drivers/base/power/opp/cpu.c +++ b/drivers/base/power/opp/cpu.c @@ -214,7 +214,6 @@ EXPORT_SYMBOL_GPL(dev_pm_opp_of_cpumask_add_table); /*
- Works only for OPP v2 bindings.
*/
- cpumask should be already set to mask of cpu_dev->id.
- Returns -ENOENT if operating-points-v2 bindings aren't supported.
int dev_pm_opp_of_get_sharing_cpus(struct device *cpu_dev, cpumask_var_t cpumask) @@ -230,6 +229,8 @@ int dev_pm_opp_of_get_sharing_cpus(struct device *cpu_dev, cpumask_var_t cpumask return -ENOENT; }
- cpumask_set_cpu(cpu_dev->id, cpumask);
- /* OPPs are shared ? */ if (!of_property_read_bool(np, "opp-shared")) goto put_cpu_node;
Acked-by: Viresh Kumar viresh.kumar@linaro.org
On Tuesday, December 29, 2015 09:20:54 AM Viresh Kumar wrote:
On 28-12-15, 21:06, Pi-Cheng Chen wrote:
Set cpu_dev->id in cpumask first when setting up cpumask for CPUs that share the same OPP table. This might be helpful when handling cpumask without the original CPU bitfield set.
Signed-off-by: Pi-Cheng Chen pi-cheng.chen@linaro.org
v1->v2:
- Set cpu_dev->id in cpumask at the top instead of skip it in the loop
drivers/base/power/opp/cpu.c | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-)
diff --git a/drivers/base/power/opp/cpu.c b/drivers/base/power/opp/cpu.c index 7b445e8..9f0c155 100644 --- a/drivers/base/power/opp/cpu.c +++ b/drivers/base/power/opp/cpu.c @@ -214,7 +214,6 @@ EXPORT_SYMBOL_GPL(dev_pm_opp_of_cpumask_add_table); /*
- Works only for OPP v2 bindings.
*/
- cpumask should be already set to mask of cpu_dev->id.
- Returns -ENOENT if operating-points-v2 bindings aren't supported.
int dev_pm_opp_of_get_sharing_cpus(struct device *cpu_dev, cpumask_var_t cpumask) @@ -230,6 +229,8 @@ int dev_pm_opp_of_get_sharing_cpus(struct device *cpu_dev, cpumask_var_t cpumask return -ENOENT; }
- cpumask_set_cpu(cpu_dev->id, cpumask);
- /* OPPs are shared ? */ if (!of_property_read_bool(np, "opp-shared")) goto put_cpu_node;
Acked-by: Viresh Kumar viresh.kumar@linaro.org
Applied, along with the [2-3/3], thanks!
Modify mt8173-cpufreq driver to get OPP-sharing information and set up OPP table provided by operating-points-v2 bindings.
Signed-off-by: Pi-Cheng Chen pi-cheng.chen@linaro.org --- drivers/cpufreq/mt8173-cpufreq.c | 17 +++++++++++------ 1 file changed, 11 insertions(+), 6 deletions(-)
diff --git a/drivers/cpufreq/mt8173-cpufreq.c b/drivers/cpufreq/mt8173-cpufreq.c index fd601b9..1efba34 100644 --- a/drivers/cpufreq/mt8173-cpufreq.c +++ b/drivers/cpufreq/mt8173-cpufreq.c @@ -390,7 +390,15 @@ static int mtk_cpu_dvfs_info_init(struct mtk_cpu_dvfs_info *info, int cpu) /* Both presence and absence of sram regulator are valid cases. */ sram_reg = regulator_get_exclusive(cpu_dev, "sram");
- ret = dev_pm_opp_of_add_table(cpu_dev); + /* Get OPP-sharing information from "operating-points-v2" bindings */ + ret = dev_pm_opp_of_get_sharing_cpus(cpu_dev, &info->cpus); + if (ret) { + pr_err("failed to get OPP-sharing information for cpu%d\n", + cpu); + goto out_free_resources; + } + + ret = dev_pm_opp_of_cpumask_add_table(&info->cpus); if (ret) { pr_warn("no OPP table for cpu%d\n", cpu); goto out_free_resources; @@ -421,13 +429,10 @@ static int mtk_cpu_dvfs_info_init(struct mtk_cpu_dvfs_info *info, int cpu) */ info->need_voltage_tracking = !IS_ERR(sram_reg);
- /* CPUs in the same cluster share a clock and power domain. */ - cpumask_copy(&info->cpus, &cpu_topology[cpu].core_sibling); - return 0;
out_free_opp_table: - dev_pm_opp_of_remove_table(cpu_dev); + dev_pm_opp_of_cpumask_remove_table(&info->cpus);
out_free_resources: if (!IS_ERR(proc_reg)) @@ -453,7 +458,7 @@ static void mtk_cpu_dvfs_info_release(struct mtk_cpu_dvfs_info *info) if (!IS_ERR(info->inter_clk)) clk_put(info->inter_clk);
- dev_pm_opp_of_remove_table(info->cpu_dev); + dev_pm_opp_of_cpumask_remove_table(&info->cpus); }
static int mtk_cpufreq_init(struct cpufreq_policy *policy)
On 27-12-15, 14:21, Pi-Cheng Chen wrote:
Modify mt8173-cpufreq driver to get OPP-sharing information and set up OPP table provided by operating-points-v2 bindings.
Signed-off-by: Pi-Cheng Chen pi-cheng.chen@linaro.org
drivers/cpufreq/mt8173-cpufreq.c | 17 +++++++++++------ 1 file changed, 11 insertions(+), 6 deletions(-)
Acked-by: Viresh Kumar viresh.kumar@linaro.org
Add operating-points-v2, clock, and regulator supply properties required by mt8173-cpufreq driver to enable it.
Signed-off-by: Pi-Cheng Chen pi-cheng.chen@linaro.org --- This patch is based on the patch[1] that adds underlying clock MUX for MT8173 which is needed by mt8173-cpufreq driver but not yet picked.
[1] http://article.gmane.org/gmane.linux.kernel.clk/325 --- arch/arm64/boot/dts/mediatek/mt8173-evb.dts | 18 ++++++ arch/arm64/boot/dts/mediatek/mt8173.dtsi | 90 +++++++++++++++++++++++++++++ 2 files changed, 108 insertions(+)
diff --git a/arch/arm64/boot/dts/mediatek/mt8173-evb.dts b/arch/arm64/boot/dts/mediatek/mt8173-evb.dts index 811cb76..5b6321b 100644 --- a/arch/arm64/boot/dts/mediatek/mt8173-evb.dts +++ b/arch/arm64/boot/dts/mediatek/mt8173-evb.dts @@ -405,6 +405,24 @@ status = "okay"; };
+&cpu0 { + proc-supply = <&mt6397_vpca15_reg>; +}; + +&cpu1 { + proc-supply = <&mt6397_vpca15_reg>; +}; + +&cpu2 { + proc-supply = <&da9211_vcpu_reg>; + sram-supply = <&mt6397_vsramca7_reg>; +}; + +&cpu3 { + proc-supply = <&da9211_vcpu_reg>; + sram-supply = <&mt6397_vsramca7_reg>; +}; + &uart0 { status = "okay"; }; diff --git a/arch/arm64/boot/dts/mediatek/mt8173.dtsi b/arch/arm64/boot/dts/mediatek/mt8173.dtsi index 4dd5f93..ae28c12 100644 --- a/arch/arm64/boot/dts/mediatek/mt8173.dtsi +++ b/arch/arm64/boot/dts/mediatek/mt8173.dtsi @@ -24,6 +24,80 @@ #address-cells = <2>; #size-cells = <2>;
+ cluster0_opp: opp_table0 { + compatible = "operating-points-v2"; + opp-shared; + opp@507000000 { + opp-hz = /bits/ 64 <507000000>; + opp-microvolt = <859000>; + }; + opp@702000000 { + opp-hz = /bits/ 64 <702000000>; + opp-microvolt = <908000>; + }; + opp@1001000000 { + opp-hz = /bits/ 64 <1001000000>; + opp-microvolt = <983000>; + }; + opp@1105000000 { + opp-hz = /bits/ 64 <1105000000>; + opp-microvolt = <1009000>; + }; + opp@1183000000 { + opp-hz = /bits/ 64 <1183000000>; + opp-microvolt = <1028000>; + }; + opp@1404000000 { + opp-hz = /bits/ 64 <1404000000>; + opp-microvolt = <1083000>; + }; + opp@1508000000 { + opp-hz = /bits/ 64 <1508000000>; + opp-microvolt = <1109000>; + }; + opp@1573000000 { + opp-hz = /bits/ 64 <1573000000>; + opp-microvolt = <1125000>; + }; + }; + + cluster1_opp: opp_table1 { + compatible = "operating-points-v2"; + opp-shared; + opp@507000000 { + opp-hz = /bits/ 64 <507000000>; + opp-microvolt = <828000>; + }; + opp@702000000 { + opp-hz = /bits/ 64 <702000000>; + opp-microvolt = <867000>; + }; + opp@1001000000 { + opp-hz = /bits/ 64 <1001000000>; + opp-microvolt = <927000>; + }; + opp@1209000000 { + opp-hz = /bits/ 64 <1209000000>; + opp-microvolt = <968000>; + }; + opp@1404000000 { + opp-hz = /bits/ 64 <1404000000>; + opp-microvolt = <1007000>; + }; + opp@1612000000 { + opp-hz = /bits/ 64 <1612000000>; + opp-microvolt = <1049000>; + }; + opp@1807000000 { + opp-hz = /bits/ 64 <1807000000>; + opp-microvolt = <1089000>; + }; + opp@1989000000 { + opp-hz = /bits/ 64 <1989000000>; + opp-microvolt = <1125000>; + }; + }; + cpus { #address-cells = <1>; #size-cells = <0>; @@ -54,6 +128,10 @@ reg = <0x000>; enable-method = "psci"; cpu-idle-states = <&CPU_SLEEP_0>; + clocks = <&infracfg CLK_INFRA_CA53SEL>, + <&apmixedsys CLK_APMIXED_MAINPLL>; + clock-names = "cpu", "intermediate"; + operating-points-v2 = <&cluster0_opp>; };
cpu1: cpu@1 { @@ -62,6 +140,10 @@ reg = <0x001>; enable-method = "psci"; cpu-idle-states = <&CPU_SLEEP_0>; + clocks = <&infracfg CLK_INFRA_CA53SEL>, + <&apmixedsys CLK_APMIXED_MAINPLL>; + clock-names = "cpu", "intermediate"; + operating-points-v2 = <&cluster0_opp>; };
cpu2: cpu@100 { @@ -70,6 +152,10 @@ reg = <0x100>; enable-method = "psci"; cpu-idle-states = <&CPU_SLEEP_0>; + clocks = <&infracfg CLK_INFRA_CA57SEL>, + <&apmixedsys CLK_APMIXED_MAINPLL>; + clock-names = "cpu", "intermediate"; + operating-points-v2 = <&cluster1_opp>; };
cpu3: cpu@101 { @@ -78,6 +164,10 @@ reg = <0x101>; enable-method = "psci"; cpu-idle-states = <&CPU_SLEEP_0>; + clocks = <&infracfg CLK_INFRA_CA57SEL>, + <&apmixedsys CLK_APMIXED_MAINPLL>; + clock-names = "cpu", "intermediate"; + operating-points-v2 = <&cluster1_opp>; };
idle-states {
On 27-12-15, 14:21, Pi-Cheng Chen wrote:
Add operating-points-v2, clock, and regulator supply properties required by mt8173-cpufreq driver to enable it.
Signed-off-by: Pi-Cheng Chen pi-cheng.chen@linaro.org
This patch is based on the patch[1] that adds underlying clock MUX for MT8173 which is needed by mt8173-cpufreq driver but not yet picked.
[1] http://article.gmane.org/gmane.linux.kernel.clk/325
arch/arm64/boot/dts/mediatek/mt8173-evb.dts | 18 ++++++ arch/arm64/boot/dts/mediatek/mt8173.dtsi | 90 +++++++++++++++++++++++++++++ 2 files changed, 108 insertions(+)
Acked-by: Viresh Kumar viresh.kumar@linaro.org
On Monday 28 December 2015 08:43:40 Viresh Kumar wrote:
On 27-12-15, 14:21, Pi-Cheng Chen wrote:
Add operating-points-v2, clock, and regulator supply properties required by mt8173-cpufreq driver to enable it.
Signed-off-by: Pi-Cheng Chen pi-cheng.chen@linaro.org
This patch is based on the patch[1] that adds underlying clock MUX for MT8173 which is needed by mt8173-cpufreq driver but not yet picked.
[1] http://article.gmane.org/gmane.linux.kernel.clk/325
arch/arm64/boot/dts/mediatek/mt8173-evb.dts | 18 ++++++ arch/arm64/boot/dts/mediatek/mt8173.dtsi | 90 +++++++++++++++++++++++++++++ 2 files changed, 108 insertions(+)
Acked-by: Viresh Kumar viresh.kumar@linaro.org
This patch is now in linux-next through Rafael's pm tree, and it breaks the arm64 build:
arm64-defconfig Error: ../arch/arm64/boot/dts/mediatek/mt8173.dtsi:132.24-25 syntax error
Please revert.
In the future, please send all dts changes through the proper maintainer channels (-> Mattias -> arm-soc), and make sure they actually build.
Arnd
On 05-01-16, 11:21, Arnd Bergmann wrote:
On Monday 28 December 2015 08:43:40 Viresh Kumar wrote:
On 27-12-15, 14:21, Pi-Cheng Chen wrote:
Add operating-points-v2, clock, and regulator supply properties required by mt8173-cpufreq driver to enable it.
Signed-off-by: Pi-Cheng Chen pi-cheng.chen@linaro.org
This patch is based on the patch[1] that adds underlying clock MUX for MT8173 which is needed by mt8173-cpufreq driver but not yet picked.
[1] http://article.gmane.org/gmane.linux.kernel.clk/325
arch/arm64/boot/dts/mediatek/mt8173-evb.dts | 18 ++++++ arch/arm64/boot/dts/mediatek/mt8173.dtsi | 90 +++++++++++++++++++++++++++++ 2 files changed, 108 insertions(+)
Acked-by: Viresh Kumar viresh.kumar@linaro.org
This patch is now in linux-next through Rafael's pm tree, and it breaks the arm64 build:
arm64-defconfigError: ../arch/arm64/boot/dts/mediatek/mt8173.dtsi:132.24-25 syntax error
Please revert.
In the future, please send all dts changes through the proper maintainer channels (-> Mattias -> arm-soc), and make sure they actually build.
Rafael has already reverted that, AFAIK, after Mark Brown reported the build issue.
On 05/01/16 11:24, Viresh Kumar wrote:
On 05-01-16, 11:21, Arnd Bergmann wrote:
On Monday 28 December 2015 08:43:40 Viresh Kumar wrote:
On 27-12-15, 14:21, Pi-Cheng Chen wrote:
Add operating-points-v2, clock, and regulator supply properties required by mt8173-cpufreq driver to enable it.
Signed-off-by: Pi-Cheng Chen pi-cheng.chen@linaro.org
This patch is based on the patch[1] that adds underlying clock MUX for MT8173 which is needed by mt8173-cpufreq driver but not yet picked.
[1] http://article.gmane.org/gmane.linux.kernel.clk/325
arch/arm64/boot/dts/mediatek/mt8173-evb.dts | 18 ++++++ arch/arm64/boot/dts/mediatek/mt8173.dtsi | 90 +++++++++++++++++++++++++++++ 2 files changed, 108 insertions(+)
Acked-by: Viresh Kumar viresh.kumar@linaro.org
This patch is now in linux-next through Rafael's pm tree, and it breaks the arm64 build:
arm64-defconfigError: ../arch/arm64/boot/dts/mediatek/mt8173.dtsi:132.24-25 syntax error
Please revert.
In the future, please send all dts changes through the proper maintainer channels (-> Mattias -> arm-soc), and make sure they actually build.
Rafael has already reverted that, AFAIK, after Mark Brown reported the build issue.
Applied to v4.5-next/dts
Thanks.
On 02/02/16 12:06, Matthias Brugger wrote:
On 05/01/16 11:24, Viresh Kumar wrote:
On 05-01-16, 11:21, Arnd Bergmann wrote:
On Monday 28 December 2015 08:43:40 Viresh Kumar wrote:
On 27-12-15, 14:21, Pi-Cheng Chen wrote:
Add operating-points-v2, clock, and regulator supply properties required by mt8173-cpufreq driver to enable it.
Signed-off-by: Pi-Cheng Chen pi-cheng.chen@linaro.org
This patch is based on the patch[1] that adds underlying clock MUX for MT8173 which is needed by mt8173-cpufreq driver but not yet picked.
[1] http://article.gmane.org/gmane.linux.kernel.clk/325
arch/arm64/boot/dts/mediatek/mt8173-evb.dts | 18 ++++++ arch/arm64/boot/dts/mediatek/mt8173.dtsi | 90 +++++++++++++++++++++++++++++ 2 files changed, 108 insertions(+)
Acked-by: Viresh Kumar viresh.kumar@linaro.org
This patch is now in linux-next through Rafael's pm tree, and it breaks the arm64 build:
arm64-defconfigError: ../arch/arm64/boot/dts/mediatek/mt8173.dtsi:132.24-25 syntax error
Please revert.
In the future, please send all dts changes through the proper maintainer channels (-> Mattias -> arm-soc), and make sure they actually build.
Rafael has already reverted that, AFAIK, after Mark Brown reported the build issue.
Applied to v4.5-next/dts
I oversaw that this needs a clock patch, which is not yet mainlined. I deleted this patch from my tree.
On Tue, Feb 2, 2016 at 10:09 PM, Matthias Brugger matthias.bgg@gmail.com wrote:
On 02/02/16 12:06, Matthias Brugger wrote:
On 05/01/16 11:24, Viresh Kumar wrote:
On 05-01-16, 11:21, Arnd Bergmann wrote:
On Monday 28 December 2015 08:43:40 Viresh Kumar wrote:
On 27-12-15, 14:21, Pi-Cheng Chen wrote:
Add operating-points-v2, clock, and regulator supply properties required by mt8173-cpufreq driver to enable it.
Signed-off-by: Pi-Cheng Chen pi-cheng.chen@linaro.org
This patch is based on the patch[1] that adds underlying clock MUX for MT8173 which is needed by mt8173-cpufreq driver but not yet picked.
[1] http://article.gmane.org/gmane.linux.kernel.clk/325
arch/arm64/boot/dts/mediatek/mt8173-evb.dts | 18 ++++++ arch/arm64/boot/dts/mediatek/mt8173.dtsi | 90 +++++++++++++++++++++++++++++ 2 files changed, 108 insertions(+)
Acked-by: Viresh Kumar viresh.kumar@linaro.org
This patch is now in linux-next through Rafael's pm tree, and it breaks the arm64 build:
arm64-defconfigError: ../arch/arm64/boot/dts/mediatek/mt8173.dtsi:132.24-25 syntax error
Please revert.
In the future, please send all dts changes through the proper maintainer channels (-> Mattias -> arm-soc), and make sure they actually build.
Rafael has already reverted that, AFAIK, after Mark Brown reported the build issue.
Applied to v4.5-next/dts
I oversaw that this needs a clock patch, which is not yet mainlined. I deleted this patch from my tree.
I should mention that explicitly. Sorry for the inconvenience.
Pi-Cheng
linaro-kernel@lists.linaro.org
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