On 13 March 2015 at 13:02, Alex Shi alex.shi@linaro.org wrote:

Hi Mark, Sumit and Amit,

Please review the merge conflict resolving patch. BTW, do we need to pick up 5aa9ef6f286 on stable kernel?

Chase, Vishal,

I pushed the branch to linux-linaro-lsk-v3.14-android-test 6 hours ago. But didn't find the CI or testing image result, where are them?

The job has not yet run. I have increased the priority now: https://validation.linaro.org/scheduler/job/283183 https://validation.linaro.org/scheduler/job/283648

Thanks

---

commit 438628396ca8a44f6b710a73612939bc54633d7c Merge: 5afe132 0d590a1 Author: Alex Shi alex.shi@linaro.org Date: Fri Mar 13 09:15:58 2015 +0800

Merge branch 'linux-linaro-lsk-v3.14' into

linux-linaro-lsk-v3.14-android

Remove cpuinfo_arm64/cpuinfo_store_cpu() that comes from commit
42b34c73ae40(used for stable kernel only), since we have
newer commit 5aa9ef6f286.

Conflicts:
    arch/arm64/include/asm/cputype.h
    arch/arm64/kernel/setup.c

diff --git a/arch/arm64/kernel/setup.c b/arch/arm64/kernel/setup.c index 90c4c12..8290d06 100644 --- a/arch/arm64/kernel/setup.c +++ b/arch/arm64/kernel/setup.c @@ -45,6 +45,7 @@ #include <linux/personality.h>

#include <asm/fixmap.h> +#include <asm/cpu.h> #include <asm/cputype.h> #include <asm/elf.h> #include <asm/cputable.h> @@ -197,19 +198,6 @@ static void __init smp_build_mpidr_hash(void) } #endif

-struct cpuinfo_arm64 {

•   struct cpu      cpu;
  

•   u32             reg_midr;
  

-};

-static DEFINE_PER_CPU(struct cpuinfo_arm64, cpu_data);

-void cpuinfo_store_cpu(void) -{

•   struct cpuinfo_arm64 *info = this_cpu_ptr(&cpu_data);
  

•   info->reg_midr = read_cpuid_id();
  

-}

static void __init setup_processor(void) { struct cpu_info *cpu_info; @@ -230,7 +218,7 @@ static void __init setup_processor(void) sprintf(init_utsname()->machine, ELF_PLATFORM); elf_hwcap = 0;

•   cpuinfo_store_cpu();
  

•   cpuinfo_store_boot_cpu();
  
    /*
     * ID_AA64ISAR0_EL1 contains 4-bit wide signed feature blocks.
  

@@ -308,6 +296,8 @@ static void __init setup_machine_fdt(phys_addr_t dt_phys) while (true) cpu_relax(); }

•   dump_stack_set_arch_desc("%s (DT)", of_flat_dt_get_machine_name());
  

}

/* @@ -468,6 +458,15 @@ static const char *compat_hwcap_str[] = { "lpae", "evtstrm" };

+static const char *compat_hwcap2_str[] = {

•   "aes",
  

•   "pmull",
  

•   "sha1",
  

•   "sha2",
  

•   "crc32",
  

•   NULL
  

+}; #endif /* CONFIG_COMPAT */

static int c_show(struct seq_file *m, void *v) @@ -499,6 +498,10 @@ static int c_show(struct seq_file *m, void *v) for (j = 0; compat_hwcap_str[j]; j++) if (compat_elf_hwcap & (1 << j)) seq_printf(m, " %s", compat_hwcap_str[j]);

•                   for (j = 0; compat_hwcap2_str[j]; j++)
  

•                           if (compat_elf_hwcap2 & (1 << j))
  

•                                   seq_printf(m, " %s",
  

compat_hwcap2_str[j]); #endif /* CONFIG_COMPAT */ } else { for (j = 0; hwcap_str[j]; j++) @@ -507,11 +510,12 @@ static int c_show(struct seq_file *m, void *v) } seq_puts(m, "\n");

•           seq_printf(m, "CPU implementer\t: 0x%02x\n", (midr >> 24));
  

•           seq_printf(m, "CPU implementer\t: 0x%02x\n",
  

•                      MIDR_IMPLEMENTOR(midr));
            seq_printf(m, "CPU architecture: 8\n");
  

•           seq_printf(m, "CPU variant\t: 0x%x\n", ((midr >> 20) &
  

0xf));

•           seq_printf(m, "CPU part\t: 0x%03x\n", ((midr >> 4) &
  

0xfff));

•           seq_printf(m, "CPU revision\t: %d\n\n", (midr & 0xf));
  

•           seq_printf(m, "CPU variant\t: 0x%x\n", MIDR_VARIANT(midr));
  

•           seq_printf(m, "CPU part\t: 0x%03x\n", MIDR_PARTNUM(midr));
  

•           seq_printf(m, "CPU revision\t: %d\n\n",
  

MIDR_REVISION(midr)); }

    return 0;

-- Thanks Alex