commit b8c5d882c833 upstream
This patch should have made it into kernel version 5.4 as it fixes some
major stability issue running on Marvell A7K/A8K, for which it was
originally developed, which was introduced by an earlier patch.
It is identical to the upstream patch, save for some whitespace fixes
that were removed to not violate the "no trivial fixes" rule.
Below follows the original patch text as submitted for kernel 5.5.
This patch corrects an error in the Transform Record Cache initialization
code that was causing intermittent stability problems on the Macchiatobin
board.
Unfortunately, due to HW platform specifics, the problem could not happen
on the main development platform, being the VCU118 Xilinx development
board. And since it was a problem with hash table access, it was very
dependent on the actual physical context record DMA buffers being used,
i.e. with some (bad) luck it could seemingly work quit stable for a while.
Fixes: 465527bcaebc ("crypto: inside-secure - Probe transform record cache RAM sizes")
Signed-off-by: Pascal van Leeuwen <pvanleeuwen(a)verimatrix.com>
---
drivers/crypto/inside-secure/safexcel.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/crypto/inside-secure/safexcel.c b/drivers/crypto/inside-secure/safexcel.c
index 4ab1bde..40adf8c 100644
--- a/drivers/crypto/inside-secure/safexcel.c
+++ b/drivers/crypto/inside-secure/safexcel.c
@@ -223,7 +223,7 @@ static void eip197_trc_cache_init(struct safexcel_crypto_priv *priv)
/* Step #4: determine current size of hash table in dwords */
cs_ht_wc = 16<<cs_ht_sz; /* dwords, not admin words */
/* Step #5: add back excess words and see if we can fit more records */
- cs_rc_max = min_t(uint, cs_rc_abs_max, asize - (cs_ht_wc >> 4));
+ cs_rc_max = min_t(uint, cs_rc_abs_max, asize - (cs_ht_wc >> 2));
/* Clear the cache RAMs */
eip197_trc_cache_clear(priv, cs_rc_max, cs_ht_wc);
--
1.8.3.1
From: Eugen Hristev <eugen.hristev(a)microchip.com>
[ Upstream commit 263eaf8f172d9f44e15d6aca85fe40ec18d2c477 ]
The regmap update bits call was not selecting the proper mask, considering
the bits which was updating.
Update the mask from call to also include OSCBYPASS.
Removed MOSCEN which was not updated.
Fixes: 1bdf02326b71 ("clk: at91: make use of syscon/regmap internally")
Signed-off-by: Eugen Hristev <eugen.hristev(a)microchip.com>
Link: https://lkml.kernel.org/r/1568042692-11784-1-git-send-email-eugen.hristev@m…
Acked-by: Alexandre Belloni <alexandre.belloni(a)bootlin.com>
Reviewed-by: Claudiu Beznea <claudiu.beznea(a)microchip.com>
Signed-off-by: Stephen Boyd <sboyd(a)kernel.org>
Signed-off-by: Lee Jones <lee.jones(a)linaro.org>
---
drivers/clk/at91/clk-main.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/clk/at91/clk-main.c b/drivers/clk/at91/clk-main.c
index 2f97a843d6d6..b29bc7ec2ef9 100644
--- a/drivers/clk/at91/clk-main.c
+++ b/drivers/clk/at91/clk-main.c
@@ -162,7 +162,7 @@ at91_clk_register_main_osc(struct regmap *regmap,
if (bypass)
regmap_update_bits(regmap,
AT91_CKGR_MOR, MOR_KEY_MASK |
- AT91_PMC_MOSCEN,
+ AT91_PMC_OSCBYPASS,
AT91_PMC_OSCBYPASS | AT91_PMC_KEY);
hw = &osc->hw;
--
2.24.0
From: Eugen Hristev <eugen.hristev(a)microchip.com>
[ Upstream commit 263eaf8f172d9f44e15d6aca85fe40ec18d2c477 ]
The regmap update bits call was not selecting the proper mask, considering
the bits which was updating.
Update the mask from call to also include OSCBYPASS.
Removed MOSCEN which was not updated.
Fixes: 1bdf02326b71 ("clk: at91: make use of syscon/regmap internally")
Signed-off-by: Eugen Hristev <eugen.hristev(a)microchip.com>
Link: https://lkml.kernel.org/r/1568042692-11784-1-git-send-email-eugen.hristev@m…
Acked-by: Alexandre Belloni <alexandre.belloni(a)bootlin.com>
Reviewed-by: Claudiu Beznea <claudiu.beznea(a)microchip.com>
Signed-off-by: Stephen Boyd <sboyd(a)kernel.org>
Signed-off-by: Lee Jones <lee.jones(a)linaro.org>
---
drivers/clk/at91/clk-main.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/clk/at91/clk-main.c b/drivers/clk/at91/clk-main.c
index 2f97a843d6d6..b29bc7ec2ef9 100644
--- a/drivers/clk/at91/clk-main.c
+++ b/drivers/clk/at91/clk-main.c
@@ -162,7 +162,7 @@ at91_clk_register_main_osc(struct regmap *regmap,
if (bypass)
regmap_update_bits(regmap,
AT91_CKGR_MOR, MOR_KEY_MASK |
- AT91_PMC_MOSCEN,
+ AT91_PMC_OSCBYPASS,
AT91_PMC_OSCBYPASS | AT91_PMC_KEY);
hw = &osc->hw;
--
2.24.0
We don't want imported/exported BOs to be purges, as those are shared
with other processes that might still use them. We should also refuse
to export a BO if it's been marked purgeable or has already been purged.
Fixes: 013b65101315 ("drm/panfrost: Add madvise and shrinker support")
Cc: <stable(a)vger.kernel.org>
Signed-off-by: Boris Brezillon <boris.brezillon(a)collabora.com>
---
drivers/gpu/drm/panfrost/panfrost_drv.c | 19 ++++++++++++++++-
drivers/gpu/drm/panfrost/panfrost_gem.c | 27 +++++++++++++++++++++++++
2 files changed, 45 insertions(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/panfrost/panfrost_drv.c b/drivers/gpu/drm/panfrost/panfrost_drv.c
index 1c67ac434e10..751df975534f 100644
--- a/drivers/gpu/drm/panfrost/panfrost_drv.c
+++ b/drivers/gpu/drm/panfrost/panfrost_drv.c
@@ -343,6 +343,7 @@ static int panfrost_ioctl_madvise(struct drm_device *dev, void *data,
struct drm_panfrost_madvise *args = data;
struct panfrost_device *pfdev = dev->dev_private;
struct drm_gem_object *gem_obj;
+ int ret;
gem_obj = drm_gem_object_lookup(file_priv, args->handle);
if (!gem_obj) {
@@ -350,6 +351,19 @@ static int panfrost_ioctl_madvise(struct drm_device *dev, void *data,
return -ENOENT;
}
+ /*
+ * We don't want to mark exported/imported BOs as purgeable: we're not
+ * the only owner in that case.
+ */
+ mutex_lock(&dev->object_name_lock);
+ if (gem_obj->dma_buf)
+ ret = -EINVAL;
+ else
+ ret = 0;
+
+ if (ret)
+ goto out_unlock_object_name;
+
mutex_lock(&pfdev->shrinker_lock);
args->retained = drm_gem_shmem_madvise(gem_obj, args->madv);
@@ -364,8 +378,11 @@ static int panfrost_ioctl_madvise(struct drm_device *dev, void *data,
}
mutex_unlock(&pfdev->shrinker_lock);
+out_unlock_object_name:
+ mutex_unlock(&dev->object_name_lock);
+
drm_gem_object_put_unlocked(gem_obj);
- return 0;
+ return ret;
}
int panfrost_unstable_ioctl_check(void)
diff --git a/drivers/gpu/drm/panfrost/panfrost_gem.c b/drivers/gpu/drm/panfrost/panfrost_gem.c
index 92a95210a899..31d6417dd21c 100644
--- a/drivers/gpu/drm/panfrost/panfrost_gem.c
+++ b/drivers/gpu/drm/panfrost/panfrost_gem.c
@@ -99,6 +99,32 @@ void panfrost_gem_close(struct drm_gem_object *obj, struct drm_file *file_priv)
spin_unlock(&priv->mm_lock);
}
+static struct dma_buf *
+panfrost_gem_export(struct drm_gem_object *obj, int flags)
+{
+ struct panfrost_gem_object *bo = to_panfrost_bo(obj);
+ int ret;
+
+ /*
+ * We must make sure the BO has not been marked purgeable/purged before
+ * adding the mapping.
+ * Note that we don't need to protect this test with a lock because
+ * &drm_gem_object_funcs.export() is called with
+ * &drm_device.object_lock held, and panfrost_ioctl_madvise() takes
+ * this lock before calling drm_gem_shmem_madvise() (the function that
+ * modifies bo->base.madv).
+ */
+ if (bo->base.madv == PANFROST_MADV_WILLNEED)
+ ret = -EINVAL;
+ else
+ ret = 0;
+
+ if (ret)
+ return ERR_PTR(ret);
+
+ return drm_gem_prime_export(obj, flags);
+}
+
static int panfrost_gem_pin(struct drm_gem_object *obj)
{
if (to_panfrost_bo(obj)->is_heap)
@@ -112,6 +138,7 @@ static const struct drm_gem_object_funcs panfrost_gem_funcs = {
.open = panfrost_gem_open,
.close = panfrost_gem_close,
.print_info = drm_gem_shmem_print_info,
+ .export = panfrost_gem_export,
.pin = panfrost_gem_pin,
.unpin = drm_gem_shmem_unpin,
.get_sg_table = drm_gem_shmem_get_sg_table,
--
2.23.0
From: Eugen Hristev <eugen.hristev(a)microchip.com>
[ Upstream commit 263eaf8f172d9f44e15d6aca85fe40ec18d2c477 ]
The regmap update bits call was not selecting the proper mask, considering
the bits which was updating.
Update the mask from call to also include OSCBYPASS.
Removed MOSCEN which was not updated.
Fixes: 1bdf02326b71 ("clk: at91: make use of syscon/regmap internally")
Signed-off-by: Eugen Hristev <eugen.hristev(a)microchip.com>
Link: https://lkml.kernel.org/r/1568042692-11784-1-git-send-email-eugen.hristev@m…
Acked-by: Alexandre Belloni <alexandre.belloni(a)bootlin.com>
Reviewed-by: Claudiu Beznea <claudiu.beznea(a)microchip.com>
Signed-off-by: Stephen Boyd <sboyd(a)kernel.org>
Signed-off-by: Lee Jones <lee.jones(a)linaro.org>
---
drivers/clk/at91/clk-main.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/clk/at91/clk-main.c b/drivers/clk/at91/clk-main.c
index 2f97a843d6d6..b29bc7ec2ef9 100644
--- a/drivers/clk/at91/clk-main.c
+++ b/drivers/clk/at91/clk-main.c
@@ -162,7 +162,7 @@ at91_clk_register_main_osc(struct regmap *regmap,
if (bypass)
regmap_update_bits(regmap,
AT91_CKGR_MOR, MOR_KEY_MASK |
- AT91_PMC_MOSCEN,
+ AT91_PMC_OSCBYPASS,
AT91_PMC_OSCBYPASS | AT91_PMC_KEY);
hw = &osc->hw;
--
2.24.0
commit f8914a14623a79b73f72b2b1ee4cd9b2cb91b735 upstream
---
>From f8914a14623a79b73f72b2b1ee4cd9b2cb91b735 Mon Sep 17 00:00:00 2001
From: Christian Lamparter <chunkeey(a)gmail.com>
Date: Mon, 25 Mar 2019 13:50:19 +0100
Subject: [PATCH for-4.19-stable] ath10k: restore QCA9880-AR1A (v1) detection
To: linux-wireless(a)vger.kernel.org,
ath10k(a)lists.infradead.org
Cc: Kalle Valo <kvalo(a)codeaurora.org>
This patch restores the old behavior that read
the chip_id on the QCA988x before resetting the
chip. This needs to be done in this order since
the unsupported QCA988x AR1A chips fall off the
bus when resetted. Otherwise the next MMIO Op
after the reset causes a BUS ERROR and panic.
Cc: stable(a)vger.kernel.org # 4.19
Fixes: 1a7fecb766c8 ("ath10k: reset chip before reading chip_id in probe")
Signed-off-by: Christian Lamparter <chunkeey(a)gmail.com>
---
drivers/net/wireless/ath/ath10k/pci.c | 36 +++++++++++++++++++--------
1 file changed, 25 insertions(+), 11 deletions(-)
diff --git a/drivers/net/wireless/ath/ath10k/pci.c b/drivers/net/wireless/ath/ath10k/pci.c
--- a/drivers/net/wireless/ath/ath10k/pci.c 2019-09-08 00:07:21.374565470 +0200
+++ b/drivers/net/wireless/ath/ath10k/pci.c 2019-09-08 00:17:15.365912133 +0200
@@ -3483,7 +3483,7 @@ static int ath10k_pci_probe(struct pci_d
struct ath10k_pci *ar_pci;
enum ath10k_hw_rev hw_rev;
u32 chip_id;
- bool pci_ps;
+ bool pci_ps, is_qca988x = false;
int (*pci_soft_reset)(struct ath10k *ar);
int (*pci_hard_reset)(struct ath10k *ar);
u32 (*targ_cpu_to_ce_addr)(struct ath10k *ar, u32 addr);
@@ -3493,6 +3493,7 @@ static int ath10k_pci_probe(struct pci_d
case QCA988X_2_0_DEVICE_ID:
hw_rev = ATH10K_HW_QCA988X;
pci_ps = false;
+ is_qca988x = true;
pci_soft_reset = ath10k_pci_warm_reset;
pci_hard_reset = ath10k_pci_qca988x_chip_reset;
targ_cpu_to_ce_addr = ath10k_pci_qca988x_targ_cpu_to_ce_addr;
@@ -3612,6 +3613,19 @@ static int ath10k_pci_probe(struct pci_d
goto err_deinit_irq;
}
+ /* Read CHIP_ID before reset to catch QCA9880-AR1A v1 devices that
+ * fall off the bus during chip_reset. These chips have the same pci
+ * device id as the QCA9880 BR4A or 2R4E. So that's why the check.
+ */
+ if (is_qca988x) {
+ chip_id = ath10k_pci_soc_read32(ar, SOC_CHIP_ID_ADDRESS);
+ if (chip_id != 0xffffffff) {
+ if (!ath10k_pci_chip_is_supported(pdev->device,
+ chip_id))
+ goto err_unsupported;
+ }
+ }
+
ret = ath10k_pci_chip_reset(ar);
if (ret) {
ath10k_err(ar, "failed to reset chip: %d\n", ret);
@@ -3624,11 +3638,8 @@ static int ath10k_pci_probe(struct pci_d
goto err_free_irq;
}
- if (!ath10k_pci_chip_is_supported(pdev->device, chip_id)) {
- ath10k_err(ar, "device %04x with chip_id %08x isn't supported\n",
- pdev->device, chip_id);
- goto err_free_irq;
- }
+ if (!ath10k_pci_chip_is_supported(pdev->device, chip_id))
+ goto err_unsupported;
ret = ath10k_core_register(ar, chip_id);
if (ret) {
@@ -3638,6 +3649,10 @@ static int ath10k_pci_probe(struct pci_d
return 0;
+err_unsupported:
+ ath10k_err(ar, "device %04x with chip_id %08x isn't supported\n",
+ pdev->device, bus_params.chip_id);
+
err_free_irq:
ath10k_pci_free_irq(ar);
ath10k_pci_rx_retry_sync(ar);