The patch titled
Subject: scripts/gdb: fix 'lx-current' for x86
has been added to the -mm mm-hotfixes-unstable branch. Its filename is
scripts-gdb-fix-lx-current-for-x86.patch
This patch will shortly appear at
https://git.kernel.org/pub/scm/linux/kernel/git/akpm/25-new.git/tree/patche…
This patch will later appear in the mm-hotfixes-unstable branch at
git://git.kernel.org/pub/scm/linux/kernel/git/akpm/mm
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------------------------------------------------------
From: Jeff Xie <xiehuan09(a)gmail.com>
Subject: scripts/gdb: fix 'lx-current' for x86
Date: Sat, 4 Feb 2023 17:01:39 +0800
When printing the name of the current process, it will report an error:
(gdb) p $lx_current().comm Python Exception <class 'gdb.error'> No symbol
"current_task" in current context.: Error occurred in Python: No symbol
"current_task" in current context.
Because e57ef2ed97c1 ("x86: Put hot per CPU variables into a struct")
changed it.
Link: https://lkml.kernel.org/r/20230204090139.1789264-1-xiehuan09@gmail.com
Fixes: e57ef2ed97c1 ("x86: Put hot per CPU variables into a struct")
Signed-off-by: Jeff Xie <xiehuan09(a)gmail.com>
Cc: Jan Kiszka <jan.kiszka(a)siemens.com>
Cc: <stable(a)vger.kernel.org>
Signed-off-by: Andrew Morton <akpm(a)linux-foundation.org>
---
scripts/gdb/linux/cpus.py | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
--- a/scripts/gdb/linux/cpus.py~scripts-gdb-fix-lx-current-for-x86
+++ a/scripts/gdb/linux/cpus.py
@@ -163,7 +163,7 @@ def get_current_task(cpu):
task_ptr_type = task_type.get_type().pointer()
if utils.is_target_arch("x86"):
- var_ptr = gdb.parse_and_eval("¤t_task")
+ var_ptr = gdb.parse_and_eval("&pcpu_hot.current_task")
return per_cpu(var_ptr, cpu).dereference()
elif utils.is_target_arch("aarch64"):
current_task_addr = gdb.parse_and_eval("$SP_EL0")
_
Patches currently in -mm which might be from xiehuan09(a)gmail.com are
scripts-gdb-fix-lx-current-for-x86.patch
On platforms that do not support IOMMU Extended capability bit 0
Page-walk Coherency, CPU caches are not snooped when IOMMU is accessing
any translation structures. IOMMU access goes only directly to
memory. Intel IOMMU code was missing a flush for the PASID table
directory that resulted in the unrecoverable fault as shown below.
This patch adds a clflush when activating a PASID table directory.
There's no need to do clflush of the PASID directory pointer when we
deactivate a context entry in that IOMMU hardware will not see the old
PASID directory pointer after we clear the context entry.
[ 0.555386] DMAR: DRHD: handling fault status reg 3
[ 0.555805] DMAR: [DMA Read NO_PASID] Request device [00:0d.2] fault addr 0x1026a4000 [fault reason 0x51] SM: Present bit in Directory Entry is clear
[ 0.556348] DMAR: Dump dmar1 table entries for IOVA 0x1026a4000
[ 0.556348] DMAR: scalable mode root entry: hi 0x0000000102448001, low 0x0000000101b3e001
[ 0.556348] DMAR: context entry: hi 0x0000000000000000, low 0x0000000101b4d401
[ 0.556348] DMAR: pasid dir entry: 0x0000000101b4e001
[ 0.556348] DMAR: pasid table entry[0]: 0x0000000000000109
[ 0.556348] DMAR: pasid table entry[1]: 0x0000000000000001
[ 0.556348] DMAR: pasid table entry[2]: 0x0000000000000000
[ 0.556348] DMAR: pasid table entry[3]: 0x0000000000000000
[ 0.556348] DMAR: pasid table entry[4]: 0x0000000000000000
[ 0.556348] DMAR: pasid table entry[5]: 0x0000000000000000
[ 0.556348] DMAR: pasid table entry[6]: 0x0000000000000000
[ 0.556348] DMAR: pasid table entry[7]: 0x0000000000000000
[ 0.556348] DMAR: PTE not present at level 4
Cc: <stable(a)vger.kernel.org>
Reported-by: Sukumar Ghorai <sukumar.ghorai(a)intel.com>
Signed-off-by: Ashok Raj <ashok.raj(a)intel.com>
Signed-off-by: Jacob Pan <jacob.jun.pan(a)linux.intel.com>
---
drivers/iommu/intel/iommu.c | 6 ++++++
1 file changed, 6 insertions(+)
diff --git a/drivers/iommu/intel/iommu.c b/drivers/iommu/intel/iommu.c
index 59df7e42fd53..b4878c7ac008 100644
--- a/drivers/iommu/intel/iommu.c
+++ b/drivers/iommu/intel/iommu.c
@@ -1976,6 +1976,12 @@ static int domain_context_mapping_one(struct dmar_domain *domain,
pds = context_get_sm_pds(table);
context->lo = (u64)virt_to_phys(table->table) |
context_pdts(pds);
+ /*
+ * Scalable-mode PASID directory pointer is not snooped if the
+ * coherent bit is not set.
+ */
+ if (!ecap_coherent(iommu->ecap))
+ clflush_cache_range(table->table, sizeof(void *));
/* Setup the RID_PASID field: */
context_set_sm_rid2pasid(context, PASID_RID2PASID);
--
2.25.1