On 12/02/2025 11:01, niravkumar.l.rabara@intel.com wrote:
From: Niravkumar L Rabara niravkumar.l.rabara@intel.com
Fix gpio0 controller address for Agilex5.
How do you fix it exactly?
Fixes: 3f7c869e143a ("arm64: dts: socfpga: agilex5: Add gpio0 node and spi dma handshake id") Cc: stable@vger.kernel.org Signed-off-by: Niravkumar L Rabara niravkumar.l.rabara@intel.com
arch/arm64/boot/dts/intel/socfpga_agilex5.dtsi | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/arch/arm64/boot/dts/intel/socfpga_agilex5.dtsi b/arch/arm64/boot/dts/intel/socfpga_agilex5.dtsi index 51c6e19e40b8..9e4ef24c8318 100644 --- a/arch/arm64/boot/dts/intel/socfpga_agilex5.dtsi +++ b/arch/arm64/boot/dts/intel/socfpga_agilex5.dtsi @@ -222,7 +222,7 @@ i3c1: i3c@10da1000 { status = "disabled"; };
gpio0: gpio@ffc03200 {
gpio0: gpio@10c03200 {
I see now warning. Are you sure you tested it according to maintainer-soc-clean-dts profile?
compatible = "snps,dw-apb-gpio"; reg = <0xffc03200 0x100>; #address-cells = <1>;
Best regards, Krzysztof