Hi Peter,
On 2023-05-08 12:16 p.m., Stephane Eranian wrote:
On Mon, May 8, 2023 at 7:05 AM kan.liang@linux.intel.com wrote:
From: Kan Liang kan.liang@linux.intel.com
The number of CHAs from the discovery table on some SPR variants is incorrect, because of a firmware issue. An accurate number can be read from the MSR UNC_CBO_CONFIG.
Fixes: 949b11381f81 ("perf/x86/intel/uncore: Add Sapphire Rapids server CHA support") Reported-by: Stephane Eranian eranian@google.com Signed-off-by: Kan Liang kan.liang@linux.intel.com
Tested-by: Stephane Eranian eranian@google.com
Gentle ping.
Do you have any comments for the patch?
Thanks, Kan
Cc: stable@vger.kernel.org
arch/x86/events/intel/uncore_snbep.c | 11 +++++++++++ 1 file changed, 11 insertions(+)
diff --git a/arch/x86/events/intel/uncore_snbep.c b/arch/x86/events/intel/uncore_snbep.c index 7d1199554fe3..54abd93828bf 100644 --- a/arch/x86/events/intel/uncore_snbep.c +++ b/arch/x86/events/intel/uncore_snbep.c @@ -6138,6 +6138,7 @@ static struct intel_uncore_type spr_uncore_mdf = { };
#define UNCORE_SPR_NUM_UNCORE_TYPES 12 +#define UNCORE_SPR_CHA 0 #define UNCORE_SPR_IIO 1 #define UNCORE_SPR_IMC 6 #define UNCORE_SPR_UPI 8 @@ -6448,12 +6449,22 @@ static int uncore_type_max_boxes(struct intel_uncore_type **types, return max + 1; }
+#define SPR_MSR_UNC_CBO_CONFIG 0x2FFE
void spr_uncore_cpu_init(void) {
struct intel_uncore_type *type;u64 num_cbo;uncore_msr_uncores = uncore_get_uncores(UNCORE_ACCESS_MSR, UNCORE_SPR_MSR_EXTRA_UNCORES, spr_msr_uncores);type = uncore_find_type_by_id(uncore_msr_uncores, UNCORE_SPR_CHA);if (type) {rdmsrl(SPR_MSR_UNC_CBO_CONFIG, num_cbo);type->num_boxes = num_cbo;} spr_uncore_iio_free_running.num_boxes = uncore_type_max_boxes(uncore_msr_uncores, UNCORE_SPR_IIO);}
-- 2.35.1