[ Sasha's backport helper bot ]
Hi,
✅ All tests passed successfully. No issues detected. No action required from the submitter.
The upstream commit SHA1 provided is correct: 9cf71eb0faef4bff01df4264841b8465382d7927
WARNING: Author mismatch between patch and upstream commit: Backport author: jianqi.ren.cn@windriver.com Commit author: Steve Wilkinssteve.wilkins@raymarine.com
Status in newer kernel trees: 6.14.y | Present (exact SHA1) 6.12.y | Present (exact SHA1) 6.6.y | Present (different SHA1: 3feda3677e8b)
Note: The patch differs from the upstream commit: --- 1: 9cf71eb0faef4 ! 1: e2b7a4dc57e1d spi: microchip-core: ensure TX and RX FIFOs are empty at start of a transfer @@ Metadata ## Commit message ## spi: microchip-core: ensure TX and RX FIFOs are empty at start of a transfer
+ [ Upstream commit 9cf71eb0faef4bff01df4264841b8465382d7927 ] + While transmitting with rx_len == 0, the RX FIFO is not going to be emptied in the interrupt handler. A subsequent transfer could then read crap from the previous transfer out of the RX FIFO into the @@ Commit message Signed-off-by: Conor Dooley conor.dooley@microchip.com Link: https://patch.msgid.link/20240715-flammable-provoke-459226d08e70@wendy Signed-off-by: Mark Brown broonie@kernel.org + [Minor conflict resolved due to code context change.] + Signed-off-by: Jianqi Ren jianqi.ren.cn@windriver.com + Signed-off-by: He Zhe zhe.he@windriver.com
## drivers/spi/spi-microchip-core.c ## @@ @@ drivers/spi/spi-microchip-core.c: static int mchp_corespi_transfer_one(struct sp
+ mchp_corespi_write(spi, REG_COMMAND, COMMAND_RXFIFORST | COMMAND_TXFIFORST); + - mchp_corespi_write(spi, REG_SLAVE_SELECT, spi->pending_slave_select); - while (spi->tx_len) + mchp_corespi_write_fifo(spi); + ---
Results of testing on various branches:
| Branch | Patch Apply | Build Test | |---------------------------|-------------|------------| | stable/linux-6.1.y | Success | Success |