Hi Dmitry, Konrad,
On Thu, 18 Dec 2025 at 13:33, Dmitry Baryshkov dmitry.baryshkov@oss.qualcomm.com wrote:
On Thu, 18 Dec 2025 at 15:09, Konrad Dybcio konrad.dybcio@oss.qualcomm.com wrote:
On 12/17/25 5:39 PM, Dmitry Baryshkov wrote:
On Wed, Dec 17, 2025 at 01:22:59PM +0100, Konrad Dybcio wrote:
On 12/14/25 8:26 PM, Christopher Obbard wrote:
Hi Konrad,
On Mon, 8 Dec 2025 at 22:36, Christopher Obbard christopher.obbard@linaro.org wrote:
Apologies for the late response, I was in the process of setting some more msm8096 boards up again in my new workspace to test this properly.
> It may be that your board really has a MSM/APQ8x96*SG* which is another > name for the PRO SKU, which happens to have a 2 times wider divider, try > > `cat /sys/bus/soc/devices/soc0/soc_id`
I read the soc_id from both of the msm8096 boards I have:
Open-Q™ 820 µSOM Development Kit (APQ8096)
$ cat /sys/bus/soc/devices/soc0/soc_id 291(FWIW this board is not in mainline yet; but boots with a DT similar enough to the db820c. I have a patch in my upstream backlog enabling that board; watch this space)
DragonBoard™ 820c (APQ8096)
$ cat /sys/bus/soc/devices/soc0/soc_id 291Sorry to nag, but are you able to look into this soc_id and see if it's the PRO SKU ?
No, it's the "normal" one
Maybe Dmitry would know a little more what's going on
Unfortunately, no.
Maybe, the best option would be to really land the revert.
Reviewed-by: Dmitry Baryshkov dmitry.baryshkov@oss.qualcomm.com
Is there a chance that this removal:
case POST_RATE_CHANGE:if (cnd->new_rate < DIV_2_THRESHOLD)ret = clk_cpu_8996_pmux_set_parent(&cpuclk->clkr.hw,SMUX_INDEX);elseret = clk_cpu_8996_pmux_set_parent(&cpuclk->clkr.hw,ACD_INDEX);could have been the cause?
On one hand, we're removing this explicit "set ACD as parent" path, but OTOH determine_rate should have taken care of this..
My idea was that we switch to SMUX temporarily, then CLK framework fixes that for us while performing the actual reparenting.
Christopher, as a quick check, could possibly revert just this chunk?
Do you mean something like this diff? I thought I'd ask and confirm first, to be really sure. This leaves the handlers present for the other two events (PRE_RATE_CHANGE and ABORT_RATE_CHANGE). I didn't bother checking the calls to clk_cpu_8996_pmux_set_parent for errors as it's just a quick hack. If you think this diff is good for a test, I will check it in the next few days.
diff --git a/drivers/clk/qcom/clk-cpu-8996.c b/drivers/clk/qcom/clk-cpu-8996.c index 21d13c0841ed0..5d7f42a86a923 100644 --- a/drivers/clk/qcom/clk-cpu-8996.c +++ b/drivers/clk/qcom/clk-cpu-8996.c @@ -565,6 +565,14 @@ static int cpu_clk_notifier_cb(struct notifier_block *nb, unsigned long event, clk_cpu_8996_pmux_set_parent(&cpuclk->clkr.hw, SMUX_INDEX);
break; + case POST_RATE_CHANGE: + if (cnd->new_rate < DIV_2_THRESHOLD) + clk_cpu_8996_pmux_set_parent(&cpuclk->clkr.hw, + SMUX_INDEX); + else + clk_cpu_8996_pmux_set_parent(&cpuclk->clkr.hw, + ACD_INDEX); + break; case ABORT_RATE_CHANGE: /* Revert manual change */ if (cnd->new_rate < DIV_2_THRESHOLD &&
Cheers!
Christopher Obbard