Hi!
The function mux_get_parent() uses qcom_find_src_index() to find the parent clock index, which is incorrect: qcom_find_src_index() uses src enum for the lookup, while mux_get_parent() should use cfg field (which corresponds to the register value). Add qcom_find_cfg_index() function doing this kind of lookup and use it for mux parent lookup.
This appears to have problems with error handling.
+++ b/drivers/clk/qcom/clk-regmap-mux.c @@ -36,7 +36,7 @@ static u8 mux_get_parent(struct clk_hw * val &= mask; if (mux->parent_map)
return qcom_find_src_index(hw, mux->parent_map, val);
return qcom_find_cfg_index(hw, mux->parent_map, val);So this returns u8.
+int qcom_find_cfg_index(struct clk_hw *hw, const struct parent_map *map, u8 cfg) +{
- int i, num_parents = clk_hw_get_num_parents(hw);
- for (i = 0; i < num_parents; i++)
if (cfg == map[i].cfg)return i;- return -ENOENT;
+}
In case of error, -ENOENT will be cast to u8 in caller. I don't believe that is correct.
Unfortunately there is no way to return proper error code from clk_ops->get_parent() callback. However returning -ENOENT would translate to 254. Then clk_core_get_parent_by_index() would determine that there is no such parent and return NULL. A call to clk_set_parent would reparent the clock.
Yeah, I guess it happens to work.
Returning some sensible default (e.g. 0) would be much worse, since then the clock subsystem would assume that the clock has correct parent. A call to clk_set_parent would always result in ops->set_parent() call, reparenting the clock correctly.
Well ~0 would be sensible in this case. And a comment with explanation.
Most probably it would be correct to make ops->get_parent() return int instead of u8 (either an index or an -ERROR). However this was out of scope for this patch.
Yep, I believe that should happen, long-term.
Best regards, Pavel