6.16-stable review patch. If anyone has any objections, please let me know.
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From: Cristian Ciocaltea cristian.ciocaltea@collabora.com
commit aba7987a536cee67fb0cb724099096fd8f8f5350 upstream.
As with the RK3588 SoC, the HDMI PHY PLL on RK3576 can be used as a more accurate pixel clock source for VOP2, which is actually mandatory to ensure proper support for display modes handling.
Add the missing #clock-cells property to allow using the clock provider functionality of HDMI PHY.
Fixes: ad0ea230ab2a ("arm64: dts: rockchip: Add hdmi for rk3576") Cc: stable@vger.kernel.org Signed-off-by: Cristian Ciocaltea cristian.ciocaltea@collabora.com Tested-by: Nicolas Frattaroli nicolas.frattaroli@collabora.com Link: https://lore.kernel.org/r/20250612-rk3576-hdmitx-fix-v1-2-4b11007d8675@colla... Signed-off-by: Heiko Stuebner heiko@sntech.de Signed-off-by: Greg Kroah-Hartman gregkh@linuxfoundation.org --- arch/arm64/boot/dts/rockchip/rk3576.dtsi | 1 + 1 file changed, 1 insertion(+)
--- a/arch/arm64/boot/dts/rockchip/rk3576.dtsi +++ b/arch/arm64/boot/dts/rockchip/rk3576.dtsi @@ -2393,6 +2393,7 @@ reg = <0x0 0x2b000000 0x0 0x2000>; clocks = <&cru CLK_PHY_REF_SRC>, <&cru PCLK_HDPTX_APB>; clock-names = "ref", "apb"; + #clock-cells = <0>; resets = <&cru SRST_P_HDPTX_APB>, <&cru SRST_HDPTX_INIT>, <&cru SRST_HDPTX_CMN>, <&cru SRST_HDPTX_LANE>; reset-names = "apb", "init", "cmn", "lane";