On Mon, Sep 09, 2024 at 12:38:23PM +0200, Krzysztof Kozlowski wrote:
On 09/09/2024 12:17, Conor Dooley wrote:
On Mon, Sep 09, 2024 at 03:46:27PM +0800, WangYuli wrote:
From: William Qiu william.qiu@starfivetech.com
In JH7110 SoC, we need to go by-pass mode, so we need add the assigned-clock* properties to limit clock frquency.
Signed-off-by: William Qiu william.qiu@starfivetech.com Reviewed-by: Emil Renner Berthing emil.renner.berthing@canonical.com Signed-off-by: Conor Dooley conor.dooley@microchip.com Signed-off-by: WangYuli wangyuli@uniontech.com
What makes any of the patches in this 4 patch series stable material?
That's for stable? It needs to follow stable process rules, so proper commit ID.
[6.6] in the subject and Sasha/Greg/stable list on CC, so I figure it is for stable, yeah. Only one of these patches is a "fix", and not really a functional one, so I would like to know why this stuff is being backported. I think under some definition of "new device IDs and quirks" it could be suitable, but it'd be a looser definition than I personally agree with!
Oh, and also, the 4 patches aren't threaded - you should fix that WangYuli.