If some config options are disabled during compile time, they still are enumerated in macros that use the x86_capability bitmask - cpu_has() or this_cpu_has().
The features are also visible in /proc/cpuinfo even though they are not enabled - which is contrary to what the documentation states about the file. Examples of such feature flags are lam, fred, sgx, ibrs_enhanced, split_lock_detect, user_shstk, avx_vnni and enqcmd.
Add a DISABLED_MASK() macro that returns 32 bit chunks of the disabled feature bits bitmask.
Initialize the cpu_caps_cleared and cpu_caps_set arrays with the contents of the disabled and required bitmasks respectively. Then let apply_forced_caps() clear/set these feature bits in the x86_capability.
Fixes: 6449dcb0cac7 ("x86: CPUID and CR3/CR4 flags for Linear Address Masking") Fixes: 51c158f7aacc ("x86/cpufeatures: Add the CPU feature bit for FRED") Fixes: 706d51681d63 ("x86/speculation: Support Enhanced IBRS on future CPUs") Fixes: e7b6385b01d8 ("x86/cpufeatures: Add Intel SGX hardware bits") Fixes: 6650cdd9a8cc ("x86/split_lock: Enable split lock detection by kernel") Fixes: 701fb66d576e ("x86/cpufeatures: Add CPU feature flags for shadow stacks") Fixes: ff4f82816dff ("x86/cpufeatures: Enumerate ENQCMD and ENQCMDS instructions") Signed-off-by: Maciej Wieczor-Retman maciej.wieczor-retman@intel.com Cc: stable@vger.kernel.org --- Changelog v2: - Redo the patch to utilize a more generic solution, not just fix the LAM and FRED feature bits. - Note more feature flags that shouldn't be present. - Add fixes and cc tags.
arch/x86/kernel/cpu/common.c | 12 ++++++++++++ arch/x86/tools/cpufeaturemasks.awk | 8 ++++++++ 2 files changed, 20 insertions(+)
diff --git a/arch/x86/kernel/cpu/common.c b/arch/x86/kernel/cpu/common.c index 77afca95cced..ba8b5fba8552 100644 --- a/arch/x86/kernel/cpu/common.c +++ b/arch/x86/kernel/cpu/common.c @@ -1709,6 +1709,16 @@ static void __init cpu_parse_early_param(void) } }
+static __init void init_cpu_cap(struct cpuinfo_x86 *c) +{ + int i; + + for (i = 0; i < NCAPINTS; i++) { + cpu_caps_set[i] = REQUIRED_MASK(i); + cpu_caps_cleared[i] = DISABLED_MASK(i); + } +} + /* * Do minimum CPU detection early. * Fields really needed: vendor, cpuid_level, family, model, mask, @@ -1782,6 +1792,8 @@ static void __init early_identify_cpu(struct cpuinfo_x86 *c) if (!pgtable_l5_enabled()) setup_clear_cpu_cap(X86_FEATURE_LA57);
+ init_cpu_cap(c); + detect_nopl(); }
diff --git a/arch/x86/tools/cpufeaturemasks.awk b/arch/x86/tools/cpufeaturemasks.awk index 173d5bf2d999..2e2412f7681f 100755 --- a/arch/x86/tools/cpufeaturemasks.awk +++ b/arch/x86/tools/cpufeaturemasks.awk @@ -82,6 +82,14 @@ END { } printf " 0\t\\n"; printf "\t) & (1U << ((x) & 31)))\n\n"; + + printf "\n#define %s_MASK(x)\t\t\t\t\\n", s; + printf "\t((\t\t\t\t"; + for (i = 0; i < ncapints; i++) { + if (masks[i]) + printf "\t\t\\n\t\t(x) == %2d ? %s_MASK%d :", i, s, i; + } + printf " 0))\t\\n\n"; }
printf "#endif /* _ASM_X86_CPUFEATUREMASKS_H */\n";