9 Apr
2020
9 Apr
'20
9:43 a.m.
On 09/04/20 06:50, Andy Lutomirski wrote:
The big problem is that #VE doesn't exist on AMD, and I really think that any fancy protocol we design should work on AMD. I have no problem with #VE being a nifty optimization to the protocol on Intel, but it should *work* without #VE.
Yes and unfortunately AMD does not like to inject a non-existing exception. Intel only requires the vector to be <=31, but AMD wants the vector to correspond to an exception.
However, software injection is always possible and AMD even suggests that you use software injection for ICEBP and, on older processors, the INT instruction.
Paolo