Re: [PATCH 6.6 v2 1/4] riscv: dts: starfive: add assigned-clock* to limit frquency

On Thu, Sep 12, 2024 at 10:55:05AM +0800, WangYuli wrote:

From: William Qiu william.qiu@starfivetech.com

[ Upstream commit af571133f7ae028ec9b5fdab78f483af13bf28d3 ]

In JH7110 SoC, we need to go by-pass mode, so we need add the assigned-clock* properties to limit clock frquency.

Signed-off-by: William Qiu william.qiu@starfivetech.com Reviewed-by: Emil Renner Berthing emil.renner.berthing@canonical.com Signed-off-by: Conor Dooley conor.dooley@microchip.com Signed-off-by: WangYuli wangyuli@uniontech.com

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.../riscv/boot/dts/starfive/jh7110-starfive-visionfive-2.dtsi | 4 ++++ 1 file changed, 4 insertions(+)

Please rework this series and send only what is needed here.

thanks,

greg k-h