From: Bob Paauwe bob.j.paauwe@intel.com
[ Upstream commit 812b1d2fe527c3c68d04f379aef850dd02db5945 ]
For BXT, there is only one bit that enables/disables dual-link mode and not different bits depending on which pipe is being used.
Signed-off-by: Bob Paauwe bob.j.paauwe@intel.com Link: http://patchwork.freedesktop.org/patch/msgid/1479767046-3964-1-git-send-emai... Signed-off-by: Ville Syrjälä ville.syrjala@linux.intel.com Signed-off-by: Sasha Levin alexander.levin@verizon.com --- drivers/gpu/drm/i915/intel_dsi.c | 5 ++++- 1 file changed, 4 insertions(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/i915/intel_dsi.c b/drivers/gpu/drm/i915/intel_dsi.c index b2e3d3a334f7..a37ce07ba5ad 100644 --- a/drivers/gpu/drm/i915/intel_dsi.c +++ b/drivers/gpu/drm/i915/intel_dsi.c @@ -476,7 +476,10 @@ static void intel_dsi_port_enable(struct intel_encoder *encoder) if (intel_dsi->ports == (BIT(PORT_A) | BIT(PORT_C))) { temp |= (intel_dsi->dual_link - 1) << DUAL_LINK_MODE_SHIFT; - temp |= intel_crtc->pipe ? + if (IS_BROXTON(dev_priv)) + temp |= LANE_CONFIGURATION_DUAL_LINK_A; + else + temp |= intel_crtc->pipe ? LANE_CONFIGURATION_DUAL_LINK_B : LANE_CONFIGURATION_DUAL_LINK_A; }