On Wed, Jan 08, 2020 at 02:41:04PM +0000, Alexandru Elisei wrote:
On 1/8/20 1:43 PM, Mark Rutland wrote:
When KVM injects an exception into a guest, it generates the CPSR value from scratch, configuring CPSR.{M,A,I,T,E}, and setting all other bits to zero.
This isn't correct, as the architecture specifies that some CPSR bits are (conditionally) cleared or set upon an exception, and others are unchanged from the original context.
This patch adds logic to match the architectural behaviour. To make this simple to follow/audit/extend, documentation references are provided, and bits are configured in order of their layout in SPSR_EL2. This layout can be seen in the diagram on ARM DDI 0487E.a page C5-426.
Note that this code is used by both arm and arm64, and is intended to fuction with the SPSR_EL2 and SPSR_HYP layouts.
Signed-off-by: Mark Rutland mark.rutland@arm.com
Looks good:
Reviewed-by: Alexandru Elisei alexandru.elisei@arm.com
Thanks!
I've folded that in (along with your Reviewed-by on patch 1), and pushed out my kvm/exception-state branch again.
Mark.